RT-AC66 3.0.0.4.374.130 core
[tomato.git] / release / src-rt-6.x / linux / linux-2.6 / drivers / usb / host / ohci-pci.c
blob4696cc912e16203540a5185568a27e02bb7c15e2
1 /*
2 * OHCI HCD (Host Controller Driver) for USB.
4 * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
5 * (C) Copyright 2000-2002 David Brownell <dbrownell@users.sourceforge.net>
7 * [ Initialisation is based on Linus' ]
8 * [ uhci code and gregs ohci fragments ]
9 * [ (C) Copyright 1999 Linus Torvalds ]
10 * [ (C) Copyright 1999 Gregory P. Smith]
12 * PCI Bus Glue
14 * This file is licenced under the GPL.
17 #ifndef CONFIG_PCI
18 #error "This file is PCI bus glue. CONFIG_PCI must be defined."
19 #endif
21 /*-------------------------------------------------------------------------*/
23 static int broken_suspend(struct usb_hcd *hcd)
25 device_init_wakeup(&hcd->self.root_hub->dev, 0);
26 return 0;
29 /* AMD 756, for most chips (early revs), corrupts register
30 * values on read ... so enable the vendor workaround.
32 static int ohci_quirk_amd756(struct usb_hcd *hcd)
34 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
36 ohci->flags = OHCI_QUIRK_AMD756;
37 ohci_dbg (ohci, "AMD756 erratum 4 workaround\n");
39 /* also erratum 10 (suspend/resume issues) */
40 return broken_suspend(hcd);
43 /* Apple's OHCI driver has a lot of bizarre workarounds
44 * for this chip. Evidently control and bulk lists
45 * can get confused. (B&W G3 models, and ...)
47 static int ohci_quirk_opti(struct usb_hcd *hcd)
49 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
51 ohci_dbg (ohci, "WARNING: OPTi workarounds unavailable\n");
53 return 0;
56 /* Check for NSC87560. We have to look at the bridge (fn1) to
57 * identify the USB (fn2). This quirk might apply to more or
58 * even all NSC stuff.
60 static int ohci_quirk_ns(struct usb_hcd *hcd)
62 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
63 struct pci_dev *b;
65 b = pci_get_slot (pdev->bus, PCI_DEVFN (PCI_SLOT (pdev->devfn), 1));
66 if (b && b->device == PCI_DEVICE_ID_NS_87560_LIO
67 && b->vendor == PCI_VENDOR_ID_NS) {
68 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
70 ohci->flags |= OHCI_QUIRK_SUPERIO;
71 ohci_dbg (ohci, "Using NSC SuperIO setup\n");
73 pci_dev_put(b);
75 return 0;
78 /* Check for Compaq's ZFMicro chipset, which needs short
79 * delays before control or bulk queues get re-activated
80 * in finish_unlinks()
82 static int ohci_quirk_zfmicro(struct usb_hcd *hcd)
84 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
86 ohci->flags |= OHCI_QUIRK_ZFMICRO;
87 ohci_dbg(ohci, "enabled Compaq ZFMicro chipset quirks\n");
89 return 0;
92 /* Check for Toshiba SCC OHCI which has big endian registers
93 * and little endian in memory data structures
95 static int ohci_quirk_toshiba_scc(struct usb_hcd *hcd)
97 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
99 /* That chip is only present in the southbridge of some
100 * cell based platforms which are supposed to select
101 * CONFIG_USB_OHCI_BIG_ENDIAN_MMIO. We verify here if
102 * that was the case though.
104 #ifdef CONFIG_USB_OHCI_BIG_ENDIAN_MMIO
105 ohci->flags |= OHCI_QUIRK_BE_MMIO;
106 ohci_dbg (ohci, "enabled big endian Toshiba quirk\n");
107 return 0;
108 #else
109 ohci_err (ohci, "unsupported big endian Toshiba quirk\n");
110 return -ENXIO;
111 #endif
114 /* Check for NEC chip and apply quirk for allegedly lost interrupts.
117 static void ohci_quirk_nec_worker(struct work_struct *work)
119 struct ohci_hcd *ohci = container_of(work, struct ohci_hcd, nec_work);
120 int status;
122 status = ohci_init(ohci);
123 if (status != 0) {
124 ohci_err(ohci, "Restarting NEC controller failed in %s, %d\n",
125 "ohci_init", status);
126 return;
129 status = ohci_restart(ohci);
130 if (status != 0)
131 ohci_err(ohci, "Restarting NEC controller failed in %s, %d\n",
132 "ohci_restart", status);
135 static int ohci_quirk_nec(struct usb_hcd *hcd)
137 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
139 ohci->flags |= OHCI_QUIRK_NEC;
140 INIT_WORK(&ohci->nec_work, ohci_quirk_nec_worker);
141 ohci_dbg (ohci, "enabled NEC chipset lost interrupt quirk\n");
143 return 0;
146 /* List of quirks for OHCI */
147 static const struct pci_device_id ohci_pci_quirks[] = {
149 PCI_DEVICE(PCI_VENDOR_ID_AMD, 0x740c),
150 .driver_data = (unsigned long)ohci_quirk_amd756,
153 PCI_DEVICE(PCI_VENDOR_ID_OPTI, 0xc861),
154 .driver_data = (unsigned long)ohci_quirk_opti,
157 PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_ANY_ID),
158 .driver_data = (unsigned long)ohci_quirk_ns,
161 PCI_DEVICE(PCI_VENDOR_ID_COMPAQ, 0xa0f8),
162 .driver_data = (unsigned long)ohci_quirk_zfmicro,
165 PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, 0x01b6),
166 .driver_data = (unsigned long)ohci_quirk_toshiba_scc,
169 PCI_DEVICE(PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_USB),
170 .driver_data = (unsigned long)ohci_quirk_nec,
173 /* Toshiba portege 4000 */
174 .vendor = PCI_VENDOR_ID_AL,
175 .device = 0x5237,
176 .subvendor = PCI_VENDOR_ID_TOSHIBA,
177 .subdevice = 0x0004,
178 .driver_data = (unsigned long) broken_suspend,
181 PCI_DEVICE(PCI_VENDOR_ID_ITE, 0x8152),
182 .driver_data = (unsigned long) broken_suspend,
184 /* FIXME for some of the early AMD 760 southbridges, OHCI
185 * won't work at all. blacklist them.
191 static int ohci_pci_reset (struct usb_hcd *hcd)
193 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
194 int ret = 0;
196 if (hcd->self.controller) {
197 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
198 const struct pci_device_id *quirk_id;
200 quirk_id = pci_match_id(ohci_pci_quirks, pdev);
201 if (quirk_id != NULL) {
202 int (*quirk)(struct usb_hcd *ohci);
203 quirk = (void *)quirk_id->driver_data;
204 ret = quirk(hcd);
207 if (ret == 0) {
208 ohci_hcd_init (ohci);
209 return ohci_init (ohci);
211 return ret;
215 static int __devinit ohci_pci_start (struct usb_hcd *hcd)
217 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
218 int ret;
220 #ifdef CONFIG_PM /* avoid warnings about unused pdev */
221 if (hcd->self.controller) {
222 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
224 /* RWC may not be set for add-in PCI cards, since boot
225 * firmware probably ignored them. This transfers PCI
226 * PM wakeup capabilities (once the PCI layer is fixed).
228 if (device_may_wakeup(&pdev->dev))
229 ohci->hc_control |= OHCI_CTRL_RWC;
231 #endif /* CONFIG_PM */
233 ret = ohci_run (ohci);
234 if (ret < 0) {
235 ohci_err (ohci, "can't start\n");
236 ohci_stop (hcd);
238 return ret;
241 #ifdef CONFIG_PM
243 static int ohci_pci_suspend (struct usb_hcd *hcd, pm_message_t message)
245 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
246 unsigned long flags;
247 int rc = 0;
249 /* Root hub was already suspended. Disable irq emission and
250 * mark HW unaccessible, bail out if RH has been resumed. Use
251 * the spinlock to properly synchronize with possible pending
252 * RH suspend or resume activity.
254 * This is still racy as hcd->state is manipulated outside of
255 * any locks =P But that will be a different fix.
257 spin_lock_irqsave (&ohci->lock, flags);
258 if (hcd->state != HC_STATE_SUSPENDED) {
259 rc = -EINVAL;
260 goto bail;
262 ohci_writel(ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
263 (void)ohci_readl(ohci, &ohci->regs->intrdisable);
265 /* make sure snapshot being resumed re-enumerates everything */
266 if (message.event == PM_EVENT_PRETHAW)
267 ohci_usb_reset(ohci);
269 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
270 bail:
271 spin_unlock_irqrestore (&ohci->lock, flags);
273 return rc;
277 static int ohci_pci_resume (struct usb_hcd *hcd)
279 set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
280 ohci_finish_controller_resume(hcd);
281 return 0;
284 #endif /* CONFIG_PM */
287 /*-------------------------------------------------------------------------*/
289 static const struct hc_driver ohci_pci_hc_driver = {
290 .description = hcd_name,
291 .product_desc = "OHCI Host Controller",
292 .hcd_priv_size = sizeof(struct ohci_hcd),
295 * generic hardware linkage
297 .irq = ohci_irq,
298 .flags = HCD_MEMORY | HCD_USB11,
301 * basic lifecycle operations
303 .reset = ohci_pci_reset,
304 .start = ohci_pci_start,
305 .stop = ohci_stop,
306 .shutdown = ohci_shutdown,
308 #ifdef CONFIG_PM
309 .pci_suspend = ohci_pci_suspend,
310 .pci_resume = ohci_pci_resume,
311 #endif
314 * managing i/o requests and associated device resources
316 .urb_enqueue = ohci_urb_enqueue,
317 .urb_dequeue = ohci_urb_dequeue,
318 .endpoint_disable = ohci_endpoint_disable,
321 * scheduling support
323 .get_frame_number = ohci_get_frame,
326 * root hub support
328 .hub_status_data = ohci_hub_status_data,
329 .hub_control = ohci_hub_control,
330 .hub_irq_enable = ohci_rhsc_enable,
331 #ifdef CONFIG_PM
332 .bus_suspend = ohci_bus_suspend,
333 .bus_resume = ohci_bus_resume,
334 #endif
335 .start_port_reset = ohci_start_port_reset,
338 /*-------------------------------------------------------------------------*/
341 static const struct pci_device_id pci_ids [] = { {
342 /* handle any USB OHCI controller */
343 PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_OHCI, ~0),
344 .driver_data = (unsigned long) &ohci_pci_hc_driver,
345 }, { /* end: all zeroes */ }
347 MODULE_DEVICE_TABLE (pci, pci_ids);
349 /* pci driver glue; this is a "new style" PCI driver module */
350 static struct pci_driver ohci_pci_driver = {
351 .name = (char *) hcd_name,
352 .id_table = pci_ids,
354 .probe = usb_hcd_pci_probe,
355 .remove = usb_hcd_pci_remove,
357 #ifdef CONFIG_PM
358 .suspend = usb_hcd_pci_suspend,
359 .resume = usb_hcd_pci_resume,
360 #endif
362 .shutdown = usb_hcd_pci_shutdown,