RT-AC66 3.0.0.4.374.130 core
[tomato.git] / release / src-rt-6.x / linux / linux-2.6 / drivers / serial / vr41xx_siu.c
bloba091aedf7fa375950215584fa3db19fd5071105b
1 /*
2 * Driver for NEC VR4100 series Serial Interface Unit.
4 * Copyright (C) 2004-2007 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
6 * Based on drivers/serial/8250.c, by Russell King.
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 #if defined(CONFIG_SERIAL_VR41XX_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
24 #define SUPPORT_SYSRQ
25 #endif
27 #include <linux/console.h>
28 #include <linux/errno.h>
29 #include <linux/init.h>
30 #include <linux/interrupt.h>
31 #include <linux/ioport.h>
32 #include <linux/module.h>
33 #include <linux/platform_device.h>
34 #include <linux/serial.h>
35 #include <linux/serial_core.h>
36 #include <linux/serial_reg.h>
37 #include <linux/tty.h>
38 #include <linux/tty_flip.h>
40 #include <asm/io.h>
41 #include <asm/vr41xx/siu.h>
42 #include <asm/vr41xx/vr41xx.h>
44 #define SIU_BAUD_BASE 1152000
45 #define SIU_MAJOR 204
46 #define SIU_MINOR_BASE 82
48 #define RX_MAX_COUNT 256
49 #define TX_MAX_COUNT 15
51 #define SIUIRSEL 0x08
52 #define TMICMODE 0x20
53 #define TMICTX 0x10
54 #define IRMSEL 0x0c
55 #define IRMSEL_HP 0x08
56 #define IRMSEL_TEMIC 0x04
57 #define IRMSEL_SHARP 0x00
58 #define IRUSESEL 0x02
59 #define SIRSEL 0x01
61 static struct uart_port siu_uart_ports[SIU_PORTS_MAX] = {
62 [0 ... SIU_PORTS_MAX-1] = {
63 .lock = __SPIN_LOCK_UNLOCKED(siu_uart_ports->lock),
64 .irq = -1,
68 static uint8_t lsr_break_flag[SIU_PORTS_MAX];
70 #define siu_read(port, offset) readb((port)->membase + (offset))
71 #define siu_write(port, offset, value) writeb((value), (port)->membase + (offset))
73 void vr41xx_select_siu_interface(siu_interface_t interface)
75 struct uart_port *port;
76 unsigned long flags;
77 uint8_t irsel;
79 port = &siu_uart_ports[0];
81 spin_lock_irqsave(&port->lock, flags);
83 irsel = siu_read(port, SIUIRSEL);
84 if (interface == SIU_INTERFACE_IRDA)
85 irsel |= SIRSEL;
86 else
87 irsel &= ~SIRSEL;
88 siu_write(port, SIUIRSEL, irsel);
90 spin_unlock_irqrestore(&port->lock, flags);
93 EXPORT_SYMBOL_GPL(vr41xx_select_siu_interface);
95 void vr41xx_use_irda(irda_use_t use)
97 struct uart_port *port;
98 unsigned long flags;
99 uint8_t irsel;
101 port = &siu_uart_ports[0];
103 spin_lock_irqsave(&port->lock, flags);
105 irsel = siu_read(port, SIUIRSEL);
106 if (use == FIR_USE_IRDA)
107 irsel |= IRUSESEL;
108 else
109 irsel &= ~IRUSESEL;
110 siu_write(port, SIUIRSEL, irsel);
112 spin_unlock_irqrestore(&port->lock, flags);
115 EXPORT_SYMBOL_GPL(vr41xx_use_irda);
117 void vr41xx_select_irda_module(irda_module_t module, irda_speed_t speed)
119 struct uart_port *port;
120 unsigned long flags;
121 uint8_t irsel;
123 port = &siu_uart_ports[0];
125 spin_lock_irqsave(&port->lock, flags);
127 irsel = siu_read(port, SIUIRSEL);
128 irsel &= ~(IRMSEL | TMICTX | TMICMODE);
129 switch (module) {
130 case SHARP_IRDA:
131 irsel |= IRMSEL_SHARP;
132 break;
133 case TEMIC_IRDA:
134 irsel |= IRMSEL_TEMIC | TMICMODE;
135 if (speed == IRDA_TX_4MBPS)
136 irsel |= TMICTX;
137 break;
138 case HP_IRDA:
139 irsel |= IRMSEL_HP;
140 break;
141 default:
142 break;
144 siu_write(port, SIUIRSEL, irsel);
146 spin_unlock_irqrestore(&port->lock, flags);
149 EXPORT_SYMBOL_GPL(vr41xx_select_irda_module);
151 static inline void siu_clear_fifo(struct uart_port *port)
153 siu_write(port, UART_FCR, UART_FCR_ENABLE_FIFO);
154 siu_write(port, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR |
155 UART_FCR_CLEAR_XMIT);
156 siu_write(port, UART_FCR, 0);
159 static inline unsigned long siu_port_size(struct uart_port *port)
161 switch (port->type) {
162 case PORT_VR41XX_SIU:
163 return 11UL;
164 case PORT_VR41XX_DSIU:
165 return 8UL;
168 return 0;
171 static inline unsigned int siu_check_type(struct uart_port *port)
173 if (port->line == 0)
174 return PORT_VR41XX_SIU;
175 if (port->line == 1 && port->irq != -1)
176 return PORT_VR41XX_DSIU;
178 return PORT_UNKNOWN;
181 static inline const char *siu_type_name(struct uart_port *port)
183 switch (port->type) {
184 case PORT_VR41XX_SIU:
185 return "SIU";
186 case PORT_VR41XX_DSIU:
187 return "DSIU";
190 return NULL;
193 static unsigned int siu_tx_empty(struct uart_port *port)
195 uint8_t lsr;
197 lsr = siu_read(port, UART_LSR);
198 if (lsr & UART_LSR_TEMT)
199 return TIOCSER_TEMT;
201 return 0;
204 static void siu_set_mctrl(struct uart_port *port, unsigned int mctrl)
206 uint8_t mcr = 0;
208 if (mctrl & TIOCM_DTR)
209 mcr |= UART_MCR_DTR;
210 if (mctrl & TIOCM_RTS)
211 mcr |= UART_MCR_RTS;
212 if (mctrl & TIOCM_OUT1)
213 mcr |= UART_MCR_OUT1;
214 if (mctrl & TIOCM_OUT2)
215 mcr |= UART_MCR_OUT2;
216 if (mctrl & TIOCM_LOOP)
217 mcr |= UART_MCR_LOOP;
219 siu_write(port, UART_MCR, mcr);
222 static unsigned int siu_get_mctrl(struct uart_port *port)
224 uint8_t msr;
225 unsigned int mctrl = 0;
227 msr = siu_read(port, UART_MSR);
228 if (msr & UART_MSR_DCD)
229 mctrl |= TIOCM_CAR;
230 if (msr & UART_MSR_RI)
231 mctrl |= TIOCM_RNG;
232 if (msr & UART_MSR_DSR)
233 mctrl |= TIOCM_DSR;
234 if (msr & UART_MSR_CTS)
235 mctrl |= TIOCM_CTS;
237 return mctrl;
240 static void siu_stop_tx(struct uart_port *port)
242 unsigned long flags;
243 uint8_t ier;
245 spin_lock_irqsave(&port->lock, flags);
247 ier = siu_read(port, UART_IER);
248 ier &= ~UART_IER_THRI;
249 siu_write(port, UART_IER, ier);
251 spin_unlock_irqrestore(&port->lock, flags);
254 static void siu_start_tx(struct uart_port *port)
256 unsigned long flags;
257 uint8_t ier;
259 spin_lock_irqsave(&port->lock, flags);
261 ier = siu_read(port, UART_IER);
262 ier |= UART_IER_THRI;
263 siu_write(port, UART_IER, ier);
265 spin_unlock_irqrestore(&port->lock, flags);
268 static void siu_stop_rx(struct uart_port *port)
270 unsigned long flags;
271 uint8_t ier;
273 spin_lock_irqsave(&port->lock, flags);
275 ier = siu_read(port, UART_IER);
276 ier &= ~UART_IER_RLSI;
277 siu_write(port, UART_IER, ier);
279 port->read_status_mask &= ~UART_LSR_DR;
281 spin_unlock_irqrestore(&port->lock, flags);
284 static void siu_enable_ms(struct uart_port *port)
286 unsigned long flags;
287 uint8_t ier;
289 spin_lock_irqsave(&port->lock, flags);
291 ier = siu_read(port, UART_IER);
292 ier |= UART_IER_MSI;
293 siu_write(port, UART_IER, ier);
295 spin_unlock_irqrestore(&port->lock, flags);
298 static void siu_break_ctl(struct uart_port *port, int ctl)
300 unsigned long flags;
301 uint8_t lcr;
303 spin_lock_irqsave(&port->lock, flags);
305 lcr = siu_read(port, UART_LCR);
306 if (ctl == -1)
307 lcr |= UART_LCR_SBC;
308 else
309 lcr &= ~UART_LCR_SBC;
310 siu_write(port, UART_LCR, lcr);
312 spin_unlock_irqrestore(&port->lock, flags);
315 static inline void receive_chars(struct uart_port *port, uint8_t *status)
317 struct tty_struct *tty;
318 uint8_t lsr, ch;
319 char flag;
320 int max_count = RX_MAX_COUNT;
322 tty = port->info->tty;
323 lsr = *status;
325 do {
326 ch = siu_read(port, UART_RX);
327 port->icount.rx++;
328 flag = TTY_NORMAL;
330 #ifdef CONFIG_SERIAL_VR41XX_CONSOLE
331 lsr |= lsr_break_flag[port->line];
332 lsr_break_flag[port->line] = 0;
333 #endif
334 if (unlikely(lsr & (UART_LSR_BI | UART_LSR_FE |
335 UART_LSR_PE | UART_LSR_OE))) {
336 if (lsr & UART_LSR_BI) {
337 lsr &= ~(UART_LSR_FE | UART_LSR_PE);
338 port->icount.brk++;
340 if (uart_handle_break(port))
341 goto ignore_char;
344 if (lsr & UART_LSR_FE)
345 port->icount.frame++;
346 if (lsr & UART_LSR_PE)
347 port->icount.parity++;
348 if (lsr & UART_LSR_OE)
349 port->icount.overrun++;
351 lsr &= port->read_status_mask;
352 if (lsr & UART_LSR_BI)
353 flag = TTY_BREAK;
354 if (lsr & UART_LSR_FE)
355 flag = TTY_FRAME;
356 if (lsr & UART_LSR_PE)
357 flag = TTY_PARITY;
360 if (uart_handle_sysrq_char(port, ch))
361 goto ignore_char;
363 uart_insert_char(port, lsr, UART_LSR_OE, ch, flag);
365 ignore_char:
366 lsr = siu_read(port, UART_LSR);
367 } while ((lsr & UART_LSR_DR) && (max_count-- > 0));
369 tty_flip_buffer_push(tty);
371 *status = lsr;
374 static inline void check_modem_status(struct uart_port *port)
376 uint8_t msr;
378 msr = siu_read(port, UART_MSR);
379 if ((msr & UART_MSR_ANY_DELTA) == 0)
380 return;
381 if (msr & UART_MSR_DDCD)
382 uart_handle_dcd_change(port, msr & UART_MSR_DCD);
383 if (msr & UART_MSR_TERI)
384 port->icount.rng++;
385 if (msr & UART_MSR_DDSR)
386 port->icount.dsr++;
387 if (msr & UART_MSR_DCTS)
388 uart_handle_cts_change(port, msr & UART_MSR_CTS);
390 wake_up_interruptible(&port->info->delta_msr_wait);
393 static inline void transmit_chars(struct uart_port *port)
395 struct circ_buf *xmit;
396 int max_count = TX_MAX_COUNT;
398 xmit = &port->info->xmit;
400 if (port->x_char) {
401 siu_write(port, UART_TX, port->x_char);
402 port->icount.tx++;
403 port->x_char = 0;
404 return;
407 if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
408 siu_stop_tx(port);
409 return;
412 do {
413 siu_write(port, UART_TX, xmit->buf[xmit->tail]);
414 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
415 port->icount.tx++;
416 if (uart_circ_empty(xmit))
417 break;
418 } while (max_count-- > 0);
420 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
421 uart_write_wakeup(port);
423 if (uart_circ_empty(xmit))
424 siu_stop_tx(port);
427 static irqreturn_t siu_interrupt(int irq, void *dev_id)
429 struct uart_port *port;
430 uint8_t iir, lsr;
432 port = (struct uart_port *)dev_id;
434 iir = siu_read(port, UART_IIR);
435 if (iir & UART_IIR_NO_INT)
436 return IRQ_NONE;
438 lsr = siu_read(port, UART_LSR);
439 if (lsr & UART_LSR_DR)
440 receive_chars(port, &lsr);
442 check_modem_status(port);
444 if (lsr & UART_LSR_THRE)
445 transmit_chars(port);
447 return IRQ_HANDLED;
450 static int siu_startup(struct uart_port *port)
452 int retval;
454 if (port->membase == NULL)
455 return -ENODEV;
457 siu_clear_fifo(port);
459 (void)siu_read(port, UART_LSR);
460 (void)siu_read(port, UART_RX);
461 (void)siu_read(port, UART_IIR);
462 (void)siu_read(port, UART_MSR);
464 if (siu_read(port, UART_LSR) == 0xff)
465 return -ENODEV;
467 retval = request_irq(port->irq, siu_interrupt, 0, siu_type_name(port), port);
468 if (retval)
469 return retval;
471 if (port->type == PORT_VR41XX_DSIU)
472 vr41xx_enable_dsiuint(DSIUINT_ALL);
474 siu_write(port, UART_LCR, UART_LCR_WLEN8);
476 spin_lock_irq(&port->lock);
477 siu_set_mctrl(port, port->mctrl);
478 spin_unlock_irq(&port->lock);
480 siu_write(port, UART_IER, UART_IER_RLSI | UART_IER_RDI);
482 (void)siu_read(port, UART_LSR);
483 (void)siu_read(port, UART_RX);
484 (void)siu_read(port, UART_IIR);
485 (void)siu_read(port, UART_MSR);
487 return 0;
490 static void siu_shutdown(struct uart_port *port)
492 unsigned long flags;
493 uint8_t lcr;
495 siu_write(port, UART_IER, 0);
497 spin_lock_irqsave(&port->lock, flags);
499 port->mctrl &= ~TIOCM_OUT2;
500 siu_set_mctrl(port, port->mctrl);
502 spin_unlock_irqrestore(&port->lock, flags);
504 lcr = siu_read(port, UART_LCR);
505 lcr &= ~UART_LCR_SBC;
506 siu_write(port, UART_LCR, lcr);
508 siu_clear_fifo(port);
510 (void)siu_read(port, UART_RX);
512 if (port->type == PORT_VR41XX_DSIU)
513 vr41xx_disable_dsiuint(DSIUINT_ALL);
515 free_irq(port->irq, port);
518 static void siu_set_termios(struct uart_port *port, struct ktermios *new,
519 struct ktermios *old)
521 tcflag_t c_cflag, c_iflag;
522 uint8_t lcr, fcr, ier;
523 unsigned int baud, quot;
524 unsigned long flags;
526 c_cflag = new->c_cflag;
527 switch (c_cflag & CSIZE) {
528 case CS5:
529 lcr = UART_LCR_WLEN5;
530 break;
531 case CS6:
532 lcr = UART_LCR_WLEN6;
533 break;
534 case CS7:
535 lcr = UART_LCR_WLEN7;
536 break;
537 default:
538 lcr = UART_LCR_WLEN8;
539 break;
542 if (c_cflag & CSTOPB)
543 lcr |= UART_LCR_STOP;
544 if (c_cflag & PARENB)
545 lcr |= UART_LCR_PARITY;
546 if ((c_cflag & PARODD) != PARODD)
547 lcr |= UART_LCR_EPAR;
548 if (c_cflag & CMSPAR)
549 lcr |= UART_LCR_SPAR;
551 baud = uart_get_baud_rate(port, new, old, 0, port->uartclk/16);
552 quot = uart_get_divisor(port, baud);
554 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10;
556 spin_lock_irqsave(&port->lock, flags);
558 uart_update_timeout(port, c_cflag, baud);
560 c_iflag = new->c_iflag;
562 port->read_status_mask = UART_LSR_THRE | UART_LSR_OE | UART_LSR_DR;
563 if (c_iflag & INPCK)
564 port->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
565 if (c_iflag & (BRKINT | PARMRK))
566 port->read_status_mask |= UART_LSR_BI;
568 port->ignore_status_mask = 0;
569 if (c_iflag & IGNPAR)
570 port->ignore_status_mask |= UART_LSR_FE | UART_LSR_PE;
571 if (c_iflag & IGNBRK) {
572 port->ignore_status_mask |= UART_LSR_BI;
573 if (c_iflag & IGNPAR)
574 port->ignore_status_mask |= UART_LSR_OE;
577 if ((c_cflag & CREAD) == 0)
578 port->ignore_status_mask |= UART_LSR_DR;
580 ier = siu_read(port, UART_IER);
581 ier &= ~UART_IER_MSI;
582 if (UART_ENABLE_MS(port, c_cflag))
583 ier |= UART_IER_MSI;
584 siu_write(port, UART_IER, ier);
586 siu_write(port, UART_LCR, lcr | UART_LCR_DLAB);
588 siu_write(port, UART_DLL, (uint8_t)quot);
589 siu_write(port, UART_DLM, (uint8_t)(quot >> 8));
591 siu_write(port, UART_LCR, lcr);
593 siu_write(port, UART_FCR, fcr);
595 siu_set_mctrl(port, port->mctrl);
597 spin_unlock_irqrestore(&port->lock, flags);
600 static void siu_pm(struct uart_port *port, unsigned int state, unsigned int oldstate)
602 switch (state) {
603 case 0:
604 switch (port->type) {
605 case PORT_VR41XX_SIU:
606 vr41xx_supply_clock(SIU_CLOCK);
607 break;
608 case PORT_VR41XX_DSIU:
609 vr41xx_supply_clock(DSIU_CLOCK);
610 break;
612 break;
613 case 3:
614 switch (port->type) {
615 case PORT_VR41XX_SIU:
616 vr41xx_mask_clock(SIU_CLOCK);
617 break;
618 case PORT_VR41XX_DSIU:
619 vr41xx_mask_clock(DSIU_CLOCK);
620 break;
622 break;
626 static const char *siu_type(struct uart_port *port)
628 return siu_type_name(port);
631 static void siu_release_port(struct uart_port *port)
633 unsigned long size;
635 if (port->flags & UPF_IOREMAP) {
636 iounmap(port->membase);
637 port->membase = NULL;
640 size = siu_port_size(port);
641 release_mem_region(port->mapbase, size);
644 static int siu_request_port(struct uart_port *port)
646 unsigned long size;
647 struct resource *res;
649 size = siu_port_size(port);
650 res = request_mem_region(port->mapbase, size, siu_type_name(port));
651 if (res == NULL)
652 return -EBUSY;
654 if (port->flags & UPF_IOREMAP) {
655 port->membase = ioremap(port->mapbase, size);
656 if (port->membase == NULL) {
657 release_resource(res);
658 return -ENOMEM;
662 return 0;
665 static void siu_config_port(struct uart_port *port, int flags)
667 if (flags & UART_CONFIG_TYPE) {
668 port->type = siu_check_type(port);
669 (void)siu_request_port(port);
673 static int siu_verify_port(struct uart_port *port, struct serial_struct *serial)
675 if (port->type != PORT_VR41XX_SIU && port->type != PORT_VR41XX_DSIU)
676 return -EINVAL;
677 if (port->irq != serial->irq)
678 return -EINVAL;
679 if (port->iotype != serial->io_type)
680 return -EINVAL;
681 if (port->mapbase != (unsigned long)serial->iomem_base)
682 return -EINVAL;
684 return 0;
687 static struct uart_ops siu_uart_ops = {
688 .tx_empty = siu_tx_empty,
689 .set_mctrl = siu_set_mctrl,
690 .get_mctrl = siu_get_mctrl,
691 .stop_tx = siu_stop_tx,
692 .start_tx = siu_start_tx,
693 .stop_rx = siu_stop_rx,
694 .enable_ms = siu_enable_ms,
695 .break_ctl = siu_break_ctl,
696 .startup = siu_startup,
697 .shutdown = siu_shutdown,
698 .set_termios = siu_set_termios,
699 .pm = siu_pm,
700 .type = siu_type,
701 .release_port = siu_release_port,
702 .request_port = siu_request_port,
703 .config_port = siu_config_port,
704 .verify_port = siu_verify_port,
707 static int siu_init_ports(struct platform_device *pdev)
709 struct uart_port *port;
710 struct resource *res;
711 int *type = pdev->dev.platform_data;
712 int i;
714 if (!type)
715 return 0;
717 port = siu_uart_ports;
718 for (i = 0; i < SIU_PORTS_MAX; i++) {
719 port->type = type[i];
720 if (port->type == PORT_UNKNOWN)
721 continue;
722 port->irq = platform_get_irq(pdev, i);
723 port->uartclk = SIU_BAUD_BASE * 16;
724 port->fifosize = 16;
725 port->regshift = 0;
726 port->iotype = UPIO_MEM;
727 port->flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF;
728 port->line = i;
729 res = platform_get_resource(pdev, IORESOURCE_MEM, i);
730 port->mapbase = res->start;
731 port++;
734 return i;
737 #ifdef CONFIG_SERIAL_VR41XX_CONSOLE
739 #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
741 static void wait_for_xmitr(struct uart_port *port)
743 int timeout = 10000;
744 uint8_t lsr, msr;
746 do {
747 lsr = siu_read(port, UART_LSR);
748 if (lsr & UART_LSR_BI)
749 lsr_break_flag[port->line] = UART_LSR_BI;
751 if ((lsr & BOTH_EMPTY) == BOTH_EMPTY)
752 break;
753 } while (timeout-- > 0);
755 if (port->flags & UPF_CONS_FLOW) {
756 timeout = 1000000;
758 do {
759 msr = siu_read(port, UART_MSR);
760 if ((msr & UART_MSR_CTS) != 0)
761 break;
762 } while (timeout-- > 0);
766 static void siu_console_putchar(struct uart_port *port, int ch)
768 wait_for_xmitr(port);
769 siu_write(port, UART_TX, ch);
772 static void siu_console_write(struct console *con, const char *s, unsigned count)
774 struct uart_port *port;
775 uint8_t ier;
777 port = &siu_uart_ports[con->index];
779 ier = siu_read(port, UART_IER);
780 siu_write(port, UART_IER, 0);
782 uart_console_write(port, s, count, siu_console_putchar);
784 wait_for_xmitr(port);
785 siu_write(port, UART_IER, ier);
788 static int siu_console_setup(struct console *con, char *options)
790 struct uart_port *port;
791 int baud = 9600;
792 int parity = 'n';
793 int bits = 8;
794 int flow = 'n';
796 if (con->index >= SIU_PORTS_MAX)
797 con->index = 0;
799 port = &siu_uart_ports[con->index];
800 if (port->membase == NULL) {
801 if (port->mapbase == 0)
802 return -ENODEV;
803 port->membase = ioremap(port->mapbase, siu_port_size(port));
806 vr41xx_select_siu_interface(SIU_INTERFACE_RS232C);
808 if (options != NULL)
809 uart_parse_options(options, &baud, &parity, &bits, &flow);
811 return uart_set_options(port, con, baud, parity, bits, flow);
814 static struct uart_driver siu_uart_driver;
816 static struct console siu_console = {
817 .name = "ttyVR",
818 .write = siu_console_write,
819 .device = uart_console_device,
820 .setup = siu_console_setup,
821 .flags = CON_PRINTBUFFER,
822 .index = -1,
823 .data = &siu_uart_driver,
826 static int __devinit siu_console_init(void)
828 struct uart_port *port;
829 int i;
831 for (i = 0; i < SIU_PORTS_MAX; i++) {
832 port = &siu_uart_ports[i];
833 port->ops = &siu_uart_ops;
836 register_console(&siu_console);
838 return 0;
841 console_initcall(siu_console_init);
843 #define SERIAL_VR41XX_CONSOLE &siu_console
844 #else
845 #define SERIAL_VR41XX_CONSOLE NULL
846 #endif
848 static struct uart_driver siu_uart_driver = {
849 .owner = THIS_MODULE,
850 .driver_name = "SIU",
851 .dev_name = "ttyVR",
852 .major = SIU_MAJOR,
853 .minor = SIU_MINOR_BASE,
854 .cons = SERIAL_VR41XX_CONSOLE,
857 static int __devinit siu_probe(struct platform_device *dev)
859 struct uart_port *port;
860 int num, i, retval;
862 num = siu_init_ports(dev);
863 if (num <= 0)
864 return -ENODEV;
866 siu_uart_driver.nr = num;
867 retval = uart_register_driver(&siu_uart_driver);
868 if (retval)
869 return retval;
871 for (i = 0; i < num; i++) {
872 port = &siu_uart_ports[i];
873 port->ops = &siu_uart_ops;
874 port->dev = &dev->dev;
876 retval = uart_add_one_port(&siu_uart_driver, port);
877 if (retval < 0) {
878 port->dev = NULL;
879 break;
883 if (i == 0 && retval < 0) {
884 uart_unregister_driver(&siu_uart_driver);
885 return retval;
888 return 0;
891 static int __devexit siu_remove(struct platform_device *dev)
893 struct uart_port *port;
894 int i;
896 for (i = 0; i < siu_uart_driver.nr; i++) {
897 port = &siu_uart_ports[i];
898 if (port->dev == &dev->dev) {
899 uart_remove_one_port(&siu_uart_driver, port);
900 port->dev = NULL;
904 uart_unregister_driver(&siu_uart_driver);
906 return 0;
909 static int siu_suspend(struct platform_device *dev, pm_message_t state)
911 struct uart_port *port;
912 int i;
914 for (i = 0; i < siu_uart_driver.nr; i++) {
915 port = &siu_uart_ports[i];
916 if ((port->type == PORT_VR41XX_SIU ||
917 port->type == PORT_VR41XX_DSIU) && port->dev == &dev->dev)
918 uart_suspend_port(&siu_uart_driver, port);
922 return 0;
925 static int siu_resume(struct platform_device *dev)
927 struct uart_port *port;
928 int i;
930 for (i = 0; i < siu_uart_driver.nr; i++) {
931 port = &siu_uart_ports[i];
932 if ((port->type == PORT_VR41XX_SIU ||
933 port->type == PORT_VR41XX_DSIU) && port->dev == &dev->dev)
934 uart_resume_port(&siu_uart_driver, port);
937 return 0;
940 static struct platform_driver siu_device_driver = {
941 .probe = siu_probe,
942 .remove = __devexit_p(siu_remove),
943 .suspend = siu_suspend,
944 .resume = siu_resume,
945 .driver = {
946 .name = "SIU",
947 .owner = THIS_MODULE,
951 static int __init vr41xx_siu_init(void)
953 return platform_driver_register(&siu_device_driver);
956 static void __exit vr41xx_siu_exit(void)
958 platform_driver_unregister(&siu_device_driver);
961 module_init(vr41xx_siu_init);
962 module_exit(vr41xx_siu_exit);