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RT-AC66 3.0.0.4.374.130 core
[tomato.git] / release / src-rt-6.x / linux / linux-2.6 / drivers / serial / bfin_5xx.c
blob22569bd5d821e37e7f0b9f5aaaf15909831032dc
1 /*
2 * File: drivers/serial/bfin_5xx.c
3 * Based on: Based on drivers/serial/sa1100.c
4 * Author: Aubrey Li <aubrey.li@analog.com>
5 *
6 * Created:
7 * Description: Driver for blackfin 5xx serial ports
8 *
9 * Modified:
10 * Copyright 2006 Analog Devices Inc.
11 *
12 * Bugs: Enter bugs at http://blackfin.uclinux.org/
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or
17 * (at your option) any later version.
18 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, see the file COPYING, or write
26 * to the Free Software Foundation, Inc.,
27 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
28 */
29
30 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
31 #define SUPPORT_SYSRQ
32 #endif
33
34 #include <linux/module.h>
35 #include <linux/ioport.h>
36 #include <linux/init.h>
37 #include <linux/console.h>
38 #include <linux/sysrq.h>
39 #include <linux/platform_device.h>
40 #include <linux/tty.h>
41 #include <linux/tty_flip.h>
42 #include <linux/serial_core.h>
43
44 #include <asm/gpio.h>
45 #include <asm/mach/bfin_serial_5xx.h>
46
47 #ifdef CONFIG_SERIAL_BFIN_DMA
48 #include <linux/dma-mapping.h>
49 #include <asm/io.h>
50 #include <asm/irq.h>
51 #include <asm/cacheflush.h>
52 #endif
53
54 /* UART name and device definitions */
55 #define BFIN_SERIAL_NAME "ttyBF"
56 #define BFIN_SERIAL_MAJOR 204
57 #define BFIN_SERIAL_MINOR 64
58
59 /*
60 * Setup for console. Argument comes from the menuconfig
61 */
62 #define DMA_RX_XCOUNT 512
63 #define DMA_RX_YCOUNT (PAGE_SIZE / DMA_RX_XCOUNT)
64
65 #define DMA_RX_FLUSH_JIFFIES 5
66
67 #ifdef CONFIG_SERIAL_BFIN_DMA
68 static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart);
69 #else
70 static void bfin_serial_do_work(struct work_struct *work);
71 static void bfin_serial_tx_chars(struct bfin_serial_port *uart);
72 static void local_put_char(struct bfin_serial_port *uart, char ch);
73 #endif
74
75 static void bfin_serial_mctrl_check(struct bfin_serial_port *uart);
76
77 /*
78 * interrupts are disabled on entry
79 */
80 static void bfin_serial_stop_tx(struct uart_port *port)
81 {
82 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
83
84 #ifdef CONFIG_SERIAL_BFIN_DMA
85 disable_dma(uart->tx_dma_channel);
86 #else
87 unsigned short ier;
88
89 ier = UART_GET_IER(uart);
90 ier &= ~ETBEI;
91 UART_PUT_IER(uart, ier);
92 #endif
93 }
94
95 /*
96 * port is locked and interrupts are disabled
97 */
98 static void bfin_serial_start_tx(struct uart_port *port)
99 {
100 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
101
102 #ifdef CONFIG_SERIAL_BFIN_DMA
103 bfin_serial_dma_tx_chars(uart);
104 #else
105 unsigned short ier;
106 ier = UART_GET_IER(uart);
107 ier |= ETBEI;
108 UART_PUT_IER(uart, ier);
109 bfin_serial_tx_chars(uart);
110 #endif
111 }
112
113 /*
114 * Interrupts are enabled
115 */
116 static void bfin_serial_stop_rx(struct uart_port *port)
117 {
118 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
119 unsigned short ier;
120
121 ier = UART_GET_IER(uart);
122 ier &= ~ERBFI;
123 UART_PUT_IER(uart, ier);
124 }
125
126 /*
127 * Set the modem control timer to fire immediately.
128 */
129 static void bfin_serial_enable_ms(struct uart_port *port)
130 {
131 }
132
133 #ifdef CONFIG_SERIAL_BFIN_PIO
134 static void local_put_char(struct bfin_serial_port *uart, char ch)
135 {
136 unsigned short status;
137 int flags = 0;
138
139 spin_lock_irqsave(&uart->port.lock, flags);
140
141 do {
142 status = UART_GET_LSR(uart);
143 } while (!(status & THRE));
144
145 UART_PUT_CHAR(uart, ch);
146 SSYNC();
147
148 spin_unlock_irqrestore(&uart->port.lock, flags);
149 }
150
151 static void bfin_serial_rx_chars(struct bfin_serial_port *uart)
152 {
153 struct tty_struct *tty = uart->port.info->tty;
154 unsigned int status, ch, flg;
155 #ifdef BF533_FAMILY
156 static int in_break = 0;
157 #endif
158
159 status = UART_GET_LSR(uart);
160 ch = UART_GET_CHAR(uart);
161 uart->port.icount.rx++;
162
163 #ifdef BF533_FAMILY
164 /* The BF533 family of processors have a nice misbehavior where
165 * they continuously generate characters for a "single" break.
166 * We have to basically ignore this flood until the "next" valid
167 * character comes across. All other Blackfin families operate
168 * properly though.
169 */
170 if (in_break) {
171 if (ch != 0) {
172 in_break = 0;
173 ch = UART_GET_CHAR(uart);
174 if (bfin_revid() < 5)
175 return;
176 } else
177 return;
178 }
179 #endif
180
181 if (status & BI) {
182 #ifdef BF533_FAMILY
183 in_break = 1;
184 #endif
185 uart->port.icount.brk++;
186 if (uart_handle_break(&uart->port))
187 goto ignore_char;
188 status &= ~(PE | FE);
189 }
190 if (status & PE)
191 uart->port.icount.parity++;
192 if (status & OE)
193 uart->port.icount.overrun++;
194 if (status & FE)
195 uart->port.icount.frame++;
196
197 status &= uart->port.read_status_mask;
198
199 if (status & BI)
200 flg = TTY_BREAK;
201 else if (status & PE)
202 flg = TTY_PARITY;
203 else if (status & FE)
204 flg = TTY_FRAME;
205 else
206 flg = TTY_NORMAL;
207
208 if (uart_handle_sysrq_char(&uart->port, ch))
209 goto ignore_char;
210
211 uart_insert_char(&uart->port, status, OE, ch, flg);
212
213 ignore_char:
214 tty_flip_buffer_push(tty);
215 }
216
217 static void bfin_serial_tx_chars(struct bfin_serial_port *uart)
218 {
219 struct circ_buf *xmit = &uart->port.info->xmit;
220
221 if (uart->port.x_char) {
222 UART_PUT_CHAR(uart, uart->port.x_char);
223 uart->port.icount.tx++;
224 uart->port.x_char = 0;
225 return;
226 }
227 /*
228 * Check the modem control lines before
229 * transmitting anything.
230 */
231 bfin_serial_mctrl_check(uart);
232
233 if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
234 bfin_serial_stop_tx(&uart->port);
235 return;
236 }
237
238 local_put_char(uart, xmit->buf[xmit->tail]);
239 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
240 uart->port.icount.tx++;
241
242 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
243 uart_write_wakeup(&uart->port);
244
245 if (uart_circ_empty(xmit))
246 bfin_serial_stop_tx(&uart->port);
247 }
248
249 static irqreturn_t bfin_serial_rx_int(int irq, void *dev_id)
250 {
251 struct bfin_serial_port *uart = dev_id;
252
253 spin_lock(&uart->port.lock);
254 while ((UART_GET_IIR(uart) & IIR_STATUS) == IIR_RX_READY)
255 bfin_serial_rx_chars(uart);
256 spin_unlock(&uart->port.lock);
257 return IRQ_HANDLED;
258 }
259
260 static irqreturn_t bfin_serial_tx_int(int irq, void *dev_id)
261 {
262 struct bfin_serial_port *uart = dev_id;
263
264 spin_lock(&uart->port.lock);
265 while ((UART_GET_IIR(uart) & IIR_STATUS) == IIR_TX_READY)
266 bfin_serial_tx_chars(uart);
267 spin_unlock(&uart->port.lock);
268 return IRQ_HANDLED;
269 }
270
271
272 static void bfin_serial_do_work(struct work_struct *work)
273 {
274 struct bfin_serial_port *uart = container_of(work, struct bfin_serial_port, cts_workqueue);
275
276 bfin_serial_mctrl_check(uart);
277 }
278
279 #endif
280
281 #ifdef CONFIG_SERIAL_BFIN_DMA
282 static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart)
283 {
284 struct circ_buf *xmit = &uart->port.info->xmit;
285 unsigned short ier;
286 int flags = 0;
287
288 if (!uart->tx_done)
289 return;
290
291 uart->tx_done = 0;
292
293 if (uart->port.x_char) {
294 UART_PUT_CHAR(uart, uart->port.x_char);
295 uart->port.icount.tx++;
296 uart->port.x_char = 0;
297 uart->tx_done = 1;
298 return;
299 }
300 /*
301 * Check the modem control lines before
302 * transmitting anything.
303 */
304 bfin_serial_mctrl_check(uart);
305
306 if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
307 bfin_serial_stop_tx(&uart->port);
308 uart->tx_done = 1;
309 return;
310 }
311
312 spin_lock_irqsave(&uart->port.lock, flags);
313 uart->tx_count = CIRC_CNT(xmit->head, xmit->tail, UART_XMIT_SIZE);
314 if (uart->tx_count > (UART_XMIT_SIZE - xmit->tail))
315 uart->tx_count = UART_XMIT_SIZE - xmit->tail;
316 blackfin_dcache_flush_range((unsigned long)(xmit->buf+xmit->tail),
317 (unsigned long)(xmit->buf+xmit->tail+uart->tx_count));
318 set_dma_config(uart->tx_dma_channel,
319 set_bfin_dma_config(DIR_READ, DMA_FLOW_STOP,
320 INTR_ON_BUF,
321 DIMENSION_LINEAR,
322 DATA_SIZE_8));
323 set_dma_start_addr(uart->tx_dma_channel, (unsigned long)(xmit->buf+xmit->tail));
324 set_dma_x_count(uart->tx_dma_channel, uart->tx_count);
325 set_dma_x_modify(uart->tx_dma_channel, 1);
326 enable_dma(uart->tx_dma_channel);
327 ier = UART_GET_IER(uart);
328 ier |= ETBEI;
329 UART_PUT_IER(uart, ier);
330 spin_unlock_irqrestore(&uart->port.lock, flags);
331 }
332
333 static void bfin_serial_dma_rx_chars(struct bfin_serial_port *uart)
334 {
335 struct tty_struct *tty = uart->port.info->tty;
336 int i, flg, status;
337
338 status = UART_GET_LSR(uart);
339 uart->port.icount.rx += CIRC_CNT(uart->rx_dma_buf.head, uart->rx_dma_buf.tail, UART_XMIT_SIZE);;
340
341 if (status & BI) {
342 uart->port.icount.brk++;
343 if (uart_handle_break(&uart->port))
344 goto dma_ignore_char;
345 status &= ~(PE | FE);
346 }
347 if (status & PE)
348 uart->port.icount.parity++;
349 if (status & OE)
350 uart->port.icount.overrun++;
351 if (status & FE)
352 uart->port.icount.frame++;
353
354 status &= uart->port.read_status_mask;
355
356 if (status & BI)
357 flg = TTY_BREAK;
358 else if (status & PE)
359 flg = TTY_PARITY;
360 else if (status & FE)
361 flg = TTY_FRAME;
362 else
363 flg = TTY_NORMAL;
364
365 for (i = uart->rx_dma_buf.head; i < uart->rx_dma_buf.tail; i++) {
366 if (uart_handle_sysrq_char(&uart->port, uart->rx_dma_buf.buf[i]))
367 goto dma_ignore_char;
368 uart_insert_char(&uart->port, status, OE, uart->rx_dma_buf.buf[i], flg);
369 }
370
371 dma_ignore_char:
372 tty_flip_buffer_push(tty);
373 }
374
375 void bfin_serial_rx_dma_timeout(struct bfin_serial_port *uart)
376 {
377 int x_pos, pos;
378 int flags = 0;
379
380 bfin_serial_dma_tx_chars(uart);
381
382 spin_lock_irqsave(&uart->port.lock, flags);
383 x_pos = DMA_RX_XCOUNT - get_dma_curr_xcount(uart->rx_dma_channel);
384 if (x_pos == DMA_RX_XCOUNT)
385 x_pos = 0;
386
387 pos = uart->rx_dma_nrows * DMA_RX_XCOUNT + x_pos;
388
389 if (pos>uart->rx_dma_buf.tail) {
390 uart->rx_dma_buf.tail = pos;
391 bfin_serial_dma_rx_chars(uart);
392 uart->rx_dma_buf.head = uart->rx_dma_buf.tail;
393 }
394 spin_unlock_irqrestore(&uart->port.lock, flags);
395 uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
396 add_timer(&(uart->rx_dma_timer));
397 }
398
399 static irqreturn_t bfin_serial_dma_tx_int(int irq, void *dev_id)
400 {
401 struct bfin_serial_port *uart = dev_id;
402 struct circ_buf *xmit = &uart->port.info->xmit;
403 unsigned short ier;
404
405 spin_lock(&uart->port.lock);
406 if (!(get_dma_curr_irqstat(uart->tx_dma_channel)&DMA_RUN)) {
407 clear_dma_irqstat(uart->tx_dma_channel);
408 disable_dma(uart->tx_dma_channel);
409 ier = UART_GET_IER(uart);
410 ier &= ~ETBEI;
411 UART_PUT_IER(uart, ier);
412 xmit->tail = (xmit->tail+uart->tx_count) &(UART_XMIT_SIZE -1);
413 uart->port.icount.tx+=uart->tx_count;
414
415 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
416 uart_write_wakeup(&uart->port);
417
418 if (uart_circ_empty(xmit))
419 bfin_serial_stop_tx(&uart->port);
420 uart->tx_done = 1;
421 }
422
423 spin_unlock(&uart->port.lock);
424 return IRQ_HANDLED;
425 }
426
427 static irqreturn_t bfin_serial_dma_rx_int(int irq, void *dev_id)
428 {
429 struct bfin_serial_port *uart = dev_id;
430 unsigned short irqstat;
431
432 uart->rx_dma_nrows++;
433 if (uart->rx_dma_nrows == DMA_RX_YCOUNT) {
434 uart->rx_dma_nrows = 0;
435 uart->rx_dma_buf.tail = DMA_RX_XCOUNT*DMA_RX_YCOUNT;
436 bfin_serial_dma_rx_chars(uart);
437 uart->rx_dma_buf.head = uart->rx_dma_buf.tail = 0;
438 }
439 spin_lock(&uart->port.lock);
440 irqstat = get_dma_curr_irqstat(uart->rx_dma_channel);
441 clear_dma_irqstat(uart->rx_dma_channel);
442
443 spin_unlock(&uart->port.lock);
444 return IRQ_HANDLED;
445 }
446 #endif
447
448 /*
449 * Return TIOCSER_TEMT when transmitter is not busy.
450 */
451 static unsigned int bfin_serial_tx_empty(struct uart_port *port)
452 {
453 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
454 unsigned short lsr;
455
456 lsr = UART_GET_LSR(uart);
457 if (lsr & TEMT)
458 return TIOCSER_TEMT;
459 else
460 return 0;
461 }
462
463 static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
464 {
465 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
466 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
467 if (uart->cts_pin < 0)
468 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
469
470 if (gpio_get_value(uart->cts_pin))
471 return TIOCM_DSR | TIOCM_CAR;
472 else
473 #endif
474 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
475 }
476
477 static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
478 {
479 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
480 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
481 if (uart->rts_pin < 0)
482 return;
483
484 if (mctrl & TIOCM_RTS)
485 gpio_set_value(uart->rts_pin, 0);
486 else
487 gpio_set_value(uart->rts_pin, 1);
488 #endif
489 }
490
491 /*
492 * Handle any change of modem status signal since we were last called.
493 */
494 static void bfin_serial_mctrl_check(struct bfin_serial_port *uart)
495 {
496 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
497 unsigned int status;
498 # ifdef CONFIG_SERIAL_BFIN_DMA
499 struct uart_info *info = uart->port.info;
500 struct tty_struct *tty = info->tty;
501
502 status = bfin_serial_get_mctrl(&uart->port);
503 if (!(status & TIOCM_CTS)) {
504 tty->hw_stopped = 1;
505 } else {
506 tty->hw_stopped = 0;
507 }
508 # else
509 status = bfin_serial_get_mctrl(&uart->port);
510 uart_handle_cts_change(&uart->port, status & TIOCM_CTS);
511 if (!(status & TIOCM_CTS))
512 schedule_work(&uart->cts_workqueue);
513 # endif
514 #endif
515 }
516
517 /*
518 * Interrupts are always disabled.
519 */
520 static void bfin_serial_break_ctl(struct uart_port *port, int break_state)
521 {
522 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
523 u16 lcr = UART_GET_LCR(uart);
524 if (break_state)
525 lcr |= SB;
526 else
527 lcr &= ~SB;
528 UART_PUT_LCR(uart, lcr);
529 SSYNC();
530 }
531
532 static int bfin_serial_startup(struct uart_port *port)
533 {
534 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
535
536 #ifdef CONFIG_SERIAL_BFIN_DMA
537 dma_addr_t dma_handle;
538
539 if (request_dma(uart->rx_dma_channel, "BFIN_UART_RX") < 0) {
540 printk(KERN_NOTICE "Unable to attach Blackfin UART RX DMA channel\n");
541 return -EBUSY;
542 }
543
544 if (request_dma(uart->tx_dma_channel, "BFIN_UART_TX") < 0) {
545 printk(KERN_NOTICE "Unable to attach Blackfin UART TX DMA channel\n");
546 free_dma(uart->rx_dma_channel);
547 return -EBUSY;
548 }
549
550 set_dma_callback(uart->rx_dma_channel, bfin_serial_dma_rx_int, uart);
551 set_dma_callback(uart->tx_dma_channel, bfin_serial_dma_tx_int, uart);
552
553 uart->rx_dma_buf.buf = (unsigned char *)dma_alloc_coherent(NULL, PAGE_SIZE, &dma_handle, GFP_DMA);
554 uart->rx_dma_buf.head = 0;
555 uart->rx_dma_buf.tail = 0;
556 uart->rx_dma_nrows = 0;
557
558 set_dma_config(uart->rx_dma_channel,
559 set_bfin_dma_config(DIR_WRITE, DMA_FLOW_AUTO,
560 INTR_ON_ROW, DIMENSION_2D,
561 DATA_SIZE_8));
562 set_dma_x_count(uart->rx_dma_channel, DMA_RX_XCOUNT);
563 set_dma_x_modify(uart->rx_dma_channel, 1);
564 set_dma_y_count(uart->rx_dma_channel, DMA_RX_YCOUNT);
565 set_dma_y_modify(uart->rx_dma_channel, 1);
566 set_dma_start_addr(uart->rx_dma_channel, (unsigned long)uart->rx_dma_buf.buf);
567 enable_dma(uart->rx_dma_channel);
568
569 uart->rx_dma_timer.data = (unsigned long)(uart);
570 uart->rx_dma_timer.function = (void *)bfin_serial_rx_dma_timeout;
571 uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
572 add_timer(&(uart->rx_dma_timer));
573 #else
574 if (request_irq
575 (uart->port.irq, bfin_serial_rx_int, IRQF_DISABLED,
576 "BFIN_UART_RX", uart)) {
577 printk(KERN_NOTICE "Unable to attach BlackFin UART RX interrupt\n");
578 return -EBUSY;
579 }
580
581 if (request_irq
582 (uart->port.irq+1, bfin_serial_tx_int, IRQF_DISABLED,
583 "BFIN_UART_TX", uart)) {
584 printk(KERN_NOTICE "Unable to attach BlackFin UART TX interrupt\n");
585 free_irq(uart->port.irq, uart);
586 return -EBUSY;
587 }
588 #endif
589 UART_PUT_IER(uart, UART_GET_IER(uart) | ERBFI);
590 return 0;
591 }
592
593 static void bfin_serial_shutdown(struct uart_port *port)
594 {
595 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
596
597 #ifdef CONFIG_SERIAL_BFIN_DMA
598 disable_dma(uart->tx_dma_channel);
599 free_dma(uart->tx_dma_channel);
600 disable_dma(uart->rx_dma_channel);
601 free_dma(uart->rx_dma_channel);
602 del_timer(&(uart->rx_dma_timer));
603 #else
604 free_irq(uart->port.irq, uart);
605 free_irq(uart->port.irq+1, uart);
606 #endif
607 }
608
609 static void
610 bfin_serial_set_termios(struct uart_port *port, struct ktermios *termios,
611 struct ktermios *old)
612 {
613 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
614 unsigned long flags;
615 unsigned int baud, quot;
616 unsigned short val, ier, lsr, lcr = 0;
617
618 switch (termios->c_cflag & CSIZE) {
619 case CS8:
620 lcr = WLS(8);
621 break;
622 case CS7:
623 lcr = WLS(7);
624 break;
625 case CS6:
626 lcr = WLS(6);
627 break;
628 case CS5:
629 lcr = WLS(5);
630 break;
631 default:
632 printk(KERN_ERR "%s: word lengh not supported\n",
633 __FUNCTION__);
634 }
635
636 if (termios->c_cflag & CSTOPB)
637 lcr |= STB;
638 if (termios->c_cflag & PARENB)
639 lcr |= PEN;
640 if (!(termios->c_cflag & PARODD))
641 lcr |= EPS;
642 if (termios->c_cflag & CMSPAR)
643 lcr |= STP;
644
645 port->read_status_mask = OE;
646 if (termios->c_iflag & INPCK)
647 port->read_status_mask |= (FE | PE);
648 if (termios->c_iflag & (BRKINT | PARMRK))
649 port->read_status_mask |= BI;
650
651 /*
652 * Characters to ignore
653 */
654 port->ignore_status_mask = 0;
655 if (termios->c_iflag & IGNPAR)
656 port->ignore_status_mask |= FE | PE;
657 if (termios->c_iflag & IGNBRK) {
658 port->ignore_status_mask |= BI;
659 /*
660 * If we're ignoring parity and break indicators,
661 * ignore overruns too (for real raw support).
662 */
663 if (termios->c_iflag & IGNPAR)
664 port->ignore_status_mask |= OE;
665 }
666
667 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
668 quot = uart_get_divisor(port, baud);
669 spin_lock_irqsave(&uart->port.lock, flags);
670
671 do {
672 lsr = UART_GET_LSR(uart);
673 } while (!(lsr & TEMT));
674
675 /* Disable UART */
676 ier = UART_GET_IER(uart);
677 UART_PUT_IER(uart, 0);
678
679 /* Set DLAB in LCR to Access DLL and DLH */
680 val = UART_GET_LCR(uart);
681 val |= DLAB;
682 UART_PUT_LCR(uart, val);
683 SSYNC();
684
685 UART_PUT_DLL(uart, quot & 0xFF);
686 SSYNC();
687 UART_PUT_DLH(uart, (quot >> 8) & 0xFF);
688 SSYNC();
689
690 /* Clear DLAB in LCR to Access THR RBR IER */
691 val = UART_GET_LCR(uart);
692 val &= ~DLAB;
693 UART_PUT_LCR(uart, val);
694 SSYNC();
695
696 UART_PUT_LCR(uart, lcr);
697
698 /* Enable UART */
699 UART_PUT_IER(uart, ier);
700
701 val = UART_GET_GCTL(uart);
702 val |= UCEN;
703 UART_PUT_GCTL(uart, val);
704
705 spin_unlock_irqrestore(&uart->port.lock, flags);
706 }
707
708 static const char *bfin_serial_type(struct uart_port *port)
709 {
710 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
711
712 return uart->port.type == PORT_BFIN ? "BFIN-UART" : NULL;
713 }
714
715 /*
716 * Release the memory region(s) being used by 'port'.
717 */
718 static void bfin_serial_release_port(struct uart_port *port)
719 {
720 }
721
722 /*
723 * Request the memory region(s) being used by 'port'.
724 */
725 static int bfin_serial_request_port(struct uart_port *port)
726 {
727 return 0;
728 }
729
730 /*
731 * Configure/autoconfigure the port.
732 */
733 static void bfin_serial_config_port(struct uart_port *port, int flags)
734 {
735 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
736
737 if (flags & UART_CONFIG_TYPE &&
738 bfin_serial_request_port(&uart->port) == 0)
739 uart->port.type = PORT_BFIN;
740 }
741
742 /*
743 * Verify the new serial_struct (for TIOCSSERIAL).
744 * The only change we allow are to the flags and type, and
745 * even then only between PORT_BFIN and PORT_UNKNOWN
746 */
747 static int
748 bfin_serial_verify_port(struct uart_port *port, struct serial_struct *ser)
749 {
750 return 0;
751 }
752
753 static struct uart_ops bfin_serial_pops = {
754 .tx_empty = bfin_serial_tx_empty,
755 .set_mctrl = bfin_serial_set_mctrl,
756 .get_mctrl = bfin_serial_get_mctrl,
757 .stop_tx = bfin_serial_stop_tx,
758 .start_tx = bfin_serial_start_tx,
759 .stop_rx = bfin_serial_stop_rx,
760 .enable_ms = bfin_serial_enable_ms,
761 .break_ctl = bfin_serial_break_ctl,
762 .startup = bfin_serial_startup,
763 .shutdown = bfin_serial_shutdown,
764 .set_termios = bfin_serial_set_termios,
765 .type = bfin_serial_type,
766 .release_port = bfin_serial_release_port,
767 .request_port = bfin_serial_request_port,
768 .config_port = bfin_serial_config_port,
769 .verify_port = bfin_serial_verify_port,
770 };
771
772 static void __init bfin_serial_init_ports(void)
773 {
774 static int first = 1;
775 int i;
776
777 if (!first)
778 return;
779 first = 0;
780
781 for (i = 0; i < nr_ports; i++) {
782 bfin_serial_ports[i].port.uartclk = get_sclk();
783 bfin_serial_ports[i].port.ops = &bfin_serial_pops;
784 bfin_serial_ports[i].port.line = i;
785 bfin_serial_ports[i].port.iotype = UPIO_MEM;
786 bfin_serial_ports[i].port.membase =
787 (void __iomem *)bfin_serial_resource[i].uart_base_addr;
788 bfin_serial_ports[i].port.mapbase =
789 bfin_serial_resource[i].uart_base_addr;
790 bfin_serial_ports[i].port.irq =
791 bfin_serial_resource[i].uart_irq;
792 bfin_serial_ports[i].port.flags = UPF_BOOT_AUTOCONF;
793 #ifdef CONFIG_SERIAL_BFIN_DMA
794 bfin_serial_ports[i].tx_done = 1;
795 bfin_serial_ports[i].tx_count = 0;
796 bfin_serial_ports[i].tx_dma_channel =
797 bfin_serial_resource[i].uart_tx_dma_channel;
798 bfin_serial_ports[i].rx_dma_channel =
799 bfin_serial_resource[i].uart_rx_dma_channel;
800 init_timer(&(bfin_serial_ports[i].rx_dma_timer));
801 #else
802 INIT_WORK(&bfin_serial_ports[i].cts_workqueue, bfin_serial_do_work);
803 #endif
804 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
805 bfin_serial_ports[i].cts_pin =
806 bfin_serial_resource[i].uart_cts_pin;
807 bfin_serial_ports[i].rts_pin =
808 bfin_serial_resource[i].uart_rts_pin;
809 #endif
810 bfin_serial_hw_init(&bfin_serial_ports[i]);
811
812 }
813 }
814
815 #ifdef CONFIG_SERIAL_BFIN_CONSOLE
816 static void bfin_serial_console_putchar(struct uart_port *port, int ch)
817 {
818 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
819 while (!(UART_GET_LSR(uart)))
820 barrier();
821 UART_PUT_CHAR(uart, ch);
822 SSYNC();
823 }
824
825 /*
826 * Interrupts are disabled on entering
827 */
828 static void
829 bfin_serial_console_write(struct console *co, const char *s, unsigned int count)
830 {
831 struct bfin_serial_port *uart = &bfin_serial_ports[co->index];
832 int flags = 0;
833
834 spin_lock_irqsave(&uart->port.lock, flags);
835 uart_console_write(&uart->port, s, count, bfin_serial_console_putchar);
836 spin_unlock_irqrestore(&uart->port.lock, flags);
837
838 }
839
840 /*
841 * If the port was already initialised (eg, by a boot loader),
842 * try to determine the current setup.
843 */
844 static void __init
845 bfin_serial_console_get_options(struct bfin_serial_port *uart, int *baud,
846 int *parity, int *bits)
847 {
848 unsigned short status;
849
850 status = UART_GET_IER(uart) & (ERBFI | ETBEI);
851 if (status == (ERBFI | ETBEI)) {
852 /* ok, the port was enabled */
853 unsigned short lcr, val;
854 unsigned short dlh, dll;
855
856 lcr = UART_GET_LCR(uart);
857
858 *parity = 'n';
859 if (lcr & PEN) {
860 if (lcr & EPS)
861 *parity = 'e';
862 else
863 *parity = 'o';
864 }
865 switch (lcr & 0x03) {
866 case 0: *bits = 5; break;
867 case 1: *bits = 6; break;
868 case 2: *bits = 7; break;
869 case 3: *bits = 8; break;
870 }
871 /* Set DLAB in LCR to Access DLL and DLH */
872 val = UART_GET_LCR(uart);
873 val |= DLAB;
874 UART_PUT_LCR(uart, val);
875
876 dll = UART_GET_DLL(uart);
877 dlh = UART_GET_DLH(uart);
878
879 /* Clear DLAB in LCR to Access THR RBR IER */
880 val = UART_GET_LCR(uart);
881 val &= ~DLAB;
882 UART_PUT_LCR(uart, val);
883
884 *baud = get_sclk() / (16*(dll | dlh << 8));
885 }
886 pr_debug("%s:baud = %d, parity = %c, bits= %d\n", __FUNCTION__, *baud, *parity, *bits);
887 }
888
889 static int __init
890 bfin_serial_console_setup(struct console *co, char *options)
891 {
892 struct bfin_serial_port *uart;
893 int baud = 57600;
894 int bits = 8;
895 int parity = 'n';
896 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
897 int flow = 'r';
898 #else
899 int flow = 'n';
900 #endif
901
902 /*
903 * Check whether an invalid uart number has been specified, and
904 * if so, search for the first available port that does have
905 * console support.
906 */
907 if (co->index == -1 || co->index >= nr_ports)
908 co->index = 0;
909 uart = &bfin_serial_ports[co->index];
910
911 if (options)
912 uart_parse_options(options, &baud, &parity, &bits, &flow);
913 else
914 bfin_serial_console_get_options(uart, &baud, &parity, &bits);
915
916 return uart_set_options(&uart->port, co, baud, parity, bits, flow);
917 }
918
919 static struct uart_driver bfin_serial_reg;
920 static struct console bfin_serial_console = {
921 .name = BFIN_SERIAL_NAME,
922 .write = bfin_serial_console_write,
923 .device = uart_console_device,
924 .setup = bfin_serial_console_setup,
925 .flags = CON_PRINTBUFFER,
926 .index = -1,
927 .data = &bfin_serial_reg,
928 };
929
930 static int __init bfin_serial_rs_console_init(void)
931 {
932 bfin_serial_init_ports();
933 register_console(&bfin_serial_console);
934 return 0;
935 }
936 console_initcall(bfin_serial_rs_console_init);
937
938 #define BFIN_SERIAL_CONSOLE &bfin_serial_console
939 #else
940 #define BFIN_SERIAL_CONSOLE NULL
941 #endif
942
943 static struct uart_driver bfin_serial_reg = {
944 .owner = THIS_MODULE,
945 .driver_name = "bfin-uart",
946 .dev_name = BFIN_SERIAL_NAME,
947 .major = BFIN_SERIAL_MAJOR,
948 .minor = BFIN_SERIAL_MINOR,
949 .nr = NR_PORTS,
950 .cons = BFIN_SERIAL_CONSOLE,
951 };
952
953 static int bfin_serial_suspend(struct platform_device *dev, pm_message_t state)
954 {
955 struct bfin_serial_port *uart = platform_get_drvdata(dev);
956
957 if (uart)
958 uart_suspend_port(&bfin_serial_reg, &uart->port);
959
960 return 0;
961 }
962
963 static int bfin_serial_resume(struct platform_device *dev)
964 {
965 struct bfin_serial_port *uart = platform_get_drvdata(dev);
966
967 if (uart)
968 uart_resume_port(&bfin_serial_reg, &uart->port);
969
970 return 0;
971 }
972
973 static int bfin_serial_probe(struct platform_device *dev)
974 {
975 struct resource *res = dev->resource;
976 int i;
977
978 for (i = 0; i < dev->num_resources; i++, res++)
979 if (res->flags & IORESOURCE_MEM)
980 break;
981
982 if (i < dev->num_resources) {
983 for (i = 0; i < nr_ports; i++, res++) {
984 if (bfin_serial_ports[i].port.mapbase != res->start)
985 continue;
986 bfin_serial_ports[i].port.dev = &dev->dev;
987 uart_add_one_port(&bfin_serial_reg, &bfin_serial_ports[i].port);
988 platform_set_drvdata(dev, &bfin_serial_ports[i]);
989 }
990 }
991
992 return 0;
993 }
994
995 static int bfin_serial_remove(struct platform_device *pdev)
996 {
997 struct bfin_serial_port *uart = platform_get_drvdata(pdev);
998
999
1000 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
1001 gpio_free(uart->cts_pin);
1002 gpio_free(uart->rts_pin);
1003 #endif
1004
1005 platform_set_drvdata(pdev, NULL);
1006
1007 if (uart)
1008 uart_remove_one_port(&bfin_serial_reg, &uart->port);
1009
1010 return 0;
1011 }
1012
1013 static struct platform_driver bfin_serial_driver = {
1014 .probe = bfin_serial_probe,
1015 .remove = bfin_serial_remove,
1016 .suspend = bfin_serial_suspend,
1017 .resume = bfin_serial_resume,
1018 .driver = {
1019 .name = "bfin-uart",
1020 },
1021 };
1022
1023 static int __init bfin_serial_init(void)
1024 {
1025 int ret;
1026
1027 pr_info("Serial: Blackfin serial driver\n");
1028
1029 bfin_serial_init_ports();
1030
1031 ret = uart_register_driver(&bfin_serial_reg);
1032 if (ret == 0) {
1033 ret = platform_driver_register(&bfin_serial_driver);
1034 if (ret) {
1035 pr_debug("uart register failed\n");
1036 uart_unregister_driver(&bfin_serial_reg);
1037 }
1038 }
1039 return ret;
1040 }
1041
1042 static void __exit bfin_serial_exit(void)
1043 {
1044 platform_driver_unregister(&bfin_serial_driver);
1045 uart_unregister_driver(&bfin_serial_reg);
1046 }
1047
1048 module_init(bfin_serial_init);
1049 module_exit(bfin_serial_exit);
1050
1051 MODULE_AUTHOR("Aubrey.Li <aubrey.li@analog.com>");
1052 MODULE_DESCRIPTION("Blackfin generic serial port driver");
1053 MODULE_LICENSE("GPL");
1054 MODULE_ALIAS_CHARDEV_MAJOR(BFIN_SERIAL_MAJOR);
Tomato firmware and modifications.