2 * linux/drivers/char/8250.c
4 * Driver for 8250/16550-type serial ports
6 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
8 * Copyright (C) 2001 Russell King.
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
15 * $Id: 8250.c,v 1.90 2002/07/28 10:03:27 rmk Exp $
17 * A note about mapbase / membase
19 * mapbase is the physical address of the IO port.
20 * membase is an 'ioremapped' cookie.
23 #if defined(CONFIG_SERIAL_8250_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
27 #include <linux/module.h>
28 #include <linux/moduleparam.h>
29 #include <linux/ioport.h>
30 #include <linux/init.h>
31 #include <linux/console.h>
32 #include <linux/sysrq.h>
33 #include <linux/delay.h>
34 #include <linux/platform_device.h>
35 #include <linux/tty.h>
36 #include <linux/tty_flip.h>
37 #include <linux/serial_reg.h>
38 #include <linux/serial_core.h>
39 #include <linux/serial.h>
40 #include <linux/serial_8250.h>
41 #include <linux/nmi.h>
42 #include <linux/mutex.h>
51 * share_irqs - whether we pass IRQF_SHARED to request_irq(). This option
52 * is unsafe when used on edge-triggered interrupts.
54 static unsigned int share_irqs
= SERIAL8250_SHARE_IRQS
;
56 static unsigned int nr_uarts
= CONFIG_SERIAL_8250_RUNTIME_UARTS
;
62 #define DEBUG_AUTOCONF(fmt...) printk(fmt)
64 #define DEBUG_AUTOCONF(fmt...) do { } while (0)
68 #define DEBUG_INTR(fmt...) printk(fmt)
70 #define DEBUG_INTR(fmt...) do { } while (0)
73 #define PASS_LIMIT 256
76 * We default to IRQ0 for the "no irq" hack. Some
77 * machine types want others as well - they're free
78 * to redefine this in their header file.
80 #define is_real_interrupt(irq) ((irq) != 0)
82 #ifdef CONFIG_SERIAL_8250_DETECT_IRQ
83 #define CONFIG_SERIAL_DETECT_IRQ 1
85 #ifdef CONFIG_SERIAL_8250_MANY_PORTS
86 #define CONFIG_SERIAL_MANY_PORTS 1
90 * HUB6 is always on. This will be removed once the header
91 * files have been cleaned.
95 #include <asm/serial.h>
98 * SERIAL_PORT_DFNS tells us about built-in ports that have no
99 * standard enumeration mechanism. Platforms that can find all
100 * serial ports via mechanisms like ACPI or PCI need not supply it.
102 #ifndef SERIAL_PORT_DFNS
103 #define SERIAL_PORT_DFNS
106 static const struct old_serial_port old_serial_port
[] = {
107 SERIAL_PORT_DFNS
/* defined in asm/serial.h */
110 #define UART_NR CONFIG_SERIAL_8250_NR_UARTS
112 #ifdef CONFIG_SERIAL_8250_RSA
114 #define PORT_RSA_MAX 4
115 static unsigned long probe_rsa
[PORT_RSA_MAX
];
116 static unsigned int probe_rsa_count
;
117 #endif /* CONFIG_SERIAL_8250_RSA */
119 struct uart_8250_port
{
120 struct uart_port port
;
121 struct timer_list timer
; /* "no irq" timer */
122 struct list_head list
; /* ports on this IRQ */
123 unsigned short capabilities
; /* port capabilities */
124 unsigned short bugs
; /* port bugs */
125 unsigned int tx_loadsz
; /* transmit fifo load size */
130 unsigned char mcr_mask
; /* mask of user bits */
131 unsigned char mcr_force
; /* mask of forced bits */
132 unsigned char lsr_break_flag
;
135 * We provide a per-port pm hook.
137 void (*pm
)(struct uart_port
*port
,
138 unsigned int state
, unsigned int old
);
143 struct list_head
*head
;
146 static struct irq_info irq_lists
[NR_IRQS
];
149 * Here we define the default xmit fifo size used for each type of UART.
151 static const struct serial8250_config uart_config
[] = {
176 .fcr
= UART_FCR_ENABLE_FIFO
| UART_FCR_R_TRIG_10
,
177 .flags
= UART_CAP_FIFO
,
188 .flags
= UART_CAP_FIFO
| UART_CAP_EFR
| UART_CAP_SLEEP
,
194 .fcr
= UART_FCR_ENABLE_FIFO
| UART_FCR_R_TRIG_01
|
196 .flags
= UART_CAP_FIFO
| UART_CAP_EFR
| UART_CAP_SLEEP
,
202 .fcr
= UART_FCR_ENABLE_FIFO
| UART_FCR_R_TRIG_10
|
204 .flags
= UART_CAP_FIFO
| UART_CAP_SLEEP
| UART_CAP_AFE
,
212 .name
= "16C950/954",
215 .fcr
= UART_FCR_ENABLE_FIFO
| UART_FCR_R_TRIG_10
,
216 .flags
= UART_CAP_FIFO
,
222 .fcr
= UART_FCR_ENABLE_FIFO
| UART_FCR_R_TRIG_01
|
224 .flags
= UART_CAP_FIFO
| UART_CAP_EFR
| UART_CAP_SLEEP
,
230 .fcr
= UART_FCR_ENABLE_FIFO
| UART_FCR_R_TRIG_10
,
231 .flags
= UART_CAP_FIFO
| UART_CAP_EFR
| UART_CAP_SLEEP
,
237 .fcr
= UART_FCR_ENABLE_FIFO
| UART_FCR_R_TRIG_11
,
238 .flags
= UART_CAP_FIFO
,
244 .fcr
= UART_FCR_ENABLE_FIFO
| UART_FCR_R_TRIG_10
,
245 .flags
= UART_CAP_FIFO
| UART_NATSEMI
,
251 .fcr
= UART_FCR_ENABLE_FIFO
| UART_FCR_R_TRIG_10
,
252 .flags
= UART_CAP_FIFO
| UART_CAP_UUE
,
258 .fcr
= UART_FCR_ENABLE_FIFO
| UART_FCR_R_TRIG_10
,
259 .flags
= UART_CAP_FIFO
,
263 #if defined (CONFIG_SERIAL_8250_AU1X00)
265 /* Au1x00 UART hardware has a weird register layout */
266 static const u8 au_io_in_map
[] = {
276 static const u8 au_io_out_map
[] = {
284 /* sane hardware needs no mapping */
285 static inline int map_8250_in_reg(struct uart_8250_port
*up
, int offset
)
287 if (up
->port
.iotype
!= UPIO_AU
)
289 return au_io_in_map
[offset
];
292 static inline int map_8250_out_reg(struct uart_8250_port
*up
, int offset
)
294 if (up
->port
.iotype
!= UPIO_AU
)
296 return au_io_out_map
[offset
];
299 #elif defined (CONFIG_SERIAL_8250_RM9K)
323 static inline int map_8250_in_reg(struct uart_8250_port
*up
, int offset
)
325 if (up
->port
.iotype
!= UPIO_RM9000
)
327 return regmap_in
[offset
];
330 static inline int map_8250_out_reg(struct uart_8250_port
*up
, int offset
)
332 if (up
->port
.iotype
!= UPIO_RM9000
)
334 return regmap_out
[offset
];
339 /* sane hardware needs no mapping */
340 #define map_8250_in_reg(up, offset) (offset)
341 #define map_8250_out_reg(up, offset) (offset)
345 #ifdef CONFIG_BCM47XX
346 #include <asm/r4kcache.h>
349 static unsigned int serial_in(struct uart_8250_port
*up
, int offset
)
352 offset
= map_8250_in_reg(up
, offset
) << up
->port
.regshift
;
354 switch (up
->port
.iotype
) {
356 outb(up
->port
.hub6
- 1 + offset
, up
->port
.iobase
);
357 return inb(up
->port
.iobase
+ 1);
361 return readb(up
->port
.membase
+ offset
);
365 return readl(up
->port
.membase
+ offset
);
367 #ifdef CONFIG_SERIAL_8250_AU1X00
369 return __raw_readl(up
->port
.membase
+ offset
);
373 if (offset
== UART_IIR
) {
374 tmp
= readl(up
->port
.membase
+ (UART_IIR
& ~3));
375 return (tmp
>> 16) & 0xff; /* UART_IIR % 4 == 2 */
377 return readb(up
->port
.membase
+ offset
);
380 return inb(up
->port
.iobase
+ offset
);
385 serial_out(struct uart_8250_port
*up
, int offset
, int value
)
387 /* Save the offset before it's remapped */
388 int save_offset
= offset
;
389 offset
= map_8250_out_reg(up
, offset
) << up
->port
.regshift
;
391 switch (up
->port
.iotype
) {
393 outb(up
->port
.hub6
- 1 + offset
, up
->port
.iobase
);
394 outb(value
, up
->port
.iobase
+ 1);
398 writeb(value
, up
->port
.membase
+ offset
);
399 #ifdef CONFIG_BCM47XX
400 BCM4710_DUMMY_RREG();
406 writel(value
, up
->port
.membase
+ offset
);
409 #ifdef CONFIG_SERIAL_8250_AU1X00
411 __raw_writel(value
, up
->port
.membase
+ offset
);
415 if (!((offset
== UART_IER
) && (value
& UART_IER_UUE
)))
416 writeb(value
, up
->port
.membase
+ offset
);
420 /* Save the LCR value so it can be re-written when a
421 * Busy Detect interrupt occurs. */
422 if (save_offset
== UART_LCR
)
424 writeb(value
, up
->port
.membase
+ offset
);
425 /* Read the IER to ensure any interrupt is cleared before
426 * returning from ISR. */
427 if (save_offset
== UART_TX
|| save_offset
== UART_IER
)
428 value
= serial_in(up
, UART_IER
);
432 outb(value
, up
->port
.iobase
+ offset
);
437 serial_out_sync(struct uart_8250_port
*up
, int offset
, int value
)
439 switch (up
->port
.iotype
) {
442 #ifdef CONFIG_SERIAL_8250_AU1X00
446 serial_out(up
, offset
, value
);
447 serial_in(up
, UART_LCR
); /* safe, no side-effects */
450 serial_out(up
, offset
, value
);
455 * We used to support using pause I/O for certain machines. We
456 * haven't supported this for a while, but just in case it's badly
457 * needed for certain old 386 machines, I've left these #define's
460 #define serial_inp(up, offset) serial_in(up, offset)
461 #define serial_outp(up, offset, value) serial_out(up, offset, value)
463 /* Uart divisor latch read */
464 static inline int _serial_dl_read(struct uart_8250_port
*up
)
466 return serial_inp(up
, UART_DLL
) | serial_inp(up
, UART_DLM
) << 8;
469 /* Uart divisor latch write */
470 static inline void _serial_dl_write(struct uart_8250_port
*up
, int value
)
472 serial_outp(up
, UART_DLL
, value
& 0xff);
473 serial_outp(up
, UART_DLM
, value
>> 8 & 0xff);
476 #if defined (CONFIG_SERIAL_8250_AU1X00)
477 /* Au1x00 haven't got a standard divisor latch */
478 static int serial_dl_read(struct uart_8250_port
*up
)
480 if (up
->port
.iotype
== UPIO_AU
)
481 return __raw_readl(up
->port
.membase
+ 0x28);
483 return _serial_dl_read(up
);
486 static void serial_dl_write(struct uart_8250_port
*up
, int value
)
488 if (up
->port
.iotype
== UPIO_AU
)
489 __raw_writel(value
, up
->port
.membase
+ 0x28);
491 _serial_dl_write(up
, value
);
493 #elif defined (CONFIG_SERIAL_8250_RM9K)
494 static int serial_dl_read(struct uart_8250_port
*up
)
496 return (up
->port
.iotype
== UPIO_RM9000
) ?
497 (((__raw_readl(up
->port
.membase
+ 0x10) << 8) |
498 (__raw_readl(up
->port
.membase
+ 0x08) & 0xff)) & 0xffff) :
502 static void serial_dl_write(struct uart_8250_port
*up
, int value
)
504 if (up
->port
.iotype
== UPIO_RM9000
) {
505 __raw_writel(value
, up
->port
.membase
+ 0x08);
506 __raw_writel(value
>> 8, up
->port
.membase
+ 0x10);
508 _serial_dl_write(up
, value
);
512 #define serial_dl_read(up) _serial_dl_read(up)
513 #define serial_dl_write(up, value) _serial_dl_write(up, value)
519 static void serial_icr_write(struct uart_8250_port
*up
, int offset
, int value
)
521 serial_out(up
, UART_SCR
, offset
);
522 serial_out(up
, UART_ICR
, value
);
525 static unsigned int serial_icr_read(struct uart_8250_port
*up
, int offset
)
529 serial_icr_write(up
, UART_ACR
, up
->acr
| UART_ACR_ICRRD
);
530 serial_out(up
, UART_SCR
, offset
);
531 value
= serial_in(up
, UART_ICR
);
532 serial_icr_write(up
, UART_ACR
, up
->acr
);
540 static inline void serial8250_clear_fifos(struct uart_8250_port
*p
)
542 if (p
->capabilities
& UART_CAP_FIFO
) {
543 serial_outp(p
, UART_FCR
, UART_FCR_ENABLE_FIFO
);
544 serial_outp(p
, UART_FCR
, UART_FCR_ENABLE_FIFO
|
545 UART_FCR_CLEAR_RCVR
| UART_FCR_CLEAR_XMIT
);
546 serial_outp(p
, UART_FCR
, 0);
551 * IER sleep support. UARTs which have EFRs need the "extended
552 * capability" bit enabled. Note that on XR16C850s, we need to
553 * reset LCR to write to IER.
555 static inline void serial8250_set_sleep(struct uart_8250_port
*p
, int sleep
)
557 if (p
->capabilities
& UART_CAP_SLEEP
) {
558 if (p
->capabilities
& UART_CAP_EFR
) {
559 serial_outp(p
, UART_LCR
, 0xBF);
560 serial_outp(p
, UART_EFR
, UART_EFR_ECB
);
561 serial_outp(p
, UART_LCR
, 0);
563 serial_outp(p
, UART_IER
, sleep
? UART_IERX_SLEEP
: 0);
564 if (p
->capabilities
& UART_CAP_EFR
) {
565 serial_outp(p
, UART_LCR
, 0xBF);
566 serial_outp(p
, UART_EFR
, 0);
567 serial_outp(p
, UART_LCR
, 0);
572 #ifdef CONFIG_SERIAL_8250_RSA
574 * Attempts to turn on the RSA FIFO. Returns zero on failure.
575 * We set the port uart clock rate if we succeed.
577 static int __enable_rsa(struct uart_8250_port
*up
)
582 mode
= serial_inp(up
, UART_RSA_MSR
);
583 result
= mode
& UART_RSA_MSR_FIFO
;
586 serial_outp(up
, UART_RSA_MSR
, mode
| UART_RSA_MSR_FIFO
);
587 mode
= serial_inp(up
, UART_RSA_MSR
);
588 result
= mode
& UART_RSA_MSR_FIFO
;
592 up
->port
.uartclk
= SERIAL_RSA_BAUD_BASE
* 16;
597 static void enable_rsa(struct uart_8250_port
*up
)
599 if (up
->port
.type
== PORT_RSA
) {
600 if (up
->port
.uartclk
!= SERIAL_RSA_BAUD_BASE
* 16) {
601 spin_lock_irq(&up
->port
.lock
);
603 spin_unlock_irq(&up
->port
.lock
);
605 if (up
->port
.uartclk
== SERIAL_RSA_BAUD_BASE
* 16)
606 serial_outp(up
, UART_RSA_FRR
, 0);
611 * Attempts to turn off the RSA FIFO. Returns zero on failure.
612 * It is unknown why interrupts were disabled in here. However,
613 * the caller is expected to preserve this behaviour by grabbing
614 * the spinlock before calling this function.
616 static void disable_rsa(struct uart_8250_port
*up
)
621 if (up
->port
.type
== PORT_RSA
&&
622 up
->port
.uartclk
== SERIAL_RSA_BAUD_BASE
* 16) {
623 spin_lock_irq(&up
->port
.lock
);
625 mode
= serial_inp(up
, UART_RSA_MSR
);
626 result
= !(mode
& UART_RSA_MSR_FIFO
);
629 serial_outp(up
, UART_RSA_MSR
, mode
& ~UART_RSA_MSR_FIFO
);
630 mode
= serial_inp(up
, UART_RSA_MSR
);
631 result
= !(mode
& UART_RSA_MSR_FIFO
);
635 up
->port
.uartclk
= SERIAL_RSA_BAUD_BASE_LO
* 16;
636 spin_unlock_irq(&up
->port
.lock
);
639 #endif /* CONFIG_SERIAL_8250_RSA */
642 * This is a quickie test to see how big the FIFO is.
643 * It doesn't work at all the time, more's the pity.
645 static int size_fifo(struct uart_8250_port
*up
)
647 unsigned char old_fcr
, old_mcr
, old_lcr
;
648 unsigned short old_dl
;
651 old_lcr
= serial_inp(up
, UART_LCR
);
652 serial_outp(up
, UART_LCR
, 0);
653 old_fcr
= serial_inp(up
, UART_FCR
);
654 old_mcr
= serial_inp(up
, UART_MCR
);
655 serial_outp(up
, UART_FCR
, UART_FCR_ENABLE_FIFO
|
656 UART_FCR_CLEAR_RCVR
| UART_FCR_CLEAR_XMIT
);
657 serial_outp(up
, UART_MCR
, UART_MCR_LOOP
);
658 serial_outp(up
, UART_LCR
, UART_LCR_DLAB
);
659 old_dl
= serial_dl_read(up
);
660 serial_dl_write(up
, 0x0001);
661 serial_outp(up
, UART_LCR
, 0x03);
662 for (count
= 0; count
< 256; count
++)
663 serial_outp(up
, UART_TX
, count
);
664 mdelay(20);/* FIXME - schedule_timeout */
665 for (count
= 0; (serial_inp(up
, UART_LSR
) & UART_LSR_DR
) &&
666 (count
< 256); count
++)
667 serial_inp(up
, UART_RX
);
668 serial_outp(up
, UART_FCR
, old_fcr
);
669 serial_outp(up
, UART_MCR
, old_mcr
);
670 serial_outp(up
, UART_LCR
, UART_LCR_DLAB
);
671 serial_dl_write(up
, old_dl
);
672 serial_outp(up
, UART_LCR
, old_lcr
);
678 * Read UART ID using the divisor method - set DLL and DLM to zero
679 * and the revision will be in DLL and device type in DLM. We
680 * preserve the device state across this.
682 static unsigned int autoconfig_read_divisor_id(struct uart_8250_port
*p
)
684 unsigned char old_dll
, old_dlm
, old_lcr
;
687 old_lcr
= serial_inp(p
, UART_LCR
);
688 serial_outp(p
, UART_LCR
, UART_LCR_DLAB
);
690 old_dll
= serial_inp(p
, UART_DLL
);
691 old_dlm
= serial_inp(p
, UART_DLM
);
693 serial_outp(p
, UART_DLL
, 0);
694 serial_outp(p
, UART_DLM
, 0);
696 id
= serial_inp(p
, UART_DLL
) | serial_inp(p
, UART_DLM
) << 8;
698 serial_outp(p
, UART_DLL
, old_dll
);
699 serial_outp(p
, UART_DLM
, old_dlm
);
700 serial_outp(p
, UART_LCR
, old_lcr
);
706 * This is a helper routine to autodetect StarTech/Exar/Oxsemi UART's.
707 * When this function is called we know it is at least a StarTech
708 * 16650 V2, but it might be one of several StarTech UARTs, or one of
709 * its clones. (We treat the broken original StarTech 16650 V1 as a
710 * 16550, and why not? Startech doesn't seem to even acknowledge its
713 * What evil have men's minds wrought...
715 static void autoconfig_has_efr(struct uart_8250_port
*up
)
717 unsigned int id1
, id2
, id3
, rev
;
720 * Everything with an EFR has SLEEP
722 up
->capabilities
|= UART_CAP_EFR
| UART_CAP_SLEEP
;
725 * First we check to see if it's an Oxford Semiconductor UART.
727 * If we have to do this here because some non-National
728 * Semiconductor clone chips lock up if you try writing to the
729 * LSR register (which serial_icr_read does)
733 * Check for Oxford Semiconductor 16C950.
735 * EFR [4] must be set else this test fails.
737 * This shouldn't be necessary, but Mike Hudson (Exoray@isys.ca)
738 * claims that it's needed for 952 dual UART's (which are not
739 * recommended for new designs).
742 serial_out(up
, UART_LCR
, 0xBF);
743 serial_out(up
, UART_EFR
, UART_EFR_ECB
);
744 serial_out(up
, UART_LCR
, 0x00);
745 id1
= serial_icr_read(up
, UART_ID1
);
746 id2
= serial_icr_read(up
, UART_ID2
);
747 id3
= serial_icr_read(up
, UART_ID3
);
748 rev
= serial_icr_read(up
, UART_REV
);
750 DEBUG_AUTOCONF("950id=%02x:%02x:%02x:%02x ", id1
, id2
, id3
, rev
);
752 if (id1
== 0x16 && id2
== 0xC9 &&
753 (id3
== 0x50 || id3
== 0x52 || id3
== 0x54)) {
754 up
->port
.type
= PORT_16C950
;
757 * Enable work around for the Oxford Semiconductor 952 rev B
758 * chip which causes it to seriously miscalculate baud rates
761 if (id3
== 0x52 && rev
== 0x01)
762 up
->bugs
|= UART_BUG_QUOT
;
767 * We check for a XR16C850 by setting DLL and DLM to 0, and then
768 * reading back DLL and DLM. The chip type depends on the DLM
770 * 0x10 - XR16C850 and the DLL contains the chip revision.
774 id1
= autoconfig_read_divisor_id(up
);
775 DEBUG_AUTOCONF("850id=%04x ", id1
);
778 if (id2
== 0x10 || id2
== 0x12 || id2
== 0x14) {
779 up
->port
.type
= PORT_16850
;
784 * It wasn't an XR16C850.
786 * We distinguish between the '654 and the '650 by counting
787 * how many bytes are in the FIFO. I'm using this for now,
788 * since that's the technique that was sent to me in the
789 * serial driver update, but I'm not convinced this works.
790 * I've had problems doing this in the past. -TYT
792 if (size_fifo(up
) == 64)
793 up
->port
.type
= PORT_16654
;
795 up
->port
.type
= PORT_16650V2
;
799 * We detected a chip without a FIFO. Only two fall into
800 * this category - the original 8250 and the 16450. The
801 * 16450 has a scratch register (accessible with LCR=0)
803 static void autoconfig_8250(struct uart_8250_port
*up
)
805 unsigned char scratch
, status1
, status2
;
807 up
->port
.type
= PORT_8250
;
809 scratch
= serial_in(up
, UART_SCR
);
810 serial_outp(up
, UART_SCR
, 0xa5);
811 status1
= serial_in(up
, UART_SCR
);
812 serial_outp(up
, UART_SCR
, 0x5a);
813 status2
= serial_in(up
, UART_SCR
);
814 serial_outp(up
, UART_SCR
, scratch
);
816 if (status1
== 0xa5 && status2
== 0x5a)
817 up
->port
.type
= PORT_16450
;
820 static int broken_efr(struct uart_8250_port
*up
)
823 * Exar ST16C2550 "A2" devices incorrectly detect as
824 * having an EFR, and report an ID of 0x0201. See
825 * http://www.exar.com/info.php?pdf=dan180_oct2004.pdf
827 if (autoconfig_read_divisor_id(up
) == 0x0201 && size_fifo(up
) == 16)
834 * We know that the chip has FIFOs. Does it have an EFR? The
835 * EFR is located in the same register position as the IIR and
836 * we know the top two bits of the IIR are currently set. The
837 * EFR should contain zero. Try to read the EFR.
839 static void autoconfig_16550a(struct uart_8250_port
*up
)
841 unsigned char status1
, status2
;
842 unsigned int iersave
;
844 up
->port
.type
= PORT_16550A
;
845 up
->capabilities
|= UART_CAP_FIFO
;
848 * Check for presence of the EFR when DLAB is set.
849 * Only ST16C650V1 UARTs pass this test.
851 serial_outp(up
, UART_LCR
, UART_LCR_DLAB
);
852 if (serial_in(up
, UART_EFR
) == 0) {
853 serial_outp(up
, UART_EFR
, 0xA8);
854 if (serial_in(up
, UART_EFR
) != 0) {
855 DEBUG_AUTOCONF("EFRv1 ");
856 up
->port
.type
= PORT_16650
;
857 up
->capabilities
|= UART_CAP_EFR
| UART_CAP_SLEEP
;
859 DEBUG_AUTOCONF("Motorola 8xxx DUART ");
861 serial_outp(up
, UART_EFR
, 0);
866 * Maybe it requires 0xbf to be written to the LCR.
867 * (other ST16C650V2 UARTs, TI16C752A, etc)
869 serial_outp(up
, UART_LCR
, 0xBF);
870 if (serial_in(up
, UART_EFR
) == 0 && !broken_efr(up
)) {
871 DEBUG_AUTOCONF("EFRv2 ");
872 autoconfig_has_efr(up
);
877 * Check for a National Semiconductor SuperIO chip.
878 * Attempt to switch to bank 2, read the value of the LOOP bit
879 * from EXCR1. Switch back to bank 0, change it in MCR. Then
880 * switch back to bank 2, read it from EXCR1 again and check
881 * it's changed. If so, set baud_base in EXCR2 to 921600. -- dwmw2
883 serial_outp(up
, UART_LCR
, 0);
884 status1
= serial_in(up
, UART_MCR
);
885 serial_outp(up
, UART_LCR
, 0xE0);
886 status2
= serial_in(up
, 0x02); /* EXCR1 */
888 if (!((status2
^ status1
) & UART_MCR_LOOP
)) {
889 serial_outp(up
, UART_LCR
, 0);
890 serial_outp(up
, UART_MCR
, status1
^ UART_MCR_LOOP
);
891 serial_outp(up
, UART_LCR
, 0xE0);
892 status2
= serial_in(up
, 0x02); /* EXCR1 */
893 serial_outp(up
, UART_LCR
, 0);
894 serial_outp(up
, UART_MCR
, status1
);
896 if ((status2
^ status1
) & UART_MCR_LOOP
) {
899 serial_outp(up
, UART_LCR
, 0xE0);
901 quot
= serial_dl_read(up
);
904 status1
= serial_in(up
, 0x04); /* EXCR2 */
905 status1
&= ~0xB0; /* Disable LOCK, mask out PRESL[01] */
906 status1
|= 0x10; /* 1.625 divisor for baud_base --> 921600 */
907 serial_outp(up
, 0x04, status1
);
909 serial_dl_write(up
, quot
);
911 serial_outp(up
, UART_LCR
, 0);
913 up
->port
.uartclk
= 921600*16;
914 up
->port
.type
= PORT_NS16550A
;
915 up
->capabilities
|= UART_NATSEMI
;
921 * No EFR. Try to detect a TI16750, which only sets bit 5 of
922 * the IIR when 64 byte FIFO mode is enabled when DLAB is set.
923 * Try setting it with and without DLAB set. Cheap clones
924 * set bit 5 without DLAB set.
926 serial_outp(up
, UART_LCR
, 0);
927 serial_outp(up
, UART_FCR
, UART_FCR_ENABLE_FIFO
| UART_FCR7_64BYTE
);
928 status1
= serial_in(up
, UART_IIR
) >> 5;
929 serial_outp(up
, UART_FCR
, UART_FCR_ENABLE_FIFO
);
930 serial_outp(up
, UART_LCR
, UART_LCR_DLAB
);
931 serial_outp(up
, UART_FCR
, UART_FCR_ENABLE_FIFO
| UART_FCR7_64BYTE
);
932 status2
= serial_in(up
, UART_IIR
) >> 5;
933 serial_outp(up
, UART_FCR
, UART_FCR_ENABLE_FIFO
);
934 serial_outp(up
, UART_LCR
, 0);
936 DEBUG_AUTOCONF("iir1=%d iir2=%d ", status1
, status2
);
938 if (status1
== 6 && status2
== 7) {
939 up
->port
.type
= PORT_16750
;
940 up
->capabilities
|= UART_CAP_AFE
| UART_CAP_SLEEP
;
945 * Try writing and reading the UART_IER_UUE bit (b6).
946 * If it works, this is probably one of the Xscale platform's
948 * We're going to explicitly set the UUE bit to 0 before
949 * trying to write and read a 1 just to make sure it's not
950 * already a 1 and maybe locked there before we even start start.
952 iersave
= serial_in(up
, UART_IER
);
953 serial_outp(up
, UART_IER
, iersave
& ~UART_IER_UUE
);
954 if (!(serial_in(up
, UART_IER
) & UART_IER_UUE
)) {
956 * OK it's in a known zero state, try writing and reading
957 * without disturbing the current state of the other bits.
959 serial_outp(up
, UART_IER
, iersave
| UART_IER_UUE
);
960 if (serial_in(up
, UART_IER
) & UART_IER_UUE
) {
963 * We'll leave the UART_IER_UUE bit set to 1 (enabled).
965 DEBUG_AUTOCONF("Xscale ");
966 up
->port
.type
= PORT_XSCALE
;
967 up
->capabilities
|= UART_CAP_UUE
;
972 * If we got here we couldn't force the IER_UUE bit to 0.
973 * Log it and continue.
975 DEBUG_AUTOCONF("Couldn't force IER_UUE to 0 ");
977 serial_outp(up
, UART_IER
, iersave
);
981 * This routine is called by rs_init() to initialize a specific serial
982 * port. It determines what type of UART chip this serial port is
983 * using: 8250, 16450, 16550, 16550A. The important question is
984 * whether or not this UART is a 16550A or not, since this will
985 * determine whether or not we can use its FIFO features or not.
987 static void autoconfig(struct uart_8250_port
*up
, unsigned int probeflags
)
989 unsigned char status1
, scratch
, scratch2
, scratch3
;
990 unsigned char save_lcr
, save_mcr
;
993 if (!up
->port
.iobase
&& !up
->port
.mapbase
&& !up
->port
.membase
)
996 DEBUG_AUTOCONF("ttyS%d: autoconf (0x%04x, 0x%p): ",
997 up
->port
.line
, up
->port
.iobase
, up
->port
.membase
);
1000 * We really do need global IRQs disabled here - we're going to
1001 * be frobbing the chips IRQ enable register to see if it exists.
1003 spin_lock_irqsave(&up
->port
.lock
, flags
);
1005 up
->capabilities
= 0;
1008 if (!(up
->port
.flags
& UPF_BUGGY_UART
)) {
1010 * Do a simple existence test first; if we fail this,
1011 * there's no point trying anything else.
1013 * 0x80 is used as a nonsense port to prevent against
1014 * false positives due to ISA bus float. The
1015 * assumption is that 0x80 is a non-existent port;
1016 * which should be safe since include/asm/io.h also
1017 * makes this assumption.
1019 * Note: this is safe as long as MCR bit 4 is clear
1020 * and the device is in "PC" mode.
1022 scratch
= serial_inp(up
, UART_IER
);
1023 serial_outp(up
, UART_IER
, 0);
1028 * Mask out IER[7:4] bits for test as some UARTs (e.g. TL
1029 * 16C754B) allow only to modify them if an EFR bit is set.
1031 scratch2
= serial_inp(up
, UART_IER
) & 0x0f;
1032 serial_outp(up
, UART_IER
, 0x0F);
1036 scratch3
= serial_inp(up
, UART_IER
) & 0x0f;
1037 serial_outp(up
, UART_IER
, scratch
);
1038 if (scratch2
!= 0 || scratch3
!= 0x0F) {
1040 * We failed; there's nothing here
1042 DEBUG_AUTOCONF("IER test failed (%02x, %02x) ",
1043 scratch2
, scratch3
);
1048 save_mcr
= serial_in(up
, UART_MCR
);
1049 save_lcr
= serial_in(up
, UART_LCR
);
1052 * Check to see if a UART is really there. Certain broken
1053 * internal modems based on the Rockwell chipset fail this
1054 * test, because they apparently don't implement the loopback
1055 * test mode. So this test is skipped on the COM 1 through
1056 * COM 4 ports. This *should* be safe, since no board
1057 * manufacturer would be stupid enough to design a board
1058 * that conflicts with COM 1-4 --- we hope!
1060 if (!(up
->port
.flags
& UPF_SKIP_TEST
)) {
1061 serial_outp(up
, UART_MCR
, UART_MCR_LOOP
| 0x0A);
1062 status1
= serial_inp(up
, UART_MSR
) & 0xF0;
1063 serial_outp(up
, UART_MCR
, save_mcr
);
1064 if (status1
!= 0x90) {
1065 DEBUG_AUTOCONF("LOOP test failed (%02x) ",
1072 * We're pretty sure there's a port here. Lets find out what
1073 * type of port it is. The IIR top two bits allows us to find
1074 * out if it's 8250 or 16450, 16550, 16550A or later. This
1075 * determines what we test for next.
1077 * We also initialise the EFR (if any) to zero for later. The
1078 * EFR occupies the same register location as the FCR and IIR.
1080 serial_outp(up
, UART_LCR
, 0xBF);
1081 serial_outp(up
, UART_EFR
, 0);
1082 serial_outp(up
, UART_LCR
, 0);
1084 serial_outp(up
, UART_FCR
, UART_FCR_ENABLE_FIFO
);
1085 scratch
= serial_in(up
, UART_IIR
) >> 6;
1087 DEBUG_AUTOCONF("iir=%d ", scratch
);
1091 autoconfig_8250(up
);
1094 up
->port
.type
= PORT_UNKNOWN
;
1097 up
->port
.type
= PORT_16550
;
1100 autoconfig_16550a(up
);
1104 #ifdef CONFIG_SERIAL_8250_RSA
1106 * Only probe for RSA ports if we got the region.
1108 if (up
->port
.type
== PORT_16550A
&& probeflags
& PROBE_RSA
) {
1111 for (i
= 0 ; i
< probe_rsa_count
; ++i
) {
1112 if (probe_rsa
[i
] == up
->port
.iobase
&&
1114 up
->port
.type
= PORT_RSA
;
1121 #ifdef CONFIG_SERIAL_8250_AU1X00
1122 /* if access method is AU, it is a 16550 with a quirk */
1123 if (up
->port
.type
== PORT_16550A
&& up
->port
.iotype
== UPIO_AU
)
1124 up
->bugs
|= UART_BUG_NOMSR
;
1127 serial_outp(up
, UART_LCR
, save_lcr
);
1129 if (up
->capabilities
!= uart_config
[up
->port
.type
].flags
) {
1131 "ttyS%d: detected caps %08x should be %08x\n",
1132 up
->port
.line
, up
->capabilities
,
1133 uart_config
[up
->port
.type
].flags
);
1136 up
->port
.fifosize
= uart_config
[up
->port
.type
].fifo_size
;
1137 up
->capabilities
= uart_config
[up
->port
.type
].flags
;
1138 up
->tx_loadsz
= uart_config
[up
->port
.type
].tx_loadsz
;
1140 if (up
->port
.type
== PORT_UNKNOWN
)
1146 #ifdef CONFIG_SERIAL_8250_RSA
1147 if (up
->port
.type
== PORT_RSA
)
1148 serial_outp(up
, UART_RSA_FRR
, 0);
1150 serial_outp(up
, UART_MCR
, save_mcr
);
1151 serial8250_clear_fifos(up
);
1152 serial_in(up
, UART_RX
);
1153 if (up
->capabilities
& UART_CAP_UUE
)
1154 serial_outp(up
, UART_IER
, UART_IER_UUE
);
1156 serial_outp(up
, UART_IER
, 0);
1159 spin_unlock_irqrestore(&up
->port
.lock
, flags
);
1160 DEBUG_AUTOCONF("type=%s\n", uart_config
[up
->port
.type
].name
);
1163 static void autoconfig_irq(struct uart_8250_port
*up
)
1165 unsigned char save_mcr
, save_ier
;
1166 unsigned char save_ICP
= 0;
1167 unsigned int ICP
= 0;
1171 if (up
->port
.flags
& UPF_FOURPORT
) {
1172 ICP
= (up
->port
.iobase
& 0xfe0) | 0x1f;
1173 save_ICP
= inb_p(ICP
);
1178 /* forget possible initially masked and pending IRQ */
1179 probe_irq_off(probe_irq_on());
1180 save_mcr
= serial_inp(up
, UART_MCR
);
1181 save_ier
= serial_inp(up
, UART_IER
);
1182 serial_outp(up
, UART_MCR
, UART_MCR_OUT1
| UART_MCR_OUT2
);
1184 irqs
= probe_irq_on();
1185 serial_outp(up
, UART_MCR
, 0);
1187 if (up
->port
.flags
& UPF_FOURPORT
) {
1188 serial_outp(up
, UART_MCR
,
1189 UART_MCR_DTR
| UART_MCR_RTS
);
1191 serial_outp(up
, UART_MCR
,
1192 UART_MCR_DTR
| UART_MCR_RTS
| UART_MCR_OUT2
);
1194 serial_outp(up
, UART_IER
, 0x0f); /* enable all intrs */
1195 (void)serial_inp(up
, UART_LSR
);
1196 (void)serial_inp(up
, UART_RX
);
1197 (void)serial_inp(up
, UART_IIR
);
1198 (void)serial_inp(up
, UART_MSR
);
1199 serial_outp(up
, UART_TX
, 0xFF);
1201 irq
= probe_irq_off(irqs
);
1203 serial_outp(up
, UART_MCR
, save_mcr
);
1204 serial_outp(up
, UART_IER
, save_ier
);
1206 if (up
->port
.flags
& UPF_FOURPORT
)
1207 outb_p(save_ICP
, ICP
);
1209 up
->port
.irq
= (irq
> 0) ? irq
: 0;
1212 static inline void __stop_tx(struct uart_8250_port
*p
)
1214 if (p
->ier
& UART_IER_THRI
) {
1215 p
->ier
&= ~UART_IER_THRI
;
1216 serial_out(p
, UART_IER
, p
->ier
);
1220 static void serial8250_stop_tx(struct uart_port
*port
)
1222 struct uart_8250_port
*up
= (struct uart_8250_port
*)port
;
1227 * We really want to stop the transmitter from sending.
1229 if (up
->port
.type
== PORT_16C950
) {
1230 up
->acr
|= UART_ACR_TXDIS
;
1231 serial_icr_write(up
, UART_ACR
, up
->acr
);
1235 static void transmit_chars(struct uart_8250_port
*up
);
1237 static void serial8250_start_tx(struct uart_port
*port
)
1239 struct uart_8250_port
*up
= (struct uart_8250_port
*)port
;
1241 if (!(up
->ier
& UART_IER_THRI
)) {
1242 up
->ier
|= UART_IER_THRI
;
1243 serial_out(up
, UART_IER
, up
->ier
);
1245 if (up
->bugs
& UART_BUG_TXEN
) {
1246 unsigned char lsr
, iir
;
1247 lsr
= serial_in(up
, UART_LSR
);
1248 iir
= serial_in(up
, UART_IIR
) & 0x0f;
1249 if ((up
->port
.type
== PORT_RM9000
) ?
1250 (lsr
& UART_LSR_THRE
&&
1251 (iir
== UART_IIR_NO_INT
|| iir
== UART_IIR_THRI
)) :
1252 (lsr
& UART_LSR_TEMT
&& iir
& UART_IIR_NO_INT
))
1258 * Re-enable the transmitter if we disabled it.
1260 if (up
->port
.type
== PORT_16C950
&& up
->acr
& UART_ACR_TXDIS
) {
1261 up
->acr
&= ~UART_ACR_TXDIS
;
1262 serial_icr_write(up
, UART_ACR
, up
->acr
);
1266 static void serial8250_stop_rx(struct uart_port
*port
)
1268 struct uart_8250_port
*up
= (struct uart_8250_port
*)port
;
1270 up
->ier
&= ~UART_IER_RLSI
;
1271 up
->port
.read_status_mask
&= ~UART_LSR_DR
;
1272 serial_out(up
, UART_IER
, up
->ier
);
1275 static void serial8250_enable_ms(struct uart_port
*port
)
1277 struct uart_8250_port
*up
= (struct uart_8250_port
*)port
;
1279 /* no MSR capabilities */
1280 if (up
->bugs
& UART_BUG_NOMSR
)
1283 up
->ier
|= UART_IER_MSI
;
1284 serial_out(up
, UART_IER
, up
->ier
);
1288 receive_chars(struct uart_8250_port
*up
, unsigned int *status
)
1290 struct tty_struct
*tty
= up
->port
.info
->tty
;
1291 unsigned char ch
, lsr
= *status
;
1292 int max_count
= 256;
1296 ch
= serial_inp(up
, UART_RX
);
1298 up
->port
.icount
.rx
++;
1300 #ifdef CONFIG_SERIAL_8250_CONSOLE
1302 * Recover the break flag from console xmit
1304 if (up
->port
.line
== up
->port
.cons
->index
) {
1305 lsr
|= up
->lsr_break_flag
;
1306 up
->lsr_break_flag
= 0;
1310 if (unlikely(lsr
& (UART_LSR_BI
| UART_LSR_PE
|
1311 UART_LSR_FE
| UART_LSR_OE
))) {
1313 * For statistics only
1315 if (lsr
& UART_LSR_BI
) {
1316 lsr
&= ~(UART_LSR_FE
| UART_LSR_PE
);
1317 up
->port
.icount
.brk
++;
1319 * We do the SysRQ and SAK checking
1320 * here because otherwise the break
1321 * may get masked by ignore_status_mask
1322 * or read_status_mask.
1324 if (uart_handle_break(&up
->port
))
1326 } else if (lsr
& UART_LSR_PE
)
1327 up
->port
.icount
.parity
++;
1328 else if (lsr
& UART_LSR_FE
)
1329 up
->port
.icount
.frame
++;
1330 if (lsr
& UART_LSR_OE
)
1331 up
->port
.icount
.overrun
++;
1334 * Mask off conditions which should be ignored.
1336 lsr
&= up
->port
.read_status_mask
;
1338 if (lsr
& UART_LSR_BI
) {
1339 DEBUG_INTR("handling break....");
1341 } else if (lsr
& UART_LSR_PE
)
1343 else if (lsr
& UART_LSR_FE
)
1346 if (uart_handle_sysrq_char(&up
->port
, ch
))
1349 uart_insert_char(&up
->port
, lsr
, UART_LSR_OE
, ch
, flag
);
1352 lsr
= serial_inp(up
, UART_LSR
);
1353 } while ((lsr
& UART_LSR_DR
) && (max_count
-- > 0));
1354 spin_unlock(&up
->port
.lock
);
1355 tty_flip_buffer_push(tty
);
1356 spin_lock(&up
->port
.lock
);
1360 static void transmit_chars(struct uart_8250_port
*up
)
1362 struct circ_buf
*xmit
= &up
->port
.info
->xmit
;
1365 if (up
->port
.x_char
) {
1366 serial_outp(up
, UART_TX
, up
->port
.x_char
);
1367 up
->port
.icount
.tx
++;
1368 up
->port
.x_char
= 0;
1371 if (uart_tx_stopped(&up
->port
)) {
1372 serial8250_stop_tx(&up
->port
);
1375 if (uart_circ_empty(xmit
)) {
1380 count
= up
->tx_loadsz
;
1382 serial_out(up
, UART_TX
, xmit
->buf
[xmit
->tail
]);
1383 xmit
->tail
= (xmit
->tail
+ 1) & (UART_XMIT_SIZE
- 1);
1384 up
->port
.icount
.tx
++;
1385 if (uart_circ_empty(xmit
))
1387 } while (--count
> 0);
1389 if (uart_circ_chars_pending(xmit
) < WAKEUP_CHARS
)
1390 uart_write_wakeup(&up
->port
);
1392 DEBUG_INTR("THRE...");
1394 if (uart_circ_empty(xmit
))
1398 static unsigned int check_modem_status(struct uart_8250_port
*up
)
1400 unsigned int status
= serial_in(up
, UART_MSR
);
1402 if (status
& UART_MSR_ANY_DELTA
&& up
->ier
& UART_IER_MSI
&&
1403 up
->port
.info
!= NULL
) {
1404 if (status
& UART_MSR_TERI
)
1405 up
->port
.icount
.rng
++;
1406 if (status
& UART_MSR_DDSR
)
1407 up
->port
.icount
.dsr
++;
1408 if (status
& UART_MSR_DDCD
)
1409 uart_handle_dcd_change(&up
->port
, status
& UART_MSR_DCD
);
1410 if (status
& UART_MSR_DCTS
)
1411 uart_handle_cts_change(&up
->port
, status
& UART_MSR_CTS
);
1413 wake_up_interruptible(&up
->port
.info
->delta_msr_wait
);
1420 * This handles the interrupt from one port.
1423 serial8250_handle_port(struct uart_8250_port
*up
)
1425 unsigned int status
;
1426 unsigned long flags
;
1428 spin_lock_irqsave(&up
->port
.lock
, flags
);
1430 status
= serial_inp(up
, UART_LSR
);
1432 DEBUG_INTR("status = %x...", status
);
1434 if (status
& UART_LSR_DR
)
1435 receive_chars(up
, &status
);
1436 check_modem_status(up
);
1437 if (status
& UART_LSR_THRE
)
1440 spin_unlock_irqrestore(&up
->port
.lock
, flags
);
1444 * This is the serial driver's interrupt routine.
1446 * Arjan thinks the old way was overly complex, so it got simplified.
1447 * Alan disagrees, saying that need the complexity to handle the weird
1448 * nature of ISA shared interrupts. (This is a special exception.)
1450 * In order to handle ISA shared interrupts properly, we need to check
1451 * that all ports have been serviced, and therefore the ISA interrupt
1452 * line has been de-asserted.
1454 * This means we need to loop through all ports. checking that they
1455 * don't have an interrupt pending.
1457 static irqreturn_t
serial8250_interrupt(int irq
, void *dev_id
)
1459 struct irq_info
*i
= dev_id
;
1460 struct list_head
*l
, *end
= NULL
;
1461 int pass_counter
= 0, handled
= 0;
1463 DEBUG_INTR("serial8250_interrupt(%d)...", irq
);
1465 spin_lock(&i
->lock
);
1469 struct uart_8250_port
*up
;
1472 up
= list_entry(l
, struct uart_8250_port
, list
);
1474 iir
= serial_in(up
, UART_IIR
);
1475 if (!(iir
& UART_IIR_NO_INT
)) {
1476 serial8250_handle_port(up
);
1481 } else if (up
->port
.iotype
== UPIO_DWAPB
&&
1482 (iir
& UART_IIR_BUSY
) == UART_IIR_BUSY
) {
1483 /* The DesignWare APB UART has an Busy Detect (0x07)
1484 * interrupt meaning an LCR write attempt occured while the
1485 * UART was busy. The interrupt must be cleared by reading
1486 * the UART status register (USR) and the LCR re-written. */
1487 unsigned int status
;
1488 status
= *(volatile u32
*)up
->port
.private_data
;
1489 serial_out(up
, UART_LCR
, up
->lcr
);
1494 } else if (end
== NULL
)
1499 if (l
== i
->head
&& pass_counter
++ > PASS_LIMIT
) {
1500 /* If we hit this, we're dead. */
1501 printk(KERN_ERR
"serial8250: too much work for "
1507 spin_unlock(&i
->lock
);
1509 DEBUG_INTR("end.\n");
1511 return IRQ_RETVAL(handled
);
1515 * To support ISA shared interrupts, we need to have one interrupt
1516 * handler that ensures that the IRQ line has been deasserted
1517 * before returning. Failing to do this will result in the IRQ
1518 * line being stuck active, and, since ISA irqs are edge triggered,
1519 * no more IRQs will be seen.
1521 static void serial_do_unlink(struct irq_info
*i
, struct uart_8250_port
*up
)
1523 spin_lock_irq(&i
->lock
);
1525 if (!list_empty(i
->head
)) {
1526 if (i
->head
== &up
->list
)
1527 i
->head
= i
->head
->next
;
1528 list_del(&up
->list
);
1530 BUG_ON(i
->head
!= &up
->list
);
1534 spin_unlock_irq(&i
->lock
);
1537 static int serial_link_irq_chain(struct uart_8250_port
*up
)
1539 struct irq_info
*i
= irq_lists
+ up
->port
.irq
;
1540 int ret
, irq_flags
= up
->port
.flags
& UPF_SHARE_IRQ
? IRQF_SHARED
: 0;
1542 spin_lock_irq(&i
->lock
);
1545 list_add(&up
->list
, i
->head
);
1546 spin_unlock_irq(&i
->lock
);
1550 INIT_LIST_HEAD(&up
->list
);
1551 i
->head
= &up
->list
;
1552 spin_unlock_irq(&i
->lock
);
1554 ret
= request_irq(up
->port
.irq
, serial8250_interrupt
,
1555 irq_flags
, "serial", i
);
1557 serial_do_unlink(i
, up
);
1563 static void serial_unlink_irq_chain(struct uart_8250_port
*up
)
1565 struct irq_info
*i
= irq_lists
+ up
->port
.irq
;
1567 BUG_ON(i
->head
== NULL
);
1569 if (list_empty(i
->head
))
1570 free_irq(up
->port
.irq
, i
);
1572 serial_do_unlink(i
, up
);
1575 /* Base timer interval for polling */
1576 static inline int poll_timeout(int timeout
)
1578 return timeout
> 6 ? (timeout
/ 2 - 2) : 1;
1582 * This function is used to handle ports that do not have an
1583 * interrupt. This doesn't work very well for 16450's, but gives
1584 * barely passable results for a 16550A. (Although at the expense
1585 * of much CPU overhead).
1587 static void serial8250_timeout(unsigned long data
)
1589 struct uart_8250_port
*up
= (struct uart_8250_port
*)data
;
1592 iir
= serial_in(up
, UART_IIR
);
1593 if (!(iir
& UART_IIR_NO_INT
))
1594 serial8250_handle_port(up
);
1595 mod_timer(&up
->timer
, jiffies
+ poll_timeout(up
->port
.timeout
));
1598 static void serial8250_backup_timeout(unsigned long data
)
1600 struct uart_8250_port
*up
= (struct uart_8250_port
*)data
;
1601 unsigned int iir
, ier
= 0;
1604 * Must disable interrupts or else we risk racing with the interrupt
1607 if (is_real_interrupt(up
->port
.irq
)) {
1608 ier
= serial_in(up
, UART_IER
);
1609 serial_out(up
, UART_IER
, 0);
1612 iir
= serial_in(up
, UART_IIR
);
1615 * This should be a safe test for anyone who doesn't trust the
1616 * IIR bits on their UART, but it's specifically designed for
1617 * the "Diva" UART used on the management processor on many HP
1618 * ia64 and parisc boxes.
1620 if ((iir
& UART_IIR_NO_INT
) && (up
->ier
& UART_IER_THRI
) &&
1621 (!uart_circ_empty(&up
->port
.info
->xmit
) || up
->port
.x_char
) &&
1622 (serial_in(up
, UART_LSR
) & UART_LSR_THRE
)) {
1623 iir
&= ~(UART_IIR_ID
| UART_IIR_NO_INT
);
1624 iir
|= UART_IIR_THRI
;
1627 if (!(iir
& UART_IIR_NO_INT
))
1628 serial8250_handle_port(up
);
1630 if (is_real_interrupt(up
->port
.irq
))
1631 serial_out(up
, UART_IER
, ier
);
1633 /* Standard timer interval plus 0.2s to keep the port running */
1634 mod_timer(&up
->timer
, jiffies
+ poll_timeout(up
->port
.timeout
) + HZ
/5);
1637 static unsigned int serial8250_tx_empty(struct uart_port
*port
)
1639 struct uart_8250_port
*up
= (struct uart_8250_port
*)port
;
1640 unsigned long flags
;
1643 spin_lock_irqsave(&up
->port
.lock
, flags
);
1644 ret
= serial_in(up
, UART_LSR
) & UART_LSR_TEMT
? TIOCSER_TEMT
: 0;
1645 spin_unlock_irqrestore(&up
->port
.lock
, flags
);
1650 static unsigned int serial8250_get_mctrl(struct uart_port
*port
)
1652 struct uart_8250_port
*up
= (struct uart_8250_port
*)port
;
1653 unsigned int status
;
1656 status
= check_modem_status(up
);
1659 if (status
& UART_MSR_DCD
)
1661 if (status
& UART_MSR_RI
)
1663 if (status
& UART_MSR_DSR
)
1665 if (status
& UART_MSR_CTS
)
1670 static void serial8250_set_mctrl(struct uart_port
*port
, unsigned int mctrl
)
1672 struct uart_8250_port
*up
= (struct uart_8250_port
*)port
;
1673 unsigned char mcr
= 0;
1675 if (mctrl
& TIOCM_RTS
)
1676 mcr
|= UART_MCR_RTS
;
1677 if (mctrl
& TIOCM_DTR
)
1678 mcr
|= UART_MCR_DTR
;
1679 if (mctrl
& TIOCM_OUT1
)
1680 mcr
|= UART_MCR_OUT1
;
1681 if (mctrl
& TIOCM_OUT2
)
1682 mcr
|= UART_MCR_OUT2
;
1683 if (mctrl
& TIOCM_LOOP
)
1684 mcr
|= UART_MCR_LOOP
;
1686 mcr
= (mcr
& up
->mcr_mask
) | up
->mcr_force
| up
->mcr
;
1688 serial_out(up
, UART_MCR
, mcr
);
1691 static void serial8250_break_ctl(struct uart_port
*port
, int break_state
)
1693 struct uart_8250_port
*up
= (struct uart_8250_port
*)port
;
1694 unsigned long flags
;
1696 spin_lock_irqsave(&up
->port
.lock
, flags
);
1697 if (break_state
== -1)
1698 up
->lcr
|= UART_LCR_SBC
;
1700 up
->lcr
&= ~UART_LCR_SBC
;
1701 serial_out(up
, UART_LCR
, up
->lcr
);
1702 spin_unlock_irqrestore(&up
->port
.lock
, flags
);
1705 #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
1708 * Wait for transmitter & holding register to empty
1710 static inline void wait_for_xmitr(struct uart_8250_port
*up
, int bits
)
1712 unsigned int status
, tmout
= 10000;
1714 /* Wait up to 10ms for the character(s) to be sent. */
1716 status
= serial_in(up
, UART_LSR
);
1718 if (status
& UART_LSR_BI
)
1719 up
->lsr_break_flag
= UART_LSR_BI
;
1724 } while ((status
& bits
) != bits
);
1726 /* Wait up to 1s for flow control if necessary */
1727 if (up
->port
.flags
& UPF_CONS_FLOW
) {
1729 while (!(serial_in(up
, UART_MSR
) & UART_MSR_CTS
) && --tmout
) {
1731 touch_nmi_watchdog();
1736 static int serial8250_startup(struct uart_port
*port
)
1738 struct uart_8250_port
*up
= (struct uart_8250_port
*)port
;
1739 unsigned long flags
;
1740 unsigned char lsr
, iir
;
1743 up
->capabilities
= uart_config
[up
->port
.type
].flags
;
1746 if (up
->port
.type
== PORT_16C950
) {
1747 /* Wake up and initialize UART */
1749 serial_outp(up
, UART_LCR
, 0xBF);
1750 serial_outp(up
, UART_EFR
, UART_EFR_ECB
);
1751 serial_outp(up
, UART_IER
, 0);
1752 serial_outp(up
, UART_LCR
, 0);
1753 serial_icr_write(up
, UART_CSR
, 0); /* Reset the UART */
1754 serial_outp(up
, UART_LCR
, 0xBF);
1755 serial_outp(up
, UART_EFR
, UART_EFR_ECB
);
1756 serial_outp(up
, UART_LCR
, 0);
1759 #ifdef CONFIG_SERIAL_8250_RSA
1761 * If this is an RSA port, see if we can kick it up to the
1762 * higher speed clock.
1768 * Clear the FIFO buffers and disable them.
1769 * (they will be reenabled in set_termios())
1771 serial8250_clear_fifos(up
);
1774 * Clear the interrupt registers.
1776 (void) serial_inp(up
, UART_LSR
);
1777 (void) serial_inp(up
, UART_RX
);
1778 (void) serial_inp(up
, UART_IIR
);
1779 (void) serial_inp(up
, UART_MSR
);
1782 * At this point, there's no way the LSR could still be 0xff;
1783 * if it is, then bail out, because there's likely no UART
1786 if (!(up
->port
.flags
& UPF_BUGGY_UART
) &&
1787 (serial_inp(up
, UART_LSR
) == 0xff)) {
1788 printk("ttyS%d: LSR safety check engaged!\n", up
->port
.line
);
1793 * For a XR16C850, we need to set the trigger levels
1795 if (up
->port
.type
== PORT_16850
) {
1798 serial_outp(up
, UART_LCR
, 0xbf);
1800 fctr
= serial_inp(up
, UART_FCTR
) & ~(UART_FCTR_RX
|UART_FCTR_TX
);
1801 serial_outp(up
, UART_FCTR
, fctr
| UART_FCTR_TRGD
| UART_FCTR_RX
);
1802 serial_outp(up
, UART_TRG
, UART_TRG_96
);
1803 serial_outp(up
, UART_FCTR
, fctr
| UART_FCTR_TRGD
| UART_FCTR_TX
);
1804 serial_outp(up
, UART_TRG
, UART_TRG_96
);
1806 serial_outp(up
, UART_LCR
, 0);
1809 if (is_real_interrupt(up
->port
.irq
)) {
1811 * Test for UARTs that do not reassert THRE when the
1812 * transmitter is idle and the interrupt has already
1813 * been cleared. Real 16550s should always reassert
1814 * this interrupt whenever the transmitter is idle and
1815 * the interrupt is enabled. Delays are necessary to
1816 * allow register changes to become visible.
1818 spin_lock_irqsave(&up
->port
.lock
, flags
);
1820 wait_for_xmitr(up
, UART_LSR_THRE
);
1821 serial_out_sync(up
, UART_IER
, UART_IER_THRI
);
1822 udelay(1); /* allow THRE to set */
1823 serial_in(up
, UART_IIR
);
1824 serial_out(up
, UART_IER
, 0);
1825 serial_out_sync(up
, UART_IER
, UART_IER_THRI
);
1826 udelay(1); /* allow a working UART time to re-assert THRE */
1827 iir
= serial_in(up
, UART_IIR
);
1828 serial_out(up
, UART_IER
, 0);
1830 spin_unlock_irqrestore(&up
->port
.lock
, flags
);
1833 * If the interrupt is not reasserted, setup a timer to
1834 * kick the UART on a regular basis.
1836 if (iir
& UART_IIR_NO_INT
) {
1837 pr_debug("ttyS%d - using backup timer\n", port
->line
);
1838 up
->timer
.function
= serial8250_backup_timeout
;
1839 up
->timer
.data
= (unsigned long)up
;
1840 mod_timer(&up
->timer
, jiffies
+
1841 poll_timeout(up
->port
.timeout
) + HZ
/5);
1846 * If the "interrupt" for this port doesn't correspond with any
1847 * hardware interrupt, we use a timer-based system. The original
1848 * driver used to do this with IRQ0.
1850 if (!is_real_interrupt(up
->port
.irq
)) {
1851 up
->timer
.data
= (unsigned long)up
;
1852 mod_timer(&up
->timer
, jiffies
+ poll_timeout(up
->port
.timeout
));
1854 retval
= serial_link_irq_chain(up
);
1860 * Now, initialize the UART
1862 serial_outp(up
, UART_LCR
, UART_LCR_WLEN8
);
1864 spin_lock_irqsave(&up
->port
.lock
, flags
);
1865 if (up
->port
.flags
& UPF_FOURPORT
) {
1866 if (!is_real_interrupt(up
->port
.irq
))
1867 up
->port
.mctrl
|= TIOCM_OUT1
;
1870 * Most PC uarts need OUT2 raised to enable interrupts.
1872 if (is_real_interrupt(up
->port
.irq
))
1873 up
->port
.mctrl
|= TIOCM_OUT2
;
1875 serial8250_set_mctrl(&up
->port
, up
->port
.mctrl
);
1878 * Do a quick test to see if we receive an
1879 * interrupt when we enable the TX irq.
1881 serial_outp(up
, UART_IER
, UART_IER_THRI
);
1882 lsr
= serial_in(up
, UART_LSR
);
1883 iir
= serial_in(up
, UART_IIR
);
1884 serial_outp(up
, UART_IER
, 0);
1886 if (lsr
& UART_LSR_TEMT
&& iir
& UART_IIR_NO_INT
) {
1887 if (!(up
->bugs
& UART_BUG_TXEN
)) {
1888 up
->bugs
|= UART_BUG_TXEN
;
1889 pr_debug("ttyS%d - enabling bad tx status workarounds\n",
1893 up
->bugs
&= ~UART_BUG_TXEN
;
1896 spin_unlock_irqrestore(&up
->port
.lock
, flags
);
1899 * Finally, enable interrupts. Note: Modem status interrupts
1900 * are set via set_termios(), which will be occurring imminently
1901 * anyway, so we don't enable them here.
1903 up
->ier
= UART_IER_RLSI
| UART_IER_RDI
;
1904 serial_outp(up
, UART_IER
, up
->ier
);
1906 if (up
->port
.flags
& UPF_FOURPORT
) {
1909 * Enable interrupts on the AST Fourport board
1911 icp
= (up
->port
.iobase
& 0xfe0) | 0x01f;
1917 * And clear the interrupt registers again for luck.
1919 (void) serial_inp(up
, UART_LSR
);
1920 (void) serial_inp(up
, UART_RX
);
1921 (void) serial_inp(up
, UART_IIR
);
1922 (void) serial_inp(up
, UART_MSR
);
1927 static void serial8250_shutdown(struct uart_port
*port
)
1929 struct uart_8250_port
*up
= (struct uart_8250_port
*)port
;
1930 unsigned long flags
;
1933 * Disable interrupts from this port
1936 serial_outp(up
, UART_IER
, 0);
1938 spin_lock_irqsave(&up
->port
.lock
, flags
);
1939 if (up
->port
.flags
& UPF_FOURPORT
) {
1940 /* reset interrupts on the AST Fourport board */
1941 inb((up
->port
.iobase
& 0xfe0) | 0x1f);
1942 up
->port
.mctrl
|= TIOCM_OUT1
;
1944 up
->port
.mctrl
&= ~TIOCM_OUT2
;
1946 serial8250_set_mctrl(&up
->port
, up
->port
.mctrl
);
1947 spin_unlock_irqrestore(&up
->port
.lock
, flags
);
1950 * Disable break condition and FIFOs
1952 serial_out(up
, UART_LCR
, serial_inp(up
, UART_LCR
) & ~UART_LCR_SBC
);
1953 serial8250_clear_fifos(up
);
1955 #ifdef CONFIG_SERIAL_8250_RSA
1957 * Reset the RSA board back to 115kbps compat mode.
1963 * Read data port to reset things, and then unlink from
1966 (void) serial_in(up
, UART_RX
);
1968 del_timer_sync(&up
->timer
);
1969 up
->timer
.function
= serial8250_timeout
;
1970 if (is_real_interrupt(up
->port
.irq
))
1971 serial_unlink_irq_chain(up
);
1974 static unsigned int serial8250_get_divisor(struct uart_port
*port
, unsigned int baud
)
1979 * Handle magic divisors for baud rates above baud_base on
1980 * SMSC SuperIO chips.
1982 if ((port
->flags
& UPF_MAGIC_MULTIPLIER
) &&
1983 baud
== (port
->uartclk
/4))
1985 else if ((port
->flags
& UPF_MAGIC_MULTIPLIER
) &&
1986 baud
== (port
->uartclk
/8))
1989 quot
= uart_get_divisor(port
, baud
);
1995 serial8250_set_termios(struct uart_port
*port
, struct ktermios
*termios
,
1996 struct ktermios
*old
)
1998 struct uart_8250_port
*up
= (struct uart_8250_port
*)port
;
1999 unsigned char cval
, fcr
= 0;
2000 unsigned long flags
;
2001 unsigned int baud
, quot
;
2003 switch (termios
->c_cflag
& CSIZE
) {
2005 cval
= UART_LCR_WLEN5
;
2008 cval
= UART_LCR_WLEN6
;
2011 cval
= UART_LCR_WLEN7
;
2015 cval
= UART_LCR_WLEN8
;
2019 if (termios
->c_cflag
& CSTOPB
)
2020 cval
|= UART_LCR_STOP
;
2021 if (termios
->c_cflag
& PARENB
)
2022 cval
|= UART_LCR_PARITY
;
2023 if (!(termios
->c_cflag
& PARODD
))
2024 cval
|= UART_LCR_EPAR
;
2026 if (termios
->c_cflag
& CMSPAR
)
2027 cval
|= UART_LCR_SPAR
;
2031 * Ask the core to calculate the divisor for us.
2033 baud
= uart_get_baud_rate(port
, termios
, old
, 0, port
->uartclk
/16);
2034 quot
= serial8250_get_divisor(port
, baud
);
2037 * Oxford Semi 952 rev B workaround
2039 if (up
->bugs
& UART_BUG_QUOT
&& (quot
& 0xff) == 0)
2042 if (up
->capabilities
& UART_CAP_FIFO
&& up
->port
.fifosize
> 1) {
2044 fcr
= UART_FCR_ENABLE_FIFO
| UART_FCR_TRIGGER_1
;
2046 fcr
= uart_config
[up
->port
.type
].fcr
;
2050 * MCR-based auto flow control. When AFE is enabled, RTS will be
2051 * deasserted when the receive FIFO contains more characters than
2052 * the trigger, or the MCR RTS bit is cleared. In the case where
2053 * the remote UART is not using CTS auto flow control, we must
2054 * have sufficient FIFO entries for the latency of the remote
2055 * UART to respond. IOW, at least 32 bytes of FIFO.
2057 if (up
->capabilities
& UART_CAP_AFE
&& up
->port
.fifosize
>= 32) {
2058 up
->mcr
&= ~UART_MCR_AFE
;
2059 if (termios
->c_cflag
& CRTSCTS
)
2060 up
->mcr
|= UART_MCR_AFE
;
2064 * Ok, we're now changing the port state. Do it with
2065 * interrupts disabled.
2067 spin_lock_irqsave(&up
->port
.lock
, flags
);
2070 * Update the per-port timeout.
2072 uart_update_timeout(port
, termios
->c_cflag
, baud
);
2074 up
->port
.read_status_mask
= UART_LSR_OE
| UART_LSR_THRE
| UART_LSR_DR
;
2075 if (termios
->c_iflag
& INPCK
)
2076 up
->port
.read_status_mask
|= UART_LSR_FE
| UART_LSR_PE
;
2077 if (termios
->c_iflag
& (BRKINT
| PARMRK
))
2078 up
->port
.read_status_mask
|= UART_LSR_BI
;
2081 * Characteres to ignore
2083 up
->port
.ignore_status_mask
= 0;
2084 if (termios
->c_iflag
& IGNPAR
)
2085 up
->port
.ignore_status_mask
|= UART_LSR_PE
| UART_LSR_FE
;
2086 if (termios
->c_iflag
& IGNBRK
) {
2087 up
->port
.ignore_status_mask
|= UART_LSR_BI
;
2089 * If we're ignoring parity and break indicators,
2090 * ignore overruns too (for real raw support).
2092 if (termios
->c_iflag
& IGNPAR
)
2093 up
->port
.ignore_status_mask
|= UART_LSR_OE
;
2097 * ignore all characters if CREAD is not set
2099 if ((termios
->c_cflag
& CREAD
) == 0)
2100 up
->port
.ignore_status_mask
|= UART_LSR_DR
;
2103 * CTS flow control flag and modem status interrupts
2105 up
->ier
&= ~UART_IER_MSI
;
2106 if (!(up
->bugs
& UART_BUG_NOMSR
) &&
2107 UART_ENABLE_MS(&up
->port
, termios
->c_cflag
))
2108 up
->ier
|= UART_IER_MSI
;
2109 if (up
->capabilities
& UART_CAP_UUE
)
2110 up
->ier
|= UART_IER_UUE
| UART_IER_RTOIE
;
2112 serial_out(up
, UART_IER
, up
->ier
);
2114 if (up
->capabilities
& UART_CAP_EFR
) {
2115 unsigned char efr
= 0;
2117 * TI16C752/Startech hardware flow control. FIXME:
2118 * - TI16C752 requires control thresholds to be set.
2119 * - UART_MCR_RTS is ineffective if auto-RTS mode is enabled.
2121 if (termios
->c_cflag
& CRTSCTS
)
2122 efr
|= UART_EFR_CTS
;
2124 serial_outp(up
, UART_LCR
, 0xBF);
2125 serial_outp(up
, UART_EFR
, efr
);
2128 #ifdef CONFIG_ARCH_OMAP15XX
2129 /* Workaround to enable 115200 baud on OMAP1510 internal ports */
2130 if (cpu_is_omap1510() && is_omap_port((unsigned int)up
->port
.membase
)) {
2131 if (baud
== 115200) {
2133 serial_out(up
, UART_OMAP_OSC_12M_SEL
, 1);
2135 serial_out(up
, UART_OMAP_OSC_12M_SEL
, 0);
2139 if (up
->capabilities
& UART_NATSEMI
) {
2140 /* Switch to bank 2 not bank 1, to avoid resetting EXCR2 */
2141 serial_outp(up
, UART_LCR
, 0xe0);
2143 serial_outp(up
, UART_LCR
, cval
| UART_LCR_DLAB
);/* set DLAB */
2146 serial_dl_write(up
, quot
);
2149 * LCR DLAB must be set to enable 64-byte FIFO mode. If the FCR
2150 * is written without DLAB set, this mode will be disabled.
2152 if (up
->port
.type
== PORT_16750
)
2153 serial_outp(up
, UART_FCR
, fcr
);
2155 serial_outp(up
, UART_LCR
, cval
); /* reset DLAB */
2156 up
->lcr
= cval
; /* Save LCR */
2157 if (up
->port
.type
!= PORT_16750
) {
2158 if (fcr
& UART_FCR_ENABLE_FIFO
) {
2159 /* emulated UARTs (Lucent Venus 167x) need two steps */
2160 serial_outp(up
, UART_FCR
, UART_FCR_ENABLE_FIFO
);
2162 serial_outp(up
, UART_FCR
, fcr
); /* set fcr */
2164 serial8250_set_mctrl(&up
->port
, up
->port
.mctrl
);
2165 spin_unlock_irqrestore(&up
->port
.lock
, flags
);
2166 /* Don't rewrite B0 */
2167 if (tty_termios_baud_rate(termios
))
2168 tty_termios_encode_baud_rate(termios
, baud
, baud
);
2172 serial8250_pm(struct uart_port
*port
, unsigned int state
,
2173 unsigned int oldstate
)
2175 struct uart_8250_port
*p
= (struct uart_8250_port
*)port
;
2177 serial8250_set_sleep(p
, state
!= 0);
2180 p
->pm(port
, state
, oldstate
);
2184 * Resource handling.
2186 static int serial8250_request_std_resource(struct uart_8250_port
*up
)
2188 unsigned int size
= 8 << up
->port
.regshift
;
2191 switch (up
->port
.iotype
) {
2199 if (!up
->port
.mapbase
)
2202 if (!request_mem_region(up
->port
.mapbase
, size
, "serial")) {
2207 if (up
->port
.flags
& UPF_IOREMAP
) {
2208 up
->port
.membase
= ioremap(up
->port
.mapbase
, size
);
2209 if (!up
->port
.membase
) {
2210 release_mem_region(up
->port
.mapbase
, size
);
2218 if (!request_region(up
->port
.iobase
, size
, "serial"))
2225 static void serial8250_release_std_resource(struct uart_8250_port
*up
)
2227 unsigned int size
= 8 << up
->port
.regshift
;
2229 switch (up
->port
.iotype
) {
2237 if (!up
->port
.mapbase
)
2240 if (up
->port
.flags
& UPF_IOREMAP
) {
2241 iounmap(up
->port
.membase
);
2242 up
->port
.membase
= NULL
;
2245 release_mem_region(up
->port
.mapbase
, size
);
2250 release_region(up
->port
.iobase
, size
);
2255 static int serial8250_request_rsa_resource(struct uart_8250_port
*up
)
2257 unsigned long start
= UART_RSA_BASE
<< up
->port
.regshift
;
2258 unsigned int size
= 8 << up
->port
.regshift
;
2261 switch (up
->port
.iotype
) {
2264 start
+= up
->port
.iobase
;
2265 if (request_region(start
, size
, "serial-rsa"))
2275 static void serial8250_release_rsa_resource(struct uart_8250_port
*up
)
2277 unsigned long offset
= UART_RSA_BASE
<< up
->port
.regshift
;
2278 unsigned int size
= 8 << up
->port
.regshift
;
2280 switch (up
->port
.iotype
) {
2283 release_region(up
->port
.iobase
+ offset
, size
);
2288 static void serial8250_release_port(struct uart_port
*port
)
2290 struct uart_8250_port
*up
= (struct uart_8250_port
*)port
;
2292 serial8250_release_std_resource(up
);
2293 if (up
->port
.type
== PORT_RSA
)
2294 serial8250_release_rsa_resource(up
);
2297 static int serial8250_request_port(struct uart_port
*port
)
2299 struct uart_8250_port
*up
= (struct uart_8250_port
*)port
;
2302 ret
= serial8250_request_std_resource(up
);
2303 if (ret
== 0 && up
->port
.type
== PORT_RSA
) {
2304 ret
= serial8250_request_rsa_resource(up
);
2306 serial8250_release_std_resource(up
);
2312 static void serial8250_config_port(struct uart_port
*port
, int flags
)
2314 struct uart_8250_port
*up
= (struct uart_8250_port
*)port
;
2315 int probeflags
= PROBE_ANY
;
2319 * Find the region that we can probe for. This in turn
2320 * tells us whether we can probe for the type of port.
2322 ret
= serial8250_request_std_resource(up
);
2326 ret
= serial8250_request_rsa_resource(up
);
2328 probeflags
&= ~PROBE_RSA
;
2330 if (flags
& UART_CONFIG_TYPE
)
2331 autoconfig(up
, probeflags
);
2332 if (up
->port
.type
!= PORT_UNKNOWN
&& flags
& UART_CONFIG_IRQ
)
2335 if (up
->port
.type
!= PORT_RSA
&& probeflags
& PROBE_RSA
)
2336 serial8250_release_rsa_resource(up
);
2337 if (up
->port
.type
== PORT_UNKNOWN
)
2338 serial8250_release_std_resource(up
);
2342 serial8250_verify_port(struct uart_port
*port
, struct serial_struct
*ser
)
2344 if (ser
->irq
>= NR_IRQS
|| ser
->irq
< 0 ||
2345 ser
->baud_base
< 9600 || ser
->type
< PORT_UNKNOWN
||
2346 ser
->type
>= ARRAY_SIZE(uart_config
) || ser
->type
== PORT_CIRRUS
||
2347 ser
->type
== PORT_STARTECH
)
2353 serial8250_type(struct uart_port
*port
)
2355 int type
= port
->type
;
2357 if (type
>= ARRAY_SIZE(uart_config
))
2359 return uart_config
[type
].name
;
2362 static struct uart_ops serial8250_pops
= {
2363 .tx_empty
= serial8250_tx_empty
,
2364 .set_mctrl
= serial8250_set_mctrl
,
2365 .get_mctrl
= serial8250_get_mctrl
,
2366 .stop_tx
= serial8250_stop_tx
,
2367 .start_tx
= serial8250_start_tx
,
2368 .stop_rx
= serial8250_stop_rx
,
2369 .enable_ms
= serial8250_enable_ms
,
2370 .break_ctl
= serial8250_break_ctl
,
2371 .startup
= serial8250_startup
,
2372 .shutdown
= serial8250_shutdown
,
2373 .set_termios
= serial8250_set_termios
,
2374 .pm
= serial8250_pm
,
2375 .type
= serial8250_type
,
2376 .release_port
= serial8250_release_port
,
2377 .request_port
= serial8250_request_port
,
2378 .config_port
= serial8250_config_port
,
2379 .verify_port
= serial8250_verify_port
,
2382 static struct uart_8250_port serial8250_ports
[UART_NR
];
2384 static void __init
serial8250_isa_init_ports(void)
2386 struct uart_8250_port
*up
;
2387 static int first
= 1;
2394 for (i
= 0; i
< nr_uarts
; i
++) {
2395 struct uart_8250_port
*up
= &serial8250_ports
[i
];
2398 spin_lock_init(&up
->port
.lock
);
2400 init_timer(&up
->timer
);
2401 up
->timer
.function
= serial8250_timeout
;
2404 * ALPHA_KLUDGE_MCR needs to be killed.
2406 up
->mcr_mask
= ~ALPHA_KLUDGE_MCR
;
2407 up
->mcr_force
= ALPHA_KLUDGE_MCR
;
2409 up
->port
.ops
= &serial8250_pops
;
2412 for (i
= 0, up
= serial8250_ports
;
2413 i
< ARRAY_SIZE(old_serial_port
) && i
< nr_uarts
;
2415 up
->port
.iobase
= old_serial_port
[i
].port
;
2416 up
->port
.irq
= irq_canonicalize(old_serial_port
[i
].irq
);
2417 up
->port
.uartclk
= old_serial_port
[i
].baud_base
* 16;
2418 up
->port
.flags
= old_serial_port
[i
].flags
;
2419 up
->port
.hub6
= old_serial_port
[i
].hub6
;
2420 up
->port
.membase
= old_serial_port
[i
].iomem_base
;
2421 up
->port
.iotype
= old_serial_port
[i
].io_type
;
2422 up
->port
.regshift
= old_serial_port
[i
].iomem_reg_shift
;
2424 up
->port
.flags
|= UPF_SHARE_IRQ
;
2429 serial8250_register_ports(struct uart_driver
*drv
, struct device
*dev
)
2433 serial8250_isa_init_ports();
2435 for (i
= 0; i
< nr_uarts
; i
++) {
2436 struct uart_8250_port
*up
= &serial8250_ports
[i
];
2439 uart_add_one_port(drv
, &up
->port
);
2443 #ifdef CONFIG_SERIAL_8250_CONSOLE
2445 static void serial8250_console_putchar(struct uart_port
*port
, int ch
)
2447 struct uart_8250_port
*up
= (struct uart_8250_port
*)port
;
2449 wait_for_xmitr(up
, UART_LSR_THRE
);
2450 serial_out(up
, UART_TX
, ch
);
2454 * Print a string to the serial port trying not to disturb
2455 * any possible real use of the port...
2457 * The console_lock must be held when we get here.
2460 serial8250_console_write(struct console
*co
, const char *s
, unsigned int count
)
2462 struct uart_8250_port
*up
= &serial8250_ports
[co
->index
];
2463 unsigned long flags
;
2467 touch_nmi_watchdog();
2469 local_irq_save(flags
);
2470 if (up
->port
.sysrq
) {
2471 /* serial8250_handle_port() already took the lock */
2473 } else if (oops_in_progress
) {
2474 locked
= spin_trylock(&up
->port
.lock
);
2476 spin_lock(&up
->port
.lock
);
2479 * First save the IER then disable the interrupts
2481 ier
= serial_in(up
, UART_IER
);
2483 if (up
->capabilities
& UART_CAP_UUE
)
2484 serial_out(up
, UART_IER
, UART_IER_UUE
);
2486 serial_out(up
, UART_IER
, 0);
2488 uart_console_write(&up
->port
, s
, count
, serial8250_console_putchar
);
2491 * Finally, wait for transmitter to become empty
2492 * and restore the IER
2494 wait_for_xmitr(up
, BOTH_EMPTY
);
2495 serial_out(up
, UART_IER
, ier
);
2498 spin_unlock(&up
->port
.lock
);
2499 local_irq_restore(flags
);
2502 static int __init
serial8250_console_setup(struct console
*co
, char *options
)
2504 struct uart_port
*port
;
2511 * Check whether an invalid uart number has been specified, and
2512 * if so, search for the first available port that does have
2515 if (co
->index
>= nr_uarts
)
2517 port
= &serial8250_ports
[co
->index
].port
;
2518 if (!port
->iobase
&& !port
->membase
)
2522 uart_parse_options(options
, &baud
, &parity
, &bits
, &flow
);
2524 return uart_set_options(port
, co
, baud
, parity
, bits
, flow
);
2527 static struct uart_driver serial8250_reg
;
2528 static struct console serial8250_console
= {
2530 .write
= serial8250_console_write
,
2531 .device
= uart_console_device
,
2532 .setup
= serial8250_console_setup
,
2533 .flags
= CON_PRINTBUFFER
,
2535 .data
= &serial8250_reg
,
2538 static int __init
serial8250_console_init(void)
2540 if (nr_uarts
> UART_NR
)
2543 serial8250_isa_init_ports();
2544 register_console(&serial8250_console
);
2547 console_initcall(serial8250_console_init
);
2549 static int __init
find_port(struct uart_port
*p
)
2552 struct uart_port
*port
;
2554 for (line
= 0; line
< nr_uarts
; line
++) {
2555 port
= &serial8250_ports
[line
].port
;
2556 if (uart_match_port(p
, port
))
2562 int __init
serial8250_start_console(struct uart_port
*port
, char *options
)
2566 line
= find_port(port
);
2570 add_preferred_console("ttyS", line
, options
);
2571 printk("Adding console on ttyS%d at %s 0x%lx (options '%s')\n",
2572 line
, port
->iotype
== UPIO_MEM
? "MMIO" : "I/O port",
2573 port
->iotype
== UPIO_MEM
? (unsigned long) port
->mapbase
:
2574 (unsigned long) port
->iobase
, options
);
2575 if (!(serial8250_console
.flags
& CON_ENABLED
)) {
2576 serial8250_console
.flags
&= ~CON_PRINTBUFFER
;
2577 register_console(&serial8250_console
);
2582 #define SERIAL8250_CONSOLE &serial8250_console
2584 #define SERIAL8250_CONSOLE NULL
2587 static struct uart_driver serial8250_reg
= {
2588 .owner
= THIS_MODULE
,
2589 .driver_name
= "serial",
2594 .cons
= SERIAL8250_CONSOLE
,
2598 * early_serial_setup - early registration for 8250 ports
2600 * Setup an 8250 port structure prior to console initialisation. Use
2601 * after console initialisation will cause undefined behaviour.
2603 int __init
early_serial_setup(struct uart_port
*port
)
2605 struct uart_port
*p
;
2607 if (port
->line
>= ARRAY_SIZE(serial8250_ports
))
2610 serial8250_isa_init_ports();
2611 p
= &serial8250_ports
[port
->line
].port
;
2612 p
->iobase
= port
->iobase
;
2613 p
->membase
= port
->membase
;
2615 p
->uartclk
= port
->uartclk
;
2616 p
->fifosize
= port
->fifosize
;
2617 p
->regshift
= port
->regshift
;
2618 p
->iotype
= port
->iotype
;
2619 p
->flags
= port
->flags
;
2620 p
->mapbase
= port
->mapbase
;
2621 p
->private_data
= port
->private_data
;
2622 p
->type
= port
->type
;
2623 p
->line
= port
->line
;
2629 * serial8250_suspend_port - suspend one serial port
2630 * @line: serial line number
2632 * Suspend one serial port.
2634 void serial8250_suspend_port(int line
)
2636 uart_suspend_port(&serial8250_reg
, &serial8250_ports
[line
].port
);
2640 * serial8250_resume_port - resume one serial port
2641 * @line: serial line number
2643 * Resume one serial port.
2645 void serial8250_resume_port(int line
)
2647 struct uart_8250_port
*up
= &serial8250_ports
[line
];
2649 if (up
->capabilities
& UART_NATSEMI
) {
2652 /* Ensure it's still in high speed mode */
2653 serial_outp(up
, UART_LCR
, 0xE0);
2655 tmp
= serial_in(up
, 0x04); /* EXCR2 */
2656 tmp
&= ~0xB0; /* Disable LOCK, mask out PRESL[01] */
2657 tmp
|= 0x10; /* 1.625 divisor for baud_base --> 921600 */
2658 serial_outp(up
, 0x04, tmp
);
2660 serial_outp(up
, UART_LCR
, 0);
2662 uart_resume_port(&serial8250_reg
, &up
->port
);
2666 * Register a set of serial devices attached to a platform device. The
2667 * list is terminated with a zero flags entry, which means we expect
2668 * all entries to have at least UPF_BOOT_AUTOCONF set.
2670 static int __devinit
serial8250_probe(struct platform_device
*dev
)
2672 struct plat_serial8250_port
*p
= dev
->dev
.platform_data
;
2673 struct uart_port port
;
2676 memset(&port
, 0, sizeof(struct uart_port
));
2678 for (i
= 0; p
&& p
->flags
!= 0; p
++, i
++) {
2679 port
.iobase
= p
->iobase
;
2680 port
.membase
= p
->membase
;
2682 port
.uartclk
= p
->uartclk
;
2683 port
.regshift
= p
->regshift
;
2684 port
.iotype
= p
->iotype
;
2685 port
.flags
= p
->flags
;
2686 port
.mapbase
= p
->mapbase
;
2687 port
.hub6
= p
->hub6
;
2688 port
.dev
= &dev
->dev
;
2690 port
.flags
|= UPF_SHARE_IRQ
;
2691 ret
= serial8250_register_port(&port
);
2693 dev_err(&dev
->dev
, "unable to register port at index %d "
2694 "(IO%lx MEM%lx IRQ%d): %d\n", i
,
2695 p
->iobase
, p
->mapbase
, p
->irq
, ret
);
2702 * Remove serial ports registered against a platform device.
2704 static int __devexit
serial8250_remove(struct platform_device
*dev
)
2708 for (i
= 0; i
< nr_uarts
; i
++) {
2709 struct uart_8250_port
*up
= &serial8250_ports
[i
];
2711 if (up
->port
.dev
== &dev
->dev
)
2712 serial8250_unregister_port(i
);
2717 static int serial8250_suspend(struct platform_device
*dev
, pm_message_t state
)
2721 for (i
= 0; i
< UART_NR
; i
++) {
2722 struct uart_8250_port
*up
= &serial8250_ports
[i
];
2724 if (up
->port
.type
!= PORT_UNKNOWN
&& up
->port
.dev
== &dev
->dev
)
2725 uart_suspend_port(&serial8250_reg
, &up
->port
);
2731 static int serial8250_resume(struct platform_device
*dev
)
2735 for (i
= 0; i
< UART_NR
; i
++) {
2736 struct uart_8250_port
*up
= &serial8250_ports
[i
];
2738 if (up
->port
.type
!= PORT_UNKNOWN
&& up
->port
.dev
== &dev
->dev
)
2739 serial8250_resume_port(i
);
2745 static struct platform_driver serial8250_isa_driver
= {
2746 .probe
= serial8250_probe
,
2747 .remove
= __devexit_p(serial8250_remove
),
2748 .suspend
= serial8250_suspend
,
2749 .resume
= serial8250_resume
,
2751 .name
= "serial8250",
2752 .owner
= THIS_MODULE
,
2757 * This "device" covers _all_ ISA 8250-compatible serial devices listed
2758 * in the table in include/asm/serial.h
2760 static struct platform_device
*serial8250_isa_devs
;
2763 * serial8250_register_port and serial8250_unregister_port allows for
2764 * 16x50 serial ports to be configured at run-time, to support PCMCIA
2765 * modems and PCI multiport cards.
2767 static DEFINE_MUTEX(serial_mutex
);
2769 static struct uart_8250_port
*serial8250_find_match_or_unused(struct uart_port
*port
)
2774 * First, find a port entry which matches.
2776 for (i
= 0; i
< nr_uarts
; i
++)
2777 if (uart_match_port(&serial8250_ports
[i
].port
, port
))
2778 return &serial8250_ports
[i
];
2781 * We didn't find a matching entry, so look for the first
2782 * free entry. We look for one which hasn't been previously
2783 * used (indicated by zero iobase).
2785 for (i
= 0; i
< nr_uarts
; i
++)
2786 if (serial8250_ports
[i
].port
.type
== PORT_UNKNOWN
&&
2787 serial8250_ports
[i
].port
.iobase
== 0)
2788 return &serial8250_ports
[i
];
2791 * That also failed. Last resort is to find any entry which
2792 * doesn't have a real port associated with it.
2794 for (i
= 0; i
< nr_uarts
; i
++)
2795 if (serial8250_ports
[i
].port
.type
== PORT_UNKNOWN
)
2796 return &serial8250_ports
[i
];
2802 * serial8250_register_port - register a serial port
2803 * @port: serial port template
2805 * Configure the serial port specified by the request. If the
2806 * port exists and is in use, it is hung up and unregistered
2809 * The port is then probed and if necessary the IRQ is autodetected
2810 * If this fails an error is returned.
2812 * On success the port is ready to use and the line number is returned.
2814 int serial8250_register_port(struct uart_port
*port
)
2816 struct uart_8250_port
*uart
;
2819 if (port
->uartclk
== 0)
2822 mutex_lock(&serial_mutex
);
2824 uart
= serial8250_find_match_or_unused(port
);
2826 uart_remove_one_port(&serial8250_reg
, &uart
->port
);
2828 uart
->port
.iobase
= port
->iobase
;
2829 uart
->port
.membase
= port
->membase
;
2830 uart
->port
.irq
= port
->irq
;
2831 uart
->port
.uartclk
= port
->uartclk
;
2832 uart
->port
.fifosize
= port
->fifosize
;
2833 uart
->port
.regshift
= port
->regshift
;
2834 uart
->port
.iotype
= port
->iotype
;
2835 uart
->port
.flags
= port
->flags
| UPF_BOOT_AUTOCONF
;
2836 uart
->port
.mapbase
= port
->mapbase
;
2838 uart
->port
.dev
= port
->dev
;
2840 ret
= uart_add_one_port(&serial8250_reg
, &uart
->port
);
2842 ret
= uart
->port
.line
;
2844 mutex_unlock(&serial_mutex
);
2848 EXPORT_SYMBOL(serial8250_register_port
);
2851 * serial8250_unregister_port - remove a 16x50 serial port at runtime
2852 * @line: serial line number
2854 * Remove one serial port. This may not be called from interrupt
2855 * context. We hand the port back to the our control.
2857 void serial8250_unregister_port(int line
)
2859 struct uart_8250_port
*uart
= &serial8250_ports
[line
];
2861 mutex_lock(&serial_mutex
);
2862 uart_remove_one_port(&serial8250_reg
, &uart
->port
);
2863 if (serial8250_isa_devs
) {
2864 uart
->port
.flags
&= ~UPF_BOOT_AUTOCONF
;
2865 uart
->port
.type
= PORT_UNKNOWN
;
2866 uart
->port
.dev
= &serial8250_isa_devs
->dev
;
2867 uart_add_one_port(&serial8250_reg
, &uart
->port
);
2869 uart
->port
.dev
= NULL
;
2871 mutex_unlock(&serial_mutex
);
2873 EXPORT_SYMBOL(serial8250_unregister_port
);
2875 static int __init
serial8250_init(void)
2879 if (nr_uarts
> UART_NR
)
2882 printk(KERN_INFO
"Serial: 8250/16550 driver $Revision: 1.90 $ "
2883 "%d ports, IRQ sharing %sabled\n", nr_uarts
,
2884 share_irqs
? "en" : "dis");
2886 for (i
= 0; i
< NR_IRQS
; i
++)
2887 spin_lock_init(&irq_lists
[i
].lock
);
2889 ret
= uart_register_driver(&serial8250_reg
);
2893 serial8250_isa_devs
= platform_device_alloc("serial8250",
2894 PLAT8250_DEV_LEGACY
);
2895 if (!serial8250_isa_devs
) {
2897 goto unreg_uart_drv
;
2900 ret
= platform_device_add(serial8250_isa_devs
);
2904 serial8250_register_ports(&serial8250_reg
, &serial8250_isa_devs
->dev
);
2906 ret
= platform_driver_register(&serial8250_isa_driver
);
2910 platform_device_del(serial8250_isa_devs
);
2912 platform_device_put(serial8250_isa_devs
);
2914 uart_unregister_driver(&serial8250_reg
);
2919 static void __exit
serial8250_exit(void)
2921 struct platform_device
*isa_dev
= serial8250_isa_devs
;
2924 * This tells serial8250_unregister_port() not to re-register
2925 * the ports (thereby making serial8250_isa_driver permanently
2928 serial8250_isa_devs
= NULL
;
2930 platform_driver_unregister(&serial8250_isa_driver
);
2931 platform_device_unregister(isa_dev
);
2933 uart_unregister_driver(&serial8250_reg
);
2936 module_init(serial8250_init
);
2937 module_exit(serial8250_exit
);
2939 EXPORT_SYMBOL(serial8250_suspend_port
);
2940 EXPORT_SYMBOL(serial8250_resume_port
);
2942 MODULE_LICENSE("GPL");
2943 MODULE_DESCRIPTION("Generic 8250/16x50 serial driver $Revision: 1.90 $");
2945 module_param(share_irqs
, uint
, 0644);
2946 MODULE_PARM_DESC(share_irqs
, "Share IRQs with other non-8250/16x50 devices"
2949 module_param(nr_uarts
, uint
, 0644);
2950 MODULE_PARM_DESC(nr_uarts
, "Maximum number of UARTs supported. (1-" __MODULE_STRING(CONFIG_SERIAL_8250_NR_UARTS
) ")");
2952 #ifdef CONFIG_SERIAL_8250_RSA
2953 module_param_array(probe_rsa
, ulong
, &probe_rsa_count
, 0444);
2954 MODULE_PARM_DESC(probe_rsa
, "Probe I/O ports for RSA");
2956 MODULE_ALIAS_CHARDEV_MAJOR(TTY_MAJOR
);