RT-AC66 3.0.0.4.374.130 core
[tomato.git] / release / src-rt-6.x / linux / linux-2.6 / drivers / scsi / sym53c8xx_2 / sym_glue.h
blobe022d3c71b59fc55e5679315ae167600fd091ce7
1 /*
2 * Device driver for the SYMBIOS/LSILOGIC 53C8XX and 53C1010 family
3 * of PCI-SCSI IO processors.
5 * Copyright (C) 1999-2001 Gerard Roudier <groudier@free.fr>
7 * This driver is derived from the Linux sym53c8xx driver.
8 * Copyright (C) 1998-2000 Gerard Roudier
10 * The sym53c8xx driver is derived from the ncr53c8xx driver that had been
11 * a port of the FreeBSD ncr driver to Linux-1.2.13.
13 * The original ncr driver has been written for 386bsd and FreeBSD by
14 * Wolfgang Stanglmeier <wolf@cologne.de>
15 * Stefan Esser <se@mi.Uni-Koeln.de>
16 * Copyright (C) 1994 Wolfgang Stanglmeier
18 * Other major contributions:
20 * NVRAM detection and reading.
21 * Copyright (C) 1997 Richard Waltham <dormouse@farsrobt.demon.co.uk>
23 *-----------------------------------------------------------------------------
25 * This program is free software; you can redistribute it and/or modify
26 * it under the terms of the GNU General Public License as published by
27 * the Free Software Foundation; either version 2 of the License, or
28 * (at your option) any later version.
30 * This program is distributed in the hope that it will be useful,
31 * but WITHOUT ANY WARRANTY; without even the implied warranty of
32 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
33 * GNU General Public License for more details.
35 * You should have received a copy of the GNU General Public License
36 * along with this program; if not, write to the Free Software
37 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
40 #ifndef SYM_GLUE_H
41 #define SYM_GLUE_H
43 #include <linux/delay.h>
44 #include <linux/ioport.h>
45 #include <linux/pci.h>
46 #include <linux/string.h>
47 #include <linux/timer.h>
48 #include <linux/types.h>
50 #include <asm/io.h>
51 #ifdef __sparc__
52 # include <asm/irq.h>
53 #endif
55 #include <scsi/scsi.h>
56 #include <scsi/scsi_cmnd.h>
57 #include <scsi/scsi_device.h>
58 #include <scsi/scsi_transport_spi.h>
59 #include <scsi/scsi_host.h>
61 #include "sym53c8xx.h"
62 #include "sym_defs.h"
63 #include "sym_misc.h"
66 * Configuration addendum for Linux.
68 #define SYM_CONF_TIMER_INTERVAL ((HZ+1)/2)
70 #undef SYM_OPT_HANDLE_DEVICE_QUEUEING
71 #define SYM_OPT_LIMIT_COMMAND_REORDERING
74 * Print a message with severity.
76 #define printf_emerg(args...) printk(KERN_EMERG args)
77 #define printf_alert(args...) printk(KERN_ALERT args)
78 #define printf_crit(args...) printk(KERN_CRIT args)
79 #define printf_err(args...) printk(KERN_ERR args)
80 #define printf_warning(args...) printk(KERN_WARNING args)
81 #define printf_notice(args...) printk(KERN_NOTICE args)
82 #define printf_info(args...) printk(KERN_INFO args)
83 #define printf_debug(args...) printk(KERN_DEBUG args)
84 #define printf(args...) printk(args)
87 * A 'read barrier' flushes any data that have been prefetched
88 * by the processor due to out of order execution. Such a barrier
89 * must notably be inserted prior to looking at data that have
90 * been DMAed, assuming that program does memory READs in proper
91 * order and that the device ensured proper ordering of WRITEs.
93 * A 'write barrier' prevents any previous WRITEs to pass further
94 * WRITEs. Such barriers must be inserted each time another agent
95 * relies on ordering of WRITEs.
97 * Note that, due to posting of PCI memory writes, we also must
98 * insert dummy PCI read transactions when some ordering involving
99 * both directions over the PCI does matter. PCI transactions are
100 * fully ordered in each direction.
103 #define MEMORY_READ_BARRIER() rmb()
104 #define MEMORY_WRITE_BARRIER() wmb()
107 * IO functions definition for big/little endian CPU support.
108 * For now, PCI chips are only supported in little endian addressing mode,
111 #ifdef __BIG_ENDIAN
113 #define readw_l2b readw
114 #define readl_l2b readl
115 #define writew_b2l writew
116 #define writel_b2l writel
118 #else /* little endian */
120 #define readw_raw readw
121 #define readl_raw readl
122 #define writew_raw writew
123 #define writel_raw writel
125 #endif /* endian */
127 #ifdef SYM_CONF_CHIP_BIG_ENDIAN
128 #error "Chips in BIG ENDIAN addressing mode are not (yet) supported"
129 #endif
132 * If the CPU and the chip use same endian-ness addressing,
133 * no byte reordering is needed for script patching.
134 * Macro cpu_to_scr() is to be used for script patching.
135 * Macro scr_to_cpu() is to be used for getting a DWORD
136 * from the script.
139 #define cpu_to_scr(dw) cpu_to_le32(dw)
140 #define scr_to_cpu(dw) le32_to_cpu(dw)
143 * These ones are used as return code from
144 * error recovery handlers under Linux.
146 #define SCSI_SUCCESS SUCCESS
147 #define SCSI_FAILED FAILED
150 * System specific target data structure.
151 * None for now, under Linux.
153 /* #define SYM_HAVE_STCB */
156 * System specific lun data structure.
158 #define SYM_HAVE_SLCB
159 struct sym_slcb {
160 u_short reqtags; /* Number of tags requested by user */
161 u_short scdev_depth; /* Queue depth set in select_queue_depth() */
165 * System specific command data structure.
166 * Not needed under Linux.
168 /* struct sym_sccb */
171 * System specific host data structure.
173 struct sym_shcb {
175 * Chip and controller indentification.
177 int unit;
178 char inst_name[16];
179 char chip_name[8];
180 struct pci_dev *device;
182 struct Scsi_Host *host;
184 void __iomem * ioaddr; /* MMIO kernel io address */
185 void __iomem * ramaddr; /* RAM kernel io address */
186 u_short io_ws; /* IO window size */
187 int irq; /* IRQ number */
189 struct timer_list timer; /* Timer handler link header */
190 u_long lasttime;
191 u_long settle_time; /* Resetting the SCSI BUS */
192 u_char settle_time_valid;
196 * Return the name of the controller.
198 #define sym_name(np) (np)->s.inst_name
200 struct sym_nvram;
203 * The IO macros require a struct called 's' and are abused in sym_nvram.c
205 struct sym_device {
206 struct pci_dev *pdev;
207 unsigned long mmio_base;
208 unsigned long ram_base;
209 struct {
210 void __iomem *ioaddr;
211 void __iomem *ramaddr;
212 } s;
213 struct sym_chip chip;
214 struct sym_nvram *nvram;
215 u_short device_id;
216 u_char host_id;
220 * Driver host data structure.
222 struct host_data {
223 struct sym_hcb *ncb;
226 static inline struct sym_hcb * sym_get_hcb(struct Scsi_Host *host)
228 return ((struct host_data *)host->hostdata)->ncb;
231 #include "sym_fw.h"
232 #include "sym_hipd.h"
235 * Set the status field of a CAM CCB.
237 static __inline void
238 sym_set_cam_status(struct scsi_cmnd *cmd, int status)
240 cmd->result &= ~(0xff << 16);
241 cmd->result |= (status << 16);
245 * Get the status field of a CAM CCB.
247 static __inline int
248 sym_get_cam_status(struct scsi_cmnd *cmd)
250 return host_byte(cmd->result);
254 * Build CAM result for a successful IO and for a failed IO.
256 static __inline void sym_set_cam_result_ok(struct sym_ccb *cp, struct scsi_cmnd *cmd, int resid)
258 cmd->resid = resid;
259 cmd->result = (((DID_OK) << 16) + ((cp->ssss_status) & 0x7f));
261 void sym_set_cam_result_error(struct sym_hcb *np, struct sym_ccb *cp, int resid);
263 void sym_xpt_done(struct sym_hcb *np, struct scsi_cmnd *ccb);
264 #define sym_print_addr(cmd, arg...) dev_info(&cmd->device->sdev_gendev , ## arg)
265 void sym_xpt_async_bus_reset(struct sym_hcb *np);
266 void sym_xpt_async_sent_bdr(struct sym_hcb *np, int target);
267 int sym_setup_data_and_start (struct sym_hcb *np, struct scsi_cmnd *csio, struct sym_ccb *cp);
268 void sym_log_bus_error(struct sym_hcb *np);
270 #endif /* SYM_GLUE_H */