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RT-AC66 3.0.0.4.374.130 core
[tomato.git] / release / src-rt-6.x / linux / linux-2.6 / drivers / net / tokenring / 3c359.c
blobe22a3f5333ef40b25f7b694b79a300f310eb80b9
1 /*
2 * 3c359.c (c) 2000 Mike Phillips (mikep@linuxtr.net) All Rights Reserved
3 *
4 * Linux driver for 3Com 3c359 Tokenlink Velocity XL PCI NIC
5 *
6 * Base Driver Olympic:
7 * Written 1999 Peter De Schrijver & Mike Phillips
8 *
9 * This software may be used and distributed according to the terms
10 * of the GNU General Public License, incorporated herein by reference.
11 *
12 * 7/17/00 - Clean up, version number 0.9.0. Ready to release to the world.
13 *
14 * 2/16/01 - Port up to kernel 2.4.2 ready for submission into the kernel.
15 * 3/05/01 - Last clean up stuff before submission.
16 * 2/15/01 - Finally, update to new pci api.
17 *
18 * To Do:
19 */
20
21 /*
22 * Technical Card Details
23 *
24 * All access to data is done with 16/8 bit transfers. The transfer
25 * method really sucks. You can only read or write one location at a time.
26 *
27 * Also, the microcode for the card must be uploaded if the card does not have
28 * the flashrom on board. This is a 28K bloat in the driver when compiled
29 * as a module.
30 *
31 * Rx is very simple, status into a ring of descriptors, dma data transfer,
32 * interrupts to tell us when a packet is received.
33 *
34 * Tx is a little more interesting. Similar scenario, descriptor and dma data
35 * transfers, but we don't have to interrupt the card to tell it another packet
36 * is ready for transmission, we are just doing simple memory writes, not io or mmio
37 * writes. The card can be set up to simply poll on the next
38 * descriptor pointer and when this value is non-zero will automatically download
39 * the next packet. The card then interrupts us when the packet is done.
40 *
41 */
42
43 #define XL_DEBUG 0
44
45 #include <linux/module.h>
46 #include <linux/kernel.h>
47 #include <linux/errno.h>
48 #include <linux/timer.h>
49 #include <linux/in.h>
50 #include <linux/ioport.h>
51 #include <linux/string.h>
52 #include <linux/proc_fs.h>
53 #include <linux/ptrace.h>
54 #include <linux/skbuff.h>
55 #include <linux/interrupt.h>
56 #include <linux/delay.h>
57 #include <linux/netdevice.h>
58 #include <linux/trdevice.h>
59 #include <linux/stddef.h>
60 #include <linux/init.h>
61 #include <linux/pci.h>
62 #include <linux/spinlock.h>
63 #include <linux/bitops.h>
64
65 #include <net/checksum.h>
66
67 #include <asm/io.h>
68 #include <asm/system.h>
69
70 #include "3c359.h"
71
72 static char version[] __devinitdata =
73 "3c359.c v1.2.0 2/17/01 - Mike Phillips (mikep@linuxtr.net)" ;
74
75 MODULE_AUTHOR("Mike Phillips <mikep@linuxtr.net>") ;
76 MODULE_DESCRIPTION("3Com 3C359 Velocity XL Token Ring Adapter Driver \n") ;
77
78 /* Module paramters */
79
80 /* Ring Speed 0,4,16
81 * 0 = Autosense
82 * 4,16 = Selected speed only, no autosense
83 * This allows the card to be the first on the ring
84 * and become the active monitor.
85 *
86 * WARNING: Some hubs will allow you to insert
87 * at the wrong speed.
88 *
89 * The adapter will _not_ fail to open if there are no
90 * active monitors on the ring, it will simply open up in
91 * its last known ringspeed if no ringspeed is specified.
92 */
93
94 static int ringspeed[XL_MAX_ADAPTERS] = {0,} ;
95
96 module_param_array(ringspeed, int, NULL, 0);
97 MODULE_PARM_DESC(ringspeed,"3c359: Ringspeed selection - 4,16 or 0") ;
98
99 /* Packet buffer size */
100
101 static int pkt_buf_sz[XL_MAX_ADAPTERS] = {0,} ;
102
103 module_param_array(pkt_buf_sz, int, NULL, 0) ;
104 MODULE_PARM_DESC(pkt_buf_sz,"3c359: Initial buffer size") ;
105 /* Message Level */
106
107 static int message_level[XL_MAX_ADAPTERS] = {0,} ;
108
109 module_param_array(message_level, int, NULL, 0) ;
110 MODULE_PARM_DESC(message_level, "3c359: Level of reported messages \n") ;
111 /*
112 * This is a real nasty way of doing this, but otherwise you
113 * will be stuck with 1555 lines of hex #'s in the code.
114 */
115
116 #include "3c359_microcode.h"
117
118 static struct pci_device_id xl_pci_tbl[] =
119 {
120 {PCI_VENDOR_ID_3COM,PCI_DEVICE_ID_3COM_3C359, PCI_ANY_ID, PCI_ANY_ID, },
121 { } /* terminate list */
122 };
123 MODULE_DEVICE_TABLE(pci,xl_pci_tbl) ;
124
125 static int xl_init(struct net_device *dev);
126 static int xl_open(struct net_device *dev);
127 static int xl_open_hw(struct net_device *dev) ;
128 static int xl_hw_reset(struct net_device *dev);
129 static int xl_xmit(struct sk_buff *skb, struct net_device *dev);
130 static void xl_dn_comp(struct net_device *dev);
131 static int xl_close(struct net_device *dev);
132 static void xl_set_rx_mode(struct net_device *dev);
133 static irqreturn_t xl_interrupt(int irq, void *dev_id);
134 static struct net_device_stats * xl_get_stats(struct net_device *dev);
135 static int xl_set_mac_address(struct net_device *dev, void *addr) ;
136 static void xl_arb_cmd(struct net_device *dev);
137 static void xl_asb_cmd(struct net_device *dev) ;
138 static void xl_srb_cmd(struct net_device *dev, int srb_cmd) ;
139 static void xl_wait_misr_flags(struct net_device *dev) ;
140 static int xl_change_mtu(struct net_device *dev, int mtu);
141 static void xl_srb_bh(struct net_device *dev) ;
142 static void xl_asb_bh(struct net_device *dev) ;
143 static void xl_reset(struct net_device *dev) ;
144 static void xl_freemem(struct net_device *dev) ;
145
146
147 /* EEProm Access Functions */
148 static u16 xl_ee_read(struct net_device *dev, int ee_addr) ;
149 static void xl_ee_write(struct net_device *dev, int ee_addr, u16 ee_value) ;
150
151 /* Debugging functions */
152 #if XL_DEBUG
153 static void print_tx_state(struct net_device *dev) ;
154 static void print_rx_state(struct net_device *dev) ;
155
156 static void print_tx_state(struct net_device *dev)
157 {
158
159 struct xl_private *xl_priv = (struct xl_private *)dev->priv ;
160 struct xl_tx_desc *txd ;
161 u8 __iomem *xl_mmio = xl_priv->xl_mmio ;
162 int i ;
163
164 printk("tx_ring_head: %d, tx_ring_tail: %d, free_ent: %d \n",xl_priv->tx_ring_head,
165 xl_priv->tx_ring_tail, xl_priv->free_ring_entries) ;
166 printk("Ring , Address , FSH , DnNextPtr, Buffer, Buffer_Len \n");
167 for (i = 0; i < 16; i++) {
168 txd = &(xl_priv->xl_tx_ring[i]) ;
169 printk("%d, %08lx, %08x, %08x, %08x, %08x \n", i, virt_to_bus(txd),
170 txd->framestartheader, txd->dnnextptr, txd->buffer, txd->buffer_length ) ;
171 }
172
173 printk("DNLISTPTR = %04x \n", readl(xl_mmio + MMIO_DNLISTPTR) );
174
175 printk("DmaCtl = %04x \n", readl(xl_mmio + MMIO_DMA_CTRL) );
176 printk("Queue status = %0x \n",netif_running(dev) ) ;
177 }
178
179 static void print_rx_state(struct net_device *dev)
180 {
181
182 struct xl_private *xl_priv = (struct xl_private *)dev->priv ;
183 struct xl_rx_desc *rxd ;
184 u8 __iomem *xl_mmio = xl_priv->xl_mmio ;
185 int i ;
186
187 printk("rx_ring_tail: %d \n", xl_priv->rx_ring_tail) ;
188 printk("Ring , Address , FrameState , UPNextPtr, FragAddr, Frag_Len \n");
189 for (i = 0; i < 16; i++) {
190 /* rxd = (struct xl_rx_desc *)xl_priv->rx_ring_dma_addr + (i * sizeof(struct xl_rx_desc)) ; */
191 rxd = &(xl_priv->xl_rx_ring[i]) ;
192 printk("%d, %08lx, %08x, %08x, %08x, %08x \n", i, virt_to_bus(rxd),
193 rxd->framestatus, rxd->upnextptr, rxd->upfragaddr, rxd->upfraglen ) ;
194 }
195
196 printk("UPLISTPTR = %04x \n", readl(xl_mmio + MMIO_UPLISTPTR) );
197
198 printk("DmaCtl = %04x \n", readl(xl_mmio + MMIO_DMA_CTRL) );
199 printk("Queue status = %0x \n",netif_running(dev) ) ;
200 }
201 #endif
202
203 /*
204 * Read values from the on-board EEProm. This looks very strange
205 * but you have to wait for the EEProm to get/set the value before
206 * passing/getting the next value from the nic. As with all requests
207 * on this nic it has to be done in two stages, a) tell the nic which
208 * memory address you want to access and b) pass/get the value from the nic.
209 * With the EEProm, you have to wait before and inbetween access a) and b).
210 * As this is only read at initialization time and the wait period is very
211 * small we shouldn't have to worry about scheduling issues.
212 */
213
214 static u16 xl_ee_read(struct net_device *dev, int ee_addr)
215 {
216 struct xl_private *xl_priv = (struct xl_private *)dev->priv ;
217 u8 __iomem *xl_mmio = xl_priv->xl_mmio ;
218
219 /* Wait for EEProm to not be busy */
220 writel(IO_WORD_READ | EECONTROL, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
221 while ( readw(xl_mmio + MMIO_MACDATA) & EEBUSY ) ;
222
223 /* Tell EEProm what we want to do and where */
224 writel(IO_WORD_WRITE | EECONTROL, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
225 writew(EEREAD + ee_addr, xl_mmio + MMIO_MACDATA) ;
226
227 /* Wait for EEProm to not be busy */
228 writel(IO_WORD_READ | EECONTROL, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
229 while ( readw(xl_mmio + MMIO_MACDATA) & EEBUSY ) ;
230
231 /* Tell EEProm what we want to do and where */
232 writel(IO_WORD_WRITE | EECONTROL , xl_mmio + MMIO_MAC_ACCESS_CMD) ;
233 writew(EEREAD + ee_addr, xl_mmio + MMIO_MACDATA) ;
234
235 /* Finally read the value from the EEProm */
236 writel(IO_WORD_READ | EEDATA , xl_mmio + MMIO_MAC_ACCESS_CMD) ;
237 return readw(xl_mmio + MMIO_MACDATA) ;
238 }
239
240 /*
241 * Write values to the onboard eeprom. As with eeprom read you need to
242 * set which location to write, wait, value to write, wait, with the
243 * added twist of having to enable eeprom writes as well.
244 */
245
246 static void xl_ee_write(struct net_device *dev, int ee_addr, u16 ee_value)
247 {
248 struct xl_private *xl_priv = (struct xl_private *)dev->priv ;
249 u8 __iomem *xl_mmio = xl_priv->xl_mmio ;
250
251 /* Wait for EEProm to not be busy */
252 writel(IO_WORD_READ | EECONTROL, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
253 while ( readw(xl_mmio + MMIO_MACDATA) & EEBUSY ) ;
254
255 /* Enable write/erase */
256 writel(IO_WORD_WRITE | EECONTROL, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
257 writew(EE_ENABLE_WRITE, xl_mmio + MMIO_MACDATA) ;
258
259 /* Wait for EEProm to not be busy */
260 writel(IO_WORD_READ | EECONTROL, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
261 while ( readw(xl_mmio + MMIO_MACDATA) & EEBUSY ) ;
262
263 /* Put the value we want to write into EEDATA */
264 writel(IO_WORD_WRITE | EEDATA, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
265 writew(ee_value, xl_mmio + MMIO_MACDATA) ;
266
267 /* Tell EEProm to write eevalue into ee_addr */
268 writel(IO_WORD_WRITE | EECONTROL, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
269 writew(EEWRITE + ee_addr, xl_mmio + MMIO_MACDATA) ;
270
271 /* Wait for EEProm to not be busy, to ensure write gets done */
272 writel(IO_WORD_READ | EECONTROL, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
273 while ( readw(xl_mmio + MMIO_MACDATA) & EEBUSY ) ;
274
275 return ;
276 }
277
278 static int __devinit xl_probe(struct pci_dev *pdev,
279 const struct pci_device_id *ent)
280 {
281 struct net_device *dev ;
282 struct xl_private *xl_priv ;
283 static int card_no = -1 ;
284 int i ;
285
286 card_no++ ;
287
288 if (pci_enable_device(pdev)) {
289 return -ENODEV ;
290 }
291
292 pci_set_master(pdev);
293
294 if ((i = pci_request_regions(pdev,"3c359"))) {
295 return i ;
296 } ;
297
298 /*
299 * Allowing init_trdev to allocate the dev->priv structure will align xl_private
300 * on a 32 bytes boundary which we need for the rx/tx descriptors
301 */
302
303 dev = alloc_trdev(sizeof(struct xl_private)) ;
304 if (!dev) {
305 pci_release_regions(pdev) ;
306 return -ENOMEM ;
307 }
308 xl_priv = dev->priv ;
309
310 #if XL_DEBUG
311 printk("pci_device: %p, dev:%p, dev->priv: %p, ba[0]: %10x, ba[1]:%10x\n",
312 pdev, dev, dev->priv, (unsigned int)pdev->resource[0].start, (unsigned int)pdev->resource[1].start) ;
313 #endif
314
315 dev->irq=pdev->irq;
316 dev->base_addr=pci_resource_start(pdev,0) ;
317 xl_priv->xl_card_name = pci_name(pdev);
318 xl_priv->xl_mmio=ioremap(pci_resource_start(pdev,1), XL_IO_SPACE);
319 xl_priv->pdev = pdev ;
320
321 if ((pkt_buf_sz[card_no] < 100) || (pkt_buf_sz[card_no] > 18000) )
322 xl_priv->pkt_buf_sz = PKT_BUF_SZ ;
323 else
324 xl_priv->pkt_buf_sz = pkt_buf_sz[card_no] ;
325
326 dev->mtu = xl_priv->pkt_buf_sz - TR_HLEN ;
327 xl_priv->xl_ring_speed = ringspeed[card_no] ;
328 xl_priv->xl_message_level = message_level[card_no] ;
329 xl_priv->xl_functional_addr[0] = xl_priv->xl_functional_addr[1] = xl_priv->xl_functional_addr[2] = xl_priv->xl_functional_addr[3] = 0 ;
330 xl_priv->xl_copy_all_options = 0 ;
331
332 if((i = xl_init(dev))) {
333 iounmap(xl_priv->xl_mmio) ;
334 free_netdev(dev) ;
335 pci_release_regions(pdev) ;
336 return i ;
337 }
338
339 dev->open=&xl_open;
340 dev->hard_start_xmit=&xl_xmit;
341 dev->change_mtu=&xl_change_mtu;
342 dev->stop=&xl_close;
343 dev->do_ioctl=NULL;
344 dev->set_multicast_list=&xl_set_rx_mode;
345 dev->get_stats=&xl_get_stats ;
346 dev->set_mac_address=&xl_set_mac_address ;
347 SET_MODULE_OWNER(dev);
348 SET_NETDEV_DEV(dev, &pdev->dev);
349
350 pci_set_drvdata(pdev,dev) ;
351 if ((i = register_netdev(dev))) {
352 printk(KERN_ERR "3C359, register netdev failed\n") ;
353 pci_set_drvdata(pdev,NULL) ;
354 iounmap(xl_priv->xl_mmio) ;
355 free_netdev(dev) ;
356 pci_release_regions(pdev) ;
357 return i ;
358 }
359
360 printk(KERN_INFO "3C359: %s registered as: %s\n",xl_priv->xl_card_name,dev->name) ;
361
362 return 0;
363 }
364
365
366 static int __init xl_init(struct net_device *dev)
367 {
368 struct xl_private *xl_priv = (struct xl_private *)dev->priv ;
369
370 printk(KERN_INFO "%s \n", version);
371 printk(KERN_INFO "%s: I/O at %hx, MMIO at %p, using irq %d\n",
372 xl_priv->xl_card_name, (unsigned int)dev->base_addr ,xl_priv->xl_mmio, dev->irq);
373
374 spin_lock_init(&xl_priv->xl_lock) ;
375
376 return xl_hw_reset(dev) ;
377
378 }
379
380
381 /*
382 * Hardware reset. This needs to be a separate entity as we need to reset the card
383 * when we change the EEProm settings.
384 */
385
386 static int xl_hw_reset(struct net_device *dev)
387 {
388 struct xl_private *xl_priv = (struct xl_private *)dev->priv ;
389 u8 __iomem *xl_mmio = xl_priv->xl_mmio ;
390 unsigned long t ;
391 u16 i ;
392 u16 result_16 ;
393 u8 result_8 ;
394 u16 start ;
395 int j ;
396
397 /*
398 * Reset the card. If the card has got the microcode on board, we have
399 * missed the initialization interrupt, so we must always do this.
400 */
401
402 writew( GLOBAL_RESET, xl_mmio + MMIO_COMMAND ) ;
403
404 /*
405 * Must wait for cmdInProgress bit (12) to clear before continuing with
406 * card configuration.
407 */
408
409 t=jiffies;
410 while (readw(xl_mmio + MMIO_INTSTATUS) & INTSTAT_CMD_IN_PROGRESS) {
411 schedule();
412 if(jiffies-t > 40*HZ) {
413 printk(KERN_ERR "%s: 3COM 3C359 Velocity XL card not responding to global reset.\n", dev->name);
414 return -ENODEV;
415 }
416 }
417
418 /*
419 * Enable pmbar by setting bit in CPAttention
420 */
421
422 writel( (IO_BYTE_READ | CPATTENTION), xl_mmio + MMIO_MAC_ACCESS_CMD) ;
423 result_8 = readb(xl_mmio + MMIO_MACDATA) ;
424 result_8 = result_8 | CPA_PMBARVIS ;
425 writel( (IO_BYTE_WRITE | CPATTENTION), xl_mmio + MMIO_MAC_ACCESS_CMD) ;
426 writeb(result_8, xl_mmio + MMIO_MACDATA) ;
427
428 /*
429 * Read cpHold bit in pmbar, if cleared we have got Flashrom on board.
430 * If not, we need to upload the microcode to the card
431 */
432
433 writel( (IO_WORD_READ | PMBAR),xl_mmio + MMIO_MAC_ACCESS_CMD);
434
435 #if XL_DEBUG
436 printk(KERN_INFO "Read from PMBAR = %04x \n", readw(xl_mmio + MMIO_MACDATA)) ;
437 #endif
438
439 if ( readw( (xl_mmio + MMIO_MACDATA)) & PMB_CPHOLD ) {
440
441 /* Set PmBar, privateMemoryBase bits (8:2) to 0 */
442
443 writel( (IO_WORD_READ | PMBAR),xl_mmio + MMIO_MAC_ACCESS_CMD);
444 result_16 = readw(xl_mmio + MMIO_MACDATA) ;
445 result_16 = result_16 & ~((0x7F) << 2) ;
446 writel( (IO_WORD_WRITE | PMBAR), xl_mmio + MMIO_MAC_ACCESS_CMD) ;
447 writew(result_16,xl_mmio + MMIO_MACDATA) ;
448
449 /* Set CPAttention, memWrEn bit */
450
451 writel( (IO_BYTE_READ | CPATTENTION), xl_mmio + MMIO_MAC_ACCESS_CMD) ;
452 result_8 = readb(xl_mmio + MMIO_MACDATA) ;
453 result_8 = result_8 | CPA_MEMWREN ;
454 writel( (IO_BYTE_WRITE | CPATTENTION), xl_mmio + MMIO_MAC_ACCESS_CMD) ;
455 writeb(result_8, xl_mmio + MMIO_MACDATA) ;
456
457 /*
458 * Now to write the microcode into the shared ram
459 * The microcode must finish at position 0xFFFF, so we must subtract
460 * to get the start position for the code
461 */
462
463 start = (0xFFFF - (mc_size) + 1 ) ; /* Looks strange but ensures compiler only uses 16 bit unsigned int for this */
464
465 printk(KERN_INFO "3C359: Uploading Microcode: ");
466
467 for (i = start, j = 0; j < mc_size; i++, j++) {
468 writel(MEM_BYTE_WRITE | 0XD0000 | i, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
469 writeb(microcode[j],xl_mmio + MMIO_MACDATA) ;
470 if (j % 1024 == 0)
471 printk(".");
472 }
473 printk("\n") ;
474
475 for (i=0;i < 16; i++) {
476 writel( (MEM_BYTE_WRITE | 0xDFFF0) + i, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
477 writeb(microcode[mc_size - 16 + i], xl_mmio + MMIO_MACDATA) ;
478 }
479
480 /*
481 * Have to write the start address of the upload to FFF4, but
482 * the address must be >> 4. You do not want to know how long
483 * it took me to discover this.
484 */
485
486 writel(MEM_WORD_WRITE | 0xDFFF4, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
487 writew(start >> 4, xl_mmio + MMIO_MACDATA);
488
489 /* Clear the CPAttention, memWrEn Bit */
490
491 writel( (IO_BYTE_READ | CPATTENTION), xl_mmio + MMIO_MAC_ACCESS_CMD) ;
492 result_8 = readb(xl_mmio + MMIO_MACDATA) ;
493 result_8 = result_8 & ~CPA_MEMWREN ;
494 writel( (IO_BYTE_WRITE | CPATTENTION), xl_mmio + MMIO_MAC_ACCESS_CMD) ;
495 writeb(result_8, xl_mmio + MMIO_MACDATA) ;
496
497 /* Clear the cpHold bit in pmbar */
498
499 writel( (IO_WORD_READ | PMBAR),xl_mmio + MMIO_MAC_ACCESS_CMD);
500 result_16 = readw(xl_mmio + MMIO_MACDATA) ;
501 result_16 = result_16 & ~PMB_CPHOLD ;
502 writel( (IO_WORD_WRITE | PMBAR), xl_mmio + MMIO_MAC_ACCESS_CMD) ;
503 writew(result_16,xl_mmio + MMIO_MACDATA) ;
504
505
506 } /* If microcode upload required */
507
508 /*
509 * The card should now go though a self test procedure and get itself ready
510 * to be opened, we must wait for an srb response with the initialization
511 * information.
512 */
513
514 #if XL_DEBUG
515 printk(KERN_INFO "%s: Microcode uploaded, must wait for the self test to complete\n", dev->name);
516 #endif
517
518 writew(SETINDENABLE | 0xFFF, xl_mmio + MMIO_COMMAND) ;
519
520 t=jiffies;
521 while ( !(readw(xl_mmio + MMIO_INTSTATUS_AUTO) & INTSTAT_SRB) ) {
522 schedule();
523 if(jiffies-t > 15*HZ) {
524 printk(KERN_ERR "3COM 3C359 Velocity XL card not responding.\n");
525 return -ENODEV;
526 }
527 }
528
529 /*
530 * Write the RxBufArea with D000, RxEarlyThresh, TxStartThresh,
531 * DnPriReqThresh, read the tech docs if you want to know what
532 * values they need to be.
533 */
534
535 writel(MMIO_WORD_WRITE | RXBUFAREA, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
536 writew(0xD000, xl_mmio + MMIO_MACDATA) ;
537
538 writel(MMIO_WORD_WRITE | RXEARLYTHRESH, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
539 writew(0X0020, xl_mmio + MMIO_MACDATA) ;
540
541 writew( SETTXSTARTTHRESH | 0x40 , xl_mmio + MMIO_COMMAND) ;
542
543 writeb(0x04, xl_mmio + MMIO_DNBURSTTHRESH) ;
544 writeb(0x04, xl_mmio + DNPRIREQTHRESH) ;
545
546 /*
547 * Read WRBR to provide the location of the srb block, have to use byte reads not word reads.
548 * Tech docs have this wrong !!!!
549 */
550
551 writel(MMIO_BYTE_READ | WRBR, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
552 xl_priv->srb = readb(xl_mmio + MMIO_MACDATA) << 8 ;
553 writel( (MMIO_BYTE_READ | WRBR) + 1, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
554 xl_priv->srb = xl_priv->srb | readb(xl_mmio + MMIO_MACDATA) ;
555
556 #if XL_DEBUG
557 writel(IO_WORD_READ | SWITCHSETTINGS, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
558 if ( readw(xl_mmio + MMIO_MACDATA) & 2) {
559 printk(KERN_INFO "Default ring speed 4 mbps \n") ;
560 } else {
561 printk(KERN_INFO "Default ring speed 16 mbps \n") ;
562 }
563 printk(KERN_INFO "%s: xl_priv->srb = %04x\n",xl_priv->xl_card_name, xl_priv->srb);
564 #endif
565
566 return 0;
567 }
568
569 static int xl_open(struct net_device *dev)
570 {
571 struct xl_private *xl_priv=(struct xl_private *)dev->priv;
572 u8 __iomem *xl_mmio = xl_priv->xl_mmio ;
573 u8 i ;
574 u16 hwaddr[3] ; /* Should be u8[6] but we get word return values */
575 int open_err ;
576
577 u16 switchsettings, switchsettings_eeprom ;
578
579 if(request_irq(dev->irq, &xl_interrupt, IRQF_SHARED , "3c359", dev)) {
580 return -EAGAIN;
581 }
582
583 /*
584 * Read the information from the EEPROM that we need. I know we
585 * should use ntohs, but the word gets stored reversed in the 16
586 * bit field anyway and it all works its self out when we memcpy
587 * it into dev->dev_addr.
588 */
589
590 hwaddr[0] = xl_ee_read(dev,0x10) ;
591 hwaddr[1] = xl_ee_read(dev,0x11) ;
592 hwaddr[2] = xl_ee_read(dev,0x12) ;
593
594 /* Ring speed */
595
596 switchsettings_eeprom = xl_ee_read(dev,0x08) ;
597 switchsettings = switchsettings_eeprom ;
598
599 if (xl_priv->xl_ring_speed != 0) {
600 if (xl_priv->xl_ring_speed == 4)
601 switchsettings = switchsettings | 0x02 ;
602 else
603 switchsettings = switchsettings & ~0x02 ;
604 }
605
606 /* Only write EEProm if there has been a change */
607 if (switchsettings != switchsettings_eeprom) {
608 xl_ee_write(dev,0x08,switchsettings) ;
609 /* Hardware reset after changing EEProm */
610 xl_hw_reset(dev) ;
611 }
612
613 memcpy(dev->dev_addr,hwaddr,dev->addr_len) ;
614
615 open_err = xl_open_hw(dev) ;
616
617 /*
618 * This really needs to be cleaned up with better error reporting.
619 */
620
621 if (open_err != 0) { /* Something went wrong with the open command */
622 if (open_err & 0x07) { /* Wrong speed, retry at different speed */
623 printk(KERN_WARNING "%s: Open Error, retrying at different ringspeed \n", dev->name) ;
624 switchsettings = switchsettings ^ 2 ;
625 xl_ee_write(dev,0x08,switchsettings) ;
626 xl_hw_reset(dev) ;
627 open_err = xl_open_hw(dev) ;
628 if (open_err != 0) {
629 printk(KERN_WARNING "%s: Open error returned a second time, we're bombing out now\n", dev->name);
630 free_irq(dev->irq,dev) ;
631 return -ENODEV ;
632 }
633 } else {
634 printk(KERN_WARNING "%s: Open Error = %04x\n", dev->name, open_err) ;
635 free_irq(dev->irq,dev) ;
636 return -ENODEV ;
637 }
638 }
639
640 /*
641 * Now to set up the Rx and Tx buffer structures
642 */
643 /* These MUST be on 8 byte boundaries */
644 xl_priv->xl_tx_ring = kmalloc((sizeof(struct xl_tx_desc) * XL_TX_RING_SIZE) + 7, GFP_DMA | GFP_KERNEL) ;
645 if (xl_priv->xl_tx_ring == NULL) {
646 printk(KERN_WARNING "%s: Not enough memory to allocate rx buffers.\n",
647 dev->name);
648 free_irq(dev->irq,dev);
649 return -ENOMEM;
650 }
651 xl_priv->xl_rx_ring = kmalloc((sizeof(struct xl_rx_desc) * XL_RX_RING_SIZE) +7, GFP_DMA | GFP_KERNEL) ;
652 if (xl_priv->xl_tx_ring == NULL) {
653 printk(KERN_WARNING "%s: Not enough memory to allocate rx buffers.\n",
654 dev->name);
655 free_irq(dev->irq,dev);
656 kfree(xl_priv->xl_tx_ring);
657 return -ENOMEM;
658 }
659 memset(xl_priv->xl_tx_ring,0,sizeof(struct xl_tx_desc) * XL_TX_RING_SIZE) ;
660 memset(xl_priv->xl_rx_ring,0,sizeof(struct xl_rx_desc) * XL_RX_RING_SIZE) ;
661
662 /* Setup Rx Ring */
663 for (i=0 ; i < XL_RX_RING_SIZE ; i++) {
664 struct sk_buff *skb ;
665
666 skb = dev_alloc_skb(xl_priv->pkt_buf_sz) ;
667 if (skb==NULL)
668 break ;
669
670 skb->dev = dev ;
671 xl_priv->xl_rx_ring[i].upfragaddr = pci_map_single(xl_priv->pdev, skb->data,xl_priv->pkt_buf_sz, PCI_DMA_FROMDEVICE) ;
672 xl_priv->xl_rx_ring[i].upfraglen = xl_priv->pkt_buf_sz | RXUPLASTFRAG;
673 xl_priv->rx_ring_skb[i] = skb ;
674 }
675
676 if (i==0) {
677 printk(KERN_WARNING "%s: Not enough memory to allocate rx buffers. Adapter disabled \n",dev->name) ;
678 free_irq(dev->irq,dev) ;
679 return -EIO ;
680 }
681
682 xl_priv->rx_ring_no = i ;
683 xl_priv->rx_ring_tail = 0 ;
684 xl_priv->rx_ring_dma_addr = pci_map_single(xl_priv->pdev,xl_priv->xl_rx_ring, sizeof(struct xl_rx_desc) * XL_RX_RING_SIZE, PCI_DMA_TODEVICE) ;
685 for (i=0;i<(xl_priv->rx_ring_no-1);i++) {
686 xl_priv->xl_rx_ring[i].upnextptr = xl_priv->rx_ring_dma_addr + (sizeof (struct xl_rx_desc) * (i+1)) ;
687 }
688 xl_priv->xl_rx_ring[i].upnextptr = 0 ;
689
690 writel(xl_priv->rx_ring_dma_addr, xl_mmio + MMIO_UPLISTPTR) ;
691
692 /* Setup Tx Ring */
693
694 xl_priv->tx_ring_dma_addr = pci_map_single(xl_priv->pdev,xl_priv->xl_tx_ring, sizeof(struct xl_tx_desc) * XL_TX_RING_SIZE,PCI_DMA_TODEVICE) ;
695
696 xl_priv->tx_ring_head = 1 ;
697 xl_priv->tx_ring_tail = 255 ; /* Special marker for first packet */
698 xl_priv->free_ring_entries = XL_TX_RING_SIZE ;
699
700 /*
701 * Setup the first dummy DPD entry for polling to start working.
702 */
703
704 xl_priv->xl_tx_ring[0].framestartheader = TXDPDEMPTY ;
705 xl_priv->xl_tx_ring[0].buffer = 0 ;
706 xl_priv->xl_tx_ring[0].buffer_length = 0 ;
707 xl_priv->xl_tx_ring[0].dnnextptr = 0 ;
708
709 writel(xl_priv->tx_ring_dma_addr, xl_mmio + MMIO_DNLISTPTR) ;
710 writel(DNUNSTALL, xl_mmio + MMIO_COMMAND) ;
711 writel(UPUNSTALL, xl_mmio + MMIO_COMMAND) ;
712 writel(DNENABLE, xl_mmio + MMIO_COMMAND) ;
713 writeb(0x40, xl_mmio + MMIO_DNPOLL) ;
714
715 /*
716 * Enable interrupts on the card
717 */
718
719 writel(SETINTENABLE | INT_MASK, xl_mmio + MMIO_COMMAND) ;
720 writel(SETINDENABLE | INT_MASK, xl_mmio + MMIO_COMMAND) ;
721
722 netif_start_queue(dev) ;
723 return 0;
724
725 }
726
727 static int xl_open_hw(struct net_device *dev)
728 {
729 struct xl_private *xl_priv=(struct xl_private *)dev->priv;
730 u8 __iomem *xl_mmio = xl_priv->xl_mmio ;
731 u16 vsoff ;
732 char ver_str[33];
733 int open_err ;
734 int i ;
735 unsigned long t ;
736
737 /*
738 * Okay, let's build up the Open.NIC srb command
739 *
740 */
741
742 writel( (MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb), xl_mmio + MMIO_MAC_ACCESS_CMD) ;
743 writeb(OPEN_NIC, xl_mmio + MMIO_MACDATA) ;
744
745 /*
746 * Use this as a test byte, if it comes back with the same value, the command didn't work
747 */
748
749 writel( (MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb)+ 2, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
750 writeb(0xff,xl_mmio + MMIO_MACDATA) ;
751
752 /* Open options */
753 writel( (MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb) + 8, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
754 writeb(0x00, xl_mmio + MMIO_MACDATA) ;
755 writel( (MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb) + 9, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
756 writeb(0x00, xl_mmio + MMIO_MACDATA) ;
757
758 /*
759 * Node address, be careful here, the docs say you can just put zeros here and it will use
760 * the hardware address, it doesn't, you must include the node address in the open command.
761 */
762
763 if (xl_priv->xl_laa[0]) { /* If using a LAA address */
764 for (i=10;i<16;i++) {
765 writel( (MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb) + i, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
766 writeb(xl_priv->xl_laa[i],xl_mmio + MMIO_MACDATA) ;
767 }
768 memcpy(dev->dev_addr,xl_priv->xl_laa,dev->addr_len) ;
769 } else { /* Regular hardware address */
770 for (i=10;i<16;i++) {
771 writel( (MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb) + i, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
772 writeb(dev->dev_addr[i-10], xl_mmio + MMIO_MACDATA) ;
773 }
774 }
775
776 /* Default everything else to 0 */
777 for (i = 16; i < 34; i++) {
778 writel( (MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb) + i, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
779 writeb(0x00,xl_mmio + MMIO_MACDATA) ;
780 }
781
782 /*
783 * Set the csrb bit in the MISR register
784 */
785
786 xl_wait_misr_flags(dev) ;
787 writel(MEM_BYTE_WRITE | MF_CSRB, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
788 writeb(0xFF, xl_mmio + MMIO_MACDATA) ;
789 writel(MMIO_BYTE_WRITE | MISR_SET, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
790 writeb(MISR_CSRB , xl_mmio + MMIO_MACDATA) ;
791
792 /*
793 * Now wait for the command to run
794 */
795
796 t=jiffies;
797 while (! (readw(xl_mmio + MMIO_INTSTATUS) & INTSTAT_SRB)) {
798 schedule();
799 if(jiffies-t > 40*HZ) {
800 printk(KERN_ERR "3COM 3C359 Velocity XL card not responding.\n");
801 break ;
802 }
803 }
804
805 /*
806 * Let's interpret the open response
807 */
808
809 writel( (MEM_BYTE_READ | 0xD0000 | xl_priv->srb)+2, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
810 if (readb(xl_mmio + MMIO_MACDATA)!=0) {
811 open_err = readb(xl_mmio + MMIO_MACDATA) << 8 ;
812 writel( (MEM_BYTE_READ | 0xD0000 | xl_priv->srb) + 7, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
813 open_err |= readb(xl_mmio + MMIO_MACDATA) ;
814 return open_err ;
815 } else {
816 writel( (MEM_WORD_READ | 0xD0000 | xl_priv->srb) + 8, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
817 xl_priv->asb = ntohs(readw(xl_mmio + MMIO_MACDATA)) ;
818 printk(KERN_INFO "%s: Adapter Opened Details: ",dev->name) ;
819 printk("ASB: %04x",xl_priv->asb ) ;
820 writel( (MEM_WORD_READ | 0xD0000 | xl_priv->srb) + 10, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
821 printk(", SRB: %04x",ntohs(readw(xl_mmio + MMIO_MACDATA)) ) ;
822
823 writel( (MEM_WORD_READ | 0xD0000 | xl_priv->srb) + 12, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
824 xl_priv->arb = ntohs(readw(xl_mmio + MMIO_MACDATA)) ;
825 printk(", ARB: %04x \n",xl_priv->arb ) ;
826 writel( (MEM_WORD_READ | 0xD0000 | xl_priv->srb) + 14, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
827 vsoff = ntohs(readw(xl_mmio + MMIO_MACDATA)) ;
828
829 /*
830 * Interesting, sending the individual characters directly to printk was causing klogd to use
831 * use 100% of processor time, so we build up the string and print that instead.
832 */
833
834 for (i=0;i<0x20;i++) {
835 writel( (MEM_BYTE_READ | 0xD0000 | vsoff) + i, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
836 ver_str[i] = readb(xl_mmio + MMIO_MACDATA) ;
837 }
838 ver_str[i] = '\0' ;
839 printk(KERN_INFO "%s: Microcode version String: %s \n",dev->name,ver_str);
840 }
841
842 /*
843 * Issue the AckInterrupt
844 */
845 writew(ACK_INTERRUPT | SRBRACK | LATCH_ACK, xl_mmio + MMIO_COMMAND) ;
846
847 return 0 ;
848 }
849
850 /*
851 * There are two ways of implementing rx on the 359 NIC, either
852 * interrupt driven or polling. We are going to uses interrupts,
853 * it is the easier way of doing things.
854 *
855 * The Rx works with a ring of Rx descriptors. At initialise time the ring
856 * entries point to the next entry except for the last entry in the ring
857 * which points to 0. The card is programmed with the location of the first
858 * available descriptor and keeps reading the next_ptr until next_ptr is set
859 * to 0. Hopefully with a ring size of 16 the card will never get to read a next_ptr
860 * of 0. As the Rx interrupt is received we copy the frame up to the protocol layers
861 * and then point the end of the ring to our current position and point our current
862 * position to 0, therefore making the current position the last position on the ring.
863 * The last position on the ring therefore loops continually loops around the rx ring.
864 *
865 * rx_ring_tail is the position on the ring to process next. (Think of a snake, the head
866 * expands as the card adds new packets and we go around eating the tail processing the
867 * packets.)
868 *
869 * Undoubtably it could be streamlined and improved upon, but at the moment it works
870 * and the fast path through the routine is fine.
871 *
872 * adv_rx_ring could be inlined to increase performance, but its called a *lot* of times
873 * in xl_rx so would increase the size of the function significantly.
874 */
875
876 static void adv_rx_ring(struct net_device *dev) /* Advance rx_ring, cut down on bloat in xl_rx */
877 {
878 struct xl_private *xl_priv=(struct xl_private *)dev->priv;
879 int prev_ring_loc ;
880
881 prev_ring_loc = (xl_priv->rx_ring_tail + XL_RX_RING_SIZE - 1) & (XL_RX_RING_SIZE - 1);
882 xl_priv->xl_rx_ring[prev_ring_loc].upnextptr = xl_priv->rx_ring_dma_addr + (sizeof (struct xl_rx_desc) * xl_priv->rx_ring_tail) ;
883 xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].framestatus = 0 ;
884 xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].upnextptr = 0 ;
885 xl_priv->rx_ring_tail++ ;
886 xl_priv->rx_ring_tail &= (XL_RX_RING_SIZE-1) ;
887
888 return ;
889 }
890
891 static void xl_rx(struct net_device *dev)
892 {
893 struct xl_private *xl_priv=(struct xl_private *)dev->priv;
894 u8 __iomem * xl_mmio = xl_priv->xl_mmio ;
895 struct sk_buff *skb, *skb2 ;
896 int frame_length = 0, copy_len = 0 ;
897 int temp_ring_loc ;
898
899 /*
900 * Receive the next frame, loop around the ring until all frames
901 * have been received.
902 */
903
904 while (xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].framestatus & (RXUPDCOMPLETE | RXUPDFULL) ) { /* Descriptor to process */
905
906 if (xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].framestatus & RXUPDFULL ) { /* UpdFull, Multiple Descriptors used for the frame */
907
908 /*
909 * This is a pain, you need to go through all the descriptors until the last one
910 * for this frame to find the framelength
911 */
912
913 temp_ring_loc = xl_priv->rx_ring_tail ;
914
915 while (xl_priv->xl_rx_ring[temp_ring_loc].framestatus & RXUPDFULL ) {
916 temp_ring_loc++ ;
917 temp_ring_loc &= (XL_RX_RING_SIZE-1) ;
918 }
919
920 frame_length = xl_priv->xl_rx_ring[temp_ring_loc].framestatus & 0x7FFF ;
921
922 skb = dev_alloc_skb(frame_length) ;
923
924 if (skb==NULL) { /* No memory for frame, still need to roll forward the rx ring */
925 printk(KERN_WARNING "%s: dev_alloc_skb failed - multi buffer !\n", dev->name) ;
926 while (xl_priv->rx_ring_tail != temp_ring_loc)
927 adv_rx_ring(dev) ;
928
929 adv_rx_ring(dev) ; /* One more time just for luck :) */
930 xl_priv->xl_stats.rx_dropped++ ;
931
932 writel(ACK_INTERRUPT | UPCOMPACK | LATCH_ACK , xl_mmio + MMIO_COMMAND) ;
933 return ;
934 }
935
936 while (xl_priv->rx_ring_tail != temp_ring_loc) {
937 copy_len = xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].upfraglen & 0x7FFF ;
938 frame_length -= copy_len ;
939 pci_dma_sync_single_for_cpu(xl_priv->pdev,xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].upfragaddr,xl_priv->pkt_buf_sz,PCI_DMA_FROMDEVICE) ;
940 skb_copy_from_linear_data(xl_priv->rx_ring_skb[xl_priv->rx_ring_tail],
941 skb_put(skb, copy_len),
942 copy_len);
943 pci_dma_sync_single_for_device(xl_priv->pdev,xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].upfragaddr,xl_priv->pkt_buf_sz,PCI_DMA_FROMDEVICE) ;
944 adv_rx_ring(dev) ;
945 }
946
947 /* Now we have found the last fragment */
948 pci_dma_sync_single_for_cpu(xl_priv->pdev,xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].upfragaddr,xl_priv->pkt_buf_sz,PCI_DMA_FROMDEVICE) ;
949 skb_copy_from_linear_data(xl_priv->rx_ring_skb[xl_priv->rx_ring_tail],
950 skb_put(skb,copy_len), frame_length);
951 /* memcpy(skb_put(skb,frame_length), bus_to_virt(xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].upfragaddr), frame_length) ; */
952 pci_dma_sync_single_for_device(xl_priv->pdev,xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].upfragaddr,xl_priv->pkt_buf_sz,PCI_DMA_FROMDEVICE) ;
953 adv_rx_ring(dev) ;
954 skb->protocol = tr_type_trans(skb,dev) ;
955 netif_rx(skb) ;
956
957 } else { /* Single Descriptor Used, simply swap buffers over, fast path */
958
959 frame_length = xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].framestatus & 0x7FFF ;
960
961 skb = dev_alloc_skb(xl_priv->pkt_buf_sz) ;
962
963 if (skb==NULL) { /* Still need to fix the rx ring */
964 printk(KERN_WARNING "%s: dev_alloc_skb failed in rx, single buffer \n",dev->name) ;
965 adv_rx_ring(dev) ;
966 xl_priv->xl_stats.rx_dropped++ ;
967 writel(ACK_INTERRUPT | UPCOMPACK | LATCH_ACK , xl_mmio + MMIO_COMMAND) ;
968 return ;
969 }
970
971 skb2 = xl_priv->rx_ring_skb[xl_priv->rx_ring_tail] ;
972 pci_unmap_single(xl_priv->pdev, xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].upfragaddr, xl_priv->pkt_buf_sz,PCI_DMA_FROMDEVICE) ;
973 skb_put(skb2, frame_length) ;
974 skb2->protocol = tr_type_trans(skb2,dev) ;
975
976 xl_priv->rx_ring_skb[xl_priv->rx_ring_tail] = skb ;
977 xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].upfragaddr = pci_map_single(xl_priv->pdev,skb->data,xl_priv->pkt_buf_sz, PCI_DMA_FROMDEVICE) ;
978 xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].upfraglen = xl_priv->pkt_buf_sz | RXUPLASTFRAG ;
979 adv_rx_ring(dev) ;
980 xl_priv->xl_stats.rx_packets++ ;
981 xl_priv->xl_stats.rx_bytes += frame_length ;
982
983 netif_rx(skb2) ;
984 } /* if multiple buffers */
985 dev->last_rx = jiffies ;
986 } /* while packet to do */
987
988 /* Clear the updComplete interrupt */
989 writel(ACK_INTERRUPT | UPCOMPACK | LATCH_ACK , xl_mmio + MMIO_COMMAND) ;
990 return ;
991 }
992
993 /*
994 * This is ruthless, it doesn't care what state the card is in it will
995 * completely reset the adapter.
996 */
997
998 static void xl_reset(struct net_device *dev)
999 {
1000 struct xl_private *xl_priv=(struct xl_private *)dev->priv;
1001 u8 __iomem * xl_mmio = xl_priv->xl_mmio ;
1002 unsigned long t;
1003
1004 writew( GLOBAL_RESET, xl_mmio + MMIO_COMMAND ) ;
1005
1006 /*
1007 * Must wait for cmdInProgress bit (12) to clear before continuing with
1008 * card configuration.
1009 */
1010
1011 t=jiffies;
1012 while (readw(xl_mmio + MMIO_INTSTATUS) & INTSTAT_CMD_IN_PROGRESS) {
1013 if(jiffies-t > 40*HZ) {
1014 printk(KERN_ERR "3COM 3C359 Velocity XL card not responding.\n");
1015 break ;
1016 }
1017 }
1018
1019 }
1020
1021 static void xl_freemem(struct net_device *dev)
1022 {
1023 struct xl_private *xl_priv=(struct xl_private *)dev->priv ;
1024 int i ;
1025
1026 for (i=0;i<XL_RX_RING_SIZE;i++) {
1027 dev_kfree_skb_irq(xl_priv->rx_ring_skb[xl_priv->rx_ring_tail]) ;
1028 pci_unmap_single(xl_priv->pdev,xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].upfragaddr,xl_priv->pkt_buf_sz, PCI_DMA_FROMDEVICE) ;
1029 xl_priv->rx_ring_tail++ ;
1030 xl_priv->rx_ring_tail &= XL_RX_RING_SIZE-1;
1031 }
1032
1033 /* unmap ring */
1034 pci_unmap_single(xl_priv->pdev,xl_priv->rx_ring_dma_addr, sizeof(struct xl_rx_desc) * XL_RX_RING_SIZE, PCI_DMA_FROMDEVICE) ;
1035
1036 pci_unmap_single(xl_priv->pdev,xl_priv->tx_ring_dma_addr, sizeof(struct xl_tx_desc) * XL_TX_RING_SIZE, PCI_DMA_TODEVICE) ;
1037
1038 kfree(xl_priv->xl_rx_ring) ;
1039 kfree(xl_priv->xl_tx_ring) ;
1040
1041 return ;
1042 }
1043
1044 static irqreturn_t xl_interrupt(int irq, void *dev_id)
1045 {
1046 struct net_device *dev = (struct net_device *)dev_id;
1047 struct xl_private *xl_priv =(struct xl_private *)dev->priv;
1048 u8 __iomem * xl_mmio = xl_priv->xl_mmio ;
1049 u16 intstatus, macstatus ;
1050
1051 if (!dev) {
1052 printk(KERN_WARNING "Device structure dead, aaahhhh !\n") ;
1053 return IRQ_NONE;
1054 }
1055
1056 intstatus = readw(xl_mmio + MMIO_INTSTATUS) ;
1057
1058 if (!(intstatus & 1)) /* We didn't generate the interrupt */
1059 return IRQ_NONE;
1060
1061 spin_lock(&xl_priv->xl_lock) ;
1062
1063 /*
1064 * Process the interrupt
1065 */
1066 /*
1067 * Something fishy going on here, we shouldn't get 0001 ints, not fatal though.
1068 */
1069 if (intstatus == 0x0001) {
1070 writel(ACK_INTERRUPT | LATCH_ACK, xl_mmio + MMIO_COMMAND) ;
1071 printk(KERN_INFO "%s: 00001 int received \n",dev->name) ;
1072 } else {
1073 if (intstatus & (HOSTERRINT | SRBRINT | ARBCINT | UPCOMPINT | DNCOMPINT | HARDERRINT | (1<<8) | TXUNDERRUN | ASBFINT)) {
1074
1075 /*
1076 * Host Error.
1077 * It may be possible to recover from this, but usually it means something
1078 * is seriously fubar, so we just close the adapter.
1079 */
1080
1081 if (intstatus & HOSTERRINT) {
1082 printk(KERN_WARNING "%s: Host Error, performing global reset, intstatus = %04x \n",dev->name,intstatus) ;
1083 writew( GLOBAL_RESET, xl_mmio + MMIO_COMMAND ) ;
1084 printk(KERN_WARNING "%s: Resetting hardware: \n", dev->name);
1085 netif_stop_queue(dev) ;
1086 xl_freemem(dev) ;
1087 free_irq(dev->irq,dev);
1088 xl_reset(dev) ;
1089 writel(ACK_INTERRUPT | LATCH_ACK, xl_mmio + MMIO_COMMAND) ;
1090 spin_unlock(&xl_priv->xl_lock) ;
1091 return IRQ_HANDLED;
1092 } /* Host Error */
1093
1094 if (intstatus & SRBRINT ) { /* Srbc interrupt */
1095 writel(ACK_INTERRUPT | SRBRACK | LATCH_ACK, xl_mmio + MMIO_COMMAND) ;
1096 if (xl_priv->srb_queued)
1097 xl_srb_bh(dev) ;
1098 } /* SRBR Interrupt */
1099
1100 if (intstatus & TXUNDERRUN) { /* Issue DnReset command */
1101 writel(DNRESET, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1102 while (readw(xl_mmio + MMIO_INTSTATUS) & INTSTAT_CMD_IN_PROGRESS) { /* Wait for command to run */
1103 /* !!! FIX-ME !!!!
1104 Must put a timeout check here ! */
1105 /* Empty Loop */
1106 }
1107 printk(KERN_WARNING "%s: TX Underrun received \n",dev->name) ;
1108 writel(ACK_INTERRUPT | LATCH_ACK, xl_mmio + MMIO_COMMAND) ;
1109 } /* TxUnderRun */
1110
1111 if (intstatus & ARBCINT ) { /* Arbc interrupt */
1112 xl_arb_cmd(dev) ;
1113 } /* Arbc */
1114
1115 if (intstatus & ASBFINT) {
1116 if (xl_priv->asb_queued == 1) {
1117 xl_asb_cmd(dev) ;
1118 } else if (xl_priv->asb_queued == 2) {
1119 xl_asb_bh(dev) ;
1120 } else {
1121 writel(ACK_INTERRUPT | LATCH_ACK | ASBFACK, xl_mmio + MMIO_COMMAND) ;
1122 }
1123 } /* Asbf */
1124
1125 if (intstatus & UPCOMPINT ) /* UpComplete */
1126 xl_rx(dev) ;
1127
1128 if (intstatus & DNCOMPINT ) /* DnComplete */
1129 xl_dn_comp(dev) ;
1130
1131 if (intstatus & HARDERRINT ) { /* Hardware error */
1132 writel(MMIO_WORD_READ | MACSTATUS, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1133 macstatus = readw(xl_mmio + MMIO_MACDATA) ;
1134 printk(KERN_WARNING "%s: MacStatusError, details: ", dev->name);
1135 if (macstatus & (1<<14))
1136 printk(KERN_WARNING "tchk error: Unrecoverable error \n") ;
1137 if (macstatus & (1<<3))
1138 printk(KERN_WARNING "eint error: Internal watchdog timer expired \n") ;
1139 if (macstatus & (1<<2))
1140 printk(KERN_WARNING "aint error: Host tried to perform invalid operation \n") ;
1141 printk(KERN_WARNING "Instatus = %02x, macstatus = %02x\n",intstatus,macstatus) ;
1142 printk(KERN_WARNING "%s: Resetting hardware: \n", dev->name);
1143 netif_stop_queue(dev) ;
1144 xl_freemem(dev) ;
1145 free_irq(dev->irq,dev);
1146 unregister_netdev(dev) ;
1147 free_netdev(dev) ;
1148 xl_reset(dev) ;
1149 writel(ACK_INTERRUPT | LATCH_ACK, xl_mmio + MMIO_COMMAND) ;
1150 spin_unlock(&xl_priv->xl_lock) ;
1151 return IRQ_HANDLED;
1152 }
1153 } else {
1154 printk(KERN_WARNING "%s: Received Unknown interrupt : %04x \n", dev->name, intstatus) ;
1155 writel(ACK_INTERRUPT | LATCH_ACK, xl_mmio + MMIO_COMMAND) ;
1156 }
1157 }
1158
1159 /* Turn interrupts back on */
1160
1161 writel( SETINDENABLE | INT_MASK, xl_mmio + MMIO_COMMAND) ;
1162 writel( SETINTENABLE | INT_MASK, xl_mmio + MMIO_COMMAND) ;
1163
1164 spin_unlock(&xl_priv->xl_lock) ;
1165 return IRQ_HANDLED;
1166 }
1167
1168 /*
1169 * Tx - Polling configuration
1170 */
1171
1172 static int xl_xmit(struct sk_buff *skb, struct net_device *dev)
1173 {
1174 struct xl_private *xl_priv=(struct xl_private *)dev->priv;
1175 struct xl_tx_desc *txd ;
1176 int tx_head, tx_tail, tx_prev ;
1177 unsigned long flags ;
1178
1179 spin_lock_irqsave(&xl_priv->xl_lock,flags) ;
1180
1181 netif_stop_queue(dev) ;
1182
1183 if (xl_priv->free_ring_entries > 1 ) {
1184 /*
1185 * Set up the descriptor for the packet
1186 */
1187 tx_head = xl_priv->tx_ring_head ;
1188 tx_tail = xl_priv->tx_ring_tail ;
1189
1190 txd = &(xl_priv->xl_tx_ring[tx_head]) ;
1191 txd->dnnextptr = 0 ;
1192 txd->framestartheader = skb->len | TXDNINDICATE ;
1193 txd->buffer = pci_map_single(xl_priv->pdev, skb->data, skb->len, PCI_DMA_TODEVICE) ;
1194 txd->buffer_length = skb->len | TXDNFRAGLAST ;
1195 xl_priv->tx_ring_skb[tx_head] = skb ;
1196 xl_priv->xl_stats.tx_packets++ ;
1197 xl_priv->xl_stats.tx_bytes += skb->len ;
1198
1199 /*
1200 * Set the nextptr of the previous descriptor equal to this descriptor, add XL_TX_RING_SIZE -1
1201 * to ensure no negative numbers in unsigned locations.
1202 */
1203
1204 tx_prev = (xl_priv->tx_ring_head + XL_TX_RING_SIZE - 1) & (XL_TX_RING_SIZE - 1) ;
1205
1206 xl_priv->tx_ring_head++ ;
1207 xl_priv->tx_ring_head &= (XL_TX_RING_SIZE - 1) ;
1208 xl_priv->free_ring_entries-- ;
1209
1210 xl_priv->xl_tx_ring[tx_prev].dnnextptr = xl_priv->tx_ring_dma_addr + (sizeof (struct xl_tx_desc) * tx_head) ;
1211
1212 /* Sneaky, by doing a read on DnListPtr we can force the card to poll on the DnNextPtr */
1213 /* readl(xl_mmio + MMIO_DNLISTPTR) ; */
1214
1215 netif_wake_queue(dev) ;
1216
1217 spin_unlock_irqrestore(&xl_priv->xl_lock,flags) ;
1218
1219 return 0;
1220 } else {
1221 spin_unlock_irqrestore(&xl_priv->xl_lock,flags) ;
1222 return 1;
1223 }
1224
1225 }
1226
1227 /*
1228 * The NIC has told us that a packet has been downloaded onto the card, we must
1229 * find out which packet it has done, clear the skb and information for the packet
1230 * then advance around the ring for all tranmitted packets
1231 */
1232
1233 static void xl_dn_comp(struct net_device *dev)
1234 {
1235 struct xl_private *xl_priv=(struct xl_private *)dev->priv;
1236 u8 __iomem * xl_mmio = xl_priv->xl_mmio ;
1237 struct xl_tx_desc *txd ;
1238
1239
1240 if (xl_priv->tx_ring_tail == 255) {/* First time */
1241 xl_priv->xl_tx_ring[0].framestartheader = 0 ;
1242 xl_priv->xl_tx_ring[0].dnnextptr = 0 ;
1243 xl_priv->tx_ring_tail = 1 ;
1244 }
1245
1246 while (xl_priv->xl_tx_ring[xl_priv->tx_ring_tail].framestartheader & TXDNCOMPLETE ) {
1247 txd = &(xl_priv->xl_tx_ring[xl_priv->tx_ring_tail]) ;
1248 pci_unmap_single(xl_priv->pdev,txd->buffer, xl_priv->tx_ring_skb[xl_priv->tx_ring_tail]->len, PCI_DMA_TODEVICE) ;
1249 txd->framestartheader = 0 ;
1250 txd->buffer = 0xdeadbeef ;
1251 txd->buffer_length = 0 ;
1252 dev_kfree_skb_irq(xl_priv->tx_ring_skb[xl_priv->tx_ring_tail]) ;
1253 xl_priv->tx_ring_tail++ ;
1254 xl_priv->tx_ring_tail &= (XL_TX_RING_SIZE - 1) ;
1255 xl_priv->free_ring_entries++ ;
1256 }
1257
1258 netif_wake_queue(dev) ;
1259
1260 writel(ACK_INTERRUPT | DNCOMPACK | LATCH_ACK , xl_mmio + MMIO_COMMAND) ;
1261 }
1262
1263 /*
1264 * Close the adapter properly.
1265 * This srb reply cannot be handled from interrupt context as we have
1266 * to free the interrupt from the driver.
1267 */
1268
1269 static int xl_close(struct net_device *dev)
1270 {
1271 struct xl_private *xl_priv = (struct xl_private *) dev->priv ;
1272 u8 __iomem * xl_mmio = xl_priv->xl_mmio ;
1273 unsigned long t ;
1274
1275 netif_stop_queue(dev) ;
1276
1277 /*
1278 * Close the adapter, need to stall the rx and tx queues.
1279 */
1280
1281 writew(DNSTALL, xl_mmio + MMIO_COMMAND) ;
1282 t=jiffies;
1283 while (readw(xl_mmio + MMIO_INTSTATUS) & INTSTAT_CMD_IN_PROGRESS) {
1284 schedule();
1285 if(jiffies-t > 10*HZ) {
1286 printk(KERN_ERR "%s: 3COM 3C359 Velocity XL-DNSTALL not responding.\n", dev->name);
1287 break ;
1288 }
1289 }
1290 writew(DNDISABLE, xl_mmio + MMIO_COMMAND) ;
1291 t=jiffies;
1292 while (readw(xl_mmio + MMIO_INTSTATUS) & INTSTAT_CMD_IN_PROGRESS) {
1293 schedule();
1294 if(jiffies-t > 10*HZ) {
1295 printk(KERN_ERR "%s: 3COM 3C359 Velocity XL-DNDISABLE not responding.\n", dev->name);
1296 break ;
1297 }
1298 }
1299 writew(UPSTALL, xl_mmio + MMIO_COMMAND) ;
1300 t=jiffies;
1301 while (readw(xl_mmio + MMIO_INTSTATUS) & INTSTAT_CMD_IN_PROGRESS) {
1302 schedule();
1303 if(jiffies-t > 10*HZ) {
1304 printk(KERN_ERR "%s: 3COM 3C359 Velocity XL-UPSTALL not responding.\n", dev->name);
1305 break ;
1306 }
1307 }
1308
1309 /* Turn off interrupts, we will still get the indication though
1310 * so we can trap it
1311 */
1312
1313 writel(SETINTENABLE, xl_mmio + MMIO_COMMAND) ;
1314
1315 xl_srb_cmd(dev,CLOSE_NIC) ;
1316
1317 t=jiffies;
1318 while (!(readw(xl_mmio + MMIO_INTSTATUS) & INTSTAT_SRB)) {
1319 schedule();
1320 if(jiffies-t > 10*HZ) {
1321 printk(KERN_ERR "%s: 3COM 3C359 Velocity XL-CLOSENIC not responding.\n", dev->name);
1322 break ;
1323 }
1324 }
1325 /* Read the srb response from the adapter */
1326
1327 writel(MEM_BYTE_READ | 0xd0000 | xl_priv->srb, xl_mmio + MMIO_MAC_ACCESS_CMD);
1328 if (readb(xl_mmio + MMIO_MACDATA) != CLOSE_NIC) {
1329 printk(KERN_INFO "%s: CLOSE_NIC did not get a CLOSE_NIC response \n",dev->name) ;
1330 } else {
1331 writel((MEM_BYTE_READ | 0xd0000 | xl_priv->srb) +2, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1332 if (readb(xl_mmio + MMIO_MACDATA)==0) {
1333 printk(KERN_INFO "%s: Adapter has been closed \n",dev->name) ;
1334 writew(ACK_INTERRUPT | SRBRACK | LATCH_ACK, xl_mmio + MMIO_COMMAND) ;
1335
1336 xl_freemem(dev) ;
1337 free_irq(dev->irq,dev) ;
1338 } else {
1339 printk(KERN_INFO "%s: Close nic command returned error code %02x\n",dev->name, readb(xl_mmio + MMIO_MACDATA)) ;
1340 }
1341 }
1342
1343 /* Reset the upload and download logic */
1344
1345 writew(UPRESET, xl_mmio + MMIO_COMMAND) ;
1346 t=jiffies;
1347 while (readw(xl_mmio + MMIO_INTSTATUS) & INTSTAT_CMD_IN_PROGRESS) {
1348 schedule();
1349 if(jiffies-t > 10*HZ) {
1350 printk(KERN_ERR "%s: 3COM 3C359 Velocity XL-UPRESET not responding.\n", dev->name);
1351 break ;
1352 }
1353 }
1354 writew(DNRESET, xl_mmio + MMIO_COMMAND) ;
1355 t=jiffies;
1356 while (readw(xl_mmio + MMIO_INTSTATUS) & INTSTAT_CMD_IN_PROGRESS) {
1357 schedule();
1358 if(jiffies-t > 10*HZ) {
1359 printk(KERN_ERR "%s: 3COM 3C359 Velocity XL-DNRESET not responding.\n", dev->name);
1360 break ;
1361 }
1362 }
1363 xl_hw_reset(dev) ;
1364 return 0 ;
1365 }
1366
1367 static void xl_set_rx_mode(struct net_device *dev)
1368 {
1369 struct xl_private *xl_priv = (struct xl_private *) dev->priv ;
1370 struct dev_mc_list *dmi ;
1371 unsigned char dev_mc_address[4] ;
1372 u16 options ;
1373 int i ;
1374
1375 if (dev->flags & IFF_PROMISC)
1376 options = 0x0004 ;
1377 else
1378 options = 0x0000 ;
1379
1380 if (options ^ xl_priv->xl_copy_all_options) { /* Changed, must send command */
1381 xl_priv->xl_copy_all_options = options ;
1382 xl_srb_cmd(dev, SET_RECEIVE_MODE) ;
1383 return ;
1384 }
1385
1386 dev_mc_address[0] = dev_mc_address[1] = dev_mc_address[2] = dev_mc_address[3] = 0 ;
1387
1388 for (i=0,dmi=dev->mc_list;i < dev->mc_count; i++,dmi = dmi->next) {
1389 dev_mc_address[0] |= dmi->dmi_addr[2] ;
1390 dev_mc_address[1] |= dmi->dmi_addr[3] ;
1391 dev_mc_address[2] |= dmi->dmi_addr[4] ;
1392 dev_mc_address[3] |= dmi->dmi_addr[5] ;
1393 }
1394
1395 if (memcmp(xl_priv->xl_functional_addr,dev_mc_address,4) != 0) { /* Options have changed, run the command */
1396 memcpy(xl_priv->xl_functional_addr, dev_mc_address,4) ;
1397 xl_srb_cmd(dev, SET_FUNC_ADDRESS) ;
1398 }
1399 return ;
1400 }
1401
1402
1403 /*
1404 * We issued an srb command and now we must read
1405 * the response from the completed command.
1406 */
1407
1408 static void xl_srb_bh(struct net_device *dev)
1409 {
1410 struct xl_private *xl_priv = (struct xl_private *) dev->priv ;
1411 u8 __iomem * xl_mmio = xl_priv->xl_mmio ;
1412 u8 srb_cmd, ret_code ;
1413 int i ;
1414
1415 writel(MEM_BYTE_READ | 0xd0000 | xl_priv->srb, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1416 srb_cmd = readb(xl_mmio + MMIO_MACDATA) ;
1417 writel((MEM_BYTE_READ | 0xd0000 | xl_priv->srb) +2, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1418 ret_code = readb(xl_mmio + MMIO_MACDATA) ;
1419
1420 /* Ret_code is standard across all commands */
1421
1422 switch (ret_code) {
1423 case 1:
1424 printk(KERN_INFO "%s: Command: %d - Invalid Command code\n",dev->name,srb_cmd) ;
1425 break ;
1426 case 4:
1427 printk(KERN_INFO "%s: Command: %d - Adapter is closed, must be open for this command \n",dev->name,srb_cmd) ;
1428 break ;
1429
1430 case 6:
1431 printk(KERN_INFO "%s: Command: %d - Options Invalid for command \n",dev->name,srb_cmd) ;
1432 break ;
1433
1434 case 0: /* Successful command execution */
1435 switch (srb_cmd) {
1436 case READ_LOG: /* Returns 14 bytes of data from the NIC */
1437 if(xl_priv->xl_message_level)
1438 printk(KERN_INFO "%s: READ.LOG 14 bytes of data ",dev->name) ;
1439 /*
1440 * We still have to read the log even if message_level = 0 and we don't want
1441 * to see it
1442 */
1443 for (i=0;i<14;i++) {
1444 writel(MEM_BYTE_READ | 0xd0000 | xl_priv->srb | i, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1445 if(xl_priv->xl_message_level)
1446 printk("%02x:",readb(xl_mmio + MMIO_MACDATA)) ;
1447 }
1448 printk("\n") ;
1449 break ;
1450 case SET_FUNC_ADDRESS:
1451 if(xl_priv->xl_message_level)
1452 printk(KERN_INFO "%s: Functional Address Set \n",dev->name) ;
1453 break ;
1454 case CLOSE_NIC:
1455 if(xl_priv->xl_message_level)
1456 printk(KERN_INFO "%s: Received CLOSE_NIC interrupt in interrupt handler \n",dev->name) ;
1457 break ;
1458 case SET_MULTICAST_MODE:
1459 if(xl_priv->xl_message_level)
1460 printk(KERN_INFO "%s: Multicast options successfully changed\n",dev->name) ;
1461 break ;
1462 case SET_RECEIVE_MODE:
1463 if(xl_priv->xl_message_level) {
1464 if (xl_priv->xl_copy_all_options == 0x0004)
1465 printk(KERN_INFO "%s: Entering promiscuous mode \n", dev->name) ;
1466 else
1467 printk(KERN_INFO "%s: Entering normal receive mode \n",dev->name) ;
1468 }
1469 break ;
1470
1471 } /* switch */
1472 break ;
1473 } /* switch */
1474 return ;
1475 }
1476
1477 static struct net_device_stats * xl_get_stats(struct net_device *dev)
1478 {
1479 struct xl_private *xl_priv = (struct xl_private *) dev->priv ;
1480 return (struct net_device_stats *) &xl_priv->xl_stats;
1481 }
1482
1483 static int xl_set_mac_address (struct net_device *dev, void *addr)
1484 {
1485 struct sockaddr *saddr = addr ;
1486 struct xl_private *xl_priv = (struct xl_private *)dev->priv ;
1487
1488 if (netif_running(dev)) {
1489 printk(KERN_WARNING "%s: Cannot set mac/laa address while card is open\n", dev->name) ;
1490 return -EIO ;
1491 }
1492
1493 memcpy(xl_priv->xl_laa, saddr->sa_data,dev->addr_len) ;
1494
1495 if (xl_priv->xl_message_level) {
1496 printk(KERN_INFO "%s: MAC/LAA Set to = %x.%x.%x.%x.%x.%x\n",dev->name, xl_priv->xl_laa[0],
1497 xl_priv->xl_laa[1], xl_priv->xl_laa[2],
1498 xl_priv->xl_laa[3], xl_priv->xl_laa[4],
1499 xl_priv->xl_laa[5]);
1500 }
1501
1502 return 0 ;
1503 }
1504
1505 static void xl_arb_cmd(struct net_device *dev)
1506 {
1507 struct xl_private *xl_priv = (struct xl_private *) dev->priv;
1508 u8 __iomem * xl_mmio = xl_priv->xl_mmio ;
1509 u8 arb_cmd ;
1510 u16 lan_status, lan_status_diff ;
1511
1512 writel( ( MEM_BYTE_READ | 0xD0000 | xl_priv->arb), xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1513 arb_cmd = readb(xl_mmio + MMIO_MACDATA) ;
1514
1515 if (arb_cmd == RING_STATUS_CHANGE) { /* Ring.Status.Change */
1516 writel( ( (MEM_WORD_READ | 0xD0000 | xl_priv->arb) + 6), xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1517
1518 printk(KERN_INFO "%s: Ring Status Change: New Status = %04x\n", dev->name, ntohs(readw(xl_mmio + MMIO_MACDATA) )) ;
1519
1520 lan_status = ntohs(readw(xl_mmio + MMIO_MACDATA));
1521
1522 /* Acknowledge interrupt, this tells nic we are done with the arb */
1523 writel(ACK_INTERRUPT | ARBCACK | LATCH_ACK, xl_mmio + MMIO_COMMAND) ;
1524
1525 lan_status_diff = xl_priv->xl_lan_status ^ lan_status ;
1526
1527 if (lan_status_diff & (LSC_LWF | LSC_ARW | LSC_FPE | LSC_RR) ) {
1528 if (lan_status_diff & LSC_LWF)
1529 printk(KERN_WARNING "%s: Short circuit detected on the lobe\n",dev->name);
1530 if (lan_status_diff & LSC_ARW)
1531 printk(KERN_WARNING "%s: Auto removal error\n",dev->name);
1532 if (lan_status_diff & LSC_FPE)
1533 printk(KERN_WARNING "%s: FDX Protocol Error\n",dev->name);
1534 if (lan_status_diff & LSC_RR)
1535 printk(KERN_WARNING "%s: Force remove MAC frame received\n",dev->name);
1536
1537 /* Adapter has been closed by the hardware */
1538
1539 netif_stop_queue(dev);
1540 xl_freemem(dev) ;
1541 free_irq(dev->irq,dev);
1542
1543 printk(KERN_WARNING "%s: Adapter has been closed \n", dev->name) ;
1544 } /* If serious error */
1545
1546 if (xl_priv->xl_message_level) {
1547 if (lan_status_diff & LSC_SIG_LOSS)
1548 printk(KERN_WARNING "%s: No receive signal detected \n", dev->name) ;
1549 if (lan_status_diff & LSC_HARD_ERR)
1550 printk(KERN_INFO "%s: Beaconing \n",dev->name);
1551 if (lan_status_diff & LSC_SOFT_ERR)
1552 printk(KERN_WARNING "%s: Adapter transmitted Soft Error Report Mac Frame \n",dev->name);
1553 if (lan_status_diff & LSC_TRAN_BCN)
1554 printk(KERN_INFO "%s: We are tranmitting the beacon, aaah\n",dev->name);
1555 if (lan_status_diff & LSC_SS)
1556 printk(KERN_INFO "%s: Single Station on the ring \n", dev->name);
1557 if (lan_status_diff & LSC_RING_REC)
1558 printk(KERN_INFO "%s: Ring recovery ongoing\n",dev->name);
1559 if (lan_status_diff & LSC_FDX_MODE)
1560 printk(KERN_INFO "%s: Operating in FDX mode\n",dev->name);
1561 }
1562
1563 if (lan_status_diff & LSC_CO) {
1564 if (xl_priv->xl_message_level)
1565 printk(KERN_INFO "%s: Counter Overflow \n", dev->name);
1566 /* Issue READ.LOG command */
1567 xl_srb_cmd(dev, READ_LOG) ;
1568 }
1569
1570 /* There is no command in the tech docs to issue the read_sr_counters */
1571 if (lan_status_diff & LSC_SR_CO) {
1572 if (xl_priv->xl_message_level)
1573 printk(KERN_INFO "%s: Source routing counters overflow\n", dev->name);
1574 }
1575
1576 xl_priv->xl_lan_status = lan_status ;
1577
1578 } /* Lan.change.status */
1579 else if ( arb_cmd == RECEIVE_DATA) { /* Received.Data */
1580 #if XL_DEBUG
1581 printk(KERN_INFO "Received.Data \n") ;
1582 #endif
1583 writel( ((MEM_WORD_READ | 0xD0000 | xl_priv->arb) + 6), xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1584 xl_priv->mac_buffer = ntohs(readw(xl_mmio + MMIO_MACDATA)) ;
1585
1586 /* Now we are going to be really basic here and not do anything
1587 * with the data at all. The tech docs do not give me enough
1588 * information to calculate the buffers properly so we're
1589 * just going to tell the nic that we've dealt with the frame
1590 * anyway.
1591 */
1592
1593 dev->last_rx = jiffies ;
1594 /* Acknowledge interrupt, this tells nic we are done with the arb */
1595 writel(ACK_INTERRUPT | ARBCACK | LATCH_ACK, xl_mmio + MMIO_COMMAND) ;
1596
1597 /* Is the ASB free ? */
1598
1599 xl_priv->asb_queued = 0 ;
1600 writel( ((MEM_BYTE_READ | 0xD0000 | xl_priv->asb) + 2), xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1601 if (readb(xl_mmio + MMIO_MACDATA) != 0xff) {
1602 xl_priv->asb_queued = 1 ;
1603
1604 xl_wait_misr_flags(dev) ;
1605
1606 writel(MEM_BYTE_WRITE | MF_ASBFR, xl_mmio + MMIO_MAC_ACCESS_CMD);
1607 writeb(0xff, xl_mmio + MMIO_MACDATA) ;
1608 writel(MMIO_BYTE_WRITE | MISR_SET, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1609 writeb(MISR_ASBFR, xl_mmio + MMIO_MACDATA) ;
1610 return ;
1611 /* Drop out and wait for the bottom half to be run */
1612 }
1613
1614 xl_asb_cmd(dev) ;
1615
1616 } else {
1617 printk(KERN_WARNING "%s: Received unknown arb (xl_priv) command: %02x \n",dev->name,arb_cmd) ;
1618 }
1619
1620 /* Acknowledge the arb interrupt */
1621
1622 writel(ACK_INTERRUPT | ARBCACK | LATCH_ACK , xl_mmio + MMIO_COMMAND) ;
1623
1624 return ;
1625 }
1626
1627
1628 /*
1629 * There is only one asb command, but we can get called from different
1630 * places.
1631 */
1632
1633 static void xl_asb_cmd(struct net_device *dev)
1634 {
1635 struct xl_private *xl_priv = (struct xl_private *) dev->priv ;
1636 u8 __iomem * xl_mmio = xl_priv->xl_mmio ;
1637
1638 if (xl_priv->asb_queued == 1)
1639 writel(ACK_INTERRUPT | LATCH_ACK | ASBFACK, xl_mmio + MMIO_COMMAND) ;
1640
1641 writel(MEM_BYTE_WRITE | 0xd0000 | xl_priv->asb, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1642 writeb(0x81, xl_mmio + MMIO_MACDATA) ;
1643
1644 writel(MEM_WORD_WRITE | 0xd0000 | xl_priv->asb | 6, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1645 writew(ntohs(xl_priv->mac_buffer), xl_mmio + MMIO_MACDATA) ;
1646
1647 xl_wait_misr_flags(dev) ;
1648
1649 writel(MEM_BYTE_WRITE | MF_RASB, xl_mmio + MMIO_MAC_ACCESS_CMD);
1650 writeb(0xff, xl_mmio + MMIO_MACDATA) ;
1651
1652 writel(MMIO_BYTE_WRITE | MISR_SET, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1653 writeb(MISR_RASB, xl_mmio + MMIO_MACDATA) ;
1654
1655 xl_priv->asb_queued = 2 ;
1656
1657 return ;
1658 }
1659
1660 /*
1661 * This will only get called if there was an error
1662 * from the asb cmd.
1663 */
1664 static void xl_asb_bh(struct net_device *dev)
1665 {
1666 struct xl_private *xl_priv = (struct xl_private *) dev->priv ;
1667 u8 __iomem * xl_mmio = xl_priv->xl_mmio ;
1668 u8 ret_code ;
1669
1670 writel(MMIO_BYTE_READ | 0xd0000 | xl_priv->asb | 2, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1671 ret_code = readb(xl_mmio + MMIO_MACDATA) ;
1672 switch (ret_code) {
1673 case 0x01:
1674 printk(KERN_INFO "%s: ASB Command, unrecognized command code \n",dev->name) ;
1675 break ;
1676 case 0x26:
1677 printk(KERN_INFO "%s: ASB Command, unexpected receive buffer \n", dev->name) ;
1678 break ;
1679 case 0x40:
1680 printk(KERN_INFO "%s: ASB Command, Invalid Station ID \n", dev->name) ;
1681 break ;
1682 }
1683 xl_priv->asb_queued = 0 ;
1684 writel(ACK_INTERRUPT | LATCH_ACK | ASBFACK, xl_mmio + MMIO_COMMAND) ;
1685 return ;
1686 }
1687
1688 /*
1689 * Issue srb commands to the nic
1690 */
1691
1692 static void xl_srb_cmd(struct net_device *dev, int srb_cmd)
1693 {
1694 struct xl_private *xl_priv = (struct xl_private *) dev->priv ;
1695 u8 __iomem * xl_mmio = xl_priv->xl_mmio ;
1696
1697 switch (srb_cmd) {
1698 case READ_LOG:
1699 writel(MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1700 writeb(READ_LOG, xl_mmio + MMIO_MACDATA) ;
1701 break;
1702
1703 case CLOSE_NIC:
1704 writel(MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1705 writeb(CLOSE_NIC, xl_mmio + MMIO_MACDATA) ;
1706 break ;
1707
1708 case SET_RECEIVE_MODE:
1709 writel(MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1710 writeb(SET_RECEIVE_MODE, xl_mmio + MMIO_MACDATA) ;
1711 writel(MEM_WORD_WRITE | 0xD0000 | xl_priv->srb | 4, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1712 writew(xl_priv->xl_copy_all_options, xl_mmio + MMIO_MACDATA) ;
1713 break ;
1714
1715 case SET_FUNC_ADDRESS:
1716 writel(MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1717 writeb(SET_FUNC_ADDRESS, xl_mmio + MMIO_MACDATA) ;
1718 writel(MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb | 6 , xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1719 writeb(xl_priv->xl_functional_addr[0], xl_mmio + MMIO_MACDATA) ;
1720 writel(MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb | 7 , xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1721 writeb(xl_priv->xl_functional_addr[1], xl_mmio + MMIO_MACDATA) ;
1722 writel(MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb | 8 , xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1723 writeb(xl_priv->xl_functional_addr[2], xl_mmio + MMIO_MACDATA) ;
1724 writel(MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb | 9 , xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1725 writeb(xl_priv->xl_functional_addr[3], xl_mmio + MMIO_MACDATA) ;
1726 break ;
1727 } /* switch */
1728
1729
1730 xl_wait_misr_flags(dev) ;
1731
1732 /* Write 0xff to the CSRB flag */
1733 writel(MEM_BYTE_WRITE | MF_CSRB , xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1734 writeb(0xFF, xl_mmio + MMIO_MACDATA) ;
1735 /* Set csrb bit in MISR register to process command */
1736 writel(MMIO_BYTE_WRITE | MISR_SET, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1737 writeb(MISR_CSRB, xl_mmio + MMIO_MACDATA) ;
1738 xl_priv->srb_queued = 1 ;
1739
1740 return ;
1741 }
1742
1743 /*
1744 * This is nasty, to use the MISR command you have to wait for 6 memory locations
1745 * to be zero. This is the way the driver does on other OS'es so we should be ok with
1746 * the empty loop.
1747 */
1748
1749 static void xl_wait_misr_flags(struct net_device *dev)
1750 {
1751 struct xl_private *xl_priv = (struct xl_private *) dev->priv ;
1752 u8 __iomem * xl_mmio = xl_priv->xl_mmio ;
1753
1754 int i ;
1755
1756 writel(MMIO_BYTE_READ | MISR_RW, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1757 if (readb(xl_mmio + MMIO_MACDATA) != 0) { /* Misr not clear */
1758 for (i=0; i<6; i++) {
1759 writel(MEM_BYTE_READ | 0xDFFE0 | i, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1760 while (readb(xl_mmio + MMIO_MACDATA) != 0 ) {} ; /* Empty Loop */
1761 }
1762 }
1763
1764 writel(MMIO_BYTE_WRITE | MISR_AND, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1765 writeb(0x80, xl_mmio + MMIO_MACDATA) ;
1766
1767 return ;
1768 }
1769
1770 /*
1771 * Change mtu size, this should work the same as olympic
1772 */
1773
1774 static int xl_change_mtu(struct net_device *dev, int mtu)
1775 {
1776 struct xl_private *xl_priv = (struct xl_private *) dev->priv;
1777 u16 max_mtu ;
1778
1779 if (xl_priv->xl_ring_speed == 4)
1780 max_mtu = 4500 ;
1781 else
1782 max_mtu = 18000 ;
1783
1784 if (mtu > max_mtu)
1785 return -EINVAL ;
1786 if (mtu < 100)
1787 return -EINVAL ;
1788
1789 dev->mtu = mtu ;
1790 xl_priv->pkt_buf_sz = mtu + TR_HLEN ;
1791
1792 return 0 ;
1793 }
1794
1795 static void __devexit xl_remove_one (struct pci_dev *pdev)
1796 {
1797 struct net_device *dev = pci_get_drvdata(pdev);
1798 struct xl_private *xl_priv=(struct xl_private *)dev->priv;
1799
1800 unregister_netdev(dev);
1801 iounmap(xl_priv->xl_mmio) ;
1802 pci_release_regions(pdev) ;
1803 pci_set_drvdata(pdev,NULL) ;
1804 free_netdev(dev);
1805 return ;
1806 }
1807
1808 static struct pci_driver xl_3c359_driver = {
1809 .name = "3c359",
1810 .id_table = xl_pci_tbl,
1811 .probe = xl_probe,
1812 .remove = __devexit_p(xl_remove_one),
1813 };
1814
1815 static int __init xl_pci_init (void)
1816 {
1817 return pci_register_driver(&xl_3c359_driver);
1818 }
1819
1820
1821 static void __exit xl_pci_cleanup (void)
1822 {
1823 pci_unregister_driver (&xl_3c359_driver);
1824 }
1825
1826 module_init(xl_pci_init);
1827 module_exit(xl_pci_cleanup);
1828
1829 MODULE_LICENSE("GPL") ;
Tomato firmware and modifications.