RT-AC66 3.0.0.4.374.130 core
[tomato.git] / release / src-rt-6.x / linux / linux-2.6 / drivers / net / smc911x.c
blobdb43e42bee3599483389d3b1d9612e2116149702
1 /*
2 * smc911x.c
3 * This is a driver for SMSC's LAN911{5,6,7,8} single-chip Ethernet devices.
5 * Copyright (C) 2005 Sensoria Corp
6 * Derived from the unified SMC91x driver by Nicolas Pitre
7 * and the smsc911x.c reference driver by SMSC
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 * Arguments:
24 * watchdog = TX watchdog timeout
25 * tx_fifo_kb = Size of TX FIFO in KB
27 * History:
28 * 04/16/05 Dustin McIntire Initial version
30 static const char version[] =
31 "smc911x.c: v1.0 04-16-2005 by Dustin McIntire <dustin@sensoria.com>\n";
33 /* Debugging options */
34 #define ENABLE_SMC_DEBUG_RX 0
35 #define ENABLE_SMC_DEBUG_TX 0
36 #define ENABLE_SMC_DEBUG_DMA 0
37 #define ENABLE_SMC_DEBUG_PKTS 0
38 #define ENABLE_SMC_DEBUG_MISC 0
39 #define ENABLE_SMC_DEBUG_FUNC 0
41 #define SMC_DEBUG_RX ((ENABLE_SMC_DEBUG_RX ? 1 : 0) << 0)
42 #define SMC_DEBUG_TX ((ENABLE_SMC_DEBUG_TX ? 1 : 0) << 1)
43 #define SMC_DEBUG_DMA ((ENABLE_SMC_DEBUG_DMA ? 1 : 0) << 2)
44 #define SMC_DEBUG_PKTS ((ENABLE_SMC_DEBUG_PKTS ? 1 : 0) << 3)
45 #define SMC_DEBUG_MISC ((ENABLE_SMC_DEBUG_MISC ? 1 : 0) << 4)
46 #define SMC_DEBUG_FUNC ((ENABLE_SMC_DEBUG_FUNC ? 1 : 0) << 5)
48 #ifndef SMC_DEBUG
49 #define SMC_DEBUG ( SMC_DEBUG_RX | \
50 SMC_DEBUG_TX | \
51 SMC_DEBUG_DMA | \
52 SMC_DEBUG_PKTS | \
53 SMC_DEBUG_MISC | \
54 SMC_DEBUG_FUNC \
56 #endif
58 #include <linux/init.h>
59 #include <linux/module.h>
60 #include <linux/kernel.h>
61 #include <linux/sched.h>
62 #include <linux/slab.h>
63 #include <linux/delay.h>
64 #include <linux/interrupt.h>
65 #include <linux/errno.h>
66 #include <linux/ioport.h>
67 #include <linux/crc32.h>
68 #include <linux/device.h>
69 #include <linux/platform_device.h>
70 #include <linux/spinlock.h>
71 #include <linux/ethtool.h>
72 #include <linux/mii.h>
73 #include <linux/workqueue.h>
75 #include <linux/netdevice.h>
76 #include <linux/etherdevice.h>
77 #include <linux/skbuff.h>
79 #include <asm/io.h>
81 #include "smc911x.h"
84 * Transmit timeout, default 5 seconds.
86 static int watchdog = 5000;
87 module_param(watchdog, int, 0400);
88 MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds");
90 static int tx_fifo_kb=8;
91 module_param(tx_fifo_kb, int, 0400);
92 MODULE_PARM_DESC(tx_fifo_kb,"transmit FIFO size in KB (1<x<15)(default=8)");
94 MODULE_LICENSE("GPL");
97 * The internal workings of the driver. If you are changing anything
98 * here with the SMC stuff, you should have the datasheet and know
99 * what you are doing.
101 #define CARDNAME "smc911x"
104 * Use power-down feature of the chip
106 #define POWER_DOWN 1
109 /* store this information for the driver.. */
110 struct smc911x_local {
112 * If I have to wait until the DMA is finished and ready to reload a
113 * packet, I will store the skbuff here. Then, the DMA will send it
114 * out and free it.
116 struct sk_buff *pending_tx_skb;
119 * these are things that the kernel wants me to keep, so users
120 * can find out semi-useless statistics of how well the card is
121 * performing
123 struct net_device_stats stats;
125 /* version/revision of the SMC911x chip */
126 u16 version;
127 u16 revision;
129 /* FIFO sizes */
130 int tx_fifo_kb;
131 int tx_fifo_size;
132 int rx_fifo_size;
133 int afc_cfg;
135 /* Contains the current active receive/phy mode */
136 int ctl_rfduplx;
137 int ctl_rspeed;
139 u32 msg_enable;
140 u32 phy_type;
141 struct mii_if_info mii;
143 /* work queue */
144 struct work_struct phy_configure;
145 int work_pending;
147 int tx_throttle;
148 spinlock_t lock;
150 struct net_device *netdev;
152 #ifdef SMC_USE_DMA
153 /* DMA needs the physical address of the chip */
154 u_long physaddr;
155 int rxdma;
156 int txdma;
157 int rxdma_active;
158 int txdma_active;
159 struct sk_buff *current_rx_skb;
160 struct sk_buff *current_tx_skb;
161 struct device *dev;
162 #endif
165 #if SMC_DEBUG > 0
166 #define DBG(n, args...) \
167 do { \
168 if (SMC_DEBUG & (n)) \
169 printk(args); \
170 } while (0)
172 #define PRINTK(args...) printk(args)
173 #else
174 #define DBG(n, args...) do { } while (0)
175 #define PRINTK(args...) printk(KERN_DEBUG args)
176 #endif
178 #if SMC_DEBUG_PKTS > 0
179 static void PRINT_PKT(u_char *buf, int length)
181 int i;
182 int remainder;
183 int lines;
185 lines = length / 16;
186 remainder = length % 16;
188 for (i = 0; i < lines ; i ++) {
189 int cur;
190 for (cur = 0; cur < 8; cur++) {
191 u_char a, b;
192 a = *buf++;
193 b = *buf++;
194 printk("%02x%02x ", a, b);
196 printk("\n");
198 for (i = 0; i < remainder/2 ; i++) {
199 u_char a, b;
200 a = *buf++;
201 b = *buf++;
202 printk("%02x%02x ", a, b);
204 printk("\n");
206 #else
207 #define PRINT_PKT(x...) do { } while (0)
208 #endif
211 /* this enables an interrupt in the interrupt mask register */
212 #define SMC_ENABLE_INT(x) do { \
213 unsigned int __mask; \
214 unsigned long __flags; \
215 spin_lock_irqsave(&lp->lock, __flags); \
216 __mask = SMC_GET_INT_EN(); \
217 __mask |= (x); \
218 SMC_SET_INT_EN(__mask); \
219 spin_unlock_irqrestore(&lp->lock, __flags); \
220 } while (0)
222 /* this disables an interrupt from the interrupt mask register */
223 #define SMC_DISABLE_INT(x) do { \
224 unsigned int __mask; \
225 unsigned long __flags; \
226 spin_lock_irqsave(&lp->lock, __flags); \
227 __mask = SMC_GET_INT_EN(); \
228 __mask &= ~(x); \
229 SMC_SET_INT_EN(__mask); \
230 spin_unlock_irqrestore(&lp->lock, __flags); \
231 } while (0)
234 * this does a soft reset on the device
236 static void smc911x_reset(struct net_device *dev)
238 unsigned long ioaddr = dev->base_addr;
239 struct smc911x_local *lp = netdev_priv(dev);
240 unsigned int reg, timeout=0, resets=1;
241 unsigned long flags;
243 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
245 /* Take out of PM setting first */
246 if ((SMC_GET_PMT_CTRL() & PMT_CTRL_READY_) == 0) {
247 /* Write to the bytetest will take out of powerdown */
248 SMC_SET_BYTE_TEST(0);
249 timeout=10;
250 do {
251 udelay(10);
252 reg = SMC_GET_PMT_CTRL() & PMT_CTRL_READY_;
253 } while ( timeout-- && !reg);
254 if (timeout == 0) {
255 PRINTK("%s: smc911x_reset timeout waiting for PM restore\n", dev->name);
256 return;
260 /* Disable all interrupts */
261 spin_lock_irqsave(&lp->lock, flags);
262 SMC_SET_INT_EN(0);
263 spin_unlock_irqrestore(&lp->lock, flags);
265 while (resets--) {
266 SMC_SET_HW_CFG(HW_CFG_SRST_);
267 timeout=10;
268 do {
269 udelay(10);
270 reg = SMC_GET_HW_CFG();
271 /* If chip indicates reset timeout then try again */
272 if (reg & HW_CFG_SRST_TO_) {
273 PRINTK("%s: chip reset timeout, retrying...\n", dev->name);
274 resets++;
275 break;
277 } while ( timeout-- && (reg & HW_CFG_SRST_));
279 if (timeout == 0) {
280 PRINTK("%s: smc911x_reset timeout waiting for reset\n", dev->name);
281 return;
284 /* make sure EEPROM has finished loading before setting GPIO_CFG */
285 timeout=1000;
286 while ( timeout-- && (SMC_GET_E2P_CMD() & E2P_CMD_EPC_BUSY_)) {
287 udelay(10);
289 if (timeout == 0){
290 PRINTK("%s: smc911x_reset timeout waiting for EEPROM busy\n", dev->name);
291 return;
294 /* Initialize interrupts */
295 SMC_SET_INT_EN(0);
296 SMC_ACK_INT(-1);
298 /* Reset the FIFO level and flow control settings */
299 SMC_SET_HW_CFG((lp->tx_fifo_kb & 0xF) << 16);
300 //TODO: Figure out what appropriate pause time is
301 SMC_SET_FLOW(FLOW_FCPT_ | FLOW_FCEN_);
302 SMC_SET_AFC_CFG(lp->afc_cfg);
305 /* Set to LED outputs */
306 SMC_SET_GPIO_CFG(0x70070000);
309 * Deassert IRQ for 1*10us for edge type interrupts
310 * and drive IRQ pin push-pull
312 SMC_SET_IRQ_CFG( (1 << 24) | INT_CFG_IRQ_EN_ | INT_CFG_IRQ_TYPE_ );
314 /* clear anything saved */
315 if (lp->pending_tx_skb != NULL) {
316 dev_kfree_skb (lp->pending_tx_skb);
317 lp->pending_tx_skb = NULL;
318 lp->stats.tx_errors++;
319 lp->stats.tx_aborted_errors++;
324 * Enable Interrupts, Receive, and Transmit
326 static void smc911x_enable(struct net_device *dev)
328 unsigned long ioaddr = dev->base_addr;
329 struct smc911x_local *lp = netdev_priv(dev);
330 unsigned mask, cfg, cr;
331 unsigned long flags;
333 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
335 SMC_SET_MAC_ADDR(dev->dev_addr);
337 /* Enable TX */
338 cfg = SMC_GET_HW_CFG();
339 cfg &= HW_CFG_TX_FIF_SZ_ | 0xFFF;
340 cfg |= HW_CFG_SF_;
341 SMC_SET_HW_CFG(cfg);
342 SMC_SET_FIFO_TDA(0xFF);
343 /* Update TX stats on every 64 packets received or every 1 sec */
344 SMC_SET_FIFO_TSL(64);
345 SMC_SET_GPT_CFG(GPT_CFG_TIMER_EN_ | 10000);
347 spin_lock_irqsave(&lp->lock, flags);
348 SMC_GET_MAC_CR(cr);
349 cr |= MAC_CR_TXEN_ | MAC_CR_HBDIS_;
350 SMC_SET_MAC_CR(cr);
351 SMC_SET_TX_CFG(TX_CFG_TX_ON_);
352 spin_unlock_irqrestore(&lp->lock, flags);
354 /* Add 2 byte padding to start of packets */
355 SMC_SET_RX_CFG((2<<8) & RX_CFG_RXDOFF_);
357 /* Turn on receiver and enable RX */
358 if (cr & MAC_CR_RXEN_)
359 DBG(SMC_DEBUG_RX, "%s: Receiver already enabled\n", dev->name);
361 spin_lock_irqsave(&lp->lock, flags);
362 SMC_SET_MAC_CR( cr | MAC_CR_RXEN_ );
363 spin_unlock_irqrestore(&lp->lock, flags);
365 /* Interrupt on every received packet */
366 SMC_SET_FIFO_RSA(0x01);
367 SMC_SET_FIFO_RSL(0x00);
369 /* now, enable interrupts */
370 mask = INT_EN_TDFA_EN_ | INT_EN_TSFL_EN_ | INT_EN_RSFL_EN_ |
371 INT_EN_GPT_INT_EN_ | INT_EN_RXDFH_INT_EN_ | INT_EN_RXE_EN_ |
372 INT_EN_PHY_INT_EN_;
373 if (IS_REV_A(lp->revision))
374 mask|=INT_EN_RDFL_EN_;
375 else {
376 mask|=INT_EN_RDFO_EN_;
378 SMC_ENABLE_INT(mask);
382 * this puts the device in an inactive state
384 static void smc911x_shutdown(struct net_device *dev)
386 unsigned long ioaddr = dev->base_addr;
387 struct smc911x_local *lp = netdev_priv(dev);
388 unsigned cr;
389 unsigned long flags;
391 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", CARDNAME, __FUNCTION__);
393 /* Disable IRQ's */
394 SMC_SET_INT_EN(0);
396 /* Turn of Rx and TX */
397 spin_lock_irqsave(&lp->lock, flags);
398 SMC_GET_MAC_CR(cr);
399 cr &= ~(MAC_CR_TXEN_ | MAC_CR_RXEN_ | MAC_CR_HBDIS_);
400 SMC_SET_MAC_CR(cr);
401 SMC_SET_TX_CFG(TX_CFG_STOP_TX_);
402 spin_unlock_irqrestore(&lp->lock, flags);
405 static inline void smc911x_drop_pkt(struct net_device *dev)
407 unsigned long ioaddr = dev->base_addr;
408 unsigned int fifo_count, timeout, reg;
410 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_RX, "%s: --> %s\n", CARDNAME, __FUNCTION__);
411 fifo_count = SMC_GET_RX_FIFO_INF() & 0xFFFF;
412 if (fifo_count <= 4) {
413 /* Manually dump the packet data */
414 while (fifo_count--)
415 SMC_GET_RX_FIFO();
416 } else {
417 /* Fast forward through the bad packet */
418 SMC_SET_RX_DP_CTRL(RX_DP_CTRL_FFWD_BUSY_);
419 timeout=50;
420 do {
421 udelay(10);
422 reg = SMC_GET_RX_DP_CTRL() & RX_DP_CTRL_FFWD_BUSY_;
423 } while ( timeout-- && reg);
424 if (timeout == 0) {
425 PRINTK("%s: timeout waiting for RX fast forward\n", dev->name);
431 * This is the procedure to handle the receipt of a packet.
432 * It should be called after checking for packet presence in
433 * the RX status FIFO. It must be called with the spin lock
434 * already held.
436 static inline void smc911x_rcv(struct net_device *dev)
438 struct smc911x_local *lp = netdev_priv(dev);
439 unsigned long ioaddr = dev->base_addr;
440 unsigned int pkt_len, status;
441 struct sk_buff *skb;
442 unsigned char *data;
444 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_RX, "%s: --> %s\n",
445 dev->name, __FUNCTION__);
446 status = SMC_GET_RX_STS_FIFO();
447 DBG(SMC_DEBUG_RX, "%s: Rx pkt len %d status 0x%08x \n",
448 dev->name, (status & 0x3fff0000) >> 16, status & 0xc000ffff);
449 pkt_len = (status & RX_STS_PKT_LEN_) >> 16;
450 if (status & RX_STS_ES_) {
451 /* Deal with a bad packet */
452 lp->stats.rx_errors++;
453 if (status & RX_STS_CRC_ERR_)
454 lp->stats.rx_crc_errors++;
455 else {
456 if (status & RX_STS_LEN_ERR_)
457 lp->stats.rx_length_errors++;
458 if (status & RX_STS_MCAST_)
459 lp->stats.multicast++;
461 /* Remove the bad packet data from the RX FIFO */
462 smc911x_drop_pkt(dev);
463 } else {
464 /* Receive a valid packet */
465 /* Alloc a buffer with extra room for DMA alignment */
466 skb=dev_alloc_skb(pkt_len+32);
467 if (unlikely(skb == NULL)) {
468 PRINTK( "%s: Low memory, rcvd packet dropped.\n",
469 dev->name);
470 lp->stats.rx_dropped++;
471 smc911x_drop_pkt(dev);
472 return;
474 /* Align IP header to 32 bits
475 * Note that the device is configured to add a 2
476 * byte padding to the packet start, so we really
477 * want to write to the orignal data pointer */
478 data = skb->data;
479 skb_reserve(skb, 2);
480 skb_put(skb,pkt_len-4);
481 #ifdef SMC_USE_DMA
483 unsigned int fifo;
484 /* Lower the FIFO threshold if possible */
485 fifo = SMC_GET_FIFO_INT();
486 if (fifo & 0xFF) fifo--;
487 DBG(SMC_DEBUG_RX, "%s: Setting RX stat FIFO threshold to %d\n",
488 dev->name, fifo & 0xff);
489 SMC_SET_FIFO_INT(fifo);
490 /* Setup RX DMA */
491 SMC_SET_RX_CFG(RX_CFG_RX_END_ALGN16_ | ((2<<8) & RX_CFG_RXDOFF_));
492 lp->rxdma_active = 1;
493 lp->current_rx_skb = skb;
494 SMC_PULL_DATA(data, (pkt_len+2+15) & ~15);
495 /* Packet processing deferred to DMA RX interrupt */
497 #else
498 SMC_SET_RX_CFG(RX_CFG_RX_END_ALGN4_ | ((2<<8) & RX_CFG_RXDOFF_));
499 SMC_PULL_DATA(data, pkt_len+2+3);
501 DBG(SMC_DEBUG_PKTS, "%s: Received packet\n", dev->name);
502 PRINT_PKT(data, ((pkt_len - 4) <= 64) ? pkt_len - 4 : 64);
503 dev->last_rx = jiffies;
504 skb->protocol = eth_type_trans(skb, dev);
505 netif_rx(skb);
506 lp->stats.rx_packets++;
507 lp->stats.rx_bytes += pkt_len-4;
508 #endif
513 * This is called to actually send a packet to the chip.
515 static void smc911x_hardware_send_pkt(struct net_device *dev)
517 struct smc911x_local *lp = netdev_priv(dev);
518 unsigned long ioaddr = dev->base_addr;
519 struct sk_buff *skb;
520 unsigned int cmdA, cmdB, len;
521 unsigned char *buf;
522 unsigned long flags;
524 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, "%s: --> %s\n", dev->name, __FUNCTION__);
525 BUG_ON(lp->pending_tx_skb == NULL);
527 skb = lp->pending_tx_skb;
528 lp->pending_tx_skb = NULL;
530 /* cmdA {25:24] data alignment [20:16] start offset [10:0] buffer length */
531 /* cmdB {31:16] pkt tag [10:0] length */
532 #ifdef SMC_USE_DMA
533 /* 16 byte buffer alignment mode */
534 buf = (char*)((u32)(skb->data) & ~0xF);
535 len = (skb->len + 0xF + ((u32)skb->data & 0xF)) & ~0xF;
536 cmdA = (1<<24) | (((u32)skb->data & 0xF)<<16) |
537 TX_CMD_A_INT_FIRST_SEG_ | TX_CMD_A_INT_LAST_SEG_ |
538 skb->len;
539 #else
540 buf = (char*)((u32)skb->data & ~0x3);
541 len = (skb->len + 3 + ((u32)skb->data & 3)) & ~0x3;
542 cmdA = (((u32)skb->data & 0x3) << 16) |
543 TX_CMD_A_INT_FIRST_SEG_ | TX_CMD_A_INT_LAST_SEG_ |
544 skb->len;
545 #endif
546 /* tag is packet length so we can use this in stats update later */
547 cmdB = (skb->len << 16) | (skb->len & 0x7FF);
549 DBG(SMC_DEBUG_TX, "%s: TX PKT LENGTH 0x%04x (%d) BUF 0x%p CMDA 0x%08x CMDB 0x%08x\n",
550 dev->name, len, len, buf, cmdA, cmdB);
551 SMC_SET_TX_FIFO(cmdA);
552 SMC_SET_TX_FIFO(cmdB);
554 DBG(SMC_DEBUG_PKTS, "%s: Transmitted packet\n", dev->name);
555 PRINT_PKT(buf, len <= 64 ? len : 64);
557 /* Send pkt via PIO or DMA */
558 #ifdef SMC_USE_DMA
559 lp->current_tx_skb = skb;
560 SMC_PUSH_DATA(buf, len);
561 /* DMA complete IRQ will free buffer and set jiffies */
562 #else
563 SMC_PUSH_DATA(buf, len);
564 dev->trans_start = jiffies;
565 dev_kfree_skb(skb);
566 #endif
567 spin_lock_irqsave(&lp->lock, flags);
568 if (!lp->tx_throttle) {
569 netif_wake_queue(dev);
571 spin_unlock_irqrestore(&lp->lock, flags);
572 SMC_ENABLE_INT(INT_EN_TDFA_EN_ | INT_EN_TSFL_EN_);
576 * Since I am not sure if I will have enough room in the chip's ram
577 * to store the packet, I call this routine which either sends it
578 * now, or set the card to generates an interrupt when ready
579 * for the packet.
581 static int smc911x_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
583 struct smc911x_local *lp = netdev_priv(dev);
584 unsigned long ioaddr = dev->base_addr;
585 unsigned int free;
586 unsigned long flags;
588 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, "%s: --> %s\n",
589 dev->name, __FUNCTION__);
591 BUG_ON(lp->pending_tx_skb != NULL);
593 free = SMC_GET_TX_FIFO_INF() & TX_FIFO_INF_TDFREE_;
594 DBG(SMC_DEBUG_TX, "%s: TX free space %d\n", dev->name, free);
596 /* Turn off the flow when running out of space in FIFO */
597 if (free <= SMC911X_TX_FIFO_LOW_THRESHOLD) {
598 DBG(SMC_DEBUG_TX, "%s: Disabling data flow due to low FIFO space (%d)\n",
599 dev->name, free);
600 spin_lock_irqsave(&lp->lock, flags);
601 /* Reenable when at least 1 packet of size MTU present */
602 SMC_SET_FIFO_TDA((SMC911X_TX_FIFO_LOW_THRESHOLD)/64);
603 lp->tx_throttle = 1;
604 netif_stop_queue(dev);
605 spin_unlock_irqrestore(&lp->lock, flags);
608 /* Drop packets when we run out of space in TX FIFO
609 * Account for overhead required for:
611 * Tx command words 8 bytes
612 * Start offset 15 bytes
613 * End padding 15 bytes
615 if (unlikely(free < (skb->len + 8 + 15 + 15))) {
616 printk("%s: No Tx free space %d < %d\n",
617 dev->name, free, skb->len);
618 lp->pending_tx_skb = NULL;
619 lp->stats.tx_errors++;
620 lp->stats.tx_dropped++;
621 dev_kfree_skb(skb);
622 return 0;
625 #ifdef SMC_USE_DMA
627 /* If the DMA is already running then defer this packet Tx until
628 * the DMA IRQ starts it
630 spin_lock_irqsave(&lp->lock, flags);
631 if (lp->txdma_active) {
632 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, "%s: Tx DMA running, deferring packet\n", dev->name);
633 lp->pending_tx_skb = skb;
634 netif_stop_queue(dev);
635 spin_unlock_irqrestore(&lp->lock, flags);
636 return 0;
637 } else {
638 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, "%s: Activating Tx DMA\n", dev->name);
639 lp->txdma_active = 1;
641 spin_unlock_irqrestore(&lp->lock, flags);
643 #endif
644 lp->pending_tx_skb = skb;
645 smc911x_hardware_send_pkt(dev);
647 return 0;
651 * This handles a TX status interrupt, which is only called when:
652 * - a TX error occurred, or
653 * - TX of a packet completed.
655 static void smc911x_tx(struct net_device *dev)
657 unsigned long ioaddr = dev->base_addr;
658 struct smc911x_local *lp = netdev_priv(dev);
659 unsigned int tx_status;
661 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, "%s: --> %s\n",
662 dev->name, __FUNCTION__);
664 /* Collect the TX status */
665 while (((SMC_GET_TX_FIFO_INF() & TX_FIFO_INF_TSUSED_) >> 16) != 0) {
666 DBG(SMC_DEBUG_TX, "%s: Tx stat FIFO used 0x%04x\n",
667 dev->name,
668 (SMC_GET_TX_FIFO_INF() & TX_FIFO_INF_TSUSED_) >> 16);
669 tx_status = SMC_GET_TX_STS_FIFO();
670 lp->stats.tx_packets++;
671 lp->stats.tx_bytes+=tx_status>>16;
672 DBG(SMC_DEBUG_TX, "%s: Tx FIFO tag 0x%04x status 0x%04x\n",
673 dev->name, (tx_status & 0xffff0000) >> 16,
674 tx_status & 0x0000ffff);
675 /* count Tx errors, but ignore lost carrier errors when in
676 * full-duplex mode */
677 if ((tx_status & TX_STS_ES_) && !(lp->ctl_rfduplx &&
678 !(tx_status & 0x00000306))) {
679 lp->stats.tx_errors++;
681 if (tx_status & TX_STS_MANY_COLL_) {
682 lp->stats.collisions+=16;
683 lp->stats.tx_aborted_errors++;
684 } else {
685 lp->stats.collisions+=(tx_status & TX_STS_COLL_CNT_) >> 3;
687 /* carrier error only has meaning for half-duplex communication */
688 if ((tx_status & (TX_STS_LOC_ | TX_STS_NO_CARR_)) &&
689 !lp->ctl_rfduplx) {
690 lp->stats.tx_carrier_errors++;
692 if (tx_status & TX_STS_LATE_COLL_) {
693 lp->stats.collisions++;
694 lp->stats.tx_aborted_errors++;
700 /*---PHY CONTROL AND CONFIGURATION-----------------------------------------*/
702 * Reads a register from the MII Management serial interface
705 static int smc911x_phy_read(struct net_device *dev, int phyaddr, int phyreg)
707 unsigned long ioaddr = dev->base_addr;
708 unsigned int phydata;
710 SMC_GET_MII(phyreg, phyaddr, phydata);
712 DBG(SMC_DEBUG_MISC, "%s: phyaddr=0x%x, phyreg=0x%02x, phydata=0x%04x\n",
713 __FUNCTION__, phyaddr, phyreg, phydata);
714 return phydata;
719 * Writes a register to the MII Management serial interface
721 static void smc911x_phy_write(struct net_device *dev, int phyaddr, int phyreg,
722 int phydata)
724 unsigned long ioaddr = dev->base_addr;
726 DBG(SMC_DEBUG_MISC, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
727 __FUNCTION__, phyaddr, phyreg, phydata);
729 SMC_SET_MII(phyreg, phyaddr, phydata);
733 * Finds and reports the PHY address (115 and 117 have external
734 * PHY interface 118 has internal only
736 static void smc911x_phy_detect(struct net_device *dev)
738 unsigned long ioaddr = dev->base_addr;
739 struct smc911x_local *lp = netdev_priv(dev);
740 int phyaddr;
741 unsigned int cfg, id1, id2;
743 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
745 lp->phy_type = 0;
748 * Scan all 32 PHY addresses if necessary, starting at
749 * PHY#1 to PHY#31, and then PHY#0 last.
751 switch(lp->version) {
752 case 0x115:
753 case 0x117:
754 cfg = SMC_GET_HW_CFG();
755 if (cfg & HW_CFG_EXT_PHY_DET_) {
756 cfg &= ~HW_CFG_PHY_CLK_SEL_;
757 cfg |= HW_CFG_PHY_CLK_SEL_CLK_DIS_;
758 SMC_SET_HW_CFG(cfg);
759 udelay(10); /* Wait for clocks to stop */
761 cfg |= HW_CFG_EXT_PHY_EN_;
762 SMC_SET_HW_CFG(cfg);
763 udelay(10); /* Wait for clocks to stop */
765 cfg &= ~HW_CFG_PHY_CLK_SEL_;
766 cfg |= HW_CFG_PHY_CLK_SEL_EXT_PHY_;
767 SMC_SET_HW_CFG(cfg);
768 udelay(10); /* Wait for clocks to stop */
770 cfg |= HW_CFG_SMI_SEL_;
771 SMC_SET_HW_CFG(cfg);
773 for (phyaddr = 1; phyaddr < 32; ++phyaddr) {
775 /* Read the PHY identifiers */
776 SMC_GET_PHY_ID1(phyaddr & 31, id1);
777 SMC_GET_PHY_ID2(phyaddr & 31, id2);
779 /* Make sure it is a valid identifier */
780 if (id1 != 0x0000 && id1 != 0xffff &&
781 id1 != 0x8000 && id2 != 0x0000 &&
782 id2 != 0xffff && id2 != 0x8000) {
783 /* Save the PHY's address */
784 lp->mii.phy_id = phyaddr & 31;
785 lp->phy_type = id1 << 16 | id2;
786 break;
790 default:
791 /* Internal media only */
792 SMC_GET_PHY_ID1(1, id1);
793 SMC_GET_PHY_ID2(1, id2);
794 /* Save the PHY's address */
795 lp->mii.phy_id = 1;
796 lp->phy_type = id1 << 16 | id2;
799 DBG(SMC_DEBUG_MISC, "%s: phy_id1=0x%x, phy_id2=0x%x phyaddr=0x%d\n",
800 dev->name, id1, id2, lp->mii.phy_id);
804 * Sets the PHY to a configuration as determined by the user.
805 * Called with spin_lock held.
807 static int smc911x_phy_fixed(struct net_device *dev)
809 struct smc911x_local *lp = netdev_priv(dev);
810 unsigned long ioaddr = dev->base_addr;
811 int phyaddr = lp->mii.phy_id;
812 int bmcr;
814 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
816 /* Enter Link Disable state */
817 SMC_GET_PHY_BMCR(phyaddr, bmcr);
818 bmcr |= BMCR_PDOWN;
819 SMC_SET_PHY_BMCR(phyaddr, bmcr);
822 * Set our fixed capabilities
823 * Disable auto-negotiation
825 bmcr &= ~BMCR_ANENABLE;
826 if (lp->ctl_rfduplx)
827 bmcr |= BMCR_FULLDPLX;
829 if (lp->ctl_rspeed == 100)
830 bmcr |= BMCR_SPEED100;
832 /* Write our capabilities to the phy control register */
833 SMC_SET_PHY_BMCR(phyaddr, bmcr);
835 /* Re-Configure the Receive/Phy Control register */
836 bmcr &= ~BMCR_PDOWN;
837 SMC_SET_PHY_BMCR(phyaddr, bmcr);
839 return 1;
843 * smc911x_phy_reset - reset the phy
844 * @dev: net device
845 * @phy: phy address
847 * Issue a software reset for the specified PHY and
848 * wait up to 100ms for the reset to complete. We should
849 * not access the PHY for 50ms after issuing the reset.
851 * The time to wait appears to be dependent on the PHY.
854 static int smc911x_phy_reset(struct net_device *dev, int phy)
856 struct smc911x_local *lp = netdev_priv(dev);
857 unsigned long ioaddr = dev->base_addr;
858 int timeout;
859 unsigned long flags;
860 unsigned int reg;
862 DBG(SMC_DEBUG_FUNC, "%s: --> %s()\n", dev->name, __FUNCTION__);
864 spin_lock_irqsave(&lp->lock, flags);
865 reg = SMC_GET_PMT_CTRL();
866 reg &= ~0xfffff030;
867 reg |= PMT_CTRL_PHY_RST_;
868 SMC_SET_PMT_CTRL(reg);
869 spin_unlock_irqrestore(&lp->lock, flags);
870 for (timeout = 2; timeout; timeout--) {
871 msleep(50);
872 spin_lock_irqsave(&lp->lock, flags);
873 reg = SMC_GET_PMT_CTRL();
874 spin_unlock_irqrestore(&lp->lock, flags);
875 if (!(reg & PMT_CTRL_PHY_RST_)) {
876 /* extra delay required because the phy may
877 * not be completed with its reset
878 * when PHY_BCR_RESET_ is cleared. 256us
879 * should suffice, but use 500us to be safe
881 udelay(500);
882 break;
886 return reg & PMT_CTRL_PHY_RST_;
890 * smc911x_phy_powerdown - powerdown phy
891 * @dev: net device
892 * @phy: phy address
894 * Power down the specified PHY
896 static void smc911x_phy_powerdown(struct net_device *dev, int phy)
898 unsigned long ioaddr = dev->base_addr;
899 unsigned int bmcr;
901 /* Enter Link Disable state */
902 SMC_GET_PHY_BMCR(phy, bmcr);
903 bmcr |= BMCR_PDOWN;
904 SMC_SET_PHY_BMCR(phy, bmcr);
908 * smc911x_phy_check_media - check the media status and adjust BMCR
909 * @dev: net device
910 * @init: set true for initialisation
912 * Select duplex mode depending on negotiation state. This
913 * also updates our carrier state.
915 static void smc911x_phy_check_media(struct net_device *dev, int init)
917 struct smc911x_local *lp = netdev_priv(dev);
918 unsigned long ioaddr = dev->base_addr;
919 int phyaddr = lp->mii.phy_id;
920 unsigned int bmcr, cr;
922 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
924 if (mii_check_media(&lp->mii, netif_msg_link(lp), init)) {
925 /* duplex state has changed */
926 SMC_GET_PHY_BMCR(phyaddr, bmcr);
927 SMC_GET_MAC_CR(cr);
928 if (lp->mii.full_duplex) {
929 DBG(SMC_DEBUG_MISC, "%s: Configuring for full-duplex mode\n", dev->name);
930 bmcr |= BMCR_FULLDPLX;
931 cr |= MAC_CR_RCVOWN_;
932 } else {
933 DBG(SMC_DEBUG_MISC, "%s: Configuring for half-duplex mode\n", dev->name);
934 bmcr &= ~BMCR_FULLDPLX;
935 cr &= ~MAC_CR_RCVOWN_;
937 SMC_SET_PHY_BMCR(phyaddr, bmcr);
938 SMC_SET_MAC_CR(cr);
943 * Configures the specified PHY through the MII management interface
944 * using Autonegotiation.
945 * Calls smc911x_phy_fixed() if the user has requested a certain config.
946 * If RPC ANEG bit is set, the media selection is dependent purely on
947 * the selection by the MII (either in the MII BMCR reg or the result
948 * of autonegotiation.) If the RPC ANEG bit is cleared, the selection
949 * is controlled by the RPC SPEED and RPC DPLX bits.
951 static void smc911x_phy_configure(struct work_struct *work)
953 struct smc911x_local *lp = container_of(work, struct smc911x_local,
954 phy_configure);
955 struct net_device *dev = lp->netdev;
956 unsigned long ioaddr = dev->base_addr;
957 int phyaddr = lp->mii.phy_id;
958 int my_phy_caps; /* My PHY capabilities */
959 int my_ad_caps; /* My Advertised capabilities */
960 int status;
961 unsigned long flags;
963 DBG(SMC_DEBUG_FUNC, "%s: --> %s()\n", dev->name, __FUNCTION__);
966 * We should not be called if phy_type is zero.
968 if (lp->phy_type == 0)
969 goto smc911x_phy_configure_exit_nolock;
971 if (smc911x_phy_reset(dev, phyaddr)) {
972 printk("%s: PHY reset timed out\n", dev->name);
973 goto smc911x_phy_configure_exit_nolock;
975 spin_lock_irqsave(&lp->lock, flags);
978 * Enable PHY Interrupts (for register 18)
979 * Interrupts listed here are enabled
981 SMC_SET_PHY_INT_MASK(phyaddr, PHY_INT_MASK_ENERGY_ON_ |
982 PHY_INT_MASK_ANEG_COMP_ | PHY_INT_MASK_REMOTE_FAULT_ |
983 PHY_INT_MASK_LINK_DOWN_);
985 /* If the user requested no auto neg, then go set his request */
986 if (lp->mii.force_media) {
987 smc911x_phy_fixed(dev);
988 goto smc911x_phy_configure_exit;
991 /* Copy our capabilities from MII_BMSR to MII_ADVERTISE */
992 SMC_GET_PHY_BMSR(phyaddr, my_phy_caps);
993 if (!(my_phy_caps & BMSR_ANEGCAPABLE)) {
994 printk(KERN_INFO "Auto negotiation NOT supported\n");
995 smc911x_phy_fixed(dev);
996 goto smc911x_phy_configure_exit;
999 /* CSMA capable w/ both pauses */
1000 my_ad_caps = ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
1002 if (my_phy_caps & BMSR_100BASE4)
1003 my_ad_caps |= ADVERTISE_100BASE4;
1004 if (my_phy_caps & BMSR_100FULL)
1005 my_ad_caps |= ADVERTISE_100FULL;
1006 if (my_phy_caps & BMSR_100HALF)
1007 my_ad_caps |= ADVERTISE_100HALF;
1008 if (my_phy_caps & BMSR_10FULL)
1009 my_ad_caps |= ADVERTISE_10FULL;
1010 if (my_phy_caps & BMSR_10HALF)
1011 my_ad_caps |= ADVERTISE_10HALF;
1013 /* Disable capabilities not selected by our user */
1014 if (lp->ctl_rspeed != 100)
1015 my_ad_caps &= ~(ADVERTISE_100BASE4|ADVERTISE_100FULL|ADVERTISE_100HALF);
1017 if (!lp->ctl_rfduplx)
1018 my_ad_caps &= ~(ADVERTISE_100FULL|ADVERTISE_10FULL);
1020 /* Update our Auto-Neg Advertisement Register */
1021 SMC_SET_PHY_MII_ADV(phyaddr, my_ad_caps);
1022 lp->mii.advertising = my_ad_caps;
1025 * Read the register back. Without this, it appears that when
1026 * auto-negotiation is restarted, sometimes it isn't ready and
1027 * the link does not come up.
1029 udelay(10);
1030 SMC_GET_PHY_MII_ADV(phyaddr, status);
1032 DBG(SMC_DEBUG_MISC, "%s: phy caps=0x%04x\n", dev->name, my_phy_caps);
1033 DBG(SMC_DEBUG_MISC, "%s: phy advertised caps=0x%04x\n", dev->name, my_ad_caps);
1035 /* Restart auto-negotiation process in order to advertise my caps */
1036 SMC_SET_PHY_BMCR(phyaddr, BMCR_ANENABLE | BMCR_ANRESTART);
1038 smc911x_phy_check_media(dev, 1);
1040 smc911x_phy_configure_exit:
1041 spin_unlock_irqrestore(&lp->lock, flags);
1042 smc911x_phy_configure_exit_nolock:
1043 lp->work_pending = 0;
1047 * smc911x_phy_interrupt
1049 * Purpose: Handle interrupts relating to PHY register 18. This is
1050 * called from the "hard" interrupt handler under our private spinlock.
1052 static void smc911x_phy_interrupt(struct net_device *dev)
1054 struct smc911x_local *lp = netdev_priv(dev);
1055 unsigned long ioaddr = dev->base_addr;
1056 int phyaddr = lp->mii.phy_id;
1057 int status;
1059 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1061 if (lp->phy_type == 0)
1062 return;
1064 smc911x_phy_check_media(dev, 0);
1065 /* read to clear status bits */
1066 SMC_GET_PHY_INT_SRC(phyaddr,status);
1067 DBG(SMC_DEBUG_MISC, "%s: PHY interrupt status 0x%04x\n",
1068 dev->name, status & 0xffff);
1069 DBG(SMC_DEBUG_MISC, "%s: AFC_CFG 0x%08x\n",
1070 dev->name, SMC_GET_AFC_CFG());
1073 /*--- END PHY CONTROL AND CONFIGURATION-------------------------------------*/
1076 * This is the main routine of the driver, to handle the device when
1077 * it needs some attention.
1079 static irqreturn_t smc911x_interrupt(int irq, void *dev_id)
1081 struct net_device *dev = dev_id;
1082 unsigned long ioaddr = dev->base_addr;
1083 struct smc911x_local *lp = netdev_priv(dev);
1084 unsigned int status, mask, timeout;
1085 unsigned int rx_overrun=0, cr, pkts;
1086 unsigned long flags;
1088 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1090 spin_lock_irqsave(&lp->lock, flags);
1092 /* Spurious interrupt check */
1093 if ((SMC_GET_IRQ_CFG() & (INT_CFG_IRQ_INT_ | INT_CFG_IRQ_EN_)) !=
1094 (INT_CFG_IRQ_INT_ | INT_CFG_IRQ_EN_)) {
1095 spin_unlock_irqrestore(&lp->lock, flags);
1096 return IRQ_NONE;
1099 mask = SMC_GET_INT_EN();
1100 SMC_SET_INT_EN(0);
1102 /* set a timeout value, so I don't stay here forever */
1103 timeout = 8;
1106 do {
1107 status = SMC_GET_INT();
1109 DBG(SMC_DEBUG_MISC, "%s: INT 0x%08x MASK 0x%08x OUTSIDE MASK 0x%08x\n",
1110 dev->name, status, mask, status & ~mask);
1112 status &= mask;
1113 if (!status)
1114 break;
1116 /* Handle SW interrupt condition */
1117 if (status & INT_STS_SW_INT_) {
1118 SMC_ACK_INT(INT_STS_SW_INT_);
1119 mask &= ~INT_EN_SW_INT_EN_;
1121 /* Handle various error conditions */
1122 if (status & INT_STS_RXE_) {
1123 SMC_ACK_INT(INT_STS_RXE_);
1124 lp->stats.rx_errors++;
1126 if (status & INT_STS_RXDFH_INT_) {
1127 SMC_ACK_INT(INT_STS_RXDFH_INT_);
1128 lp->stats.rx_dropped+=SMC_GET_RX_DROP();
1130 /* Undocumented interrupt-what is the right thing to do here? */
1131 if (status & INT_STS_RXDF_INT_) {
1132 SMC_ACK_INT(INT_STS_RXDF_INT_);
1135 /* Rx Data FIFO exceeds set level */
1136 if (status & INT_STS_RDFL_) {
1137 if (IS_REV_A(lp->revision)) {
1138 rx_overrun=1;
1139 SMC_GET_MAC_CR(cr);
1140 cr &= ~MAC_CR_RXEN_;
1141 SMC_SET_MAC_CR(cr);
1142 DBG(SMC_DEBUG_RX, "%s: RX overrun\n", dev->name);
1143 lp->stats.rx_errors++;
1144 lp->stats.rx_fifo_errors++;
1146 SMC_ACK_INT(INT_STS_RDFL_);
1148 if (status & INT_STS_RDFO_) {
1149 if (!IS_REV_A(lp->revision)) {
1150 SMC_GET_MAC_CR(cr);
1151 cr &= ~MAC_CR_RXEN_;
1152 SMC_SET_MAC_CR(cr);
1153 rx_overrun=1;
1154 DBG(SMC_DEBUG_RX, "%s: RX overrun\n", dev->name);
1155 lp->stats.rx_errors++;
1156 lp->stats.rx_fifo_errors++;
1158 SMC_ACK_INT(INT_STS_RDFO_);
1160 /* Handle receive condition */
1161 if ((status & INT_STS_RSFL_) || rx_overrun) {
1162 unsigned int fifo;
1163 DBG(SMC_DEBUG_RX, "%s: RX irq\n", dev->name);
1164 fifo = SMC_GET_RX_FIFO_INF();
1165 pkts = (fifo & RX_FIFO_INF_RXSUSED_) >> 16;
1166 DBG(SMC_DEBUG_RX, "%s: Rx FIFO pkts %d, bytes %d\n",
1167 dev->name, pkts, fifo & 0xFFFF );
1168 if (pkts != 0) {
1169 #ifdef SMC_USE_DMA
1170 unsigned int fifo;
1171 if (lp->rxdma_active){
1172 DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA,
1173 "%s: RX DMA active\n", dev->name);
1174 /* The DMA is already running so up the IRQ threshold */
1175 fifo = SMC_GET_FIFO_INT() & ~0xFF;
1176 fifo |= pkts & 0xFF;
1177 DBG(SMC_DEBUG_RX,
1178 "%s: Setting RX stat FIFO threshold to %d\n",
1179 dev->name, fifo & 0xff);
1180 SMC_SET_FIFO_INT(fifo);
1181 } else
1182 #endif
1183 smc911x_rcv(dev);
1185 SMC_ACK_INT(INT_STS_RSFL_);
1187 /* Handle transmit FIFO available */
1188 if (status & INT_STS_TDFA_) {
1189 DBG(SMC_DEBUG_TX, "%s: TX data FIFO space available irq\n", dev->name);
1190 SMC_SET_FIFO_TDA(0xFF);
1191 lp->tx_throttle = 0;
1192 #ifdef SMC_USE_DMA
1193 if (!lp->txdma_active)
1194 #endif
1195 netif_wake_queue(dev);
1196 SMC_ACK_INT(INT_STS_TDFA_);
1198 /* Handle transmit done condition */
1199 #if 1
1200 if (status & (INT_STS_TSFL_ | INT_STS_GPT_INT_)) {
1201 DBG(SMC_DEBUG_TX | SMC_DEBUG_MISC,
1202 "%s: Tx stat FIFO limit (%d) /GPT irq\n",
1203 dev->name, (SMC_GET_FIFO_INT() & 0x00ff0000) >> 16);
1204 smc911x_tx(dev);
1205 SMC_SET_GPT_CFG(GPT_CFG_TIMER_EN_ | 10000);
1206 SMC_ACK_INT(INT_STS_TSFL_);
1207 SMC_ACK_INT(INT_STS_TSFL_ | INT_STS_GPT_INT_);
1209 #else
1210 if (status & INT_STS_TSFL_) {
1211 DBG(SMC_DEBUG_TX, "%s: TX status FIFO limit (%d) irq \n", dev->name, );
1212 smc911x_tx(dev);
1213 SMC_ACK_INT(INT_STS_TSFL_);
1216 if (status & INT_STS_GPT_INT_) {
1217 DBG(SMC_DEBUG_RX, "%s: IRQ_CFG 0x%08x FIFO_INT 0x%08x RX_CFG 0x%08x\n",
1218 dev->name,
1219 SMC_GET_IRQ_CFG(),
1220 SMC_GET_FIFO_INT(),
1221 SMC_GET_RX_CFG());
1222 DBG(SMC_DEBUG_RX, "%s: Rx Stat FIFO Used 0x%02x "
1223 "Data FIFO Used 0x%04x Stat FIFO 0x%08x\n",
1224 dev->name,
1225 (SMC_GET_RX_FIFO_INF() & 0x00ff0000) >> 16,
1226 SMC_GET_RX_FIFO_INF() & 0xffff,
1227 SMC_GET_RX_STS_FIFO_PEEK());
1228 SMC_SET_GPT_CFG(GPT_CFG_TIMER_EN_ | 10000);
1229 SMC_ACK_INT(INT_STS_GPT_INT_);
1231 #endif
1233 /* Handle PHY interupt condition */
1234 if (status & INT_STS_PHY_INT_) {
1235 DBG(SMC_DEBUG_MISC, "%s: PHY irq\n", dev->name);
1236 smc911x_phy_interrupt(dev);
1237 SMC_ACK_INT(INT_STS_PHY_INT_);
1239 } while (--timeout);
1241 /* restore mask state */
1242 SMC_SET_INT_EN(mask);
1244 DBG(SMC_DEBUG_MISC, "%s: Interrupt done (%d loops)\n",
1245 dev->name, 8-timeout);
1247 spin_unlock_irqrestore(&lp->lock, flags);
1249 DBG(3, "%s: Interrupt done (%d loops)\n", dev->name, 8-timeout);
1251 return IRQ_HANDLED;
1254 #ifdef SMC_USE_DMA
1255 static void
1256 smc911x_tx_dma_irq(int dma, void *data)
1258 struct net_device *dev = (struct net_device *)data;
1259 struct smc911x_local *lp = netdev_priv(dev);
1260 struct sk_buff *skb = lp->current_tx_skb;
1261 unsigned long flags;
1263 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1265 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, "%s: TX DMA irq handler\n", dev->name);
1266 /* Clear the DMA interrupt sources */
1267 SMC_DMA_ACK_IRQ(dev, dma);
1268 BUG_ON(skb == NULL);
1269 dma_unmap_single(NULL, tx_dmabuf, tx_dmalen, DMA_TO_DEVICE);
1270 dev->trans_start = jiffies;
1271 dev_kfree_skb_irq(skb);
1272 lp->current_tx_skb = NULL;
1273 if (lp->pending_tx_skb != NULL)
1274 smc911x_hardware_send_pkt(dev);
1275 else {
1276 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA,
1277 "%s: No pending Tx packets. DMA disabled\n", dev->name);
1278 spin_lock_irqsave(&lp->lock, flags);
1279 lp->txdma_active = 0;
1280 if (!lp->tx_throttle) {
1281 netif_wake_queue(dev);
1283 spin_unlock_irqrestore(&lp->lock, flags);
1286 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA,
1287 "%s: TX DMA irq completed\n", dev->name);
1289 static void
1290 smc911x_rx_dma_irq(int dma, void *data)
1292 struct net_device *dev = (struct net_device *)data;
1293 unsigned long ioaddr = dev->base_addr;
1294 struct smc911x_local *lp = netdev_priv(dev);
1295 struct sk_buff *skb = lp->current_rx_skb;
1296 unsigned long flags;
1297 unsigned int pkts;
1299 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1300 DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA, "%s: RX DMA irq handler\n", dev->name);
1301 /* Clear the DMA interrupt sources */
1302 SMC_DMA_ACK_IRQ(dev, dma);
1303 dma_unmap_single(NULL, rx_dmabuf, rx_dmalen, DMA_FROM_DEVICE);
1304 BUG_ON(skb == NULL);
1305 lp->current_rx_skb = NULL;
1306 PRINT_PKT(skb->data, skb->len);
1307 dev->last_rx = jiffies;
1308 skb->protocol = eth_type_trans(skb, dev);
1309 netif_rx(skb);
1310 lp->stats.rx_packets++;
1311 lp->stats.rx_bytes += skb->len;
1313 spin_lock_irqsave(&lp->lock, flags);
1314 pkts = (SMC_GET_RX_FIFO_INF() & RX_FIFO_INF_RXSUSED_) >> 16;
1315 if (pkts != 0) {
1316 smc911x_rcv(dev);
1317 }else {
1318 lp->rxdma_active = 0;
1320 spin_unlock_irqrestore(&lp->lock, flags);
1321 DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA,
1322 "%s: RX DMA irq completed. DMA RX FIFO PKTS %d\n",
1323 dev->name, pkts);
1325 #endif /* SMC_USE_DMA */
1327 #ifdef CONFIG_NET_POLL_CONTROLLER
1329 * Polling receive - used by netconsole and other diagnostic tools
1330 * to allow network i/o with interrupts disabled.
1332 static void smc911x_poll_controller(struct net_device *dev)
1334 disable_irq(dev->irq);
1335 smc911x_interrupt(dev->irq, dev);
1336 enable_irq(dev->irq);
1338 #endif
1340 /* Our watchdog timed out. Called by the networking layer */
1341 static void smc911x_timeout(struct net_device *dev)
1343 struct smc911x_local *lp = netdev_priv(dev);
1344 unsigned long ioaddr = dev->base_addr;
1345 int status, mask;
1346 unsigned long flags;
1348 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1350 spin_lock_irqsave(&lp->lock, flags);
1351 status = SMC_GET_INT();
1352 mask = SMC_GET_INT_EN();
1353 spin_unlock_irqrestore(&lp->lock, flags);
1354 DBG(SMC_DEBUG_MISC, "%s: INT 0x%02x MASK 0x%02x \n",
1355 dev->name, status, mask);
1357 /* Dump the current TX FIFO contents and restart */
1358 mask = SMC_GET_TX_CFG();
1359 SMC_SET_TX_CFG(mask | TX_CFG_TXS_DUMP_ | TX_CFG_TXD_DUMP_);
1361 * Reconfiguring the PHY doesn't seem like a bad idea here, but
1362 * smc911x_phy_configure() calls msleep() which calls schedule_timeout()
1363 * which calls schedule(). Hence we use a work queue.
1365 if (lp->phy_type != 0) {
1366 if (schedule_work(&lp->phy_configure)) {
1367 lp->work_pending = 1;
1371 /* We can accept TX packets again */
1372 dev->trans_start = jiffies;
1373 netif_wake_queue(dev);
1377 * This routine will, depending on the values passed to it,
1378 * either make it accept multicast packets, go into
1379 * promiscuous mode (for TCPDUMP and cousins) or accept
1380 * a select set of multicast packets
1382 static void smc911x_set_multicast_list(struct net_device *dev)
1384 struct smc911x_local *lp = netdev_priv(dev);
1385 unsigned long ioaddr = dev->base_addr;
1386 unsigned int multicast_table[2];
1387 unsigned int mcr, update_multicast = 0;
1388 unsigned long flags;
1389 /* table for flipping the order of 5 bits */
1390 static const unsigned char invert5[] =
1391 {0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0C, 0x1C,
1392 0x02, 0x12, 0x0A, 0x1A, 0x06, 0x16, 0x0E, 0x1E,
1393 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0D, 0x1D,
1394 0x03, 0x13, 0x0B, 0x1B, 0x07, 0x17, 0x0F, 0x1F};
1397 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1399 spin_lock_irqsave(&lp->lock, flags);
1400 SMC_GET_MAC_CR(mcr);
1401 spin_unlock_irqrestore(&lp->lock, flags);
1403 if (dev->flags & IFF_PROMISC) {
1405 DBG(SMC_DEBUG_MISC, "%s: RCR_PRMS\n", dev->name);
1406 mcr |= MAC_CR_PRMS_;
1409 * Here, I am setting this to accept all multicast packets.
1410 * I don't need to zero the multicast table, because the flag is
1411 * checked before the table is
1413 else if (dev->flags & IFF_ALLMULTI || dev->mc_count > 16) {
1414 DBG(SMC_DEBUG_MISC, "%s: RCR_ALMUL\n", dev->name);
1415 mcr |= MAC_CR_MCPAS_;
1419 * This sets the internal hardware table to filter out unwanted
1420 * multicast packets before they take up memory.
1422 * The SMC chip uses a hash table where the high 6 bits of the CRC of
1423 * address are the offset into the table. If that bit is 1, then the
1424 * multicast packet is accepted. Otherwise, it's dropped silently.
1426 * To use the 6 bits as an offset into the table, the high 1 bit is
1427 * the number of the 32 bit register, while the low 5 bits are the bit
1428 * within that register.
1430 else if (dev->mc_count) {
1431 int i;
1432 struct dev_mc_list *cur_addr;
1434 /* Set the Hash perfec mode */
1435 mcr |= MAC_CR_HPFILT_;
1437 /* start with a table of all zeros: reject all */
1438 memset(multicast_table, 0, sizeof(multicast_table));
1440 cur_addr = dev->mc_list;
1441 for (i = 0; i < dev->mc_count; i++, cur_addr = cur_addr->next) {
1442 int position;
1444 /* do we have a pointer here? */
1445 if (!cur_addr)
1446 break;
1447 /* make sure this is a multicast address -
1448 shouldn't this be a given if we have it here ? */
1449 if (!(*cur_addr->dmi_addr & 1))
1450 continue;
1452 /* only use the low order bits */
1453 position = crc32_le(~0, cur_addr->dmi_addr, 6) & 0x3f;
1455 /* do some messy swapping to put the bit in the right spot */
1456 multicast_table[invert5[position&0x1F]&0x1] |=
1457 (1<<invert5[(position>>1)&0x1F]);
1460 /* be sure I get rid of flags I might have set */
1461 mcr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_);
1463 /* now, the table can be loaded into the chipset */
1464 update_multicast = 1;
1465 } else {
1466 DBG(SMC_DEBUG_MISC, "%s: ~(MAC_CR_PRMS_|MAC_CR_MCPAS_)\n",
1467 dev->name);
1468 mcr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_);
1471 * since I'm disabling all multicast entirely, I need to
1472 * clear the multicast list
1474 memset(multicast_table, 0, sizeof(multicast_table));
1475 update_multicast = 1;
1478 spin_lock_irqsave(&lp->lock, flags);
1479 SMC_SET_MAC_CR(mcr);
1480 if (update_multicast) {
1481 DBG(SMC_DEBUG_MISC,
1482 "%s: update mcast hash table 0x%08x 0x%08x\n",
1483 dev->name, multicast_table[0], multicast_table[1]);
1484 SMC_SET_HASHL(multicast_table[0]);
1485 SMC_SET_HASHH(multicast_table[1]);
1487 spin_unlock_irqrestore(&lp->lock, flags);
1492 * Open and Initialize the board
1494 * Set up everything, reset the card, etc..
1496 static int
1497 smc911x_open(struct net_device *dev)
1499 struct smc911x_local *lp = netdev_priv(dev);
1501 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1504 * Check that the address is valid. If its not, refuse
1505 * to bring the device up. The user must specify an
1506 * address using ifconfig eth0 hw ether xx:xx:xx:xx:xx:xx
1508 if (!is_valid_ether_addr(dev->dev_addr)) {
1509 PRINTK("%s: no valid ethernet hw addr\n", __FUNCTION__);
1510 return -EINVAL;
1513 /* reset the hardware */
1514 smc911x_reset(dev);
1516 /* Configure the PHY, initialize the link state */
1517 smc911x_phy_configure(&lp->phy_configure);
1519 /* Turn on Tx + Rx */
1520 smc911x_enable(dev);
1522 netif_start_queue(dev);
1524 return 0;
1528 * smc911x_close
1530 * this makes the board clean up everything that it can
1531 * and not talk to the outside world. Caused by
1532 * an 'ifconfig ethX down'
1534 static int smc911x_close(struct net_device *dev)
1536 struct smc911x_local *lp = netdev_priv(dev);
1538 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1540 netif_stop_queue(dev);
1541 netif_carrier_off(dev);
1543 /* clear everything */
1544 smc911x_shutdown(dev);
1546 if (lp->phy_type != 0) {
1547 /* We need to ensure that no calls to
1548 * smc911x_phy_configure are pending.
1550 * flush_scheduled_work() cannot be called because we
1551 * are running with the netlink semaphore held (from
1552 * devinet_ioctl()) and the pending work queue
1553 * contains linkwatch_event() (scheduled by
1554 * netif_carrier_off() above). linkwatch_event() also
1555 * wants the netlink semaphore.
1557 while (lp->work_pending)
1558 schedule();
1559 smc911x_phy_powerdown(dev, lp->mii.phy_id);
1562 if (lp->pending_tx_skb) {
1563 dev_kfree_skb(lp->pending_tx_skb);
1564 lp->pending_tx_skb = NULL;
1567 return 0;
1571 * Get the current statistics.
1572 * This may be called with the card open or closed.
1574 static struct net_device_stats *smc911x_query_statistics(struct net_device *dev)
1576 struct smc911x_local *lp = netdev_priv(dev);
1577 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1580 return &lp->stats;
1584 * Ethtool support
1586 static int
1587 smc911x_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1589 struct smc911x_local *lp = netdev_priv(dev);
1590 unsigned long ioaddr = dev->base_addr;
1591 int ret, status;
1592 unsigned long flags;
1594 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1595 cmd->maxtxpkt = 1;
1596 cmd->maxrxpkt = 1;
1598 if (lp->phy_type != 0) {
1599 spin_lock_irqsave(&lp->lock, flags);
1600 ret = mii_ethtool_gset(&lp->mii, cmd);
1601 spin_unlock_irqrestore(&lp->lock, flags);
1602 } else {
1603 cmd->supported = SUPPORTED_10baseT_Half |
1604 SUPPORTED_10baseT_Full |
1605 SUPPORTED_TP | SUPPORTED_AUI;
1607 if (lp->ctl_rspeed == 10)
1608 cmd->speed = SPEED_10;
1609 else if (lp->ctl_rspeed == 100)
1610 cmd->speed = SPEED_100;
1612 cmd->autoneg = AUTONEG_DISABLE;
1613 if (lp->mii.phy_id==1)
1614 cmd->transceiver = XCVR_INTERNAL;
1615 else
1616 cmd->transceiver = XCVR_EXTERNAL;
1617 cmd->port = 0;
1618 SMC_GET_PHY_SPECIAL(lp->mii.phy_id, status);
1619 cmd->duplex =
1620 (status & (PHY_SPECIAL_SPD_10FULL_ | PHY_SPECIAL_SPD_100FULL_)) ?
1621 DUPLEX_FULL : DUPLEX_HALF;
1622 ret = 0;
1625 return ret;
1628 static int
1629 smc911x_ethtool_setsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1631 struct smc911x_local *lp = netdev_priv(dev);
1632 int ret;
1633 unsigned long flags;
1635 if (lp->phy_type != 0) {
1636 spin_lock_irqsave(&lp->lock, flags);
1637 ret = mii_ethtool_sset(&lp->mii, cmd);
1638 spin_unlock_irqrestore(&lp->lock, flags);
1639 } else {
1640 if (cmd->autoneg != AUTONEG_DISABLE ||
1641 cmd->speed != SPEED_10 ||
1642 (cmd->duplex != DUPLEX_HALF && cmd->duplex != DUPLEX_FULL) ||
1643 (cmd->port != PORT_TP && cmd->port != PORT_AUI))
1644 return -EINVAL;
1646 lp->ctl_rfduplx = cmd->duplex == DUPLEX_FULL;
1648 ret = 0;
1651 return ret;
1654 static void
1655 smc911x_ethtool_getdrvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1657 strncpy(info->driver, CARDNAME, sizeof(info->driver));
1658 strncpy(info->version, version, sizeof(info->version));
1659 strncpy(info->bus_info, dev->dev.parent->bus_id, sizeof(info->bus_info));
1662 static int smc911x_ethtool_nwayreset(struct net_device *dev)
1664 struct smc911x_local *lp = netdev_priv(dev);
1665 int ret = -EINVAL;
1666 unsigned long flags;
1668 if (lp->phy_type != 0) {
1669 spin_lock_irqsave(&lp->lock, flags);
1670 ret = mii_nway_restart(&lp->mii);
1671 spin_unlock_irqrestore(&lp->lock, flags);
1674 return ret;
1677 static u32 smc911x_ethtool_getmsglevel(struct net_device *dev)
1679 struct smc911x_local *lp = netdev_priv(dev);
1680 return lp->msg_enable;
1683 static void smc911x_ethtool_setmsglevel(struct net_device *dev, u32 level)
1685 struct smc911x_local *lp = netdev_priv(dev);
1686 lp->msg_enable = level;
1689 static int smc911x_ethtool_getregslen(struct net_device *dev)
1691 /* System regs + MAC regs + PHY regs */
1692 return (((E2P_CMD - ID_REV)/4 + 1) +
1693 (WUCSR - MAC_CR)+1 + 32) * sizeof(u32);
1696 static void smc911x_ethtool_getregs(struct net_device *dev,
1697 struct ethtool_regs* regs, void *buf)
1699 unsigned long ioaddr = dev->base_addr;
1700 struct smc911x_local *lp = netdev_priv(dev);
1701 unsigned long flags;
1702 u32 reg,i,j=0;
1703 u32 *data = (u32*)buf;
1705 regs->version = lp->version;
1706 for(i=ID_REV;i<=E2P_CMD;i+=4) {
1707 data[j++] = SMC_inl(ioaddr,i);
1709 for(i=MAC_CR;i<=WUCSR;i++) {
1710 spin_lock_irqsave(&lp->lock, flags);
1711 SMC_GET_MAC_CSR(i, reg);
1712 spin_unlock_irqrestore(&lp->lock, flags);
1713 data[j++] = reg;
1715 for(i=0;i<=31;i++) {
1716 spin_lock_irqsave(&lp->lock, flags);
1717 SMC_GET_MII(i, lp->mii.phy_id, reg);
1718 spin_unlock_irqrestore(&lp->lock, flags);
1719 data[j++] = reg & 0xFFFF;
1723 static int smc911x_ethtool_wait_eeprom_ready(struct net_device *dev)
1725 unsigned long ioaddr = dev->base_addr;
1726 unsigned int timeout;
1727 int e2p_cmd;
1729 e2p_cmd = SMC_GET_E2P_CMD();
1730 for(timeout=10;(e2p_cmd & E2P_CMD_EPC_BUSY_) && timeout; timeout--) {
1731 if (e2p_cmd & E2P_CMD_EPC_TIMEOUT_) {
1732 PRINTK("%s: %s timeout waiting for EEPROM to respond\n",
1733 dev->name, __FUNCTION__);
1734 return -EFAULT;
1736 mdelay(1);
1737 e2p_cmd = SMC_GET_E2P_CMD();
1739 if (timeout == 0) {
1740 PRINTK("%s: %s timeout waiting for EEPROM CMD not busy\n",
1741 dev->name, __FUNCTION__);
1742 return -ETIMEDOUT;
1744 return 0;
1747 static inline int smc911x_ethtool_write_eeprom_cmd(struct net_device *dev,
1748 int cmd, int addr)
1750 unsigned long ioaddr = dev->base_addr;
1751 int ret;
1753 if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
1754 return ret;
1755 SMC_SET_E2P_CMD(E2P_CMD_EPC_BUSY_ |
1756 ((cmd) & (0x7<<28)) |
1757 ((addr) & 0xFF));
1758 return 0;
1761 static inline int smc911x_ethtool_read_eeprom_byte(struct net_device *dev,
1762 u8 *data)
1764 unsigned long ioaddr = dev->base_addr;
1765 int ret;
1767 if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
1768 return ret;
1769 *data = SMC_GET_E2P_DATA();
1770 return 0;
1773 static inline int smc911x_ethtool_write_eeprom_byte(struct net_device *dev,
1774 u8 data)
1776 unsigned long ioaddr = dev->base_addr;
1777 int ret;
1779 if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
1780 return ret;
1781 SMC_SET_E2P_DATA(data);
1782 return 0;
1785 static int smc911x_ethtool_geteeprom(struct net_device *dev,
1786 struct ethtool_eeprom *eeprom, u8 *data)
1788 u8 eebuf[SMC911X_EEPROM_LEN];
1789 int i, ret;
1791 for(i=0;i<SMC911X_EEPROM_LEN;i++) {
1792 if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_READ_, i ))!=0)
1793 return ret;
1794 if ((ret=smc911x_ethtool_read_eeprom_byte(dev, &eebuf[i]))!=0)
1795 return ret;
1797 memcpy(data, eebuf+eeprom->offset, eeprom->len);
1798 return 0;
1801 static int smc911x_ethtool_seteeprom(struct net_device *dev,
1802 struct ethtool_eeprom *eeprom, u8 *data)
1804 int i, ret;
1806 /* Enable erase */
1807 if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_EWEN_, 0 ))!=0)
1808 return ret;
1809 for(i=eeprom->offset;i<(eeprom->offset+eeprom->len);i++) {
1810 /* erase byte */
1811 if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_ERASE_, i ))!=0)
1812 return ret;
1813 /* write byte */
1814 if ((ret=smc911x_ethtool_write_eeprom_byte(dev, *data))!=0)
1815 return ret;
1816 if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_WRITE_, i ))!=0)
1817 return ret;
1819 return 0;
1822 static int smc911x_ethtool_geteeprom_len(struct net_device *dev)
1824 return SMC911X_EEPROM_LEN;
1827 static const struct ethtool_ops smc911x_ethtool_ops = {
1828 .get_settings = smc911x_ethtool_getsettings,
1829 .set_settings = smc911x_ethtool_setsettings,
1830 .get_drvinfo = smc911x_ethtool_getdrvinfo,
1831 .get_msglevel = smc911x_ethtool_getmsglevel,
1832 .set_msglevel = smc911x_ethtool_setmsglevel,
1833 .nway_reset = smc911x_ethtool_nwayreset,
1834 .get_link = ethtool_op_get_link,
1835 .get_regs_len = smc911x_ethtool_getregslen,
1836 .get_regs = smc911x_ethtool_getregs,
1837 .get_eeprom_len = smc911x_ethtool_geteeprom_len,
1838 .get_eeprom = smc911x_ethtool_geteeprom,
1839 .set_eeprom = smc911x_ethtool_seteeprom,
1843 * smc911x_findirq
1845 * This routine has a simple purpose -- make the SMC chip generate an
1846 * interrupt, so an auto-detect routine can detect it, and find the IRQ,
1848 static int __init smc911x_findirq(unsigned long ioaddr)
1850 int timeout = 20;
1851 unsigned long cookie;
1853 DBG(SMC_DEBUG_FUNC, "--> %s\n", __FUNCTION__);
1855 cookie = probe_irq_on();
1858 * Force a SW interrupt
1861 SMC_SET_INT_EN(INT_EN_SW_INT_EN_);
1864 * Wait until positive that the interrupt has been generated
1866 do {
1867 int int_status;
1868 udelay(10);
1869 int_status = SMC_GET_INT_EN();
1870 if (int_status & INT_EN_SW_INT_EN_)
1871 break; /* got the interrupt */
1872 } while (--timeout);
1875 * there is really nothing that I can do here if timeout fails,
1876 * as autoirq_report will return a 0 anyway, which is what I
1877 * want in this case. Plus, the clean up is needed in both
1878 * cases.
1881 /* and disable all interrupts again */
1882 SMC_SET_INT_EN(0);
1884 /* and return what I found */
1885 return probe_irq_off(cookie);
1889 * Function: smc911x_probe(unsigned long ioaddr)
1891 * Purpose:
1892 * Tests to see if a given ioaddr points to an SMC911x chip.
1893 * Returns a 0 on success
1895 * Algorithm:
1896 * (1) see if the endian word is OK
1897 * (1) see if I recognize the chip ID in the appropriate register
1899 * Here I do typical initialization tasks.
1901 * o Initialize the structure if needed
1902 * o print out my vanity message if not done so already
1903 * o print out what type of hardware is detected
1904 * o print out the ethernet address
1905 * o find the IRQ
1906 * o set up my private data
1907 * o configure the dev structure with my subroutines
1908 * o actually GRAB the irq.
1909 * o GRAB the region
1911 static int __init smc911x_probe(struct net_device *dev, unsigned long ioaddr)
1913 struct smc911x_local *lp = netdev_priv(dev);
1914 int i, retval;
1915 unsigned int val, chip_id, revision;
1916 const char *version_string;
1918 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1920 /* First, see if the endian word is recognized */
1921 val = SMC_GET_BYTE_TEST();
1922 DBG(SMC_DEBUG_MISC, "%s: endian probe returned 0x%04x\n", CARDNAME, val);
1923 if (val != 0x87654321) {
1924 printk(KERN_ERR "Invalid chip endian 0x08%x\n",val);
1925 retval = -ENODEV;
1926 goto err_out;
1930 * check if the revision register is something that I
1931 * recognize. These might need to be added to later,
1932 * as future revisions could be added.
1934 chip_id = SMC_GET_PN();
1935 DBG(SMC_DEBUG_MISC, "%s: id probe returned 0x%04x\n", CARDNAME, chip_id);
1936 for(i=0;chip_ids[i].id != 0; i++) {
1937 if (chip_ids[i].id == chip_id) break;
1939 if (!chip_ids[i].id) {
1940 printk(KERN_ERR "Unknown chip ID %04x\n", chip_id);
1941 retval = -ENODEV;
1942 goto err_out;
1944 version_string = chip_ids[i].name;
1946 revision = SMC_GET_REV();
1947 DBG(SMC_DEBUG_MISC, "%s: revision = 0x%04x\n", CARDNAME, revision);
1949 /* At this point I'll assume that the chip is an SMC911x. */
1950 DBG(SMC_DEBUG_MISC, "%s: Found a %s\n", CARDNAME, chip_ids[i].name);
1952 /* Validate the TX FIFO size requested */
1953 if ((tx_fifo_kb < 2) || (tx_fifo_kb > 14)) {
1954 printk(KERN_ERR "Invalid TX FIFO size requested %d\n", tx_fifo_kb);
1955 retval = -EINVAL;
1956 goto err_out;
1959 /* fill in some of the fields */
1960 dev->base_addr = ioaddr;
1961 lp->version = chip_ids[i].id;
1962 lp->revision = revision;
1963 lp->tx_fifo_kb = tx_fifo_kb;
1964 /* Reverse calculate the RX FIFO size from the TX */
1965 lp->tx_fifo_size=(lp->tx_fifo_kb<<10) - 512;
1966 lp->rx_fifo_size= ((0x4000 - 512 - lp->tx_fifo_size) / 16) * 15;
1968 /* Set the automatic flow control values */
1969 switch(lp->tx_fifo_kb) {
1971 * AFC_HI is about ((Rx Data Fifo Size)*2/3)/64
1972 * AFC_LO is AFC_HI/2
1973 * BACK_DUR is about 5uS*(AFC_LO) rounded down
1975 case 2:/* 13440 Rx Data Fifo Size */
1976 lp->afc_cfg=0x008C46AF;break;
1977 case 3:/* 12480 Rx Data Fifo Size */
1978 lp->afc_cfg=0x0082419F;break;
1979 case 4:/* 11520 Rx Data Fifo Size */
1980 lp->afc_cfg=0x00783C9F;break;
1981 case 5:/* 10560 Rx Data Fifo Size */
1982 lp->afc_cfg=0x006E374F;break;
1983 case 6:/* 9600 Rx Data Fifo Size */
1984 lp->afc_cfg=0x0064328F;break;
1985 case 7:/* 8640 Rx Data Fifo Size */
1986 lp->afc_cfg=0x005A2D7F;break;
1987 case 8:/* 7680 Rx Data Fifo Size */
1988 lp->afc_cfg=0x0050287F;break;
1989 case 9:/* 6720 Rx Data Fifo Size */
1990 lp->afc_cfg=0x0046236F;break;
1991 case 10:/* 5760 Rx Data Fifo Size */
1992 lp->afc_cfg=0x003C1E6F;break;
1993 case 11:/* 4800 Rx Data Fifo Size */
1994 lp->afc_cfg=0x0032195F;break;
1996 * AFC_HI is ~1520 bytes less than RX Data Fifo Size
1997 * AFC_LO is AFC_HI/2
1998 * BACK_DUR is about 5uS*(AFC_LO) rounded down
2000 case 12:/* 3840 Rx Data Fifo Size */
2001 lp->afc_cfg=0x0024124F;break;
2002 case 13:/* 2880 Rx Data Fifo Size */
2003 lp->afc_cfg=0x0015073F;break;
2004 case 14:/* 1920 Rx Data Fifo Size */
2005 lp->afc_cfg=0x0006032F;break;
2006 default:
2007 PRINTK("%s: ERROR -- no AFC_CFG setting found",
2008 dev->name);
2009 break;
2012 DBG(SMC_DEBUG_MISC | SMC_DEBUG_TX | SMC_DEBUG_RX,
2013 "%s: tx_fifo %d rx_fifo %d afc_cfg 0x%08x\n", CARDNAME,
2014 lp->tx_fifo_size, lp->rx_fifo_size, lp->afc_cfg);
2016 spin_lock_init(&lp->lock);
2018 /* Get the MAC address */
2019 SMC_GET_MAC_ADDR(dev->dev_addr);
2021 /* now, reset the chip, and put it into a known state */
2022 smc911x_reset(dev);
2025 * If dev->irq is 0, then the device has to be banged on to see
2026 * what the IRQ is.
2028 * Specifying an IRQ is done with the assumption that the user knows
2029 * what (s)he is doing. No checking is done!!!!
2031 if (dev->irq < 1) {
2032 int trials;
2034 trials = 3;
2035 while (trials--) {
2036 dev->irq = smc911x_findirq(ioaddr);
2037 if (dev->irq)
2038 break;
2039 /* kick the card and try again */
2040 smc911x_reset(dev);
2043 if (dev->irq == 0) {
2044 printk("%s: Couldn't autodetect your IRQ. Use irq=xx.\n",
2045 dev->name);
2046 retval = -ENODEV;
2047 goto err_out;
2049 dev->irq = irq_canonicalize(dev->irq);
2051 /* Fill in the fields of the device structure with ethernet values. */
2052 ether_setup(dev);
2054 dev->open = smc911x_open;
2055 dev->stop = smc911x_close;
2056 dev->hard_start_xmit = smc911x_hard_start_xmit;
2057 dev->tx_timeout = smc911x_timeout;
2058 dev->watchdog_timeo = msecs_to_jiffies(watchdog);
2059 dev->get_stats = smc911x_query_statistics;
2060 dev->set_multicast_list = smc911x_set_multicast_list;
2061 dev->ethtool_ops = &smc911x_ethtool_ops;
2062 #ifdef CONFIG_NET_POLL_CONTROLLER
2063 dev->poll_controller = smc911x_poll_controller;
2064 #endif
2066 INIT_WORK(&lp->phy_configure, smc911x_phy_configure);
2067 lp->mii.phy_id_mask = 0x1f;
2068 lp->mii.reg_num_mask = 0x1f;
2069 lp->mii.force_media = 0;
2070 lp->mii.full_duplex = 0;
2071 lp->mii.dev = dev;
2072 lp->mii.mdio_read = smc911x_phy_read;
2073 lp->mii.mdio_write = smc911x_phy_write;
2076 * Locate the phy, if any.
2078 smc911x_phy_detect(dev);
2080 /* Set default parameters */
2081 lp->msg_enable = NETIF_MSG_LINK;
2082 lp->ctl_rfduplx = 1;
2083 lp->ctl_rspeed = 100;
2085 /* Grab the IRQ */
2086 retval = request_irq(dev->irq, &smc911x_interrupt,
2087 IRQF_SHARED | IRQF_TRIGGER_FALLING, dev->name, dev);
2088 if (retval)
2089 goto err_out;
2091 #ifdef SMC_USE_DMA
2092 lp->rxdma = SMC_DMA_REQUEST(dev, smc911x_rx_dma_irq);
2093 lp->txdma = SMC_DMA_REQUEST(dev, smc911x_tx_dma_irq);
2094 lp->rxdma_active = 0;
2095 lp->txdma_active = 0;
2096 dev->dma = lp->rxdma;
2097 #endif
2099 retval = register_netdev(dev);
2100 if (retval == 0) {
2101 /* now, print out the card info, in a short format.. */
2102 printk("%s: %s (rev %d) at %#lx IRQ %d",
2103 dev->name, version_string, lp->revision,
2104 dev->base_addr, dev->irq);
2106 #ifdef SMC_USE_DMA
2107 if (lp->rxdma != -1)
2108 printk(" RXDMA %d ", lp->rxdma);
2110 if (lp->txdma != -1)
2111 printk("TXDMA %d", lp->txdma);
2112 #endif
2113 printk("\n");
2114 if (!is_valid_ether_addr(dev->dev_addr)) {
2115 printk("%s: Invalid ethernet MAC address. Please "
2116 "set using ifconfig\n", dev->name);
2117 } else {
2118 /* Print the Ethernet address */
2119 printk("%s: Ethernet addr: ", dev->name);
2120 for (i = 0; i < 5; i++)
2121 printk("%2.2x:", dev->dev_addr[i]);
2122 printk("%2.2x\n", dev->dev_addr[5]);
2125 if (lp->phy_type == 0) {
2126 PRINTK("%s: No PHY found\n", dev->name);
2127 } else if ((lp->phy_type & ~0xff) == LAN911X_INTERNAL_PHY_ID) {
2128 PRINTK("%s: LAN911x Internal PHY\n", dev->name);
2129 } else {
2130 PRINTK("%s: External PHY 0x%08x\n", dev->name, lp->phy_type);
2134 err_out:
2135 #ifdef SMC_USE_DMA
2136 if (retval) {
2137 if (lp->rxdma != -1) {
2138 SMC_DMA_FREE(dev, lp->rxdma);
2140 if (lp->txdma != -1) {
2141 SMC_DMA_FREE(dev, lp->txdma);
2144 #endif
2145 return retval;
2149 * smc911x_init(void)
2151 * Output:
2152 * 0 --> there is a device
2153 * anything else, error
2155 static int smc911x_drv_probe(struct platform_device *pdev)
2157 struct net_device *ndev;
2158 struct resource *res;
2159 struct smc911x_local *lp;
2160 unsigned int *addr;
2161 int ret;
2163 DBG(SMC_DEBUG_FUNC, "--> %s\n", __FUNCTION__);
2164 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2165 if (!res) {
2166 ret = -ENODEV;
2167 goto out;
2171 * Request the regions.
2173 if (!request_mem_region(res->start, SMC911X_IO_EXTENT, CARDNAME)) {
2174 ret = -EBUSY;
2175 goto out;
2178 ndev = alloc_etherdev(sizeof(struct smc911x_local));
2179 if (!ndev) {
2180 printk("%s: could not allocate device.\n", CARDNAME);
2181 ret = -ENOMEM;
2182 goto release_1;
2184 SET_MODULE_OWNER(ndev);
2185 SET_NETDEV_DEV(ndev, &pdev->dev);
2187 ndev->dma = (unsigned char)-1;
2188 ndev->irq = platform_get_irq(pdev, 0);
2189 lp = netdev_priv(ndev);
2190 lp->netdev = ndev;
2192 addr = ioremap(res->start, SMC911X_IO_EXTENT);
2193 if (!addr) {
2194 ret = -ENOMEM;
2195 goto release_both;
2198 platform_set_drvdata(pdev, ndev);
2199 ret = smc911x_probe(ndev, (unsigned long)addr);
2200 if (ret != 0) {
2201 platform_set_drvdata(pdev, NULL);
2202 iounmap(addr);
2203 release_both:
2204 free_netdev(ndev);
2205 release_1:
2206 release_mem_region(res->start, SMC911X_IO_EXTENT);
2207 out:
2208 printk("%s: not found (%d).\n", CARDNAME, ret);
2210 #ifdef SMC_USE_DMA
2211 else {
2212 lp->physaddr = res->start;
2213 lp->dev = &pdev->dev;
2215 #endif
2217 return ret;
2220 static int smc911x_drv_remove(struct platform_device *pdev)
2222 struct net_device *ndev = platform_get_drvdata(pdev);
2223 struct resource *res;
2225 DBG(SMC_DEBUG_FUNC, "--> %s\n", __FUNCTION__);
2226 platform_set_drvdata(pdev, NULL);
2228 unregister_netdev(ndev);
2230 free_irq(ndev->irq, ndev);
2232 #ifdef SMC_USE_DMA
2234 struct smc911x_local *lp = netdev_priv(ndev);
2235 if (lp->rxdma != -1) {
2236 SMC_DMA_FREE(dev, lp->rxdma);
2238 if (lp->txdma != -1) {
2239 SMC_DMA_FREE(dev, lp->txdma);
2242 #endif
2243 iounmap((void *)ndev->base_addr);
2244 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2245 release_mem_region(res->start, SMC911X_IO_EXTENT);
2247 free_netdev(ndev);
2248 return 0;
2251 static int smc911x_drv_suspend(struct platform_device *dev, pm_message_t state)
2253 struct net_device *ndev = platform_get_drvdata(dev);
2254 unsigned long ioaddr = ndev->base_addr;
2256 DBG(SMC_DEBUG_FUNC, "--> %s\n", __FUNCTION__);
2257 if (ndev) {
2258 if (netif_running(ndev)) {
2259 netif_device_detach(ndev);
2260 smc911x_shutdown(ndev);
2261 #if POWER_DOWN
2262 /* Set D2 - Energy detect only setting */
2263 SMC_SET_PMT_CTRL(2<<12);
2264 #endif
2267 return 0;
2270 static int smc911x_drv_resume(struct platform_device *dev)
2272 struct net_device *ndev = platform_get_drvdata(dev);
2274 DBG(SMC_DEBUG_FUNC, "--> %s\n", __FUNCTION__);
2275 if (ndev) {
2276 struct smc911x_local *lp = netdev_priv(ndev);
2278 if (netif_running(ndev)) {
2279 smc911x_reset(ndev);
2280 smc911x_enable(ndev);
2281 if (lp->phy_type != 0)
2282 smc911x_phy_configure(&lp->phy_configure);
2283 netif_device_attach(ndev);
2286 return 0;
2289 static struct platform_driver smc911x_driver = {
2290 .probe = smc911x_drv_probe,
2291 .remove = smc911x_drv_remove,
2292 .suspend = smc911x_drv_suspend,
2293 .resume = smc911x_drv_resume,
2294 .driver = {
2295 .name = CARDNAME,
2299 static int __init smc911x_init(void)
2301 return platform_driver_register(&smc911x_driver);
2304 static void __exit smc911x_cleanup(void)
2306 platform_driver_unregister(&smc911x_driver);
2309 module_init(smc911x_init);
2310 module_exit(smc911x_cleanup);