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RT-AC66 3.0.0.4.374.130 core
[tomato.git] / release / src-rt-6.x / linux / linux-2.6 / drivers / media / video / ivtv / ivtv-driver.h
blob65ebddab3fe14522057c8c911423f487122bfb4a
1 /*
2 ivtv driver internal defines and structures
3 Copyright (C) 2003-2004 Kevin Thayer <nufan_wfk at yahoo.com>
4 Copyright (C) 2004 Chris Kennedy <c@groovy.org>
5 Copyright (C) 2005-2007 Hans Verkuil <hverkuil@xs4all.nl>
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21
22 #ifndef IVTV_DRIVER_H
23 #define IVTV_DRIVER_H
24
25 /* Internal header for ivtv project:
26 * Driver for the cx23415/6 chip.
27 * Author: Kevin Thayer (nufan_wfk at yahoo.com)
28 * License: GPL
29 * http://www.ivtvdriver.org
30 *
31 * -----
32 * MPG600/MPG160 support by T.Adachi <tadachi@tadachi-net.com>
33 * and Takeru KOMORIYA<komoriya@paken.org>
34 *
35 * AVerMedia M179 GPIO info by Chris Pinkham <cpinkham@bc2va.org>
36 * using information provided by Jiun-Kuei Jung @ AVerMedia.
37 */
38
39 #include <linux/version.h>
40 #include <linux/module.h>
41 #include <linux/moduleparam.h>
42 #include <linux/init.h>
43 #include <linux/delay.h>
44 #include <linux/sched.h>
45 #include <linux/fs.h>
46 #include <linux/pci.h>
47 #include <linux/interrupt.h>
48 #include <linux/spinlock.h>
49 #include <linux/i2c.h>
50 #include <linux/i2c-algo-bit.h>
51 #include <linux/list.h>
52 #include <linux/unistd.h>
53 #include <linux/byteorder/swab.h>
54 #include <linux/pagemap.h>
55 #include <linux/workqueue.h>
56 #include <linux/mutex.h>
57 #include <asm/uaccess.h>
58 #include <asm/system.h>
59
60 #include <linux/dvb/video.h>
61 #include <linux/dvb/audio.h>
62 #include <media/v4l2-common.h>
63 #include <media/tuner.h>
64 #include <media/cx2341x.h>
65
66 /* #define HAVE_XC3028 1 */
67
68 #include <media/ivtv.h>
69
70 #define IVTV_ENCODER_OFFSET 0x00000000
71 #define IVTV_ENCODER_SIZE 0x00800000 /* Last half isn't needed 0x01000000 */
72
73 #define IVTV_DECODER_OFFSET 0x01000000
74 #define IVTV_DECODER_SIZE 0x00800000 /* Last half isn't needed 0x01000000 */
75
76 #define IVTV_REG_OFFSET 0x02000000
77 #define IVTV_REG_SIZE 0x00010000
78
79 /* Buffers on hardware offsets */
80 #define IVTV_YUV_BUFFER_OFFSET 0x001a8600 /* First YUV Buffer */
81 #define IVTV_YUV_BUFFER_OFFSET_1 0x00240400 /* Second YUV Buffer */
82 #define IVTV_YUV_BUFFER_OFFSET_2 0x002d8200 /* Third YUV Buffer */
83 #define IVTV_YUV_BUFFER_OFFSET_3 0x00370000 /* Fourth YUV Buffer */
84 #define IVTV_YUV_BUFFER_UV_OFFSET 0x65400 /* Offset to UV Buffer */
85
86 /* Offset to filter table in firmware */
87 #define IVTV_YUV_HORIZONTAL_FILTER_OFFSET 0x025d8
88 #define IVTV_YUV_VERTICAL_FILTER_OFFSET 0x03358
89
90 extern const u32 yuv_offset[4];
91
92 /* Maximum ivtv driver instances.
93 Based on 6 PVR500s each with two PVR15s...
94 TODO: make this dynamic. I believe it is only a global in order to support
95 ivtv-fb. There must be a better way to do that. */
96 #define IVTV_MAX_CARDS 12
97
98 /* Supported cards */
99 #define IVTV_CARD_PVR_250 0 /* WinTV PVR 250 */
100 #define IVTV_CARD_PVR_350 1 /* encoder, decoder, tv-out */
101 #define IVTV_CARD_PVR_150 2 /* WinTV PVR 150 and PVR 500 (really just two
102 PVR150s on one PCI board) */
103 #define IVTV_CARD_M179 3 /* AVerMedia M179 (encoder only) */
104 #define IVTV_CARD_MPG600 4 /* Kuroutoshikou ITVC16-STVLP/YUAN MPG600, encoder only */
105 #define IVTV_CARD_MPG160 5 /* Kuroutoshikou ITVC15-STVLP/YUAN MPG160
106 cx23415 based, but does not have tv-out */
107 #define IVTV_CARD_PG600 6 /* YUAN PG600/DIAMONDMM PVR-550 based on the CX Falcon 2 */
108 #define IVTV_CARD_AVC2410 7 /* Adaptec AVC-2410 */
109 #define IVTV_CARD_AVC2010 8 /* Adaptec AVD-2010 (No Tuner) */
110 #define IVTV_CARD_TG5000TV 9 /* NAGASE TRANSGEAR 5000TV, encoder only */
111 #define IVTV_CARD_VA2000MAX_SNT6 10 /* VA2000MAX-STN6 */
112 #define IVTV_CARD_CX23416GYC 11 /* Kuroutoshikou CX23416GYC-STVLP (Yuan MPG600GR OEM) */
113 #define IVTV_CARD_GV_MVPRX 12 /* I/O Data GV-MVP/RX, RX2, RX2W */
114 #define IVTV_CARD_GV_MVPRX2E 13 /* I/O Data GV-MVP/RX2E */
115 #define IVTV_CARD_GOTVIEW_PCI_DVD 14 /* GotView PCI DVD */
116 #define IVTV_CARD_GOTVIEW_PCI_DVD2 15 /* GotView PCI DVD2 */
117 #define IVTV_CARD_YUAN_MPC622 16 /* Yuan MPC622 miniPCI */
118 #define IVTV_CARD_DCTMTVP1 17 /* DIGITAL COWBOY DCT-MTVP1 */
119 #ifdef HAVE_XC3028
120 #define IVTV_CARD_PG600V2 18 /* Yuan PG600V2/GotView PCI DVD Lite/Club3D ZAP-TV1x01 */
121 #define IVTV_CARD_LAST 18
122 #else
123 #define IVTV_CARD_LAST 17
124 #endif
125
126 /* Variants of existing cards but with the same PCI IDs. The driver
127 detects these based on other device information.
128 These cards must always come last.
129 New cards must be inserted above, and the indices of the cards below
130 must be adjusted accordingly. */
131
132 /* PVR-350 V1 (uses saa7114) */
133 #define IVTV_CARD_PVR_350_V1 (IVTV_CARD_LAST+1)
134 /* 2 variants of Kuroutoshikou CX23416GYC-STVLP (Yuan MPG600GR OEM) */
135 #define IVTV_CARD_CX23416GYC_NOGR (IVTV_CARD_LAST+2)
136 #define IVTV_CARD_CX23416GYC_NOGRYCS (IVTV_CARD_LAST+3)
137
138 #define IVTV_ENC_STREAM_TYPE_MPG 0
139 #define IVTV_ENC_STREAM_TYPE_YUV 1
140 #define IVTV_ENC_STREAM_TYPE_VBI 2
141 #define IVTV_ENC_STREAM_TYPE_PCM 3
142 #define IVTV_ENC_STREAM_TYPE_RAD 4
143 #define IVTV_DEC_STREAM_TYPE_MPG 5
144 #define IVTV_DEC_STREAM_TYPE_VBI 6
145 #define IVTV_DEC_STREAM_TYPE_VOUT 7
146 #define IVTV_DEC_STREAM_TYPE_YUV 8
147 #define IVTV_MAX_STREAMS 9
148
149 #define IVTV_V4L2_DEC_MPG_OFFSET 16 /* offset from 0 to register decoder mpg v4l2 minors on */
150 #define IVTV_V4L2_ENC_PCM_OFFSET 24 /* offset from 0 to register pcm v4l2 minors on */
151 #define IVTV_V4L2_ENC_YUV_OFFSET 32 /* offset from 0 to register yuv v4l2 minors on */
152 #define IVTV_V4L2_DEC_YUV_OFFSET 48 /* offset from 0 to register decoder yuv v4l2 minors on */
153 #define IVTV_V4L2_DEC_VBI_OFFSET 8 /* offset from 0 to register decoder vbi input v4l2 minors on */
154 #define IVTV_V4L2_DEC_VOUT_OFFSET 16 /* offset from 0 to register vbi output v4l2 minors on */
155
156 #define IVTV_ENC_MEM_START 0x00000000
157 #define IVTV_DEC_MEM_START 0x01000000
158
159 /* system vendor and device IDs */
160 #define PCI_VENDOR_ID_ICOMP 0x4444
161 #define PCI_DEVICE_ID_IVTV15 0x0803
162 #define PCI_DEVICE_ID_IVTV16 0x0016
163
164 /* subsystem vendor ID */
165 #define IVTV_PCI_ID_HAUPPAUGE 0x0070
166 #define IVTV_PCI_ID_HAUPPAUGE_ALT1 0x0270
167 #define IVTV_PCI_ID_HAUPPAUGE_ALT2 0x4070
168 #define IVTV_PCI_ID_ADAPTEC 0x9005
169 #define IVTV_PCI_ID_AVERMEDIA 0x1461
170 #define IVTV_PCI_ID_YUAN1 0x12ab
171 #define IVTV_PCI_ID_YUAN2 0xff01
172 #define IVTV_PCI_ID_YUAN3 0xffab
173 #define IVTV_PCI_ID_YUAN4 0xfbab
174 #define IVTV_PCI_ID_DIAMONDMM 0xff92
175 #define IVTV_PCI_ID_IODATA 0x10fc
176 #define IVTV_PCI_ID_MELCO 0x1154
177 #define IVTV_PCI_ID_GOTVIEW1 0xffac
178 #define IVTV_PCI_ID_GOTVIEW2 0xffad
179
180 /* Decoder Buffer hardware size on Chip */
181 #define IVTV_DEC_MAX_BUF 0x00100000 /* max bytes in decoder buffer */
182 #define IVTV_DEC_MIN_BUF 0x00010000 /* min bytes in dec buffer */
183
184 /* ======================================================================== */
185 /* ========================== START USER SETTABLE DMA VARIABLES =========== */
186 /* ======================================================================== */
187
188 #define IVTV_DMA_SG_OSD_ENT (2883584/PAGE_SIZE) /* sg entities */
189
190 /* DMA Buffers, Default size in MB allocated */
191 #define IVTV_DEFAULT_ENC_MPG_BUFFERS 4
192 #define IVTV_DEFAULT_ENC_YUV_BUFFERS 2
193 #define IVTV_DEFAULT_ENC_VBI_BUFFERS 1
194 #define IVTV_DEFAULT_ENC_PCM_BUFFERS 1
195 #define IVTV_DEFAULT_DEC_MPG_BUFFERS 1
196 #define IVTV_DEFAULT_DEC_YUV_BUFFERS 1
197 #define IVTV_DEFAULT_DEC_VBI_BUFFERS 1
198
199 /* ======================================================================== */
200 /* ========================== END USER SETTABLE DMA VARIABLES ============= */
201 /* ======================================================================== */
202
203 /* Decoder Status Register */
204 #define IVTV_DMA_ERR_LIST 0x00000010
205 #define IVTV_DMA_ERR_WRITE 0x00000008
206 #define IVTV_DMA_ERR_READ 0x00000004
207 #define IVTV_DMA_SUCCESS_WRITE 0x00000002
208 #define IVTV_DMA_SUCCESS_READ 0x00000001
209 #define IVTV_DMA_READ_ERR (IVTV_DMA_ERR_LIST | IVTV_DMA_ERR_READ)
210 #define IVTV_DMA_WRITE_ERR (IVTV_DMA_ERR_LIST | IVTV_DMA_ERR_WRITE)
211 #define IVTV_DMA_ERR (IVTV_DMA_ERR_LIST | IVTV_DMA_ERR_WRITE | IVTV_DMA_ERR_READ)
212
213 /* DMA Registers */
214 #define IVTV_REG_DMAXFER (0x0000)
215 #define IVTV_REG_DMASTATUS (0x0004)
216 #define IVTV_REG_DECDMAADDR (0x0008)
217 #define IVTV_REG_ENCDMAADDR (0x000c)
218 #define IVTV_REG_DMACONTROL (0x0010)
219 #define IVTV_REG_IRQSTATUS (0x0040)
220 #define IVTV_REG_IRQMASK (0x0048)
221
222 /* Setup Registers */
223 #define IVTV_REG_ENC_SDRAM_REFRESH (0x07F8)
224 #define IVTV_REG_ENC_SDRAM_PRECHARGE (0x07FC)
225 #define IVTV_REG_DEC_SDRAM_REFRESH (0x08F8)
226 #define IVTV_REG_DEC_SDRAM_PRECHARGE (0x08FC)
227 #define IVTV_REG_VDM (0x2800)
228 #define IVTV_REG_AO (0x2D00)
229 #define IVTV_REG_BYTEFLUSH (0x2D24)
230 #define IVTV_REG_SPU (0x9050)
231 #define IVTV_REG_HW_BLOCKS (0x9054)
232 #define IVTV_REG_VPU (0x9058)
233 #define IVTV_REG_APU (0xA064)
234
235 #define IVTV_IRQ_ENC_START_CAP (0x1 << 31)
236 #define IVTV_IRQ_ENC_EOS (0x1 << 30)
237 #define IVTV_IRQ_ENC_VBI_CAP (0x1 << 29)
238 #define IVTV_IRQ_ENC_VIM_RST (0x1 << 28)
239 #define IVTV_IRQ_ENC_DMA_COMPLETE (0x1 << 27)
240 #define IVTV_IRQ_ENC_PIO_COMPLETE (0x1 << 25)
241 #define IVTV_IRQ_DEC_AUD_MODE_CHG (0x1 << 24)
242 #define IVTV_IRQ_DEC_DATA_REQ (0x1 << 22)
243 #define IVTV_IRQ_DEC_DMA_COMPLETE (0x1 << 20)
244 #define IVTV_IRQ_DEC_VBI_RE_INSERT (0x1 << 19)
245 #define IVTV_IRQ_DMA_ERR (0x1 << 18)
246 #define IVTV_IRQ_DMA_WRITE (0x1 << 17)
247 #define IVTV_IRQ_DMA_READ (0x1 << 16)
248 #define IVTV_IRQ_DEC_VSYNC (0x1 << 10)
249
250 /* IRQ Masks */
251 #define IVTV_IRQ_MASK_INIT (IVTV_IRQ_DMA_ERR|IVTV_IRQ_ENC_DMA_COMPLETE|\
252 IVTV_IRQ_DMA_READ|IVTV_IRQ_ENC_PIO_COMPLETE)
253
254 #define IVTV_IRQ_MASK_CAPTURE (IVTV_IRQ_ENC_START_CAP | IVTV_IRQ_ENC_EOS)
255 #define IVTV_IRQ_MASK_DECODE (IVTV_IRQ_DEC_DATA_REQ|IVTV_IRQ_DEC_AUD_MODE_CHG)
256
257 /* i2c stuff */
258 #define I2C_CLIENTS_MAX 16
259
260 /* debugging */
261
262 #define IVTV_DBGFLG_WARN (1 << 0)
263 #define IVTV_DBGFLG_INFO (1 << 1)
264 #define IVTV_DBGFLG_API (1 << 2)
265 #define IVTV_DBGFLG_DMA (1 << 3)
266 #define IVTV_DBGFLG_IOCTL (1 << 4)
267 #define IVTV_DBGFLG_I2C (1 << 5)
268 #define IVTV_DBGFLG_IRQ (1 << 6)
269 #define IVTV_DBGFLG_DEC (1 << 7)
270 #define IVTV_DBGFLG_YUV (1 << 8)
271
272 /* NOTE: extra space before comma in 'itv->num , ## args' is required for
273 gcc-2.95, otherwise it won't compile. */
274 #define IVTV_DEBUG(x, type, fmt, args...) \
275 do { \
276 if ((x) & ivtv_debug) \
277 printk(KERN_INFO "ivtv%d " type ": " fmt, itv->num , ## args); \
278 } while (0)
279 #define IVTV_DEBUG_WARN(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_WARN, "warning", fmt , ## args)
280 #define IVTV_DEBUG_INFO(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_INFO, "info",fmt , ## args)
281 #define IVTV_DEBUG_API(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_API, "api", fmt , ## args)
282 #define IVTV_DEBUG_DMA(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_DMA, "dma", fmt , ## args)
283 #define IVTV_DEBUG_IOCTL(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_IOCTL, "ioctl", fmt , ## args)
284 #define IVTV_DEBUG_I2C(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_I2C, "i2c", fmt , ## args)
285 #define IVTV_DEBUG_IRQ(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_IRQ, "irq", fmt , ## args)
286 #define IVTV_DEBUG_DEC(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_DEC, "dec", fmt , ## args)
287 #define IVTV_DEBUG_YUV(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_YUV, "yuv", fmt , ## args)
288
289 #define IVTV_FB_DEBUG(x, type, fmt, args...) \
290 do { \
291 if ((x) & ivtv_debug) \
292 printk(KERN_INFO "ivtv%d-fb " type ": " fmt, itv->num , ## args); \
293 } while (0)
294 #define IVTV_FB_DEBUG_WARN(fmt, args...) IVTV_FB_DEBUG(IVTV_DBGFLG_WARN, "warning", fmt , ## args)
295 #define IVTV_FB_DEBUG_INFO(fmt, args...) IVTV_FB_DEBUG(IVTV_DBGFLG_INFO, "info", fmt , ## args)
296 #define IVTV_FB_DEBUG_API(fmt, args...) IVTV_FB_DEBUG(IVTV_DBGFLG_API, "api", fmt , ## args)
297 #define IVTV_FB_DEBUG_DMA(fmt, args...) IVTV_FB_DEBUG(IVTV_DBGFLG_DMA, "dma", fmt , ## args)
298 #define IVTV_FB_DEBUG_IOCTL(fmt, args...) IVTV_FB_DEBUG(IVTV_DBGFLG_IOCTL, "ioctl", fmt , ## args)
299 #define IVTV_FB_DEBUG_I2C(fmt, args...) IVTV_FB_DEBUG(IVTV_DBGFLG_I2C, "i2c", fmt , ## args)
300 #define IVTV_FB_DEBUG_IRQ(fmt, args...) IVTV_FB_DEBUG(IVTV_DBGFLG_IRQ, "irq", fmt , ## args)
301 #define IVTV_FB_DEBUG_DEC(fmt, args...) IVTV_FB_DEBUG(IVTV_DBGFLG_DEC, "dec", fmt , ## args)
302 #define IVTV_FB_DEBUG_YUV(fmt, args...) IVTV_FB_DEBUG(IVTV_DBGFLG_YUV, "yuv", fmt , ## args)
303
304 /* Standard kernel messages */
305 #define IVTV_ERR(fmt, args...) printk(KERN_ERR "ivtv%d: " fmt, itv->num , ## args)
306 #define IVTV_WARN(fmt, args...) printk(KERN_WARNING "ivtv%d: " fmt, itv->num , ## args)
307 #define IVTV_INFO(fmt, args...) printk(KERN_INFO "ivtv%d: " fmt, itv->num , ## args)
308 #define IVTV_FB_ERR(fmt, args...) printk(KERN_ERR "ivtv%d-fb: " fmt, itv->num , ## args)
309 #define IVTV_FB_WARN(fmt, args...) printk(KERN_WARNING "ivtv%d-fb: " fmt, itv->num , ## args)
310 #define IVTV_FB_INFO(fmt, args...) printk(KERN_INFO "ivtv%d-fb: " fmt, itv->num , ## args)
311
312 /* Values for IVTV_API_DEC_PLAYBACK_SPEED mpeg_frame_type_mask parameter: */
313 #define MPEG_FRAME_TYPE_IFRAME 1
314 #define MPEG_FRAME_TYPE_IFRAME_PFRAME 3
315 #define MPEG_FRAME_TYPE_ALL 7
316
317 /* output modes (cx23415 only) */
318 #define OUT_NONE 0
319 #define OUT_MPG 1
320 #define OUT_YUV 2
321 #define OUT_UDMA_YUV 3
322 #define OUT_PASSTHROUGH 4
323
324 #define IVTV_MAX_PGM_INDEX (400)
325
326 extern int ivtv_debug;
327
328
329 struct ivtv_options {
330 int megabytes[IVTV_MAX_STREAMS]; /* Size in megabytes of each stream */
331 int cardtype; /* force card type on load */
332 int tuner; /* set tuner on load */
333 int radio; /* enable/disable radio */
334 int newi2c; /* New I2C algorithm */
335 };
336
337 #define IVTV_MBOX_DMA_START 6
338 #define IVTV_MBOX_DMA_END 8
339 #define IVTV_MBOX_DMA 9
340 #define IVTV_MBOX_FIELD_DISPLAYED 8
341
342 /* ivtv-specific mailbox template */
343 struct ivtv_mailbox {
344 u32 flags;
345 u32 cmd;
346 u32 retval;
347 u32 timeout;
348 u32 data[CX2341X_MBOX_MAX_DATA];
349 };
350
351 struct ivtv_api_cache {
352 unsigned long last_jiffies; /* when last command was issued */
353 u32 data[CX2341X_MBOX_MAX_DATA]; /* last sent api data */
354 };
355
356 struct ivtv_mailbox_data {
357 volatile struct ivtv_mailbox __iomem *mbox;
358 /* Bits 0-2 are for the encoder mailboxes, 0-1 are for the decoder mailboxes.
359 If the bit is set, then the corresponding mailbox is in use by the driver. */
360 unsigned long busy;
361 u8 max_mbox;
362 };
363
364 /* per-buffer bit flags */
365 #define IVTV_F_B_NEED_BUF_SWAP 0 /* this buffer should be byte swapped */
366
367 /* per-stream, s_flags */
368 #define IVTV_F_S_DMA_PENDING 0 /* this stream has pending DMA */
369 #define IVTV_F_S_DMA_HAS_VBI 1 /* the current DMA request also requests VBI data */
370 #define IVTV_F_S_NEEDS_DATA 2 /* this decoding stream needs more data */
371
372 #define IVTV_F_S_CLAIMED 3 /* this stream is claimed */
373 #define IVTV_F_S_STREAMING 4 /* the fw is decoding/encoding this stream */
374 #define IVTV_F_S_INTERNAL_USE 5 /* this stream is used internally (sliced VBI processing) */
375 #define IVTV_F_S_PASSTHROUGH 6 /* this stream is in passthrough mode */
376 #define IVTV_F_S_STREAMOFF 7 /* signal end of stream EOS */
377 #define IVTV_F_S_APPL_IO 8 /* this stream is used read/written by an application */
378
379 #define IVTV_F_S_PIO_PENDING 9 /* this stream has pending PIO */
380 #define IVTV_F_S_PIO_HAS_VBI 1 /* the current PIO request also requests VBI data */
381
382 /* per-ivtv, i_flags */
383 #define IVTV_F_I_DMA 0 /* DMA in progress */
384 #define IVTV_F_I_UDMA 1 /* UDMA in progress */
385 #define IVTV_F_I_UDMA_PENDING 2 /* UDMA pending */
386 #define IVTV_F_I_SPEED_CHANGE 3 /* A speed change is in progress */
387 #define IVTV_F_I_EOS 4 /* End of encoder stream reached */
388 #define IVTV_F_I_RADIO_USER 5 /* The radio tuner is selected */
389 #define IVTV_F_I_DIG_RST 6 /* Reset digitizer */
390 #define IVTV_F_I_DEC_YUV 7 /* YUV instead of MPG is being decoded */
391 #define IVTV_F_I_ENC_VBI 8 /* VBI DMA */
392 #define IVTV_F_I_UPDATE_CC 9 /* CC should be updated */
393 #define IVTV_F_I_UPDATE_WSS 10 /* WSS should be updated */
394 #define IVTV_F_I_UPDATE_VPS 11 /* VPS should be updated */
395 #define IVTV_F_I_DECODING_YUV 12 /* this stream is YUV frame decoding */
396 #define IVTV_F_I_ENC_PAUSED 13 /* the encoder is paused */
397 #define IVTV_F_I_VALID_DEC_TIMINGS 14 /* last_dec_timing is valid */
398 #define IVTV_F_I_HAVE_WORK 15 /* Used in the interrupt handler: there is work to be done */
399 #define IVTV_F_I_WORK_HANDLER_VBI 16 /* there is work to be done for VBI */
400 #define IVTV_F_I_WORK_HANDLER_YUV 17 /* there is work to be done for YUV */
401 #define IVTV_F_I_WORK_HANDLER_PIO 18 /* there is work to be done for PIO */
402 #define IVTV_F_I_PIO 19 /* PIO in progress */
403
404 /* Event notifications */
405 #define IVTV_F_I_EV_DEC_STOPPED 28 /* decoder stopped event */
406 #define IVTV_F_I_EV_VSYNC 29 /* VSYNC event */
407 #define IVTV_F_I_EV_VSYNC_FIELD 30 /* VSYNC event field (0 = first, 1 = second field) */
408 #define IVTV_F_I_EV_VSYNC_ENABLED 31 /* VSYNC event enabled */
409
410 /* Scatter-Gather array element, used in DMA transfers */
411 struct ivtv_SG_element {
412 u32 src;
413 u32 dst;
414 u32 size;
415 };
416
417 struct ivtv_user_dma {
418 struct mutex lock;
419 int page_count;
420 struct page *map[IVTV_DMA_SG_OSD_ENT];
421
422 /* Base Dev SG Array for cx23415/6 */
423 struct ivtv_SG_element SGarray[IVTV_DMA_SG_OSD_ENT];
424 dma_addr_t SG_handle;
425 int SG_length;
426
427 /* SG List of Buffers */
428 struct scatterlist SGlist[IVTV_DMA_SG_OSD_ENT];
429 };
430
431 struct ivtv_dma_page_info {
432 unsigned long uaddr;
433 unsigned long first;
434 unsigned long last;
435 unsigned int offset;
436 unsigned int tail;
437 int page_count;
438 };
439
440 struct ivtv_buffer {
441 struct list_head list;
442 dma_addr_t dma_handle;
443 unsigned long b_flags;
444 char *buf;
445
446 u32 bytesused;
447 u32 readpos;
448 };
449
450 struct ivtv_queue {
451 struct list_head list;
452 u32 buffers;
453 u32 length;
454 u32 bytesused;
455 };
456
457 struct ivtv; /* forward reference */
458
459 struct ivtv_stream {
460 /* These first four fields are always set, even if the stream
461 is not actually created. */
462 struct video_device *v4l2dev; /* NULL when stream not created */
463 struct ivtv *itv; /* for ease of use */
464 const char *name; /* name of the stream */
465 int type; /* stream type */
466
467 u32 id;
468 spinlock_t qlock; /* locks access to the queues */
469 unsigned long s_flags; /* status flags, see above */
470 int dma; /* can be PCI_DMA_TODEVICE,
471 PCI_DMA_FROMDEVICE or
472 PCI_DMA_NONE */
473 u32 dma_offset;
474 u32 dma_backup;
475 u64 dma_pts;
476
477 int subtype;
478 wait_queue_head_t waitq;
479 u32 dma_last_offset;
480
481 /* Buffer Stats */
482 u32 buffers;
483 u32 buf_size;
484 u32 buffers_stolen;
485
486 /* Buffer Queues */
487 struct ivtv_queue q_free; /* free buffers */
488 struct ivtv_queue q_full; /* full buffers */
489 struct ivtv_queue q_io; /* waiting for I/O */
490 struct ivtv_queue q_dma; /* waiting for DMA */
491 struct ivtv_queue q_predma; /* waiting for DMA */
492
493 /* Base Dev SG Array for cx23415/6 */
494 struct ivtv_SG_element *SGarray;
495 struct ivtv_SG_element *PIOarray;
496 dma_addr_t SG_handle;
497 int SG_length;
498
499 /* SG List of Buffers */
500 struct scatterlist *SGlist;
501 };
502
503 struct ivtv_open_id {
504 u32 open_id;
505 int type;
506 enum v4l2_priority prio;
507 struct ivtv *itv;
508 };
509
510 #define IVTV_YUV_UPDATE_HORIZONTAL 0x01
511 #define IVTV_YUV_UPDATE_VERTICAL 0x02
512
513 struct yuv_frame_info
514 {
515 u32 update;
516 int src_x;
517 int src_y;
518 unsigned int src_w;
519 unsigned int src_h;
520 int dst_x;
521 int dst_y;
522 unsigned int dst_w;
523 unsigned int dst_h;
524 int pan_x;
525 int pan_y;
526 u32 vis_w;
527 u32 vis_h;
528 u32 interlaced_y;
529 u32 interlaced_uv;
530 int tru_x;
531 u32 tru_w;
532 u32 tru_h;
533 u32 offset_y;
534 };
535
536 #define IVTV_YUV_MODE_INTERLACED 0x00
537 #define IVTV_YUV_MODE_PROGRESSIVE 0x01
538 #define IVTV_YUV_MODE_AUTO 0x02
539 #define IVTV_YUV_MODE_MASK 0x03
540
541 #define IVTV_YUV_SYNC_EVEN 0x00
542 #define IVTV_YUV_SYNC_ODD 0x04
543 #define IVTV_YUV_SYNC_MASK 0x04
544
545 struct yuv_playback_info
546 {
547 u32 reg_2834;
548 u32 reg_2838;
549 u32 reg_283c;
550 u32 reg_2840;
551 u32 reg_2844;
552 u32 reg_2848;
553 u32 reg_2854;
554 u32 reg_285c;
555 u32 reg_2864;
556
557 u32 reg_2870;
558 u32 reg_2874;
559 u32 reg_2890;
560 u32 reg_2898;
561 u32 reg_289c;
562
563 u32 reg_2918;
564 u32 reg_291c;
565 u32 reg_2920;
566 u32 reg_2924;
567 u32 reg_2928;
568 u32 reg_292c;
569 u32 reg_2930;
570
571 u32 reg_2934;
572
573 u32 reg_2938;
574 u32 reg_293c;
575 u32 reg_2940;
576 u32 reg_2944;
577 u32 reg_2948;
578 u32 reg_294c;
579 u32 reg_2950;
580 u32 reg_2954;
581 u32 reg_2958;
582 u32 reg_295c;
583 u32 reg_2960;
584 u32 reg_2964;
585 u32 reg_2968;
586 u32 reg_296c;
587
588 u32 reg_2970;
589
590 int v_filter_1;
591 int v_filter_2;
592 int h_filter;
593
594 u32 osd_x_offset;
595 u32 osd_y_offset;
596
597 u32 osd_x_pan;
598 u32 osd_y_pan;
599
600 u32 osd_vis_w;
601 u32 osd_vis_h;
602
603 int decode_height;
604
605 int frame_interlaced;
606 int frame_interlaced_last;
607
608 int lace_mode;
609 int lace_threshold;
610 int lace_sync_field;
611
612 atomic_t next_dma_frame;
613 atomic_t next_fill_frame;
614
615 u32 yuv_forced_update;
616 int update_frame;
617 struct yuv_frame_info new_frame_info[4];
618 struct yuv_frame_info old_frame_info;
619 struct yuv_frame_info old_frame_info_args;
620
621 void *blanking_ptr;
622 dma_addr_t blanking_dmaptr;
623 };
624
625 #define IVTV_VBI_FRAMES 32
626
627 /* VBI data */
628 struct vbi_info {
629 u32 dec_start;
630 u32 enc_start, enc_size;
631 int fpi;
632 u32 frame;
633 u32 dma_offset;
634 u8 cc_data_odd[256];
635 u8 cc_data_even[256];
636 int cc_pos;
637 u8 cc_no_update;
638 u8 vps[5];
639 u8 vps_found;
640 int wss;
641 u8 wss_found;
642 u8 wss_no_update;
643 u32 raw_decoder_line_size;
644 u8 raw_decoder_sav_odd_field;
645 u8 raw_decoder_sav_even_field;
646 u32 sliced_decoder_line_size;
647 u8 sliced_decoder_sav_odd_field;
648 u8 sliced_decoder_sav_even_field;
649 struct v4l2_format in;
650 /* convenience pointer to sliced struct in vbi_in union */
651 struct v4l2_sliced_vbi_format *sliced_in;
652 u32 service_set_in;
653 int insert_mpeg;
654
655 /* Buffer for the maximum of 2 * 18 * packet_size sliced VBI lines.
656 One for /dev/vbi0 and one for /dev/vbi8 */
657 struct v4l2_sliced_vbi_data sliced_data[36];
658 struct v4l2_sliced_vbi_data sliced_dec_data[36];
659
660 /* Buffer for VBI data inserted into MPEG stream.
661 The first byte is a dummy byte that's never used.
662 The next 16 bytes contain the MPEG header for the VBI data,
663 the remainder is the actual VBI data.
664 The max size accepted by the MPEG VBI reinsertion turns out
665 to be 1552 bytes, which happens to be 4 + (1 + 42) * (2 * 18) bytes,
666 where 4 is a four byte header, 42 is the max sliced VBI payload, 1 is
667 a single line header byte and 2 * 18 is the number of VBI lines per frame.
668
669 However, it seems that the data must be 1K aligned, so we have to
670 pad the data until the 1 or 2 K boundary.
671
672 This pointer array will allocate 2049 bytes to store each VBI frame. */
673 u8 *sliced_mpeg_data[IVTV_VBI_FRAMES];
674 u32 sliced_mpeg_size[IVTV_VBI_FRAMES];
675 struct ivtv_buffer sliced_mpeg_buf;
676 u32 inserted_frame;
677
678 u32 start[2], count;
679 u32 raw_size;
680 u32 sliced_size;
681 };
682
683 /* forward declaration of struct defined in ivtv-cards.h */
684 struct ivtv_card;
685
686 /* Struct to hold info about ivtv cards */
687 struct ivtv {
688 int num; /* board number, -1 during init! */
689 char name[8]; /* board name for printk and interrupts (e.g. 'ivtv0') */
690 struct pci_dev *dev; /* PCI device */
691 const struct ivtv_card *card; /* card information */
692 const char *card_name; /* full name of the card */
693 u8 has_cx23415; /* 1 if it is a cx23415 based card, 0 for cx23416 */
694 u8 is_50hz;
695 u8 is_60hz;
696 u8 is_out_50hz;
697 u8 is_out_60hz;
698 u8 pvr150_workaround; /* 1 if the cx25840 needs to workaround a PVR150 bug */
699 u8 nof_inputs; /* number of video inputs */
700 u8 nof_audio_inputs; /* number of audio inputs */
701 u32 v4l2_cap; /* V4L2 capabilities of card */
702 u32 hw_flags; /* Hardware description of the board */
703
704 /* controlling Video decoder function */
705 int (*video_dec_func)(struct ivtv *, unsigned int, void *);
706
707 struct ivtv_options options; /* User options */
708 int stream_buf_size[IVTV_MAX_STREAMS]; /* Stream buffer size */
709 struct ivtv_stream streams[IVTV_MAX_STREAMS]; /* Stream data */
710 int speed;
711 u8 speed_mute_audio;
712 unsigned long i_flags; /* global ivtv flags */
713 atomic_t capturing; /* count number of active capture streams */
714 atomic_t decoding; /* count number of active decoding streams */
715 u32 irq_rr_idx; /* Round-robin stream index */
716 int cur_dma_stream; /* index of stream doing DMA */
717 int cur_pio_stream; /* index of stream doing PIO */
718 u32 dma_data_req_offset;
719 u32 dma_data_req_size;
720 int output_mode; /* NONE, MPG, YUV, UDMA YUV, passthrough */
721 spinlock_t lock; /* lock access to this struct */
722 int search_pack_header;
723
724 spinlock_t dma_reg_lock; /* lock access to DMA engine registers */
725 struct mutex serialize_lock; /* lock used to serialize starting streams */
726
727 /* User based DMA for OSD */
728 struct ivtv_user_dma udma;
729
730 int open_id; /* incremented each time an open occurs, used as unique ID.
731 starts at 1, so 0 can be used as uninitialized value
732 in the stream->id. */
733
734 u32 base_addr;
735 u32 irqmask;
736
737 struct v4l2_prio_state prio;
738 struct workqueue_struct *irq_work_queues;
739 struct work_struct irq_work_queue;
740 struct timer_list dma_timer; /* Timer used to catch unfinished DMAs */
741
742 struct vbi_info vbi;
743
744 struct ivtv_mailbox_data enc_mbox;
745 struct ivtv_mailbox_data dec_mbox;
746 struct ivtv_api_cache api_cache[256]; /* Cached API Commands */
747
748 u8 card_rev;
749 volatile void __iomem *enc_mem, *dec_mem, *reg_mem;
750
751 u32 pgm_info_offset;
752 u32 pgm_info_num;
753 u32 pgm_info_write_idx;
754 u32 pgm_info_read_idx;
755 struct v4l2_enc_idx_entry pgm_info[IVTV_MAX_PGM_INDEX];
756
757 u64 mpg_data_received;
758 u64 vbi_data_inserted;
759
760 wait_queue_head_t cap_w;
761 /* when the next decoder event arrives this queue is woken up */
762 wait_queue_head_t event_waitq;
763 /* when the next decoder vsync arrives this queue is woken up */
764 wait_queue_head_t vsync_waitq;
765 /* when the current DMA is finished this queue is woken up */
766 wait_queue_head_t dma_waitq;
767
768 /* OSD support */
769 unsigned long osd_video_pbase;
770 int osd_global_alpha_state; /* 0=off : 1=on */
771 int osd_local_alpha_state; /* 0=off : 1=on */
772 int osd_color_key_state; /* 0=off : 1=on */
773 u8 osd_global_alpha; /* Current global alpha */
774 u32 osd_color_key; /* Current color key */
775 u32 osd_pixelformat; /* Current pixel format */
776 struct v4l2_rect osd_rect; /* Current OSD position and size */
777 struct v4l2_rect main_rect; /* Current Main window position and size */
778
779 u32 last_dec_timing[3]; /* Store last retrieved pts/scr/frame values */
780
781 /* i2c */
782 struct i2c_adapter i2c_adap;
783 struct i2c_algo_bit_data i2c_algo;
784 struct i2c_client i2c_client;
785 struct mutex i2c_bus_lock;
786 int i2c_state;
787 struct i2c_client *i2c_clients[I2C_CLIENTS_MAX];
788
789 /* v4l2 and User settings */
790
791 /* codec settings */
792 struct cx2341x_mpeg_params params;
793 u32 audio_input;
794 u32 active_input;
795 u32 active_output;
796 v4l2_std_id std;
797 v4l2_std_id std_out;
798 v4l2_std_id tuner_std; /* The norm of the tuner (fixed) */
799 u8 audio_stereo_mode;
800 u8 audio_bilingual_mode;
801
802 /* dualwatch */
803 unsigned long dualwatch_jiffies;
804 u16 dualwatch_stereo_mode;
805
806 /* Digitizer type */
807 int digitizer; /* 0x00EF = saa7114 0x00FO = saa7115 0x0106 = mic */
808
809 u32 lastVsyncFrame;
810
811 struct yuv_playback_info yuv_info;
812 struct osd_info *osd_info;
813 };
814
815 /* Globals */
816 extern struct ivtv *ivtv_cards[];
817 extern int ivtv_cards_active;
818 extern int ivtv_first_minor;
819 extern spinlock_t ivtv_cards_lock;
820
821 /*==============Prototypes==================*/
822
823 /* Hardware/IRQ */
824 void ivtv_set_irq_mask(struct ivtv *itv, u32 mask);
825 void ivtv_clear_irq_mask(struct ivtv *itv, u32 mask);
826
827 /* try to set output mode, return current mode. */
828 int ivtv_set_output_mode(struct ivtv *itv, int mode);
829
830 /* return current output stream based on current mode */
831 struct ivtv_stream *ivtv_get_output_stream(struct ivtv *itv);
832
833 /* Return non-zero if a signal is pending */
834 int ivtv_sleep_timeout(int timeout, int intr);
835
836 /* Wait on queue, returns -EINTR if interrupted */
837 int ivtv_waitq(wait_queue_head_t *waitq);
838
839 /* Read Hauppauge eeprom */
840 struct tveeprom; /* forward reference */
841 void ivtv_read_eeprom(struct ivtv *itv, struct tveeprom *tv);
842
843 /* This is a PCI post thing, where if the pci register is not read, then
844 the write doesn't always take effect right away. By reading back the
845 register any pending PCI writes will be performed (in order), and so
846 you can be sure that the writes are guaranteed to be done.
847
848 Rarely needed, only in some timing sensitive cases.
849 Apparently if this is not done some motherboards seem
850 to kill the firmware and get into the broken state until computer is
851 rebooted. */
852 #define write_sync(val, reg) \
853 do { writel(val, reg); readl(reg); } while (0)
854
855 #define read_reg(reg) readl(itv->reg_mem + (reg))
856 #define write_reg(val, reg) writel(val, itv->reg_mem + (reg))
857 #define write_reg_sync(val, reg) \
858 do { write_reg(val, reg); read_reg(reg); } while (0)
859
860 #define read_enc(addr) readl(itv->enc_mem + (u32)(addr))
861 #define write_enc(val, addr) writel(val, itv->enc_mem + (u32)(addr))
862 #define write_enc_sync(val, addr) \
863 do { write_enc(val, addr); read_enc(addr); } while (0)
864
865 #define read_dec(addr) readl(itv->dec_mem + (u32)(addr))
866 #define write_dec(val, addr) writel(val, itv->dec_mem + (u32)(addr))
867 #define write_dec_sync(val, addr) \
868 do { write_dec(val, addr); read_dec(addr); } while (0)
869
870 #endif /* IVTV_DRIVER_H */
Tomato firmware and modifications.