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RT-AC66 3.0.0.4.374.130 core
[tomato.git] / release / src-rt-6.x / linux / linux-2.6 / drivers / block / umem.c
blob6f5d6203d725a510eb4f82dc2ab7a82409b03549
1 /*
2 * mm.c - Micro Memory(tm) PCI memory board block device driver - v2.3
3 *
4 * (C) 2001 San Mehat <nettwerk@valinux.com>
5 * (C) 2001 Johannes Erdfelt <jerdfelt@valinux.com>
6 * (C) 2001 NeilBrown <neilb@cse.unsw.edu.au>
7 *
8 * This driver for the Micro Memory PCI Memory Module with Battery Backup
9 * is Copyright Micro Memory Inc 2001-2002. All rights reserved.
10 *
11 * This driver is released to the public under the terms of the
12 * GNU GENERAL PUBLIC LICENSE version 2
13 * See the file COPYING for details.
14 *
15 * This driver provides a standard block device interface for Micro Memory(tm)
16 * PCI based RAM boards.
17 * 10/05/01: Phap Nguyen - Rebuilt the driver
18 * 10/22/01: Phap Nguyen - v2.1 Added disk partitioning
19 * 29oct2001:NeilBrown - Use make_request_fn instead of request_fn
20 * - use stand disk partitioning (so fdisk works).
21 * 08nov2001:NeilBrown - change driver name from "mm" to "umem"
22 * - incorporate into main kernel
23 * 08apr2002:NeilBrown - Move some of interrupt handle to tasklet
24 * - use spin_lock_bh instead of _irq
25 * - Never block on make_request. queue
26 * bh's instead.
27 * - unregister umem from devfs at mod unload
28 * - Change version to 2.3
29 * 07Nov2001:Phap Nguyen - Select pci read command: 06, 12, 15 (Decimal)
30 * 07Jan2002: P. Nguyen - Used PCI Memory Write & Invalidate for DMA
31 * 15May2002:NeilBrown - convert to bio for 2.5
32 * 17May2002:NeilBrown - remove init_mem initialisation. Instead detect
33 * - a sequence of writes that cover the card, and
34 * - set initialised bit then.
35 */
36
37 //#define DEBUG /* uncomment if you want debugging info (pr_debug) */
38 #include <linux/fs.h>
39 #include <linux/bio.h>
40 #include <linux/kernel.h>
41 #include <linux/mm.h>
42 #include <linux/mman.h>
43 #include <linux/ioctl.h>
44 #include <linux/module.h>
45 #include <linux/init.h>
46 #include <linux/interrupt.h>
47 #include <linux/timer.h>
48 #include <linux/pci.h>
49 #include <linux/slab.h>
50 #include <linux/dma-mapping.h>
51
52 #include <linux/fcntl.h> /* O_ACCMODE */
53 #include <linux/hdreg.h> /* HDIO_GETGEO */
54
55 #include <linux/umem.h>
56
57 #include <asm/uaccess.h>
58 #include <asm/io.h>
59
60 #define MM_MAXCARDS 4
61 #define MM_RAHEAD 2 /* two sectors */
62 #define MM_BLKSIZE 1024 /* 1k blocks */
63 #define MM_HARDSECT 512 /* 512-byte hardware sectors */
64 #define MM_SHIFT 6 /* max 64 partitions on 4 cards */
65
66 /*
67 * Version Information
68 */
69
70 #define DRIVER_VERSION "v2.3"
71 #define DRIVER_AUTHOR "San Mehat, Johannes Erdfelt, NeilBrown"
72 #define DRIVER_DESC "Micro Memory(tm) PCI memory board block driver"
73
74 static int debug;
75 /* #define HW_TRACE(x) writeb(x,cards[0].csr_remap + MEMCTRLSTATUS_MAGIC) */
76 #define HW_TRACE(x)
77
78 #define DEBUG_LED_ON_TRANSFER 0x01
79 #define DEBUG_BATTERY_POLLING 0x02
80
81 module_param(debug, int, 0644);
82 MODULE_PARM_DESC(debug, "Debug bitmask");
83
84 static int pci_read_cmd = 0x0C; /* Read Multiple */
85 module_param(pci_read_cmd, int, 0);
86 MODULE_PARM_DESC(pci_read_cmd, "PCI read command");
87
88 static int pci_write_cmd = 0x0F; /* Write and Invalidate */
89 module_param(pci_write_cmd, int, 0);
90 MODULE_PARM_DESC(pci_write_cmd, "PCI write command");
91
92 static int pci_cmds;
93
94 static int major_nr;
95
96 #include <linux/blkdev.h>
97 #include <linux/blkpg.h>
98
99 struct cardinfo {
100 int card_number;
101 struct pci_dev *dev;
102
103 int irq;
104
105 unsigned long csr_base;
106 unsigned char __iomem *csr_remap;
107 unsigned long csr_len;
108 #ifdef CONFIG_MM_MAP_MEMORY
109 unsigned long mem_base;
110 unsigned char __iomem *mem_remap;
111 unsigned long mem_len;
112 #endif
113
114 unsigned int win_size; /* PCI window size */
115 unsigned int mm_size; /* size in kbytes */
116
117 unsigned int init_size; /* initial segment, in sectors,
118 * that we know to
119 * have been written
120 */
121 struct bio *bio, *currentbio, **biotail;
122
123 request_queue_t *queue;
124
125 struct mm_page {
126 dma_addr_t page_dma;
127 struct mm_dma_desc *desc;
128 int cnt, headcnt;
129 struct bio *bio, **biotail;
130 } mm_pages[2];
131 #define DESC_PER_PAGE ((PAGE_SIZE*2)/sizeof(struct mm_dma_desc))
132
133 int Active, Ready;
134
135 struct tasklet_struct tasklet;
136 unsigned int dma_status;
137
138 struct {
139 int good;
140 int warned;
141 unsigned long last_change;
142 } battery[2];
143
144 spinlock_t lock;
145 int check_batteries;
146
147 int flags;
148 };
149
150 static struct cardinfo cards[MM_MAXCARDS];
151 static struct block_device_operations mm_fops;
152 static struct timer_list battery_timer;
153
154 static int num_cards = 0;
155
156 static struct gendisk *mm_gendisk[MM_MAXCARDS];
157
158 static void check_batteries(struct cardinfo *card);
159
160 /*
161 -----------------------------------------------------------------------------------
162 -- get_userbit
163 -----------------------------------------------------------------------------------
164 */
165 static int get_userbit(struct cardinfo *card, int bit)
166 {
167 unsigned char led;
168
169 led = readb(card->csr_remap + MEMCTRLCMD_LEDCTRL);
170 return led & bit;
171 }
172 /*
173 -----------------------------------------------------------------------------------
174 -- set_userbit
175 -----------------------------------------------------------------------------------
176 */
177 static int set_userbit(struct cardinfo *card, int bit, unsigned char state)
178 {
179 unsigned char led;
180
181 led = readb(card->csr_remap + MEMCTRLCMD_LEDCTRL);
182 if (state)
183 led |= bit;
184 else
185 led &= ~bit;
186 writeb(led, card->csr_remap + MEMCTRLCMD_LEDCTRL);
187
188 return 0;
189 }
190 /*
191 -----------------------------------------------------------------------------------
192 -- set_led
193 -----------------------------------------------------------------------------------
194 */
195 /*
196 * NOTE: For the power LED, use the LED_POWER_* macros since they differ
197 */
198 static void set_led(struct cardinfo *card, int shift, unsigned char state)
199 {
200 unsigned char led;
201
202 led = readb(card->csr_remap + MEMCTRLCMD_LEDCTRL);
203 if (state == LED_FLIP)
204 led ^= (1<<shift);
205 else {
206 led &= ~(0x03 << shift);
207 led |= (state << shift);
208 }
209 writeb(led, card->csr_remap + MEMCTRLCMD_LEDCTRL);
210
211 }
212
213 #ifdef MM_DIAG
214 /*
215 -----------------------------------------------------------------------------------
216 -- dump_regs
217 -----------------------------------------------------------------------------------
218 */
219 static void dump_regs(struct cardinfo *card)
220 {
221 unsigned char *p;
222 int i, i1;
223
224 p = card->csr_remap;
225 for (i = 0; i < 8; i++) {
226 printk(KERN_DEBUG "%p ", p);
227
228 for (i1 = 0; i1 < 16; i1++)
229 printk("%02x ", *p++);
230
231 printk("\n");
232 }
233 }
234 #endif
235 /*
236 -----------------------------------------------------------------------------------
237 -- dump_dmastat
238 -----------------------------------------------------------------------------------
239 */
240 static void dump_dmastat(struct cardinfo *card, unsigned int dmastat)
241 {
242 printk(KERN_DEBUG "MM%d*: DMAstat - ", card->card_number);
243 if (dmastat & DMASCR_ANY_ERR)
244 printk("ANY_ERR ");
245 if (dmastat & DMASCR_MBE_ERR)
246 printk("MBE_ERR ");
247 if (dmastat & DMASCR_PARITY_ERR_REP)
248 printk("PARITY_ERR_REP ");
249 if (dmastat & DMASCR_PARITY_ERR_DET)
250 printk("PARITY_ERR_DET ");
251 if (dmastat & DMASCR_SYSTEM_ERR_SIG)
252 printk("SYSTEM_ERR_SIG ");
253 if (dmastat & DMASCR_TARGET_ABT)
254 printk("TARGET_ABT ");
255 if (dmastat & DMASCR_MASTER_ABT)
256 printk("MASTER_ABT ");
257 if (dmastat & DMASCR_CHAIN_COMPLETE)
258 printk("CHAIN_COMPLETE ");
259 if (dmastat & DMASCR_DMA_COMPLETE)
260 printk("DMA_COMPLETE ");
261 printk("\n");
262 }
263
264 /*
265 * Theory of request handling
266 *
267 * Each bio is assigned to one mm_dma_desc - which may not be enough FIXME
268 * We have two pages of mm_dma_desc, holding about 64 descriptors
269 * each. These are allocated at init time.
270 * One page is "Ready" and is either full, or can have request added.
271 * The other page might be "Active", which DMA is happening on it.
272 *
273 * Whenever IO on the active page completes, the Ready page is activated
274 * and the ex-Active page is clean out and made Ready.
275 * Otherwise the Ready page is only activated when it becomes full, or
276 * when mm_unplug_device is called via the unplug_io_fn.
277 *
278 * If a request arrives while both pages a full, it is queued, and b_rdev is
279 * overloaded to record whether it was a read or a write.
280 *
281 * The interrupt handler only polls the device to clear the interrupt.
282 * The processing of the result is done in a tasklet.
283 */
284
285 static void mm_start_io(struct cardinfo *card)
286 {
287 /* we have the lock, we know there is
288 * no IO active, and we know that card->Active
289 * is set
290 */
291 struct mm_dma_desc *desc;
292 struct mm_page *page;
293 int offset;
294
295 /* make the last descriptor end the chain */
296 page = &card->mm_pages[card->Active];
297 pr_debug("start_io: %d %d->%d\n", card->Active, page->headcnt, page->cnt-1);
298 desc = &page->desc[page->cnt-1];
299
300 desc->control_bits |= cpu_to_le32(DMASCR_CHAIN_COMP_EN);
301 desc->control_bits &= ~cpu_to_le32(DMASCR_CHAIN_EN);
302 desc->sem_control_bits = desc->control_bits;
303
304
305 if (debug & DEBUG_LED_ON_TRANSFER)
306 set_led(card, LED_REMOVE, LED_ON);
307
308 desc = &page->desc[page->headcnt];
309 writel(0, card->csr_remap + DMA_PCI_ADDR);
310 writel(0, card->csr_remap + DMA_PCI_ADDR + 4);
311
312 writel(0, card->csr_remap + DMA_LOCAL_ADDR);
313 writel(0, card->csr_remap + DMA_LOCAL_ADDR + 4);
314
315 writel(0, card->csr_remap + DMA_TRANSFER_SIZE);
316 writel(0, card->csr_remap + DMA_TRANSFER_SIZE + 4);
317
318 writel(0, card->csr_remap + DMA_SEMAPHORE_ADDR);
319 writel(0, card->csr_remap + DMA_SEMAPHORE_ADDR + 4);
320
321 offset = ((char*)desc) - ((char*)page->desc);
322 writel(cpu_to_le32((page->page_dma+offset)&0xffffffff),
323 card->csr_remap + DMA_DESCRIPTOR_ADDR);
324 /* Force the value to u64 before shifting otherwise >> 32 is undefined C
325 * and on some ports will do nothing ! */
326 writel(cpu_to_le32(((u64)page->page_dma)>>32),
327 card->csr_remap + DMA_DESCRIPTOR_ADDR + 4);
328
329 /* Go, go, go */
330 writel(cpu_to_le32(DMASCR_GO | DMASCR_CHAIN_EN | pci_cmds),
331 card->csr_remap + DMA_STATUS_CTRL);
332 }
333
334 static int add_bio(struct cardinfo *card);
335
336 static void activate(struct cardinfo *card)
337 {
338 /* if No page is Active, and Ready is
339 * not empty, then switch Ready page
340 * to active and start IO.
341 * Then add any bh's that are available to Ready
342 */
343
344 do {
345 while (add_bio(card))
346 ;
347
348 if (card->Active == -1 &&
349 card->mm_pages[card->Ready].cnt > 0) {
350 card->Active = card->Ready;
351 card->Ready = 1-card->Ready;
352 mm_start_io(card);
353 }
354
355 } while (card->Active == -1 && add_bio(card));
356 }
357
358 static inline void reset_page(struct mm_page *page)
359 {
360 page->cnt = 0;
361 page->headcnt = 0;
362 page->bio = NULL;
363 page->biotail = & page->bio;
364 }
365
366 static void mm_unplug_device(request_queue_t *q)
367 {
368 struct cardinfo *card = q->queuedata;
369 unsigned long flags;
370
371 spin_lock_irqsave(&card->lock, flags);
372 if (blk_remove_plug(q))
373 activate(card);
374 spin_unlock_irqrestore(&card->lock, flags);
375 }
376
377 /*
378 * If there is room on Ready page, take
379 * one bh off list and add it.
380 * return 1 if there was room, else 0.
381 */
382 static int add_bio(struct cardinfo *card)
383 {
384 struct mm_page *p;
385 struct mm_dma_desc *desc;
386 dma_addr_t dma_handle;
387 int offset;
388 struct bio *bio;
389 int rw;
390 int len;
391
392 bio = card->currentbio;
393 if (!bio && card->bio) {
394 card->currentbio = card->bio;
395 card->bio = card->bio->bi_next;
396 if (card->bio == NULL)
397 card->biotail = &card->bio;
398 card->currentbio->bi_next = NULL;
399 return 1;
400 }
401 if (!bio)
402 return 0;
403
404 rw = bio_rw(bio);
405 if (card->mm_pages[card->Ready].cnt >= DESC_PER_PAGE)
406 return 0;
407
408 len = bio_iovec(bio)->bv_len;
409 dma_handle = pci_map_page(card->dev,
410 bio_page(bio),
411 bio_offset(bio),
412 len,
413 (rw==READ) ?
414 PCI_DMA_FROMDEVICE : PCI_DMA_TODEVICE);
415
416 p = &card->mm_pages[card->Ready];
417 desc = &p->desc[p->cnt];
418 p->cnt++;
419 if ((p->biotail) != &bio->bi_next) {
420 *(p->biotail) = bio;
421 p->biotail = &(bio->bi_next);
422 bio->bi_next = NULL;
423 }
424
425 desc->data_dma_handle = dma_handle;
426
427 desc->pci_addr = cpu_to_le64((u64)desc->data_dma_handle);
428 desc->local_addr= cpu_to_le64(bio->bi_sector << 9);
429 desc->transfer_size = cpu_to_le32(len);
430 offset = ( ((char*)&desc->sem_control_bits) - ((char*)p->desc));
431 desc->sem_addr = cpu_to_le64((u64)(p->page_dma+offset));
432 desc->zero1 = desc->zero2 = 0;
433 offset = ( ((char*)(desc+1)) - ((char*)p->desc));
434 desc->next_desc_addr = cpu_to_le64(p->page_dma+offset);
435 desc->control_bits = cpu_to_le32(DMASCR_GO|DMASCR_ERR_INT_EN|
436 DMASCR_PARITY_INT_EN|
437 DMASCR_CHAIN_EN |
438 DMASCR_SEM_EN |
439 pci_cmds);
440 if (rw == WRITE)
441 desc->control_bits |= cpu_to_le32(DMASCR_TRANSFER_READ);
442 desc->sem_control_bits = desc->control_bits;
443
444 bio->bi_sector += (len>>9);
445 bio->bi_size -= len;
446 bio->bi_idx++;
447 if (bio->bi_idx >= bio->bi_vcnt)
448 card->currentbio = NULL;
449
450 return 1;
451 }
452
453 static void process_page(unsigned long data)
454 {
455 /* check if any of the requests in the page are DMA_COMPLETE,
456 * and deal with them appropriately.
457 * If we find a descriptor without DMA_COMPLETE in the semaphore, then
458 * dma must have hit an error on that descriptor, so use dma_status instead
459 * and assume that all following descriptors must be re-tried.
460 */
461 struct mm_page *page;
462 struct bio *return_bio=NULL;
463 struct cardinfo *card = (struct cardinfo *)data;
464 unsigned int dma_status = card->dma_status;
465
466 spin_lock_bh(&card->lock);
467 if (card->Active < 0)
468 goto out_unlock;
469 page = &card->mm_pages[card->Active];
470
471 while (page->headcnt < page->cnt) {
472 struct bio *bio = page->bio;
473 struct mm_dma_desc *desc = &page->desc[page->headcnt];
474 int control = le32_to_cpu(desc->sem_control_bits);
475 int last=0;
476 int idx;
477
478 if (!(control & DMASCR_DMA_COMPLETE)) {
479 control = dma_status;
480 last=1;
481 }
482 page->headcnt++;
483 idx = bio->bi_phys_segments;
484 bio->bi_phys_segments++;
485 if (bio->bi_phys_segments >= bio->bi_vcnt)
486 page->bio = bio->bi_next;
487
488 pci_unmap_page(card->dev, desc->data_dma_handle,
489 bio_iovec_idx(bio,idx)->bv_len,
490 (control& DMASCR_TRANSFER_READ) ?
491 PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE);
492 if (control & DMASCR_HARD_ERROR) {
493 /* error */
494 clear_bit(BIO_UPTODATE, &bio->bi_flags);
495 printk(KERN_WARNING "MM%d: I/O error on sector %d/%d\n",
496 card->card_number,
497 le32_to_cpu(desc->local_addr)>>9,
498 le32_to_cpu(desc->transfer_size));
499 dump_dmastat(card, control);
500 } else if (test_bit(BIO_RW, &bio->bi_rw) &&
501 le32_to_cpu(desc->local_addr)>>9 == card->init_size) {
502 card->init_size += le32_to_cpu(desc->transfer_size)>>9;
503 if (card->init_size>>1 >= card->mm_size) {
504 printk(KERN_INFO "MM%d: memory now initialised\n",
505 card->card_number);
506 set_userbit(card, MEMORY_INITIALIZED, 1);
507 }
508 }
509 if (bio != page->bio) {
510 bio->bi_next = return_bio;
511 return_bio = bio;
512 }
513
514 if (last) break;
515 }
516
517 if (debug & DEBUG_LED_ON_TRANSFER)
518 set_led(card, LED_REMOVE, LED_OFF);
519
520 if (card->check_batteries) {
521 card->check_batteries = 0;
522 check_batteries(card);
523 }
524 if (page->headcnt >= page->cnt) {
525 reset_page(page);
526 card->Active = -1;
527 activate(card);
528 } else {
529 /* haven't finished with this one yet */
530 pr_debug("do some more\n");
531 mm_start_io(card);
532 }
533 out_unlock:
534 spin_unlock_bh(&card->lock);
535
536 while(return_bio) {
537 struct bio *bio = return_bio;
538
539 return_bio = bio->bi_next;
540 bio->bi_next = NULL;
541 bio_endio(bio, bio->bi_size, 0);
542 }
543 }
544
545 /*
546 -----------------------------------------------------------------------------------
547 -- mm_make_request
548 -----------------------------------------------------------------------------------
549 */
550 static int mm_make_request(request_queue_t *q, struct bio *bio)
551 {
552 struct cardinfo *card = q->queuedata;
553 pr_debug("mm_make_request %llu %u\n",
554 (unsigned long long)bio->bi_sector, bio->bi_size);
555
556 bio->bi_phys_segments = bio->bi_idx; /* count of completed segments*/
557 spin_lock_irq(&card->lock);
558 *card->biotail = bio;
559 bio->bi_next = NULL;
560 card->biotail = &bio->bi_next;
561 blk_plug_device(q);
562 spin_unlock_irq(&card->lock);
563
564 return 0;
565 }
566
567 /*
568 -----------------------------------------------------------------------------------
569 -- mm_interrupt
570 -----------------------------------------------------------------------------------
571 */
572 static irqreturn_t mm_interrupt(int irq, void *__card)
573 {
574 struct cardinfo *card = (struct cardinfo *) __card;
575 unsigned int dma_status;
576 unsigned short cfg_status;
577
578 HW_TRACE(0x30);
579
580 dma_status = le32_to_cpu(readl(card->csr_remap + DMA_STATUS_CTRL));
581
582 if (!(dma_status & (DMASCR_ERROR_MASK | DMASCR_CHAIN_COMPLETE))) {
583 /* interrupt wasn't for me ... */
584 return IRQ_NONE;
585 }
586
587 /* clear COMPLETION interrupts */
588 if (card->flags & UM_FLAG_NO_BYTE_STATUS)
589 writel(cpu_to_le32(DMASCR_DMA_COMPLETE|DMASCR_CHAIN_COMPLETE),
590 card->csr_remap+ DMA_STATUS_CTRL);
591 else
592 writeb((DMASCR_DMA_COMPLETE|DMASCR_CHAIN_COMPLETE) >> 16,
593 card->csr_remap+ DMA_STATUS_CTRL + 2);
594
595 /* log errors and clear interrupt status */
596 if (dma_status & DMASCR_ANY_ERR) {
597 unsigned int data_log1, data_log2;
598 unsigned int addr_log1, addr_log2;
599 unsigned char stat, count, syndrome, check;
600
601 stat = readb(card->csr_remap + MEMCTRLCMD_ERRSTATUS);
602
603 data_log1 = le32_to_cpu(readl(card->csr_remap + ERROR_DATA_LOG));
604 data_log2 = le32_to_cpu(readl(card->csr_remap + ERROR_DATA_LOG + 4));
605 addr_log1 = le32_to_cpu(readl(card->csr_remap + ERROR_ADDR_LOG));
606 addr_log2 = readb(card->csr_remap + ERROR_ADDR_LOG + 4);
607
608 count = readb(card->csr_remap + ERROR_COUNT);
609 syndrome = readb(card->csr_remap + ERROR_SYNDROME);
610 check = readb(card->csr_remap + ERROR_CHECK);
611
612 dump_dmastat(card, dma_status);
613
614 if (stat & 0x01)
615 printk(KERN_ERR "MM%d*: Memory access error detected (err count %d)\n",
616 card->card_number, count);
617 if (stat & 0x02)
618 printk(KERN_ERR "MM%d*: Multi-bit EDC error\n",
619 card->card_number);
620
621 printk(KERN_ERR "MM%d*: Fault Address 0x%02x%08x, Fault Data 0x%08x%08x\n",
622 card->card_number, addr_log2, addr_log1, data_log2, data_log1);
623 printk(KERN_ERR "MM%d*: Fault Check 0x%02x, Fault Syndrome 0x%02x\n",
624 card->card_number, check, syndrome);
625
626 writeb(0, card->csr_remap + ERROR_COUNT);
627 }
628
629 if (dma_status & DMASCR_PARITY_ERR_REP) {
630 printk(KERN_ERR "MM%d*: PARITY ERROR REPORTED\n", card->card_number);
631 pci_read_config_word(card->dev, PCI_STATUS, &cfg_status);
632 pci_write_config_word(card->dev, PCI_STATUS, cfg_status);
633 }
634
635 if (dma_status & DMASCR_PARITY_ERR_DET) {
636 printk(KERN_ERR "MM%d*: PARITY ERROR DETECTED\n", card->card_number);
637 pci_read_config_word(card->dev, PCI_STATUS, &cfg_status);
638 pci_write_config_word(card->dev, PCI_STATUS, cfg_status);
639 }
640
641 if (dma_status & DMASCR_SYSTEM_ERR_SIG) {
642 printk(KERN_ERR "MM%d*: SYSTEM ERROR\n", card->card_number);
643 pci_read_config_word(card->dev, PCI_STATUS, &cfg_status);
644 pci_write_config_word(card->dev, PCI_STATUS, cfg_status);
645 }
646
647 if (dma_status & DMASCR_TARGET_ABT) {
648 printk(KERN_ERR "MM%d*: TARGET ABORT\n", card->card_number);
649 pci_read_config_word(card->dev, PCI_STATUS, &cfg_status);
650 pci_write_config_word(card->dev, PCI_STATUS, cfg_status);
651 }
652
653 if (dma_status & DMASCR_MASTER_ABT) {
654 printk(KERN_ERR "MM%d*: MASTER ABORT\n", card->card_number);
655 pci_read_config_word(card->dev, PCI_STATUS, &cfg_status);
656 pci_write_config_word(card->dev, PCI_STATUS, cfg_status);
657 }
658
659 /* and process the DMA descriptors */
660 card->dma_status = dma_status;
661 tasklet_schedule(&card->tasklet);
662
663 HW_TRACE(0x36);
664
665 return IRQ_HANDLED;
666 }
667 /*
668 -----------------------------------------------------------------------------------
669 -- set_fault_to_battery_status
670 -----------------------------------------------------------------------------------
671 */
672 /*
673 * If both batteries are good, no LED
674 * If either battery has been warned, solid LED
675 * If both batteries are bad, flash the LED quickly
676 * If either battery is bad, flash the LED semi quickly
677 */
678 static void set_fault_to_battery_status(struct cardinfo *card)
679 {
680 if (card->battery[0].good && card->battery[1].good)
681 set_led(card, LED_FAULT, LED_OFF);
682 else if (card->battery[0].warned || card->battery[1].warned)
683 set_led(card, LED_FAULT, LED_ON);
684 else if (!card->battery[0].good && !card->battery[1].good)
685 set_led(card, LED_FAULT, LED_FLASH_7_0);
686 else
687 set_led(card, LED_FAULT, LED_FLASH_3_5);
688 }
689
690 static void init_battery_timer(void);
691
692
693 /*
694 -----------------------------------------------------------------------------------
695 -- check_battery
696 -----------------------------------------------------------------------------------
697 */
698 static int check_battery(struct cardinfo *card, int battery, int status)
699 {
700 if (status != card->battery[battery].good) {
701 card->battery[battery].good = !card->battery[battery].good;
702 card->battery[battery].last_change = jiffies;
703
704 if (card->battery[battery].good) {
705 printk(KERN_ERR "MM%d: Battery %d now good\n",
706 card->card_number, battery + 1);
707 card->battery[battery].warned = 0;
708 } else
709 printk(KERN_ERR "MM%d: Battery %d now FAILED\n",
710 card->card_number, battery + 1);
711
712 return 1;
713 } else if (!card->battery[battery].good &&
714 !card->battery[battery].warned &&
715 time_after_eq(jiffies, card->battery[battery].last_change +
716 (HZ * 60 * 60 * 5))) {
717 printk(KERN_ERR "MM%d: Battery %d still FAILED after 5 hours\n",
718 card->card_number, battery + 1);
719 card->battery[battery].warned = 1;
720
721 return 1;
722 }
723
724 return 0;
725 }
726 /*
727 -----------------------------------------------------------------------------------
728 -- check_batteries
729 -----------------------------------------------------------------------------------
730 */
731 static void check_batteries(struct cardinfo *card)
732 {
733 /* NOTE: this must *never* be called while the card
734 * is doing (bus-to-card) DMA, or you will need the
735 * reset switch
736 */
737 unsigned char status;
738 int ret1, ret2;
739
740 status = readb(card->csr_remap + MEMCTRLSTATUS_BATTERY);
741 if (debug & DEBUG_BATTERY_POLLING)
742 printk(KERN_DEBUG "MM%d: checking battery status, 1 = %s, 2 = %s\n",
743 card->card_number,
744 (status & BATTERY_1_FAILURE) ? "FAILURE" : "OK",
745 (status & BATTERY_2_FAILURE) ? "FAILURE" : "OK");
746
747 ret1 = check_battery(card, 0, !(status & BATTERY_1_FAILURE));
748 ret2 = check_battery(card, 1, !(status & BATTERY_2_FAILURE));
749
750 if (ret1 || ret2)
751 set_fault_to_battery_status(card);
752 }
753
754 static void check_all_batteries(unsigned long ptr)
755 {
756 int i;
757
758 for (i = 0; i < num_cards; i++)
759 if (!(cards[i].flags & UM_FLAG_NO_BATT)) {
760 struct cardinfo *card = &cards[i];
761 spin_lock_bh(&card->lock);
762 if (card->Active >= 0)
763 card->check_batteries = 1;
764 else
765 check_batteries(card);
766 spin_unlock_bh(&card->lock);
767 }
768
769 init_battery_timer();
770 }
771 /*
772 -----------------------------------------------------------------------------------
773 -- init_battery_timer
774 -----------------------------------------------------------------------------------
775 */
776 static void init_battery_timer(void)
777 {
778 init_timer(&battery_timer);
779 battery_timer.function = check_all_batteries;
780 battery_timer.expires = jiffies + (HZ * 60);
781 add_timer(&battery_timer);
782 }
783 /*
784 -----------------------------------------------------------------------------------
785 -- del_battery_timer
786 -----------------------------------------------------------------------------------
787 */
788 static void del_battery_timer(void)
789 {
790 del_timer(&battery_timer);
791 }
792 /*
793 -----------------------------------------------------------------------------------
794 -- mm_revalidate
795 -----------------------------------------------------------------------------------
796 */
797 /*
798 * Note no locks taken out here. In a worst case scenario, we could drop
799 * a chunk of system memory. But that should never happen, since validation
800 * happens at open or mount time, when locks are held.
801 *
802 * That's crap, since doing that while some partitions are opened
803 * or mounted will give you really nasty results.
804 */
805 static int mm_revalidate(struct gendisk *disk)
806 {
807 struct cardinfo *card = disk->private_data;
808 set_capacity(disk, card->mm_size << 1);
809 return 0;
810 }
811
812 static int mm_getgeo(struct block_device *bdev, struct hd_geometry *geo)
813 {
814 struct cardinfo *card = bdev->bd_disk->private_data;
815 int size = card->mm_size * (1024 / MM_HARDSECT);
816
817 /*
818 * get geometry: we have to fake one... trim the size to a
819 * multiple of 2048 (1M): tell we have 32 sectors, 64 heads,
820 * whatever cylinders.
821 */
822 geo->heads = 64;
823 geo->sectors = 32;
824 geo->cylinders = size / (geo->heads * geo->sectors);
825 return 0;
826 }
827
828 /*
829 -----------------------------------------------------------------------------------
830 -- mm_check_change
831 -----------------------------------------------------------------------------------
832 Future support for removable devices
833 */
834 static int mm_check_change(struct gendisk *disk)
835 {
836 /* struct cardinfo *dev = disk->private_data; */
837 return 0;
838 }
839 /*
840 -----------------------------------------------------------------------------------
841 -- mm_fops
842 -----------------------------------------------------------------------------------
843 */
844 static struct block_device_operations mm_fops = {
845 .owner = THIS_MODULE,
846 .getgeo = mm_getgeo,
847 .revalidate_disk= mm_revalidate,
848 .media_changed = mm_check_change,
849 };
850 /*
851 -----------------------------------------------------------------------------------
852 -- mm_pci_probe
853 -----------------------------------------------------------------------------------
854 */
855 static int __devinit mm_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
856 {
857 int ret = -ENODEV;
858 struct cardinfo *card = &cards[num_cards];
859 unsigned char mem_present;
860 unsigned char batt_status;
861 unsigned int saved_bar, data;
862 int magic_number;
863
864 if (pci_enable_device(dev) < 0)
865 return -ENODEV;
866
867 pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0xF8);
868 pci_set_master(dev);
869
870 card->dev = dev;
871 card->card_number = num_cards;
872
873 card->csr_base = pci_resource_start(dev, 0);
874 card->csr_len = pci_resource_len(dev, 0);
875 #ifdef CONFIG_MM_MAP_MEMORY
876 card->mem_base = pci_resource_start(dev, 1);
877 card->mem_len = pci_resource_len(dev, 1);
878 #endif
879
880 printk(KERN_INFO "Micro Memory(tm) controller #%d found at %02x:%02x (PCI Mem Module (Battery Backup))\n",
881 card->card_number, dev->bus->number, dev->devfn);
882
883 if (pci_set_dma_mask(dev, DMA_64BIT_MASK) &&
884 pci_set_dma_mask(dev, DMA_32BIT_MASK)) {
885 printk(KERN_WARNING "MM%d: NO suitable DMA found\n",num_cards);
886 return -ENOMEM;
887 }
888 if (!request_mem_region(card->csr_base, card->csr_len, "Micro Memory")) {
889 printk(KERN_ERR "MM%d: Unable to request memory region\n", card->card_number);
890 ret = -ENOMEM;
891
892 goto failed_req_csr;
893 }
894
895 card->csr_remap = ioremap_nocache(card->csr_base, card->csr_len);
896 if (!card->csr_remap) {
897 printk(KERN_ERR "MM%d: Unable to remap memory region\n", card->card_number);
898 ret = -ENOMEM;
899
900 goto failed_remap_csr;
901 }
902
903 printk(KERN_INFO "MM%d: CSR 0x%08lx -> 0x%p (0x%lx)\n", card->card_number,
904 card->csr_base, card->csr_remap, card->csr_len);
905
906 #ifdef CONFIG_MM_MAP_MEMORY
907 if (!request_mem_region(card->mem_base, card->mem_len, "Micro Memory")) {
908 printk(KERN_ERR "MM%d: Unable to request memory region\n", card->card_number);
909 ret = -ENOMEM;
910
911 goto failed_req_mem;
912 }
913
914 if (!(card->mem_remap = ioremap(card->mem_base, cards->mem_len))) {
915 printk(KERN_ERR "MM%d: Unable to remap memory region\n", card->card_number);
916 ret = -ENOMEM;
917
918 goto failed_remap_mem;
919 }
920
921 printk(KERN_INFO "MM%d: MEM 0x%8lx -> 0x%8lx (0x%lx)\n", card->card_number,
922 card->mem_base, card->mem_remap, card->mem_len);
923 #else
924 printk(KERN_INFO "MM%d: MEM area not remapped (CONFIG_MM_MAP_MEMORY not set)\n",
925 card->card_number);
926 #endif
927 switch(card->dev->device) {
928 case 0x5415:
929 card->flags |= UM_FLAG_NO_BYTE_STATUS | UM_FLAG_NO_BATTREG;
930 magic_number = 0x59;
931 break;
932
933 case 0x5425:
934 card->flags |= UM_FLAG_NO_BYTE_STATUS;
935 magic_number = 0x5C;
936 break;
937
938 case 0x6155:
939 card->flags |= UM_FLAG_NO_BYTE_STATUS | UM_FLAG_NO_BATTREG | UM_FLAG_NO_BATT;
940 magic_number = 0x99;
941 break;
942
943 default:
944 magic_number = 0x100;
945 break;
946 }
947
948 if (readb(card->csr_remap + MEMCTRLSTATUS_MAGIC) != magic_number) {
949 printk(KERN_ERR "MM%d: Magic number invalid\n", card->card_number);
950 ret = -ENOMEM;
951 goto failed_magic;
952 }
953
954 card->mm_pages[0].desc = pci_alloc_consistent(card->dev,
955 PAGE_SIZE*2,
956 &card->mm_pages[0].page_dma);
957 card->mm_pages[1].desc = pci_alloc_consistent(card->dev,
958 PAGE_SIZE*2,
959 &card->mm_pages[1].page_dma);
960 if (card->mm_pages[0].desc == NULL ||
961 card->mm_pages[1].desc == NULL) {
962 printk(KERN_ERR "MM%d: alloc failed\n", card->card_number);
963 goto failed_alloc;
964 }
965 reset_page(&card->mm_pages[0]);
966 reset_page(&card->mm_pages[1]);
967 card->Ready = 0; /* page 0 is ready */
968 card->Active = -1; /* no page is active */
969 card->bio = NULL;
970 card->biotail = &card->bio;
971
972 card->queue = blk_alloc_queue(GFP_KERNEL);
973 if (!card->queue)
974 goto failed_alloc;
975
976 blk_queue_make_request(card->queue, mm_make_request);
977 card->queue->queuedata = card;
978 card->queue->unplug_fn = mm_unplug_device;
979
980 tasklet_init(&card->tasklet, process_page, (unsigned long)card);
981
982 card->check_batteries = 0;
983
984 mem_present = readb(card->csr_remap + MEMCTRLSTATUS_MEMORY);
985 switch (mem_present) {
986 case MEM_128_MB:
987 card->mm_size = 1024 * 128;
988 break;
989 case MEM_256_MB:
990 card->mm_size = 1024 * 256;
991 break;
992 case MEM_512_MB:
993 card->mm_size = 1024 * 512;
994 break;
995 case MEM_1_GB:
996 card->mm_size = 1024 * 1024;
997 break;
998 case MEM_2_GB:
999 card->mm_size = 1024 * 2048;
1000 break;
1001 default:
1002 card->mm_size = 0;
1003 break;
1004 }
1005
1006 /* Clear the LED's we control */
1007 set_led(card, LED_REMOVE, LED_OFF);
1008 set_led(card, LED_FAULT, LED_OFF);
1009
1010 batt_status = readb(card->csr_remap + MEMCTRLSTATUS_BATTERY);
1011
1012 card->battery[0].good = !(batt_status & BATTERY_1_FAILURE);
1013 card->battery[1].good = !(batt_status & BATTERY_2_FAILURE);
1014 card->battery[0].last_change = card->battery[1].last_change = jiffies;
1015
1016 if (card->flags & UM_FLAG_NO_BATT)
1017 printk(KERN_INFO "MM%d: Size %d KB\n",
1018 card->card_number, card->mm_size);
1019 else {
1020 printk(KERN_INFO "MM%d: Size %d KB, Battery 1 %s (%s), Battery 2 %s (%s)\n",
1021 card->card_number, card->mm_size,
1022 (batt_status & BATTERY_1_DISABLED ? "Disabled" : "Enabled"),
1023 card->battery[0].good ? "OK" : "FAILURE",
1024 (batt_status & BATTERY_2_DISABLED ? "Disabled" : "Enabled"),
1025 card->battery[1].good ? "OK" : "FAILURE");
1026
1027 set_fault_to_battery_status(card);
1028 }
1029
1030 pci_read_config_dword(dev, PCI_BASE_ADDRESS_1, &saved_bar);
1031 data = 0xffffffff;
1032 pci_write_config_dword(dev, PCI_BASE_ADDRESS_1, data);
1033 pci_read_config_dword(dev, PCI_BASE_ADDRESS_1, &data);
1034 pci_write_config_dword(dev, PCI_BASE_ADDRESS_1, saved_bar);
1035 data &= 0xfffffff0;
1036 data = ~data;
1037 data += 1;
1038
1039 card->win_size = data;
1040
1041
1042 if (request_irq(dev->irq, mm_interrupt, IRQF_SHARED, "pci-umem", card)) {
1043 printk(KERN_ERR "MM%d: Unable to allocate IRQ\n", card->card_number);
1044 ret = -ENODEV;
1045
1046 goto failed_req_irq;
1047 }
1048
1049 card->irq = dev->irq;
1050 printk(KERN_INFO "MM%d: Window size %d bytes, IRQ %d\n", card->card_number,
1051 card->win_size, card->irq);
1052
1053 spin_lock_init(&card->lock);
1054
1055 pci_set_drvdata(dev, card);
1056
1057 if (pci_write_cmd != 0x0F) /* If not Memory Write & Invalidate */
1058 pci_write_cmd = 0x07; /* then Memory Write command */
1059
1060 if (pci_write_cmd & 0x08) { /* use Memory Write and Invalidate */
1061 unsigned short cfg_command;
1062 pci_read_config_word(dev, PCI_COMMAND, &cfg_command);
1063 cfg_command |= 0x10; /* Memory Write & Invalidate Enable */
1064 pci_write_config_word(dev, PCI_COMMAND, cfg_command);
1065 }
1066 pci_cmds = (pci_read_cmd << 28) | (pci_write_cmd << 24);
1067
1068 num_cards++;
1069
1070 if (!get_userbit(card, MEMORY_INITIALIZED)) {
1071 printk(KERN_INFO "MM%d: memory NOT initialized. Consider over-writing whole device.\n", card->card_number);
1072 card->init_size = 0;
1073 } else {
1074 printk(KERN_INFO "MM%d: memory already initialized\n", card->card_number);
1075 card->init_size = card->mm_size;
1076 }
1077
1078 /* Enable ECC */
1079 writeb(EDC_STORE_CORRECT, card->csr_remap + MEMCTRLCMD_ERRCTRL);
1080
1081 return 0;
1082
1083 failed_req_irq:
1084 failed_alloc:
1085 if (card->mm_pages[0].desc)
1086 pci_free_consistent(card->dev, PAGE_SIZE*2,
1087 card->mm_pages[0].desc,
1088 card->mm_pages[0].page_dma);
1089 if (card->mm_pages[1].desc)
1090 pci_free_consistent(card->dev, PAGE_SIZE*2,
1091 card->mm_pages[1].desc,
1092 card->mm_pages[1].page_dma);
1093 failed_magic:
1094 #ifdef CONFIG_MM_MAP_MEMORY
1095 iounmap(card->mem_remap);
1096 failed_remap_mem:
1097 release_mem_region(card->mem_base, card->mem_len);
1098 failed_req_mem:
1099 #endif
1100 iounmap(card->csr_remap);
1101 failed_remap_csr:
1102 release_mem_region(card->csr_base, card->csr_len);
1103 failed_req_csr:
1104
1105 return ret;
1106 }
1107 /*
1108 -----------------------------------------------------------------------------------
1109 -- mm_pci_remove
1110 -----------------------------------------------------------------------------------
1111 */
1112 static void mm_pci_remove(struct pci_dev *dev)
1113 {
1114 struct cardinfo *card = pci_get_drvdata(dev);
1115
1116 tasklet_kill(&card->tasklet);
1117 iounmap(card->csr_remap);
1118 release_mem_region(card->csr_base, card->csr_len);
1119 #ifdef CONFIG_MM_MAP_MEMORY
1120 iounmap(card->mem_remap);
1121 release_mem_region(card->mem_base, card->mem_len);
1122 #endif
1123 free_irq(card->irq, card);
1124
1125 if (card->mm_pages[0].desc)
1126 pci_free_consistent(card->dev, PAGE_SIZE*2,
1127 card->mm_pages[0].desc,
1128 card->mm_pages[0].page_dma);
1129 if (card->mm_pages[1].desc)
1130 pci_free_consistent(card->dev, PAGE_SIZE*2,
1131 card->mm_pages[1].desc,
1132 card->mm_pages[1].page_dma);
1133 blk_cleanup_queue(card->queue);
1134 }
1135
1136 static const struct pci_device_id mm_pci_ids[] = { {
1137 .vendor = PCI_VENDOR_ID_MICRO_MEMORY,
1138 .device = PCI_DEVICE_ID_MICRO_MEMORY_5415CN,
1139 }, {
1140 .vendor = PCI_VENDOR_ID_MICRO_MEMORY,
1141 .device = PCI_DEVICE_ID_MICRO_MEMORY_5425CN,
1142 }, {
1143 .vendor = PCI_VENDOR_ID_MICRO_MEMORY,
1144 .device = PCI_DEVICE_ID_MICRO_MEMORY_6155,
1145 }, {
1146 .vendor = 0x8086,
1147 .device = 0xB555,
1148 .subvendor= 0x1332,
1149 .subdevice= 0x5460,
1150 .class = 0x050000,
1151 .class_mask= 0,
1152 }, { /* end: all zeroes */ }
1153 };
1154
1155 MODULE_DEVICE_TABLE(pci, mm_pci_ids);
1156
1157 static struct pci_driver mm_pci_driver = {
1158 .name = "umem",
1159 .id_table = mm_pci_ids,
1160 .probe = mm_pci_probe,
1161 .remove = mm_pci_remove,
1162 };
1163 /*
1164 -----------------------------------------------------------------------------------
1165 -- mm_init
1166 -----------------------------------------------------------------------------------
1167 */
1168
1169 static int __init mm_init(void)
1170 {
1171 int retval, i;
1172 int err;
1173
1174 printk(KERN_INFO DRIVER_VERSION " : " DRIVER_DESC "\n");
1175
1176 retval = pci_register_driver(&mm_pci_driver);
1177 if (retval)
1178 return -ENOMEM;
1179
1180 err = major_nr = register_blkdev(0, "umem");
1181 if (err < 0) {
1182 pci_unregister_driver(&mm_pci_driver);
1183 return -EIO;
1184 }
1185
1186 for (i = 0; i < num_cards; i++) {
1187 mm_gendisk[i] = alloc_disk(1 << MM_SHIFT);
1188 if (!mm_gendisk[i])
1189 goto out;
1190 }
1191
1192 for (i = 0; i < num_cards; i++) {
1193 struct gendisk *disk = mm_gendisk[i];
1194 sprintf(disk->disk_name, "umem%c", 'a'+i);
1195 spin_lock_init(&cards[i].lock);
1196 disk->major = major_nr;
1197 disk->first_minor = i << MM_SHIFT;
1198 disk->fops = &mm_fops;
1199 disk->private_data = &cards[i];
1200 disk->queue = cards[i].queue;
1201 set_capacity(disk, cards[i].mm_size << 1);
1202 add_disk(disk);
1203 }
1204
1205 init_battery_timer();
1206 printk("MM: desc_per_page = %ld\n", DESC_PER_PAGE);
1207 /* printk("mm_init: Done. 10-19-01 9:00\n"); */
1208 return 0;
1209
1210 out:
1211 pci_unregister_driver(&mm_pci_driver);
1212 unregister_blkdev(major_nr, "umem");
1213 while (i--)
1214 put_disk(mm_gendisk[i]);
1215 return -ENOMEM;
1216 }
1217 /*
1218 -----------------------------------------------------------------------------------
1219 -- mm_cleanup
1220 -----------------------------------------------------------------------------------
1221 */
1222 static void __exit mm_cleanup(void)
1223 {
1224 int i;
1225
1226 del_battery_timer();
1227
1228 for (i=0; i < num_cards ; i++) {
1229 del_gendisk(mm_gendisk[i]);
1230 put_disk(mm_gendisk[i]);
1231 }
1232
1233 pci_unregister_driver(&mm_pci_driver);
1234
1235 unregister_blkdev(major_nr, "umem");
1236 }
1237
1238 module_init(mm_init);
1239 module_exit(mm_cleanup);
1240
1241 MODULE_AUTHOR(DRIVER_AUTHOR);
1242 MODULE_DESCRIPTION(DRIVER_DESC);
1243 MODULE_LICENSE("GPL");
Tomato firmware and modifications.