2 * libata-bmdma.c - helper library for PCI IDE BMDMA
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
8 * Copyright 2003-2006 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2006 Jeff Garzik
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
35 #include <linux/kernel.h>
36 #include <linux/pci.h>
37 #include <linux/libata.h>
42 * ata_irq_on - Enable interrupts on a port.
43 * @ap: Port on which interrupts are enabled.
45 * Enable interrupts on a legacy IDE device using MMIO or PIO,
46 * wait for idle, clear any pending interrupts.
49 * Inherited from caller.
51 u8
ata_irq_on(struct ata_port
*ap
)
53 struct ata_ioports
*ioaddr
= &ap
->ioaddr
;
57 ap
->last_ctl
= ap
->ctl
;
59 iowrite8(ap
->ctl
, ioaddr
->ctl_addr
);
60 tmp
= ata_wait_idle(ap
);
62 ap
->ops
->irq_clear(ap
);
67 u8
ata_dummy_irq_on (struct ata_port
*ap
) { return 0; }
70 * ata_irq_ack - Acknowledge a device interrupt.
71 * @ap: Port on which interrupts are enabled.
73 * Wait up to 10 ms for legacy IDE device to become idle (BUSY
74 * or BUSY+DRQ clear). Obtain dma status and port status from
75 * device. Clear the interrupt. Return port status.
80 u8
ata_irq_ack(struct ata_port
*ap
, unsigned int chk_drq
)
82 unsigned int bits
= chk_drq
? ATA_BUSY
| ATA_DRQ
: ATA_BUSY
;
83 u8 host_stat
= 0, post_stat
= 0, status
;
85 status
= ata_busy_wait(ap
, bits
, 1000);
88 printk(KERN_ERR
"abnormal status 0x%X\n", status
);
90 if (ap
->ioaddr
.bmdma_addr
) {
91 /* get controller status; clear intr, err bits */
92 host_stat
= ioread8(ap
->ioaddr
.bmdma_addr
+ ATA_DMA_STATUS
);
93 iowrite8(host_stat
| ATA_DMA_INTR
| ATA_DMA_ERR
,
94 ap
->ioaddr
.bmdma_addr
+ ATA_DMA_STATUS
);
96 post_stat
= ioread8(ap
->ioaddr
.bmdma_addr
+ ATA_DMA_STATUS
);
99 printk(KERN_INFO
"%s: irq ack: host_stat 0x%X, new host_stat 0x%X, drv_stat 0x%X\n",
101 host_stat
, post_stat
, status
);
105 u8
ata_dummy_irq_ack(struct ata_port
*ap
, unsigned int chk_drq
) { return 0; }
108 * ata_tf_load - send taskfile registers to host controller
109 * @ap: Port to which output is sent
110 * @tf: ATA taskfile register set
112 * Outputs ATA taskfile to standard ATA host controller.
115 * Inherited from caller.
118 void ata_tf_load(struct ata_port
*ap
, const struct ata_taskfile
*tf
)
120 struct ata_ioports
*ioaddr
= &ap
->ioaddr
;
121 unsigned int is_addr
= tf
->flags
& ATA_TFLAG_ISADDR
;
123 if (tf
->ctl
!= ap
->last_ctl
) {
124 iowrite8(tf
->ctl
, ioaddr
->ctl_addr
);
125 ap
->last_ctl
= tf
->ctl
;
129 if (is_addr
&& (tf
->flags
& ATA_TFLAG_LBA48
)) {
130 iowrite8(tf
->hob_feature
, ioaddr
->feature_addr
);
131 iowrite8(tf
->hob_nsect
, ioaddr
->nsect_addr
);
132 iowrite8(tf
->hob_lbal
, ioaddr
->lbal_addr
);
133 iowrite8(tf
->hob_lbam
, ioaddr
->lbam_addr
);
134 iowrite8(tf
->hob_lbah
, ioaddr
->lbah_addr
);
135 VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n",
144 iowrite8(tf
->feature
, ioaddr
->feature_addr
);
145 iowrite8(tf
->nsect
, ioaddr
->nsect_addr
);
146 iowrite8(tf
->lbal
, ioaddr
->lbal_addr
);
147 iowrite8(tf
->lbam
, ioaddr
->lbam_addr
);
148 iowrite8(tf
->lbah
, ioaddr
->lbah_addr
);
149 VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n",
157 if (tf
->flags
& ATA_TFLAG_DEVICE
) {
158 iowrite8(tf
->device
, ioaddr
->device_addr
);
159 VPRINTK("device 0x%X\n", tf
->device
);
166 * ata_exec_command - issue ATA command to host controller
167 * @ap: port to which command is being issued
168 * @tf: ATA taskfile register set
170 * Issues ATA command, with proper synchronization with interrupt
171 * handler / other threads.
174 * spin_lock_irqsave(host lock)
176 void ata_exec_command(struct ata_port
*ap
, const struct ata_taskfile
*tf
)
178 DPRINTK("ata%u: cmd 0x%X\n", ap
->print_id
, tf
->command
);
180 iowrite8(tf
->command
, ap
->ioaddr
.command_addr
);
185 * ata_tf_read - input device's ATA taskfile shadow registers
186 * @ap: Port from which input is read
187 * @tf: ATA taskfile register set for storing input
189 * Reads ATA taskfile registers for currently-selected device
193 * Inherited from caller.
195 void ata_tf_read(struct ata_port
*ap
, struct ata_taskfile
*tf
)
197 struct ata_ioports
*ioaddr
= &ap
->ioaddr
;
199 tf
->command
= ata_check_status(ap
);
200 tf
->feature
= ioread8(ioaddr
->error_addr
);
201 tf
->nsect
= ioread8(ioaddr
->nsect_addr
);
202 tf
->lbal
= ioread8(ioaddr
->lbal_addr
);
203 tf
->lbam
= ioread8(ioaddr
->lbam_addr
);
204 tf
->lbah
= ioread8(ioaddr
->lbah_addr
);
205 tf
->device
= ioread8(ioaddr
->device_addr
);
207 if (tf
->flags
& ATA_TFLAG_LBA48
) {
208 iowrite8(tf
->ctl
| ATA_HOB
, ioaddr
->ctl_addr
);
209 tf
->hob_feature
= ioread8(ioaddr
->error_addr
);
210 tf
->hob_nsect
= ioread8(ioaddr
->nsect_addr
);
211 tf
->hob_lbal
= ioread8(ioaddr
->lbal_addr
);
212 tf
->hob_lbam
= ioread8(ioaddr
->lbam_addr
);
213 tf
->hob_lbah
= ioread8(ioaddr
->lbah_addr
);
214 iowrite8(tf
->ctl
, ioaddr
->ctl_addr
);
215 ap
->last_ctl
= tf
->ctl
;
220 * ata_check_status - Read device status reg & clear interrupt
221 * @ap: port where the device is
223 * Reads ATA taskfile status register for currently-selected device
224 * and return its value. This also clears pending interrupts
228 * Inherited from caller.
230 u8
ata_check_status(struct ata_port
*ap
)
232 return ioread8(ap
->ioaddr
.status_addr
);
236 * ata_altstatus - Read device alternate status reg
237 * @ap: port where the device is
239 * Reads ATA taskfile alternate status register for
240 * currently-selected device and return its value.
242 * Note: may NOT be used as the check_altstatus() entry in
243 * ata_port_operations.
246 * Inherited from caller.
248 u8
ata_altstatus(struct ata_port
*ap
)
250 if (ap
->ops
->check_altstatus
)
251 return ap
->ops
->check_altstatus(ap
);
253 return ioread8(ap
->ioaddr
.altstatus_addr
);
257 * ata_bmdma_setup - Set up PCI IDE BMDMA transaction
258 * @qc: Info associated with this ATA transaction.
261 * spin_lock_irqsave(host lock)
263 void ata_bmdma_setup(struct ata_queued_cmd
*qc
)
265 struct ata_port
*ap
= qc
->ap
;
266 unsigned int rw
= (qc
->tf
.flags
& ATA_TFLAG_WRITE
);
269 /* load PRD table addr. */
270 mb(); /* make sure PRD table writes are visible to controller */
271 iowrite32(ap
->prd_dma
, ap
->ioaddr
.bmdma_addr
+ ATA_DMA_TABLE_OFS
);
273 /* specify data direction, triple-check start bit is clear */
274 dmactl
= ioread8(ap
->ioaddr
.bmdma_addr
+ ATA_DMA_CMD
);
275 dmactl
&= ~(ATA_DMA_WR
| ATA_DMA_START
);
277 dmactl
|= ATA_DMA_WR
;
278 iowrite8(dmactl
, ap
->ioaddr
.bmdma_addr
+ ATA_DMA_CMD
);
280 /* issue r/w command */
281 ap
->ops
->exec_command(ap
, &qc
->tf
);
285 * ata_bmdma_start - Start a PCI IDE BMDMA transaction
286 * @qc: Info associated with this ATA transaction.
289 * spin_lock_irqsave(host lock)
291 void ata_bmdma_start (struct ata_queued_cmd
*qc
)
293 struct ata_port
*ap
= qc
->ap
;
296 /* start host DMA transaction */
297 dmactl
= ioread8(ap
->ioaddr
.bmdma_addr
+ ATA_DMA_CMD
);
298 iowrite8(dmactl
| ATA_DMA_START
, ap
->ioaddr
.bmdma_addr
+ ATA_DMA_CMD
);
300 /* Strictly, one may wish to issue a readb() here, to
301 * flush the mmio write. However, control also passes
302 * to the hardware at this point, and it will interrupt
303 * us when we are to resume control. So, in effect,
304 * we don't care when the mmio write flushes.
305 * Further, a read of the DMA status register _immediately_
306 * following the write may not be what certain flaky hardware
307 * is expected, so I think it is best to not add a readb()
308 * without first all the MMIO ATA cards/mobos.
309 * Or maybe I'm just being paranoid.
314 * ata_bmdma_irq_clear - Clear PCI IDE BMDMA interrupt.
315 * @ap: Port associated with this ATA transaction.
317 * Clear interrupt and error flags in DMA status register.
319 * May be used as the irq_clear() entry in ata_port_operations.
322 * spin_lock_irqsave(host lock)
324 void ata_bmdma_irq_clear(struct ata_port
*ap
)
326 void __iomem
*mmio
= ap
->ioaddr
.bmdma_addr
;
331 iowrite8(ioread8(mmio
+ ATA_DMA_STATUS
), mmio
+ ATA_DMA_STATUS
);
335 * ata_bmdma_status - Read PCI IDE BMDMA status
336 * @ap: Port associated with this ATA transaction.
338 * Read and return BMDMA status register.
340 * May be used as the bmdma_status() entry in ata_port_operations.
343 * spin_lock_irqsave(host lock)
345 u8
ata_bmdma_status(struct ata_port
*ap
)
347 return ioread8(ap
->ioaddr
.bmdma_addr
+ ATA_DMA_STATUS
);
351 * ata_bmdma_stop - Stop PCI IDE BMDMA transfer
352 * @qc: Command we are ending DMA for
354 * Clears the ATA_DMA_START flag in the dma control register
356 * May be used as the bmdma_stop() entry in ata_port_operations.
359 * spin_lock_irqsave(host lock)
361 void ata_bmdma_stop(struct ata_queued_cmd
*qc
)
363 struct ata_port
*ap
= qc
->ap
;
364 void __iomem
*mmio
= ap
->ioaddr
.bmdma_addr
;
366 /* clear start/stop bit */
367 iowrite8(ioread8(mmio
+ ATA_DMA_CMD
) & ~ATA_DMA_START
,
370 /* one-PIO-cycle guaranteed wait, per spec, for HDMA1:0 transition */
371 ata_altstatus(ap
); /* dummy read */
375 * ata_bmdma_freeze - Freeze BMDMA controller port
376 * @ap: port to freeze
378 * Freeze BMDMA controller port.
381 * Inherited from caller.
383 void ata_bmdma_freeze(struct ata_port
*ap
)
385 struct ata_ioports
*ioaddr
= &ap
->ioaddr
;
388 ap
->last_ctl
= ap
->ctl
;
390 iowrite8(ap
->ctl
, ioaddr
->ctl_addr
);
392 /* Under certain circumstances, some controllers raise IRQ on
393 * ATA_NIEN manipulation. Also, many controllers fail to mask
394 * previously pending IRQ on ATA_NIEN assertion. Clear it.
398 ap
->ops
->irq_clear(ap
);
402 * ata_bmdma_thaw - Thaw BMDMA controller port
405 * Thaw BMDMA controller port.
408 * Inherited from caller.
410 void ata_bmdma_thaw(struct ata_port
*ap
)
412 /* clear & re-enable interrupts */
414 ap
->ops
->irq_clear(ap
);
419 * ata_bmdma_drive_eh - Perform EH with given methods for BMDMA controller
420 * @ap: port to handle error for
421 * @prereset: prereset method (can be NULL)
422 * @softreset: softreset method (can be NULL)
423 * @hardreset: hardreset method (can be NULL)
424 * @postreset: postreset method (can be NULL)
426 * Handle error for ATA BMDMA controller. It can handle both
427 * PATA and SATA controllers. Many controllers should be able to
428 * use this EH as-is or with some added handling before and
431 * This function is intended to be used for constructing
432 * ->error_handler callback by low level drivers.
435 * Kernel thread context (may sleep)
437 void ata_bmdma_drive_eh(struct ata_port
*ap
, ata_prereset_fn_t prereset
,
438 ata_reset_fn_t softreset
, ata_reset_fn_t hardreset
,
439 ata_postreset_fn_t postreset
)
441 struct ata_queued_cmd
*qc
;
445 qc
= __ata_qc_from_tag(ap
, ap
->active_tag
);
446 if (qc
&& !(qc
->flags
& ATA_QCFLAG_FAILED
))
449 /* reset PIO HSM and stop DMA engine */
450 spin_lock_irqsave(ap
->lock
, flags
);
452 ap
->hsm_task_state
= HSM_ST_IDLE
;
454 if (qc
&& (qc
->tf
.protocol
== ATA_PROT_DMA
||
455 qc
->tf
.protocol
== ATA_PROT_ATAPI_DMA
)) {
458 host_stat
= ap
->ops
->bmdma_status(ap
);
460 /* BMDMA controllers indicate host bus error by
461 * setting DMA_ERR bit and timing out. As it wasn't
462 * really a timeout event, adjust error mask and
463 * cancel frozen state.
465 if (qc
->err_mask
== AC_ERR_TIMEOUT
&& (host_stat
& ATA_DMA_ERR
)) {
466 qc
->err_mask
= AC_ERR_HOST_BUS
;
470 ap
->ops
->bmdma_stop(qc
);
475 ap
->ops
->irq_clear(ap
);
477 spin_unlock_irqrestore(ap
->lock
, flags
);
480 ata_eh_thaw_port(ap
);
482 /* PIO and DMA engines have been stopped, perform recovery */
483 ata_do_eh(ap
, prereset
, softreset
, hardreset
, postreset
);
487 * ata_bmdma_error_handler - Stock error handler for BMDMA controller
488 * @ap: port to handle error for
490 * Stock error handler for BMDMA controller.
493 * Kernel thread context (may sleep)
495 void ata_bmdma_error_handler(struct ata_port
*ap
)
497 ata_reset_fn_t hardreset
;
500 if (sata_scr_valid(ap
))
501 hardreset
= sata_std_hardreset
;
503 ata_bmdma_drive_eh(ap
, ata_std_prereset
, ata_std_softreset
, hardreset
,
508 * ata_bmdma_post_internal_cmd - Stock post_internal_cmd for
510 * @qc: internal command to clean up
513 * Kernel thread context (may sleep)
515 void ata_bmdma_post_internal_cmd(struct ata_queued_cmd
*qc
)
517 if (qc
->ap
->ioaddr
.bmdma_addr
)
522 * ata_sff_port_start - Set port up for dma.
523 * @ap: Port to initialize
525 * Called just after data structures for each port are
526 * initialized. Allocates space for PRD table if the device
527 * is DMA capable SFF.
529 * May be used as the port_start() entry in ata_port_operations.
532 * Inherited from caller.
535 int ata_sff_port_start(struct ata_port
*ap
)
537 if (ap
->ioaddr
.bmdma_addr
)
538 return ata_port_start(ap
);
544 static int ata_resources_present(struct pci_dev
*pdev
, int port
)
548 /* Check the PCI resources for this channel are enabled */
550 for (i
= 0; i
< 2; i
++) {
551 if (pci_resource_start(pdev
, port
+ i
) == 0 ||
552 pci_resource_len(pdev
, port
+ i
) == 0)
559 * ata_pci_init_bmdma - acquire PCI BMDMA resources and init ATA host
560 * @host: target ATA host
562 * Acquire PCI BMDMA resources and initialize @host accordingly.
565 * Inherited from calling layer (may sleep).
568 * 0 on success, -errno otherwise.
570 int ata_pci_init_bmdma(struct ata_host
*host
)
572 struct device
*gdev
= host
->dev
;
573 struct pci_dev
*pdev
= to_pci_dev(gdev
);
576 /* TODO: If we get no DMA mask we should fall back to PIO */
577 rc
= pci_set_dma_mask(pdev
, ATA_DMA_MASK
);
580 rc
= pci_set_consistent_dma_mask(pdev
, ATA_DMA_MASK
);
584 /* request and iomap DMA region */
585 rc
= pcim_iomap_regions(pdev
, 1 << 4, DRV_NAME
);
587 dev_printk(KERN_ERR
, gdev
, "failed to request/iomap BAR4\n");
590 host
->iomap
= pcim_iomap_table(pdev
);
592 for (i
= 0; i
< 2; i
++) {
593 struct ata_port
*ap
= host
->ports
[i
];
594 void __iomem
*bmdma
= host
->iomap
[4] + 8 * i
;
596 if (ata_port_is_dummy(ap
))
599 ap
->ioaddr
.bmdma_addr
= bmdma
;
600 if ((!(ap
->flags
& ATA_FLAG_IGN_SIMPLEX
)) &&
601 (ioread8(bmdma
+ 2) & 0x80))
602 host
->flags
|= ATA_HOST_SIMPLEX
;
609 * ata_pci_init_native_host - acquire native ATA resources and init host
610 * @host: target ATA host
612 * Acquire native PCI ATA resources for @host and initialize the
613 * first two ports of @host accordingly. Ports marked dummy are
614 * skipped and allocation failure makes the port dummy.
617 * Inherited from calling layer (may sleep).
620 * 0 if at least one port is initialized, -ENODEV if no port is
623 int ata_pci_init_native_host(struct ata_host
*host
)
625 struct device
*gdev
= host
->dev
;
626 struct pci_dev
*pdev
= to_pci_dev(gdev
);
627 unsigned int mask
= 0;
630 /* request, iomap BARs and init port addresses accordingly */
631 for (i
= 0; i
< 2; i
++) {
632 struct ata_port
*ap
= host
->ports
[i
];
634 void __iomem
* const *iomap
;
636 if (ata_port_is_dummy(ap
))
639 /* Discard disabled ports. Some controllers show
640 * their unused channels this way. Disabled ports are
643 if (!ata_resources_present(pdev
, i
)) {
644 ap
->ops
= &ata_dummy_port_ops
;
648 rc
= pcim_iomap_regions(pdev
, 0x3 << base
, DRV_NAME
);
650 dev_printk(KERN_WARNING
, gdev
,
651 "failed to request/iomap BARs for port %d "
652 "(errno=%d)\n", i
, rc
);
654 pcim_pin_device(pdev
);
655 ap
->ops
= &ata_dummy_port_ops
;
658 host
->iomap
= iomap
= pcim_iomap_table(pdev
);
660 ap
->ioaddr
.cmd_addr
= iomap
[base
];
661 ap
->ioaddr
.altstatus_addr
=
662 ap
->ioaddr
.ctl_addr
= (void __iomem
*)
663 ((unsigned long)iomap
[base
+ 1] | ATA_PCI_CTL_OFS
);
664 ata_std_ports(&ap
->ioaddr
);
670 dev_printk(KERN_ERR
, gdev
, "no available native port\n");
678 * ata_pci_prepare_native_host - helper to prepare native PCI ATA host
679 * @pdev: target PCI device
680 * @ppi: array of port_info, must be enough for two ports
681 * @r_host: out argument for the initialized ATA host
683 * Helper to allocate ATA host for @pdev, acquire all native PCI
684 * resources and initialize it accordingly in one go.
687 * Inherited from calling layer (may sleep).
690 * 0 on success, -errno otherwise.
692 int ata_pci_prepare_native_host(struct pci_dev
*pdev
,
693 const struct ata_port_info
* const * ppi
,
694 struct ata_host
**r_host
)
696 struct ata_host
*host
;
699 if (!devres_open_group(&pdev
->dev
, NULL
, GFP_KERNEL
))
702 host
= ata_host_alloc_pinfo(&pdev
->dev
, ppi
, 2);
704 dev_printk(KERN_ERR
, &pdev
->dev
,
705 "failed to allocate ATA host\n");
710 rc
= ata_pci_init_native_host(host
);
714 /* init DMA related stuff */
715 rc
= ata_pci_init_bmdma(host
);
719 devres_remove_group(&pdev
->dev
, NULL
);
724 /* This is necessary because PCI and iomap resources are
725 * merged and releasing the top group won't release the
726 * acquired resources if some of those have been acquired
727 * before entering this function.
729 pcim_iounmap_regions(pdev
, 0xf);
731 devres_release_group(&pdev
->dev
, NULL
);
735 struct ata_legacy_devres
{
737 unsigned long cmd_port
[2];
738 void __iomem
* cmd_addr
[2];
739 void __iomem
* ctl_addr
[2];
741 void * irq_dev_id
[2];
744 static void ata_legacy_free_irqs(struct ata_legacy_devres
*legacy_dr
)
748 for (i
= 0; i
< 2; i
++) {
749 if (!legacy_dr
->irq
[i
])
752 free_irq(legacy_dr
->irq
[i
], legacy_dr
->irq_dev_id
[i
]);
753 legacy_dr
->irq
[i
] = 0;
754 legacy_dr
->irq_dev_id
[i
] = NULL
;
758 static void ata_legacy_release(struct device
*gdev
, void *res
)
760 struct ata_legacy_devres
*this = res
;
763 ata_legacy_free_irqs(this);
765 for (i
= 0; i
< 2; i
++) {
766 if (this->cmd_addr
[i
])
767 ioport_unmap(this->cmd_addr
[i
]);
768 if (this->ctl_addr
[i
])
769 ioport_unmap(this->ctl_addr
[i
]);
770 if (this->cmd_port
[i
])
771 release_region(this->cmd_port
[i
], 8);
775 static int ata_init_legacy_port(struct ata_port
*ap
,
776 struct ata_legacy_devres
*legacy_dr
)
778 struct ata_host
*host
= ap
->host
;
779 int port_no
= ap
->port_no
;
780 unsigned long cmd_port
, ctl_port
;
783 cmd_port
= ATA_PRIMARY_CMD
;
784 ctl_port
= ATA_PRIMARY_CTL
;
786 cmd_port
= ATA_SECONDARY_CMD
;
787 ctl_port
= ATA_SECONDARY_CTL
;
790 /* request cmd_port */
791 if (request_region(cmd_port
, 8, "libata"))
792 legacy_dr
->cmd_port
[port_no
] = cmd_port
;
794 dev_printk(KERN_WARNING
, host
->dev
,
795 "0x%0lX IDE port busy\n", cmd_port
);
799 /* iomap cmd and ctl ports */
800 legacy_dr
->cmd_addr
[port_no
] = ioport_map(cmd_port
, 8);
801 legacy_dr
->ctl_addr
[port_no
] = ioport_map(ctl_port
, 1);
802 if (!legacy_dr
->cmd_addr
[port_no
] || !legacy_dr
->ctl_addr
[port_no
]) {
803 dev_printk(KERN_WARNING
, host
->dev
,
804 "failed to map cmd/ctl ports\n");
808 /* init IO addresses */
809 ap
->ioaddr
.cmd_addr
= legacy_dr
->cmd_addr
[port_no
];
810 ap
->ioaddr
.altstatus_addr
= legacy_dr
->ctl_addr
[port_no
];
811 ap
->ioaddr
.ctl_addr
= legacy_dr
->ctl_addr
[port_no
];
812 ata_std_ports(&ap
->ioaddr
);
818 * ata_init_legacy_host - acquire legacy ATA resources and init ATA host
819 * @host: target ATA host
820 * @was_busy: out parameter, indicates whether any port was busy
822 * Acquire legacy ATA resources for the first two ports of @host
823 * and initialize it accordingly. Ports marked dummy are skipped
824 * and resource acquistion failure makes the port dummy.
827 * Inherited from calling layer (may sleep).
830 * 0 if at least one port is initialized, -ENODEV if no port is
833 static int ata_init_legacy_host(struct ata_host
*host
, int *was_busy
)
835 struct device
*gdev
= host
->dev
;
836 struct ata_legacy_devres
*legacy_dr
;
839 if (!devres_open_group(gdev
, NULL
, GFP_KERNEL
))
843 legacy_dr
= devres_alloc(ata_legacy_release
, sizeof(*legacy_dr
),
847 devres_add(gdev
, legacy_dr
);
849 for (i
= 0; i
< 2; i
++) {
850 if (ata_port_is_dummy(host
->ports
[i
]))
853 rc
= ata_init_legacy_port(host
->ports
[i
], legacy_dr
);
855 legacy_dr
->mask
|= 1 << i
;
859 host
->ports
[i
]->ops
= &ata_dummy_port_ops
;
863 if (!legacy_dr
->mask
) {
864 dev_printk(KERN_ERR
, gdev
, "no available legacy port\n");
868 devres_remove_group(gdev
, NULL
);
872 devres_release_group(gdev
, NULL
);
877 * ata_request_legacy_irqs - request legacy ATA IRQs
878 * @host: target ATA host
879 * @handler: array of IRQ handlers
880 * @irq_flags: array of IRQ flags
881 * @dev_id: array of IRQ dev_ids
883 * Request legacy IRQs for non-dummy legacy ports in @host. All
884 * IRQ parameters are passed as array to allow ports to have
885 * separate IRQ handlers.
888 * Inherited from calling layer (may sleep).
891 * 0 on success, -errno otherwise.
893 static int ata_request_legacy_irqs(struct ata_host
*host
,
894 irq_handler_t
const *handler
,
895 const unsigned int *irq_flags
,
896 void * const *dev_id
)
898 struct device
*gdev
= host
->dev
;
899 struct ata_legacy_devres
*legacy_dr
;
902 legacy_dr
= devres_find(host
->dev
, ata_legacy_release
, NULL
, NULL
);
905 for (i
= 0; i
< 2; i
++) {
908 /* FIXME: ATA_*_IRQ() should take generic device not pci_dev */
910 irq
= ATA_PRIMARY_IRQ(to_pci_dev(gdev
));
912 irq
= ATA_SECONDARY_IRQ(to_pci_dev(gdev
));
914 if (!(legacy_dr
->mask
& (1 << i
)))
918 dev_printk(KERN_ERR
, gdev
,
919 "NULL handler specified for port %d\n", i
);
924 rc
= request_irq(irq
, handler
[i
], irq_flags
[i
], DRV_NAME
,
927 dev_printk(KERN_ERR
, gdev
,
928 "irq %u request failed (errno=%d)\n", irq
, rc
);
932 /* record irq allocation in legacy_dr */
933 legacy_dr
->irq
[i
] = irq
;
934 legacy_dr
->irq_dev_id
[i
] = dev_id
[i
];
936 /* only used to print info */
946 ata_legacy_free_irqs(legacy_dr
);
951 * ata_pci_init_one - Initialize/register PCI IDE host controller
952 * @pdev: Controller to be initialized
953 * @ppi: array of port_info, must be enough for two ports
955 * This is a helper function which can be called from a driver's
956 * xxx_init_one() probe function if the hardware uses traditional
957 * IDE taskfile registers.
959 * This function calls pci_enable_device(), reserves its register
960 * regions, sets the dma mask, enables bus master mode, and calls
964 * Nobody makes a single channel controller that appears solely as
965 * the secondary legacy port on PCI.
968 * Inherited from PCI layer (may sleep).
971 * Zero on success, negative on errno-based value on error.
973 int ata_pci_init_one(struct pci_dev
*pdev
,
974 const struct ata_port_info
* const * ppi
)
976 struct device
*dev
= &pdev
->dev
;
977 const struct ata_port_info
*pi
= NULL
;
978 struct ata_host
*host
= NULL
;
985 /* look up the first valid port_info */
986 for (i
= 0; i
< 2 && ppi
[i
]; i
++) {
987 if (ppi
[i
]->port_ops
!= &ata_dummy_port_ops
) {
994 dev_printk(KERN_ERR
, &pdev
->dev
,
995 "no valid port_info specified\n");
999 if (!devres_open_group(dev
, NULL
, GFP_KERNEL
))
1002 /* FIXME: Really for ATA it isn't safe because the device may be
1003 multi-purpose and we want to leave it alone if it was already
1004 enabled. Secondly for shared use as Arjan says we want refcounting
1006 Checking dev->is_enabled is insufficient as this is not set at
1007 boot for the primary video which is BIOS enabled
1010 rc
= pcim_enable_device(pdev
);
1014 if ((pdev
->class >> 8) == PCI_CLASS_STORAGE_IDE
) {
1017 /* TODO: What if one channel is in native mode ... */
1018 pci_read_config_byte(pdev
, PCI_CLASS_PROG
, &tmp8
);
1019 mask
= (1 << 2) | (1 << 0);
1020 if ((tmp8
& mask
) != mask
)
1022 #if defined(CONFIG_NO_ATA_LEGACY)
1023 /* Some platforms with PCI limits cannot address compat
1024 port space. In that case we punt if their firmware has
1025 left a device in compatibility mode */
1027 printk(KERN_ERR
"ata: Compatibility mode ATA is not supported on this platform, skipping.\n");
1034 /* alloc and init host */
1035 host
= ata_host_alloc_pinfo(dev
, ppi
, 2);
1037 dev_printk(KERN_ERR
, &pdev
->dev
,
1038 "failed to allocate ATA host\n");
1044 rc
= ata_pci_init_native_host(host
);
1050 rc
= ata_init_legacy_host(host
, &was_busy
);
1052 pcim_pin_device(pdev
);
1056 /* request respective PCI regions, may fail */
1057 rc
= pci_request_region(pdev
, 1, DRV_NAME
);
1058 rc
= pci_request_region(pdev
, 3, DRV_NAME
);
1061 /* init BMDMA, may fail */
1062 ata_pci_init_bmdma(host
);
1063 pci_set_master(pdev
);
1065 /* start host and request IRQ */
1066 rc
= ata_host_start(host
);
1071 rc
= devm_request_irq(dev
, pdev
->irq
, pi
->port_ops
->irq_handler
,
1072 IRQF_SHARED
, DRV_NAME
, host
);
1073 host
->irq
= pdev
->irq
;
1075 irq_handler_t handler
[2] = { host
->ops
->irq_handler
,
1076 host
->ops
->irq_handler
};
1077 unsigned int irq_flags
[2] = { IRQF_SHARED
, IRQF_SHARED
};
1078 void *dev_id
[2] = { host
, host
};
1080 rc
= ata_request_legacy_irqs(host
, handler
, irq_flags
, dev_id
);
1086 rc
= ata_host_register(host
, pi
->sht
);
1090 devres_remove_group(dev
, NULL
);
1094 devres_release_group(dev
, NULL
);
1099 * ata_pci_clear_simplex - attempt to kick device out of simplex
1102 * Some PCI ATA devices report simplex mode but in fact can be told to
1103 * enter non simplex mode. This implements the neccessary logic to
1104 * perform the task on such devices. Calling it on other devices will
1105 * have -undefined- behaviour.
1108 int ata_pci_clear_simplex(struct pci_dev
*pdev
)
1110 unsigned long bmdma
= pci_resource_start(pdev
, 4);
1116 simplex
= inb(bmdma
+ 0x02);
1117 outb(simplex
& 0x60, bmdma
+ 0x02);
1118 simplex
= inb(bmdma
+ 0x02);
1124 unsigned long ata_pci_default_filter(struct ata_device
*adev
, unsigned long xfer_mask
)
1126 /* Filter out DMA modes if the device has been configured by
1127 the BIOS as PIO only */
1129 if (adev
->ap
->ioaddr
.bmdma_addr
== 0)
1130 xfer_mask
&= ~(ATA_MASK_MWDMA
| ATA_MASK_UDMA
);
1134 #endif /* CONFIG_PCI */