RT-AC66 3.0.0.4.374.130 core
[tomato.git] / release / src-rt-6.x / linux / linux-2.6 / arch / sh / mm / pg-sh4.c
blobdf69da9ca69c7685e48a709924e58c175836ebe3
1 /*
2 * arch/sh/mm/pg-sh4.c
4 * Copyright (C) 1999, 2000, 2002 Niibe Yutaka
5 * Copyright (C) 2002 - 2005 Paul Mundt
7 * Released under the terms of the GNU GPL v2.0.
8 */
9 #include <linux/mm.h>
10 #include <linux/mutex.h>
11 #include <asm/mmu_context.h>
12 #include <asm/cacheflush.h>
14 extern struct mutex p3map_mutex[];
16 #define CACHE_ALIAS (current_cpu_data.dcache.alias_mask)
19 * clear_user_page
20 * @to: P1 address
21 * @address: U0 address to be mapped
22 * @page: page (virt_to_page(to))
24 void clear_user_page(void *to, unsigned long address, struct page *page)
26 __set_bit(PG_mapped, &page->flags);
27 if (((address ^ (unsigned long)to) & CACHE_ALIAS) == 0)
28 clear_page(to);
29 else {
30 unsigned long phys_addr = PHYSADDR(to);
31 unsigned long p3_addr = P3SEG + (address & CACHE_ALIAS);
32 pgd_t *pgd = pgd_offset_k(p3_addr);
33 pud_t *pud = pud_offset(pgd, p3_addr);
34 pmd_t *pmd = pmd_offset(pud, p3_addr);
35 pte_t *pte = pte_offset_kernel(pmd, p3_addr);
36 pte_t entry;
37 unsigned long flags;
39 entry = pfn_pte(phys_addr >> PAGE_SHIFT, PAGE_KERNEL);
40 mutex_lock(&p3map_mutex[(address & CACHE_ALIAS)>>12]);
41 set_pte(pte, entry);
42 local_irq_save(flags);
43 flush_tlb_one(get_asid(), p3_addr);
44 local_irq_restore(flags);
45 update_mmu_cache(NULL, p3_addr, entry);
46 __clear_user_page((void *)p3_addr, to);
47 pte_clear(&init_mm, p3_addr, pte);
48 mutex_unlock(&p3map_mutex[(address & CACHE_ALIAS)>>12]);
53 * copy_user_page
54 * @to: P1 address
55 * @from: P1 address
56 * @address: U0 address to be mapped
57 * @page: page (virt_to_page(to))
59 void copy_user_page(void *to, void *from, unsigned long address,
60 struct page *page)
62 __set_bit(PG_mapped, &page->flags);
63 if (((address ^ (unsigned long)to) & CACHE_ALIAS) == 0)
64 copy_page(to, from);
65 else {
66 unsigned long phys_addr = PHYSADDR(to);
67 unsigned long p3_addr = P3SEG + (address & CACHE_ALIAS);
68 pgd_t *pgd = pgd_offset_k(p3_addr);
69 pud_t *pud = pud_offset(pgd, p3_addr);
70 pmd_t *pmd = pmd_offset(pud, p3_addr);
71 pte_t *pte = pte_offset_kernel(pmd, p3_addr);
72 pte_t entry;
73 unsigned long flags;
75 entry = pfn_pte(phys_addr >> PAGE_SHIFT, PAGE_KERNEL);
76 mutex_lock(&p3map_mutex[(address & CACHE_ALIAS)>>12]);
77 set_pte(pte, entry);
78 local_irq_save(flags);
79 flush_tlb_one(get_asid(), p3_addr);
80 local_irq_restore(flags);
81 update_mmu_cache(NULL, p3_addr, entry);
82 __copy_user_page((void *)p3_addr, from, to);
83 pte_clear(&init_mm, p3_addr, pte);
84 mutex_unlock(&p3map_mutex[(address & CACHE_ALIAS)>>12]);
89 * For SH-4, we have our own implementation for ptep_get_and_clear
91 inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
93 pte_t pte = *ptep;
95 pte_clear(mm, addr, ptep);
96 if (!pte_not_present(pte)) {
97 unsigned long pfn = pte_pfn(pte);
98 if (pfn_valid(pfn)) {
99 struct page *page = pfn_to_page(pfn);
100 struct address_space *mapping = page_mapping(page);
101 if (!mapping || !mapping_writably_mapped(mapping))
102 __clear_bit(PG_mapped, &page->flags);
105 return pte;