release/src-rt-6.x/linux/linux-2.6/arch/ppc/platforms/ev64260.h

   1 /*
   2  * Definitions for Marvell/Galileo EV-64260-BP Evaluation Board.
   3  *
   4  * Author: Mark A. Greer <mgreer@mvista.com>
   5  *
   6  * 2001-2002 (c) MontaVista, Software, Inc.  This file is licensed under
   7  * the terms of the GNU General Public License version 2.  This program
   8  * is licensed "as is" without any warranty of any kind, whether express
   9  * or implied.
  10  */
  11
  12 /*
  13  * The MV64x60 has 2 PCI buses each with 1 window from the CPU bus to
  14  * PCI I/O space and 4 windows from the CPU bus to PCI MEM space.
  15  * We'll only use one PCI MEM window on each PCI bus.
  16  *
  17  * This is the CPU physical memory map (windows must be at least 1MB and start
  18  * on a boundary that is a multiple of the window size):
  19  *
  20  *      0xfc000000-0xffffffff           - External FLASH on device module
  21  *      0xfbf00000-0xfbffffff           - Embedded (on board) FLASH
  22  *      0xfbe00000-0xfbefffff           - GT64260 Registers (preferably)
  23  *                                        but really a config option
  24  *      0xfbd00000-0xfbdfffff           - External SRAM on device module
  25  *      0xfbc00000-0xfbcfffff           - TODC chip on device module
  26  *      0xfbb00000-0xfbbfffff           - External UART on device module
  27  *      0xa2000000-0xfbafffff           - <hole>
  28  *      0xa1000000-0xa1ffffff           - PCI 1 I/O (defined in gt64260.h)
  29  *      0xa0000000-0xa0ffffff           - PCI 0 I/O (defined in gt64260.h)
  30  *      0x90000000-0x9fffffff           - PCI 1 MEM (defined in gt64260.h)
  31  *      0x80000000-0x8fffffff           - PCI 0 MEM (defined in gt64260.h)
  32  */
  33
  34 #ifndef __PPC_PLATFORMS_EV64260_H
  35 #define __PPC_PLATFORMS_EV64260_H
  36
  37 /* PCI mappings */
  38 #define EV64260_PCI0_IO_CPU_BASE        0xa0000000
  39 #define EV64260_PCI0_IO_PCI_BASE        0x00000000
  40 #define EV64260_PCI0_IO_SIZE            0x01000000
  41
  42 #define EV64260_PCI0_MEM_CPU_BASE       0x80000000
  43 #define EV64260_PCI0_MEM_PCI_BASE       0x80000000
  44 #define EV64260_PCI0_MEM_SIZE           0x10000000
  45
  46 #define EV64260_PCI1_IO_CPU_BASE        (EV64260_PCI0_IO_CPU_BASE + \
  47                                                 EV64260_PCI0_IO_SIZE)
  48 #define EV64260_PCI1_IO_PCI_BASE        (EV64260_PCI0_IO_PCI_BASE + \
  49                                                 EV64260_PCI0_IO_SIZE)
  50 #define EV64260_PCI1_IO_SIZE            0x01000000
  51
  52 #define EV64260_PCI1_MEM_CPU_BASE       (EV64260_PCI0_MEM_CPU_BASE + \
  53                                                 EV64260_PCI0_MEM_SIZE)
  54 #define EV64260_PCI1_MEM_PCI_BASE       (EV64260_PCI0_MEM_PCI_BASE + \
  55                                                 EV64260_PCI0_MEM_SIZE)
  56 #define EV64260_PCI1_MEM_SIZE           0x10000000
  57
  58 /* CPU Physical Memory Map setup (other than PCI) */
  59 #define EV64260_EXT_FLASH_BASE          0xfc000000
  60 #define EV64260_EMB_FLASH_BASE          0xfbf00000
  61 #define EV64260_EXT_SRAM_BASE           0xfbd00000
  62 #define EV64260_TODC_BASE               0xfbc00000
  63 #define EV64260_UART_BASE               0xfbb00000
  64
  65 #define EV64260_EXT_FLASH_SIZE_ACTUAL   0x04000000  /* <= 64MB Extern FLASH */
  66 #define EV64260_EMB_FLASH_SIZE_ACTUAL   0x00080000  /* 512KB of Embed FLASH */
  67 #define EV64260_EXT_SRAM_SIZE_ACTUAL    0x00100000  /* 1MB SDRAM */
  68 #define EV64260_TODC_SIZE_ACTUAL        0x00000020  /* 32 bytes for TODC */
  69 #define EV64260_UART_SIZE_ACTUAL        0x00000040  /* 64 bytes for DUART */
  70
  71 #define EV64260_EXT_FLASH_SIZE          max(GT64260_WINDOW_SIZE_MIN,    \
  72                                                 EV64260_EXT_FLASH_SIZE_ACTUAL)
  73 #define EV64260_EMB_FLASH_SIZE          max(GT64260_WINDOW_SIZE_MIN,    \
  74                                                 EV64260_EMB_FLASH_SIZE_ACTUAL)
  75 #define EV64260_EXT_SRAM_SIZE           max(GT64260_WINDOW_SIZE_MIN,    \
  76                                                 EV64260_EXT_SRAM_SIZE_ACTUAL)
  77 #define EV64260_TODC_SIZE               max(GT64260_WINDOW_SIZE_MIN,    \
  78                                                 EV64260_TODC_SIZE_ACTUAL)
  79 /* Assembler in bootwrapper blows up if 'max' is used */
  80 #define EV64260_UART_SIZE               GT64260_WINDOW_SIZE_MIN
  81 #define EV64260_UART_END                ((EV64260_UART_BASE +           \
  82                                         EV64260_UART_SIZE - 1) & 0xfff00000)
  83
  84 /* Board-specific IRQ info */
  85 #define EV64260_UART_0_IRQ              85
  86 #define EV64260_UART_1_IRQ              86
  87 #define EV64260_PCI_0_IRQ               91
  88 #define EV64260_PCI_1_IRQ               93
  89
  90 /* Serial port setup */
  91 #define EV64260_DEFAULT_BAUD            115200
  92
  93 #if defined(CONFIG_SERIAL_MPSC_CONSOLE)
  94 #define SERIAL_PORT_DFNS
  95
  96 #define EV64260_MPSC_CLK_SRC            8               /* TCLK */
  97 #define EV64260_MPSC_CLK_FREQ           100000000       /* 100MHz clk */
  98 #else
  99 #define EV64260_SERIAL_0                (EV64260_UART_BASE + 0x20)
 100 #define EV64260_SERIAL_1                EV64260_UART_BASE
 101
 102 #define BASE_BAUD       (EV64260_DEFAULT_BAUD * 2)
 103
 104 #ifdef CONFIG_SERIAL_MANY_PORTS
 105 #define RS_TABLE_SIZE   64
 106 #else
 107 #define RS_TABLE_SIZE   2
 108 #endif
 109
 110 #ifdef CONFIG_SERIAL_DETECT_IRQ
 111 #define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF|ASYNC_SKIP_TEST|ASYNC_AUTO_IRQ)
 112 #else
 113 #define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF|ASYNC_SKIP_TEST)
 114 #endif
 115
 116 /* Required for bootloader's ns16550.c code */
 117 #define STD_SERIAL_PORT_DFNS                                            \
 118         { 0, BASE_BAUD, EV64260_SERIAL_0, EV64260_UART_0_IRQ, STD_COM_FLAGS, \
 119         iomem_base: (u8 *)EV64260_SERIAL_0,     /* ttyS0 */             \
 120         iomem_reg_shift: 2,                                             \
 121         io_type: SERIAL_IO_MEM },
 122
 123 #define SERIAL_PORT_DFNS \
 124         STD_SERIAL_PORT_DFNS
 125 #endif
 126 #endif /* __PPC_PLATFORMS_EV64260_H */