release/src-rt-6.x/linux/linux-2.6/arch/ppc/platforms/85xx/mpc8540_ads.c

   1 /*
   2  * MPC8540ADS board specific routines
   3  *
   4  * Maintainer: Kumar Gala <galak@kernel.crashing.org>
   5  *
   6  * Copyright 2004 Freescale Semiconductor Inc.
   7  *
   8  * This program is free software; you can redistribute  it and/or modify it
   9  * under  the terms of  the GNU General  Public License as published by the
  10  * Free Software Foundation;  either version 2 of the  License, or (at your
  11  * option) any later version.
  12  */
  13
  14 #include <linux/stddef.h>
  15 #include <linux/kernel.h>
  16 #include <linux/init.h>
  17 #include <linux/errno.h>
  18 #include <linux/reboot.h>
  19 #include <linux/pci.h>
  20 #include <linux/kdev_t.h>
  21 #include <linux/major.h>
  22 #include <linux/console.h>
  23 #include <linux/delay.h>
  24 #include <linux/seq_file.h>
  25 #include <linux/root_dev.h>
  26 #include <linux/serial.h>
  27 #include <linux/tty.h>  /* for linux/serial_core.h */
  28 #include <linux/serial_core.h>
  29 #include <linux/initrd.h>
  30 #include <linux/module.h>
  31 #include <linux/fsl_devices.h>
  32
  33 #include <asm/system.h>
  34 #include <asm/pgtable.h>
  35 #include <asm/page.h>
  36 #include <asm/atomic.h>
  37 #include <asm/time.h>
  38 #include <asm/io.h>
  39 #include <asm/machdep.h>
  40 #include <asm/open_pic.h>
  41 #include <asm/bootinfo.h>
  42 #include <asm/pci-bridge.h>
  43 #include <asm/mpc85xx.h>
  44 #include <asm/irq.h>
  45 #include <asm/immap_85xx.h>
  46 #include <asm/kgdb.h>
  47 #include <asm/ppc_sys.h>
  48 #include <mm/mmu_decl.h>
  49
  50 #include <syslib/ppc85xx_setup.h>
  51
  52 /* ************************************************************************
  53  *
  54  * Setup the architecture
  55  *
  56  */
  57 static void __init
  58 mpc8540ads_setup_arch(void)
  59 {
  60         bd_t *binfo = (bd_t *) __res;
  61         unsigned int freq;
  62         struct gianfar_platform_data *pdata;
  63         struct gianfar_mdio_data *mdata;
  64
  65         /* get the core frequency */
  66         freq = binfo->bi_intfreq;
  67
  68         if (ppc_md.progress)
  69                 ppc_md.progress("mpc8540ads_setup_arch()", 0);
  70
  71         /* Set loops_per_jiffy to a half-way reasonable value,
  72            for use until calibrate_delay gets called. */
  73         loops_per_jiffy = freq / HZ;
  74
  75 #ifdef CONFIG_PCI
  76         /* setup PCI host bridges */
  77         mpc85xx_setup_hose();
  78 #endif
  79
  80 #ifdef CONFIG_SERIAL_8250
  81         mpc85xx_early_serial_map();
  82 #endif
  83
  84 #ifdef CONFIG_SERIAL_TEXT_DEBUG
  85         /* Invalidate the entry we stole earlier the serial ports
  86          * should be properly mapped */
  87         invalidate_tlbcam_entry(num_tlbcam_entries - 1);
  88 #endif
  89
  90         /* setup the board related info for the MDIO bus */
  91         mdata = (struct gianfar_mdio_data *) ppc_sys_get_pdata(MPC85xx_MDIO);
  92
  93         mdata->irq[0] = MPC85xx_IRQ_EXT5;
  94         mdata->irq[1] = MPC85xx_IRQ_EXT5;
  95         mdata->irq[2] = PHY_POLL;
  96         mdata->irq[3] = MPC85xx_IRQ_EXT5;
  97         mdata->irq[31] = PHY_POLL;
  98
  99         /* setup the board related information for the enet controllers */
 100         pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1);
 101         if (pdata) {
 102                 pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
 103                 pdata->bus_id = 0;
 104                 pdata->phy_id = 0;
 105                 memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6);
 106         }
 107
 108         pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2);
 109         if (pdata) {
 110                 pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
 111                 pdata->bus_id = 0;
 112                 pdata->phy_id = 1;
 113                 memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6);
 114         }
 115
 116         pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_FEC);
 117         if (pdata) {
 118                 pdata->board_flags = 0;
 119                 pdata->bus_id = 0;
 120                 pdata->phy_id = 3;
 121                 memcpy(pdata->mac_addr, binfo->bi_enet2addr, 6);
 122         }
 123
 124 #ifdef CONFIG_BLK_DEV_INITRD
 125         if (initrd_start)
 126                 ROOT_DEV = Root_RAM0;
 127         else
 128 #endif
 129 #ifdef  CONFIG_ROOT_NFS
 130                 ROOT_DEV = Root_NFS;
 131 #else
 132                 ROOT_DEV = Root_HDA1;
 133 #endif
 134 }
 135
 136 /* ************************************************************************ */
 137 void __init
 138 platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
 139               unsigned long r6, unsigned long r7)
 140 {
 141         /* parse_bootinfo must always be called first */
 142         parse_bootinfo(find_bootinfo());
 143
 144         /*
 145          * If we were passed in a board information, copy it into the
 146          * residual data area.
 147          */
 148         if (r3) {
 149                 memcpy((void *) __res, (void *) (r3 + KERNELBASE),
 150                        sizeof (bd_t));
 151         }
 152 #ifdef CONFIG_SERIAL_TEXT_DEBUG
 153         {
 154                 bd_t *binfo = (bd_t *) __res;
 155                 struct uart_port p;
 156
 157                 /* Use the last TLB entry to map CCSRBAR to allow access to DUART regs */
 158                 settlbcam(num_tlbcam_entries - 1, binfo->bi_immr_base,
 159                           binfo->bi_immr_base, MPC85xx_CCSRBAR_SIZE, _PAGE_IO, 0);
 160
 161                 memset(&p, 0, sizeof (p));
 162                 p.iotype = UPIO_MEM;
 163                 p.membase = (void *) binfo->bi_immr_base + MPC85xx_UART0_OFFSET;
 164                 p.uartclk = binfo->bi_busfreq;
 165
 166                 gen550_init(0, &p);
 167
 168                 memset(&p, 0, sizeof (p));
 169                 p.iotype = UPIO_MEM;
 170                 p.membase = (void *) binfo->bi_immr_base + MPC85xx_UART1_OFFSET;
 171                 p.uartclk = binfo->bi_busfreq;
 172
 173                 gen550_init(1, &p);
 174         }
 175 #endif
 176
 177 #if defined(CONFIG_BLK_DEV_INITRD)
 178         /*
 179          * If the init RAM disk has been configured in, and there's a valid
 180          * starting address for it, set it up.
 181          */
 182         if (r4) {
 183                 initrd_start = r4 + KERNELBASE;
 184                 initrd_end = r5 + KERNELBASE;
 185         }
 186 #endif                          /* CONFIG_BLK_DEV_INITRD */
 187
 188         /* Copy the kernel command line arguments to a safe place. */
 189
 190         if (r6) {
 191                 *(char *) (r7 + KERNELBASE) = 0;
 192                 strcpy(cmd_line, (char *) (r6 + KERNELBASE));
 193         }
 194
 195         identify_ppc_sys_by_id(mfspr(SPRN_SVR));
 196
 197         /* setup the PowerPC module struct */
 198         ppc_md.setup_arch = mpc8540ads_setup_arch;
 199         ppc_md.show_cpuinfo = mpc85xx_ads_show_cpuinfo;
 200
 201         ppc_md.init_IRQ = mpc85xx_ads_init_IRQ;
 202         ppc_md.get_irq = openpic_get_irq;
 203
 204         ppc_md.restart = mpc85xx_restart;
 205         ppc_md.power_off = mpc85xx_power_off;
 206         ppc_md.halt = mpc85xx_halt;
 207
 208         ppc_md.find_end_of_memory = mpc85xx_find_end_of_memory;
 209
 210         ppc_md.time_init = NULL;
 211         ppc_md.set_rtc_time = NULL;
 212         ppc_md.get_rtc_time = NULL;
 213         ppc_md.calibrate_decr = mpc85xx_calibrate_decr;
 214
 215 #if defined(CONFIG_SERIAL_8250) && defined(CONFIG_SERIAL_TEXT_DEBUG)
 216         ppc_md.progress = gen550_progress;
 217 #endif  /* CONFIG_SERIAL_8250 && CONFIG_SERIAL_TEXT_DEBUG */
 218 #if defined(CONFIG_SERIAL_8250) && defined(CONFIG_KGDB)
 219         ppc_md.early_serial_map = mpc85xx_early_serial_map;
 220 #endif  /* CONFIG_SERIAL_8250 && CONFIG_KGDB */
 221
 222         if (ppc_md.progress)
 223                 ppc_md.progress("mpc8540ads_init(): exit", 0);
 224
 225         return;
 226 }