?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
RT-AC66 3.0.0.4.374.130 core
[tomato.git] / release / src-rt-6.x / linux / linux-2.6 / arch / powerpc / platforms / powermac / low_i2c.c
blob3f507ab9c5e5accf21dbd741d821dd9f5832f40c
1 /*
2 * arch/powerpc/platforms/powermac/low_i2c.c
3 *
4 * Copyright (C) 2003-2005 Ben. Herrenschmidt (benh@kernel.crashing.org)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 *
11 * The linux i2c layer isn't completely suitable for our needs for various
12 * reasons ranging from too late initialisation to semantics not perfectly
13 * matching some requirements of the apple platform functions etc...
14 *
15 * This file thus provides a simple low level unified i2c interface for
16 * powermac that covers the various types of i2c busses used in Apple machines.
17 * For now, keywest, PMU and SMU, though we could add Cuda, or other bit
18 * banging busses found on older chipstes in earlier machines if we ever need
19 * one of them.
20 *
21 * The drivers in this file are synchronous/blocking. In addition, the
22 * keywest one is fairly slow due to the use of msleep instead of interrupts
23 * as the interrupt is currently used by i2c-keywest. In the long run, we
24 * might want to get rid of those high-level interfaces to linux i2c layer
25 * either completely (converting all drivers) or replacing them all with a
26 * single stub driver on top of this one. Once done, the interrupt will be
27 * available for our use.
28 */
29
30 #undef DEBUG
31 #undef DEBUG_LOW
32
33 #include <linux/types.h>
34 #include <linux/sched.h>
35 #include <linux/init.h>
36 #include <linux/module.h>
37 #include <linux/adb.h>
38 #include <linux/pmu.h>
39 #include <linux/delay.h>
40 #include <linux/completion.h>
41 #include <linux/platform_device.h>
42 #include <linux/interrupt.h>
43 #include <linux/completion.h>
44 #include <linux/timer.h>
45 #include <asm/keylargo.h>
46 #include <asm/uninorth.h>
47 #include <asm/io.h>
48 #include <asm/prom.h>
49 #include <asm/machdep.h>
50 #include <asm/smu.h>
51 #include <asm/pmac_pfunc.h>
52 #include <asm/pmac_low_i2c.h>
53
54 #ifdef DEBUG
55 #define DBG(x...) do {\
56 printk(KERN_DEBUG "low_i2c:" x); \
57 } while(0)
58 #else
59 #define DBG(x...)
60 #endif
61
62 #ifdef DEBUG_LOW
63 #define DBG_LOW(x...) do {\
64 printk(KERN_DEBUG "low_i2c:" x); \
65 } while(0)
66 #else
67 #define DBG_LOW(x...)
68 #endif
69
70
71 static int pmac_i2c_force_poll = 1;
72
73 /*
74 * A bus structure. Each bus in the system has such a structure associated.
75 */
76 struct pmac_i2c_bus
77 {
78 struct list_head link;
79 struct device_node *controller;
80 struct device_node *busnode;
81 int type;
82 int flags;
83 struct i2c_adapter *adapter;
84 void *hostdata;
85 int channel; /* some hosts have multiple */
86 int mode; /* current mode */
87 struct semaphore sem;
88 int opened;
89 int polled; /* open mode */
90 struct platform_device *platform_dev;
91
92 /* ops */
93 int (*open)(struct pmac_i2c_bus *bus);
94 void (*close)(struct pmac_i2c_bus *bus);
95 int (*xfer)(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
96 u32 subaddr, u8 *data, int len);
97 };
98
99 static LIST_HEAD(pmac_i2c_busses);
100
101 /*
102 * Keywest implementation
103 */
104
105 struct pmac_i2c_host_kw
106 {
107 struct semaphore mutex; /* Access mutex for use by
108 * i2c-keywest */
109 void __iomem *base; /* register base address */
110 int bsteps; /* register stepping */
111 int speed; /* speed */
112 int irq;
113 u8 *data;
114 unsigned len;
115 int state;
116 int rw;
117 int polled;
118 int result;
119 struct completion complete;
120 spinlock_t lock;
121 struct timer_list timeout_timer;
122 };
123
124 /* Register indices */
125 typedef enum {
126 reg_mode = 0,
127 reg_control,
128 reg_status,
129 reg_isr,
130 reg_ier,
131 reg_addr,
132 reg_subaddr,
133 reg_data
134 } reg_t;
135
136 /* The Tumbler audio equalizer can be really slow sometimes */
137 #define KW_POLL_TIMEOUT (2*HZ)
138
139 /* Mode register */
140 #define KW_I2C_MODE_100KHZ 0x00
141 #define KW_I2C_MODE_50KHZ 0x01
142 #define KW_I2C_MODE_25KHZ 0x02
143 #define KW_I2C_MODE_DUMB 0x00
144 #define KW_I2C_MODE_STANDARD 0x04
145 #define KW_I2C_MODE_STANDARDSUB 0x08
146 #define KW_I2C_MODE_COMBINED 0x0C
147 #define KW_I2C_MODE_MODE_MASK 0x0C
148 #define KW_I2C_MODE_CHAN_MASK 0xF0
149
150 /* Control register */
151 #define KW_I2C_CTL_AAK 0x01
152 #define KW_I2C_CTL_XADDR 0x02
153 #define KW_I2C_CTL_STOP 0x04
154 #define KW_I2C_CTL_START 0x08
155
156 /* Status register */
157 #define KW_I2C_STAT_BUSY 0x01
158 #define KW_I2C_STAT_LAST_AAK 0x02
159 #define KW_I2C_STAT_LAST_RW 0x04
160 #define KW_I2C_STAT_SDA 0x08
161 #define KW_I2C_STAT_SCL 0x10
162
163 /* IER & ISR registers */
164 #define KW_I2C_IRQ_DATA 0x01
165 #define KW_I2C_IRQ_ADDR 0x02
166 #define KW_I2C_IRQ_STOP 0x04
167 #define KW_I2C_IRQ_START 0x08
168 #define KW_I2C_IRQ_MASK 0x0F
169
170 /* State machine states */
171 enum {
172 state_idle,
173 state_addr,
174 state_read,
175 state_write,
176 state_stop,
177 state_dead
178 };
179
180 #define WRONG_STATE(name) do {\
181 printk(KERN_DEBUG "KW: wrong state. Got %s, state: %s " \
182 "(isr: %02x)\n", \
183 name, __kw_state_names[host->state], isr); \
184 } while(0)
185
186 static const char *__kw_state_names[] = {
187 "state_idle",
188 "state_addr",
189 "state_read",
190 "state_write",
191 "state_stop",
192 "state_dead"
193 };
194
195 static inline u8 __kw_read_reg(struct pmac_i2c_host_kw *host, reg_t reg)
196 {
197 return readb(host->base + (((unsigned int)reg) << host->bsteps));
198 }
199
200 static inline void __kw_write_reg(struct pmac_i2c_host_kw *host,
201 reg_t reg, u8 val)
202 {
203 writeb(val, host->base + (((unsigned)reg) << host->bsteps));
204 (void)__kw_read_reg(host, reg_subaddr);
205 }
206
207 #define kw_write_reg(reg, val) __kw_write_reg(host, reg, val)
208 #define kw_read_reg(reg) __kw_read_reg(host, reg)
209
210 static u8 kw_i2c_wait_interrupt(struct pmac_i2c_host_kw *host)
211 {
212 int i, j;
213 u8 isr;
214
215 for (i = 0; i < 1000; i++) {
216 isr = kw_read_reg(reg_isr) & KW_I2C_IRQ_MASK;
217 if (isr != 0)
218 return isr;
219
220 /* This code is used with the timebase frozen, we cannot rely
221 * on udelay nor schedule when in polled mode !
222 * For now, just use a bogus loop....
223 */
224 if (host->polled) {
225 for (j = 1; j < 100000; j++)
226 mb();
227 } else
228 msleep(1);
229 }
230 return isr;
231 }
232
233 static void kw_i2c_do_stop(struct pmac_i2c_host_kw *host, int result)
234 {
235 kw_write_reg(reg_control, KW_I2C_CTL_STOP);
236 host->state = state_stop;
237 host->result = result;
238 }
239
240
241 static void kw_i2c_handle_interrupt(struct pmac_i2c_host_kw *host, u8 isr)
242 {
243 u8 ack;
244
245 DBG_LOW("kw_handle_interrupt(%s, isr: %x)\n",
246 __kw_state_names[host->state], isr);
247
248 if (host->state == state_idle) {
249 printk(KERN_WARNING "low_i2c: Keywest got an out of state"
250 " interrupt, ignoring\n");
251 kw_write_reg(reg_isr, isr);
252 return;
253 }
254
255 if (isr == 0) {
256 printk(KERN_WARNING "low_i2c: Timeout in i2c transfer"
257 " on keywest !\n");
258 if (host->state != state_stop) {
259 kw_i2c_do_stop(host, -EIO);
260 return;
261 }
262 ack = kw_read_reg(reg_status);
263 if (ack & KW_I2C_STAT_BUSY)
264 kw_write_reg(reg_status, 0);
265 host->state = state_idle;
266 kw_write_reg(reg_ier, 0x00);
267 if (!host->polled)
268 complete(&host->complete);
269 return;
270 }
271
272 if (isr & KW_I2C_IRQ_ADDR) {
273 ack = kw_read_reg(reg_status);
274 if (host->state != state_addr) {
275 WRONG_STATE("KW_I2C_IRQ_ADDR");
276 kw_i2c_do_stop(host, -EIO);
277 }
278 if ((ack & KW_I2C_STAT_LAST_AAK) == 0) {
279 host->result = -ENXIO;
280 host->state = state_stop;
281 DBG_LOW("KW: NAK on address\n");
282 } else {
283 if (host->len == 0)
284 kw_i2c_do_stop(host, 0);
285 else if (host->rw) {
286 host->state = state_read;
287 if (host->len > 1)
288 kw_write_reg(reg_control,
289 KW_I2C_CTL_AAK);
290 } else {
291 host->state = state_write;
292 kw_write_reg(reg_data, *(host->data++));
293 host->len--;
294 }
295 }
296 kw_write_reg(reg_isr, KW_I2C_IRQ_ADDR);
297 }
298
299 if (isr & KW_I2C_IRQ_DATA) {
300 if (host->state == state_read) {
301 *(host->data++) = kw_read_reg(reg_data);
302 host->len--;
303 kw_write_reg(reg_isr, KW_I2C_IRQ_DATA);
304 if (host->len == 0)
305 host->state = state_stop;
306 else if (host->len == 1)
307 kw_write_reg(reg_control, 0);
308 } else if (host->state == state_write) {
309 ack = kw_read_reg(reg_status);
310 if ((ack & KW_I2C_STAT_LAST_AAK) == 0) {
311 DBG_LOW("KW: nack on data write\n");
312 host->result = -EFBIG;
313 host->state = state_stop;
314 } else if (host->len) {
315 kw_write_reg(reg_data, *(host->data++));
316 host->len--;
317 } else
318 kw_i2c_do_stop(host, 0);
319 } else {
320 WRONG_STATE("KW_I2C_IRQ_DATA");
321 if (host->state != state_stop)
322 kw_i2c_do_stop(host, -EIO);
323 }
324 kw_write_reg(reg_isr, KW_I2C_IRQ_DATA);
325 }
326
327 if (isr & KW_I2C_IRQ_STOP) {
328 kw_write_reg(reg_isr, KW_I2C_IRQ_STOP);
329 if (host->state != state_stop) {
330 WRONG_STATE("KW_I2C_IRQ_STOP");
331 host->result = -EIO;
332 }
333 host->state = state_idle;
334 if (!host->polled)
335 complete(&host->complete);
336 }
337
338 /* Below should only happen in manual mode which we don't use ... */
339 if (isr & KW_I2C_IRQ_START)
340 kw_write_reg(reg_isr, KW_I2C_IRQ_START);
341
342 }
343
344 /* Interrupt handler */
345 static irqreturn_t kw_i2c_irq(int irq, void *dev_id)
346 {
347 struct pmac_i2c_host_kw *host = dev_id;
348 unsigned long flags;
349
350 spin_lock_irqsave(&host->lock, flags);
351 del_timer(&host->timeout_timer);
352 kw_i2c_handle_interrupt(host, kw_read_reg(reg_isr));
353 if (host->state != state_idle) {
354 host->timeout_timer.expires = jiffies + KW_POLL_TIMEOUT;
355 add_timer(&host->timeout_timer);
356 }
357 spin_unlock_irqrestore(&host->lock, flags);
358 return IRQ_HANDLED;
359 }
360
361 static void kw_i2c_timeout(unsigned long data)
362 {
363 struct pmac_i2c_host_kw *host = (struct pmac_i2c_host_kw *)data;
364 unsigned long flags;
365
366 spin_lock_irqsave(&host->lock, flags);
367 kw_i2c_handle_interrupt(host, kw_read_reg(reg_isr));
368 if (host->state != state_idle) {
369 host->timeout_timer.expires = jiffies + KW_POLL_TIMEOUT;
370 add_timer(&host->timeout_timer);
371 }
372 spin_unlock_irqrestore(&host->lock, flags);
373 }
374
375 static int kw_i2c_open(struct pmac_i2c_bus *bus)
376 {
377 struct pmac_i2c_host_kw *host = bus->hostdata;
378 down(&host->mutex);
379 return 0;
380 }
381
382 static void kw_i2c_close(struct pmac_i2c_bus *bus)
383 {
384 struct pmac_i2c_host_kw *host = bus->hostdata;
385 up(&host->mutex);
386 }
387
388 static int kw_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
389 u32 subaddr, u8 *data, int len)
390 {
391 struct pmac_i2c_host_kw *host = bus->hostdata;
392 u8 mode_reg = host->speed;
393 int use_irq = host->irq != NO_IRQ && !bus->polled;
394
395 /* Setup mode & subaddress if any */
396 switch(bus->mode) {
397 case pmac_i2c_mode_dumb:
398 return -EINVAL;
399 case pmac_i2c_mode_std:
400 mode_reg |= KW_I2C_MODE_STANDARD;
401 if (subsize != 0)
402 return -EINVAL;
403 break;
404 case pmac_i2c_mode_stdsub:
405 mode_reg |= KW_I2C_MODE_STANDARDSUB;
406 if (subsize != 1)
407 return -EINVAL;
408 break;
409 case pmac_i2c_mode_combined:
410 mode_reg |= KW_I2C_MODE_COMBINED;
411 if (subsize != 1)
412 return -EINVAL;
413 break;
414 }
415
416 /* Setup channel & clear pending irqs */
417 kw_write_reg(reg_isr, kw_read_reg(reg_isr));
418 kw_write_reg(reg_mode, mode_reg | (bus->channel << 4));
419 kw_write_reg(reg_status, 0);
420
421 /* Set up address and r/w bit, strip possible stale bus number from
422 * address top bits
423 */
424 kw_write_reg(reg_addr, addrdir & 0xff);
425
426 /* Set up the sub address */
427 if ((mode_reg & KW_I2C_MODE_MODE_MASK) == KW_I2C_MODE_STANDARDSUB
428 || (mode_reg & KW_I2C_MODE_MODE_MASK) == KW_I2C_MODE_COMBINED)
429 kw_write_reg(reg_subaddr, subaddr);
430
431 /* Prepare for async operations */
432 host->data = data;
433 host->len = len;
434 host->state = state_addr;
435 host->result = 0;
436 host->rw = (addrdir & 1);
437 host->polled = bus->polled;
438
439 /* Enable interrupt if not using polled mode and interrupt is
440 * available
441 */
442 if (use_irq) {
443 /* Clear completion */
444 INIT_COMPLETION(host->complete);
445 /* Ack stale interrupts */
446 kw_write_reg(reg_isr, kw_read_reg(reg_isr));
447 /* Arm timeout */
448 host->timeout_timer.expires = jiffies + KW_POLL_TIMEOUT;
449 add_timer(&host->timeout_timer);
450 /* Enable emission */
451 kw_write_reg(reg_ier, KW_I2C_IRQ_MASK);
452 }
453
454 /* Start sending address */
455 kw_write_reg(reg_control, KW_I2C_CTL_XADDR);
456
457 /* Wait for completion */
458 if (use_irq)
459 wait_for_completion(&host->complete);
460 else {
461 while(host->state != state_idle) {
462 unsigned long flags;
463
464 u8 isr = kw_i2c_wait_interrupt(host);
465 spin_lock_irqsave(&host->lock, flags);
466 kw_i2c_handle_interrupt(host, isr);
467 spin_unlock_irqrestore(&host->lock, flags);
468 }
469 }
470
471 /* Disable emission */
472 kw_write_reg(reg_ier, 0);
473
474 return host->result;
475 }
476
477 static struct pmac_i2c_host_kw *__init kw_i2c_host_init(struct device_node *np)
478 {
479 struct pmac_i2c_host_kw *host;
480 const u32 *psteps, *prate, *addrp;
481 u32 steps;
482
483 host = kzalloc(sizeof(struct pmac_i2c_host_kw), GFP_KERNEL);
484 if (host == NULL) {
485 printk(KERN_ERR "low_i2c: Can't allocate host for %s\n",
486 np->full_name);
487 return NULL;
488 }
489
490 /* Apple is kind enough to provide a valid AAPL,address property
491 * on all i2c keywest nodes so far ... we would have to fallback
492 * to macio parsing if that wasn't the case
493 */
494 addrp = of_get_property(np, "AAPL,address", NULL);
495 if (addrp == NULL) {
496 printk(KERN_ERR "low_i2c: Can't find address for %s\n",
497 np->full_name);
498 kfree(host);
499 return NULL;
500 }
501 init_MUTEX(&host->mutex);
502 init_completion(&host->complete);
503 spin_lock_init(&host->lock);
504 init_timer(&host->timeout_timer);
505 host->timeout_timer.function = kw_i2c_timeout;
506 host->timeout_timer.data = (unsigned long)host;
507
508 psteps = of_get_property(np, "AAPL,address-step", NULL);
509 steps = psteps ? (*psteps) : 0x10;
510 for (host->bsteps = 0; (steps & 0x01) == 0; host->bsteps++)
511 steps >>= 1;
512 /* Select interface rate */
513 host->speed = KW_I2C_MODE_25KHZ;
514 prate = of_get_property(np, "AAPL,i2c-rate", NULL);
515 if (prate) switch(*prate) {
516 case 100:
517 host->speed = KW_I2C_MODE_100KHZ;
518 break;
519 case 50:
520 host->speed = KW_I2C_MODE_50KHZ;
521 break;
522 case 25:
523 host->speed = KW_I2C_MODE_25KHZ;
524 break;
525 }
526 host->irq = irq_of_parse_and_map(np, 0);
527 if (host->irq == NO_IRQ)
528 printk(KERN_WARNING
529 "low_i2c: Failed to map interrupt for %s\n",
530 np->full_name);
531
532 host->base = ioremap((*addrp), 0x1000);
533 if (host->base == NULL) {
534 printk(KERN_ERR "low_i2c: Can't map registers for %s\n",
535 np->full_name);
536 kfree(host);
537 return NULL;
538 }
539
540 /* Make sure IRQ is disabled */
541 kw_write_reg(reg_ier, 0);
542
543 /* Request chip interrupt */
544 if (request_irq(host->irq, kw_i2c_irq, 0, "keywest i2c", host))
545 host->irq = NO_IRQ;
546
547 printk(KERN_INFO "KeyWest i2c @0x%08x irq %d %s\n",
548 *addrp, host->irq, np->full_name);
549
550 return host;
551 }
552
553
554 static void __init kw_i2c_add(struct pmac_i2c_host_kw *host,
555 struct device_node *controller,
556 struct device_node *busnode,
557 int channel)
558 {
559 struct pmac_i2c_bus *bus;
560
561 bus = kzalloc(sizeof(struct pmac_i2c_bus), GFP_KERNEL);
562 if (bus == NULL)
563 return;
564
565 bus->controller = of_node_get(controller);
566 bus->busnode = of_node_get(busnode);
567 bus->type = pmac_i2c_bus_keywest;
568 bus->hostdata = host;
569 bus->channel = channel;
570 bus->mode = pmac_i2c_mode_std;
571 bus->open = kw_i2c_open;
572 bus->close = kw_i2c_close;
573 bus->xfer = kw_i2c_xfer;
574 init_MUTEX(&bus->sem);
575 if (controller == busnode)
576 bus->flags = pmac_i2c_multibus;
577 list_add(&bus->link, &pmac_i2c_busses);
578
579 printk(KERN_INFO " channel %d bus %s\n", channel,
580 (controller == busnode) ? "<multibus>" : busnode->full_name);
581 }
582
583 static void __init kw_i2c_probe(void)
584 {
585 struct device_node *np, *child, *parent;
586
587 /* Probe keywest-i2c busses */
588 for (np = NULL;
589 (np = of_find_compatible_node(np, "i2c","keywest-i2c")) != NULL;){
590 struct pmac_i2c_host_kw *host;
591 int multibus, chans, i;
592
593 /* Found one, init a host structure */
594 host = kw_i2c_host_init(np);
595 if (host == NULL)
596 continue;
597
598 /* Now check if we have a multibus setup (old style) or if we
599 * have proper bus nodes. Note that the "new" way (proper bus
600 * nodes) might cause us to not create some busses that are
601 * kept hidden in the device-tree. In the future, we might
602 * want to work around that by creating busses without a node
603 * but not for now
604 */
605 child = of_get_next_child(np, NULL);
606 multibus = !child || strcmp(child->name, "i2c-bus");
607 of_node_put(child);
608
609 /* For a multibus setup, we get the bus count based on the
610 * parent type
611 */
612 if (multibus) {
613 parent = of_get_parent(np);
614 if (parent == NULL)
615 continue;
616 chans = parent->name[0] == 'u' ? 2 : 1;
617 for (i = 0; i < chans; i++)
618 kw_i2c_add(host, np, np, i);
619 } else {
620 for (child = NULL;
621 (child = of_get_next_child(np, child)) != NULL;) {
622 const u32 *reg = of_get_property(child,
623 "reg", NULL);
624 if (reg == NULL)
625 continue;
626 kw_i2c_add(host, np, child, *reg);
627 }
628 }
629 }
630 }
631
632
633 /*
634 *
635 * PMU implementation
636 *
637 */
638
639 #ifdef CONFIG_ADB_PMU
640
641 /*
642 * i2c command block to the PMU
643 */
644 struct pmu_i2c_hdr {
645 u8 bus;
646 u8 mode;
647 u8 bus2;
648 u8 address;
649 u8 sub_addr;
650 u8 comb_addr;
651 u8 count;
652 u8 data[];
653 };
654
655 static void pmu_i2c_complete(struct adb_request *req)
656 {
657 complete(req->arg);
658 }
659
660 static int pmu_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
661 u32 subaddr, u8 *data, int len)
662 {
663 struct adb_request *req = bus->hostdata;
664 struct pmu_i2c_hdr *hdr = (struct pmu_i2c_hdr *)&req->data[1];
665 struct completion comp;
666 int read = addrdir & 1;
667 int retry;
668 int rc = 0;
669
670 /* For now, limit ourselves to 16 bytes transfers */
671 if (len > 16)
672 return -EINVAL;
673
674 init_completion(&comp);
675
676 for (retry = 0; retry < 16; retry++) {
677 memset(req, 0, sizeof(struct adb_request));
678 hdr->bus = bus->channel;
679 hdr->count = len;
680
681 switch(bus->mode) {
682 case pmac_i2c_mode_std:
683 if (subsize != 0)
684 return -EINVAL;
685 hdr->address = addrdir;
686 hdr->mode = PMU_I2C_MODE_SIMPLE;
687 break;
688 case pmac_i2c_mode_stdsub:
689 case pmac_i2c_mode_combined:
690 if (subsize != 1)
691 return -EINVAL;
692 hdr->address = addrdir & 0xfe;
693 hdr->comb_addr = addrdir;
694 hdr->sub_addr = subaddr;
695 if (bus->mode == pmac_i2c_mode_stdsub)
696 hdr->mode = PMU_I2C_MODE_STDSUB;
697 else
698 hdr->mode = PMU_I2C_MODE_COMBINED;
699 break;
700 default:
701 return -EINVAL;
702 }
703
704 INIT_COMPLETION(comp);
705 req->data[0] = PMU_I2C_CMD;
706 req->reply[0] = 0xff;
707 req->nbytes = sizeof(struct pmu_i2c_hdr) + 1;
708 req->done = pmu_i2c_complete;
709 req->arg = &comp;
710 if (!read && len) {
711 memcpy(hdr->data, data, len);
712 req->nbytes += len;
713 }
714 rc = pmu_queue_request(req);
715 if (rc)
716 return rc;
717 wait_for_completion(&comp);
718 if (req->reply[0] == PMU_I2C_STATUS_OK)
719 break;
720 msleep(15);
721 }
722 if (req->reply[0] != PMU_I2C_STATUS_OK)
723 return -EIO;
724
725 for (retry = 0; retry < 16; retry++) {
726 memset(req, 0, sizeof(struct adb_request));
727
728 /* I know that looks like a lot, slow as hell, but darwin
729 * does it so let's be on the safe side for now
730 */
731 msleep(15);
732
733 hdr->bus = PMU_I2C_BUS_STATUS;
734
735 INIT_COMPLETION(comp);
736 req->data[0] = PMU_I2C_CMD;
737 req->reply[0] = 0xff;
738 req->nbytes = 2;
739 req->done = pmu_i2c_complete;
740 req->arg = &comp;
741 rc = pmu_queue_request(req);
742 if (rc)
743 return rc;
744 wait_for_completion(&comp);
745
746 if (req->reply[0] == PMU_I2C_STATUS_OK && !read)
747 return 0;
748 if (req->reply[0] == PMU_I2C_STATUS_DATAREAD && read) {
749 int rlen = req->reply_len - 1;
750
751 if (rlen != len) {
752 printk(KERN_WARNING "low_i2c: PMU returned %d"
753 " bytes, expected %d !\n", rlen, len);
754 return -EIO;
755 }
756 if (len)
757 memcpy(data, &req->reply[1], len);
758 return 0;
759 }
760 }
761 return -EIO;
762 }
763
764 static void __init pmu_i2c_probe(void)
765 {
766 struct pmac_i2c_bus *bus;
767 struct device_node *busnode;
768 int channel, sz;
769
770 if (!pmu_present())
771 return;
772
773 /* There might or might not be a "pmu-i2c" node, we use that
774 * or via-pmu itself, whatever we find. I haven't seen a machine
775 * with separate bus nodes, so we assume a multibus setup
776 */
777 busnode = of_find_node_by_name(NULL, "pmu-i2c");
778 if (busnode == NULL)
779 busnode = of_find_node_by_name(NULL, "via-pmu");
780 if (busnode == NULL)
781 return;
782
783 printk(KERN_INFO "PMU i2c %s\n", busnode->full_name);
784
785 /*
786 * We add bus 1 and 2 only for now, bus 0 is "special"
787 */
788 for (channel = 1; channel <= 2; channel++) {
789 sz = sizeof(struct pmac_i2c_bus) + sizeof(struct adb_request);
790 bus = kzalloc(sz, GFP_KERNEL);
791 if (bus == NULL)
792 return;
793
794 bus->controller = busnode;
795 bus->busnode = busnode;
796 bus->type = pmac_i2c_bus_pmu;
797 bus->channel = channel;
798 bus->mode = pmac_i2c_mode_std;
799 bus->hostdata = bus + 1;
800 bus->xfer = pmu_i2c_xfer;
801 init_MUTEX(&bus->sem);
802 bus->flags = pmac_i2c_multibus;
803 list_add(&bus->link, &pmac_i2c_busses);
804
805 printk(KERN_INFO " channel %d bus <multibus>\n", channel);
806 }
807 }
808
809 #endif /* CONFIG_ADB_PMU */
810
811
812 /*
813 *
814 * SMU implementation
815 *
816 */
817
818 #ifdef CONFIG_PMAC_SMU
819
820 static void smu_i2c_complete(struct smu_i2c_cmd *cmd, void *misc)
821 {
822 complete(misc);
823 }
824
825 static int smu_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
826 u32 subaddr, u8 *data, int len)
827 {
828 struct smu_i2c_cmd *cmd = bus->hostdata;
829 struct completion comp;
830 int read = addrdir & 1;
831 int rc = 0;
832
833 if ((read && len > SMU_I2C_READ_MAX) ||
834 ((!read) && len > SMU_I2C_WRITE_MAX))
835 return -EINVAL;
836
837 memset(cmd, 0, sizeof(struct smu_i2c_cmd));
838 cmd->info.bus = bus->channel;
839 cmd->info.devaddr = addrdir;
840 cmd->info.datalen = len;
841
842 switch(bus->mode) {
843 case pmac_i2c_mode_std:
844 if (subsize != 0)
845 return -EINVAL;
846 cmd->info.type = SMU_I2C_TRANSFER_SIMPLE;
847 break;
848 case pmac_i2c_mode_stdsub:
849 case pmac_i2c_mode_combined:
850 if (subsize > 3 || subsize < 1)
851 return -EINVAL;
852 cmd->info.sublen = subsize;
853 /* that's big-endian only but heh ! */
854 memcpy(&cmd->info.subaddr, ((char *)&subaddr) + (4 - subsize),
855 subsize);
856 if (bus->mode == pmac_i2c_mode_stdsub)
857 cmd->info.type = SMU_I2C_TRANSFER_STDSUB;
858 else
859 cmd->info.type = SMU_I2C_TRANSFER_COMBINED;
860 break;
861 default:
862 return -EINVAL;
863 }
864 if (!read && len)
865 memcpy(cmd->info.data, data, len);
866
867 init_completion(&comp);
868 cmd->done = smu_i2c_complete;
869 cmd->misc = &comp;
870 rc = smu_queue_i2c(cmd);
871 if (rc < 0)
872 return rc;
873 wait_for_completion(&comp);
874 rc = cmd->status;
875
876 if (read && len)
877 memcpy(data, cmd->info.data, len);
878 return rc < 0 ? rc : 0;
879 }
880
881 static void __init smu_i2c_probe(void)
882 {
883 struct device_node *controller, *busnode;
884 struct pmac_i2c_bus *bus;
885 const u32 *reg;
886 int sz;
887
888 if (!smu_present())
889 return;
890
891 controller = of_find_node_by_name(NULL, "smu-i2c-control");
892 if (controller == NULL)
893 controller = of_find_node_by_name(NULL, "smu");
894 if (controller == NULL)
895 return;
896
897 printk(KERN_INFO "SMU i2c %s\n", controller->full_name);
898
899 /* Look for childs, note that they might not be of the right
900 * type as older device trees mix i2c busses and other thigns
901 * at the same level
902 */
903 for (busnode = NULL;
904 (busnode = of_get_next_child(controller, busnode)) != NULL;) {
905 if (strcmp(busnode->type, "i2c") &&
906 strcmp(busnode->type, "i2c-bus"))
907 continue;
908 reg = of_get_property(busnode, "reg", NULL);
909 if (reg == NULL)
910 continue;
911
912 sz = sizeof(struct pmac_i2c_bus) + sizeof(struct smu_i2c_cmd);
913 bus = kzalloc(sz, GFP_KERNEL);
914 if (bus == NULL)
915 return;
916
917 bus->controller = controller;
918 bus->busnode = of_node_get(busnode);
919 bus->type = pmac_i2c_bus_smu;
920 bus->channel = *reg;
921 bus->mode = pmac_i2c_mode_std;
922 bus->hostdata = bus + 1;
923 bus->xfer = smu_i2c_xfer;
924 init_MUTEX(&bus->sem);
925 bus->flags = 0;
926 list_add(&bus->link, &pmac_i2c_busses);
927
928 printk(KERN_INFO " channel %x bus %s\n",
929 bus->channel, busnode->full_name);
930 }
931 }
932
933 #endif /* CONFIG_PMAC_SMU */
934
935 /*
936 *
937 * Core code
938 *
939 */
940
941
942 struct pmac_i2c_bus *pmac_i2c_find_bus(struct device_node *node)
943 {
944 struct device_node *p = of_node_get(node);
945 struct device_node *prev = NULL;
946 struct pmac_i2c_bus *bus;
947
948 while(p) {
949 list_for_each_entry(bus, &pmac_i2c_busses, link) {
950 if (p == bus->busnode) {
951 if (prev && bus->flags & pmac_i2c_multibus) {
952 const u32 *reg;
953 reg = of_get_property(prev, "reg",
954 NULL);
955 if (!reg)
956 continue;
957 if (((*reg) >> 8) != bus->channel)
958 continue;
959 }
960 of_node_put(p);
961 of_node_put(prev);
962 return bus;
963 }
964 }
965 of_node_put(prev);
966 prev = p;
967 p = of_get_parent(p);
968 }
969 return NULL;
970 }
971 EXPORT_SYMBOL_GPL(pmac_i2c_find_bus);
972
973 u8 pmac_i2c_get_dev_addr(struct device_node *device)
974 {
975 const u32 *reg = of_get_property(device, "reg", NULL);
976
977 if (reg == NULL)
978 return 0;
979
980 return (*reg) & 0xff;
981 }
982 EXPORT_SYMBOL_GPL(pmac_i2c_get_dev_addr);
983
984 struct device_node *pmac_i2c_get_controller(struct pmac_i2c_bus *bus)
985 {
986 return bus->controller;
987 }
988 EXPORT_SYMBOL_GPL(pmac_i2c_get_controller);
989
990 struct device_node *pmac_i2c_get_bus_node(struct pmac_i2c_bus *bus)
991 {
992 return bus->busnode;
993 }
994 EXPORT_SYMBOL_GPL(pmac_i2c_get_bus_node);
995
996 int pmac_i2c_get_type(struct pmac_i2c_bus *bus)
997 {
998 return bus->type;
999 }
1000 EXPORT_SYMBOL_GPL(pmac_i2c_get_type);
1001
1002 int pmac_i2c_get_flags(struct pmac_i2c_bus *bus)
1003 {
1004 return bus->flags;
1005 }
1006 EXPORT_SYMBOL_GPL(pmac_i2c_get_flags);
1007
1008 int pmac_i2c_get_channel(struct pmac_i2c_bus *bus)
1009 {
1010 return bus->channel;
1011 }
1012 EXPORT_SYMBOL_GPL(pmac_i2c_get_channel);
1013
1014
1015 void pmac_i2c_attach_adapter(struct pmac_i2c_bus *bus,
1016 struct i2c_adapter *adapter)
1017 {
1018 WARN_ON(bus->adapter != NULL);
1019 bus->adapter = adapter;
1020 }
1021 EXPORT_SYMBOL_GPL(pmac_i2c_attach_adapter);
1022
1023 void pmac_i2c_detach_adapter(struct pmac_i2c_bus *bus,
1024 struct i2c_adapter *adapter)
1025 {
1026 WARN_ON(bus->adapter != adapter);
1027 bus->adapter = NULL;
1028 }
1029 EXPORT_SYMBOL_GPL(pmac_i2c_detach_adapter);
1030
1031 struct i2c_adapter *pmac_i2c_get_adapter(struct pmac_i2c_bus *bus)
1032 {
1033 return bus->adapter;
1034 }
1035 EXPORT_SYMBOL_GPL(pmac_i2c_get_adapter);
1036
1037 struct pmac_i2c_bus *pmac_i2c_adapter_to_bus(struct i2c_adapter *adapter)
1038 {
1039 struct pmac_i2c_bus *bus;
1040
1041 list_for_each_entry(bus, &pmac_i2c_busses, link)
1042 if (bus->adapter == adapter)
1043 return bus;
1044 return NULL;
1045 }
1046 EXPORT_SYMBOL_GPL(pmac_i2c_adapter_to_bus);
1047
1048 int pmac_i2c_match_adapter(struct device_node *dev, struct i2c_adapter *adapter)
1049 {
1050 struct pmac_i2c_bus *bus = pmac_i2c_find_bus(dev);
1051
1052 if (bus == NULL)
1053 return 0;
1054 return (bus->adapter == adapter);
1055 }
1056 EXPORT_SYMBOL_GPL(pmac_i2c_match_adapter);
1057
1058 int pmac_low_i2c_lock(struct device_node *np)
1059 {
1060 struct pmac_i2c_bus *bus, *found = NULL;
1061
1062 list_for_each_entry(bus, &pmac_i2c_busses, link) {
1063 if (np == bus->controller) {
1064 found = bus;
1065 break;
1066 }
1067 }
1068 if (!found)
1069 return -ENODEV;
1070 return pmac_i2c_open(bus, 0);
1071 }
1072 EXPORT_SYMBOL_GPL(pmac_low_i2c_lock);
1073
1074 int pmac_low_i2c_unlock(struct device_node *np)
1075 {
1076 struct pmac_i2c_bus *bus, *found = NULL;
1077
1078 list_for_each_entry(bus, &pmac_i2c_busses, link) {
1079 if (np == bus->controller) {
1080 found = bus;
1081 break;
1082 }
1083 }
1084 if (!found)
1085 return -ENODEV;
1086 pmac_i2c_close(bus);
1087 return 0;
1088 }
1089 EXPORT_SYMBOL_GPL(pmac_low_i2c_unlock);
1090
1091
1092 int pmac_i2c_open(struct pmac_i2c_bus *bus, int polled)
1093 {
1094 int rc;
1095
1096 down(&bus->sem);
1097 bus->polled = polled || pmac_i2c_force_poll;
1098 bus->opened = 1;
1099 bus->mode = pmac_i2c_mode_std;
1100 if (bus->open && (rc = bus->open(bus)) != 0) {
1101 bus->opened = 0;
1102 up(&bus->sem);
1103 return rc;
1104 }
1105 return 0;
1106 }
1107 EXPORT_SYMBOL_GPL(pmac_i2c_open);
1108
1109 void pmac_i2c_close(struct pmac_i2c_bus *bus)
1110 {
1111 WARN_ON(!bus->opened);
1112 if (bus->close)
1113 bus->close(bus);
1114 bus->opened = 0;
1115 up(&bus->sem);
1116 }
1117 EXPORT_SYMBOL_GPL(pmac_i2c_close);
1118
1119 int pmac_i2c_setmode(struct pmac_i2c_bus *bus, int mode)
1120 {
1121 WARN_ON(!bus->opened);
1122
1123 /* Report me if you see the error below as there might be a new
1124 * "combined4" mode that I need to implement for the SMU bus
1125 */
1126 if (mode < pmac_i2c_mode_dumb || mode > pmac_i2c_mode_combined) {
1127 printk(KERN_ERR "low_i2c: Invalid mode %d requested on"
1128 " bus %s !\n", mode, bus->busnode->full_name);
1129 return -EINVAL;
1130 }
1131 bus->mode = mode;
1132
1133 return 0;
1134 }
1135 EXPORT_SYMBOL_GPL(pmac_i2c_setmode);
1136
1137 int pmac_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
1138 u32 subaddr, u8 *data, int len)
1139 {
1140 int rc;
1141
1142 WARN_ON(!bus->opened);
1143
1144 DBG("xfer() chan=%d, addrdir=0x%x, mode=%d, subsize=%d, subaddr=0x%x,"
1145 " %d bytes, bus %s\n", bus->channel, addrdir, bus->mode, subsize,
1146 subaddr, len, bus->busnode->full_name);
1147
1148 rc = bus->xfer(bus, addrdir, subsize, subaddr, data, len);
1149
1150 #ifdef DEBUG
1151 if (rc)
1152 DBG("xfer error %d\n", rc);
1153 #endif
1154 return rc;
1155 }
1156 EXPORT_SYMBOL_GPL(pmac_i2c_xfer);
1157
1158 /* some quirks for platform function decoding */
1159 enum {
1160 pmac_i2c_quirk_invmask = 0x00000001u,
1161 pmac_i2c_quirk_skip = 0x00000002u,
1162 };
1163
1164 static void pmac_i2c_devscan(void (*callback)(struct device_node *dev,
1165 int quirks))
1166 {
1167 struct pmac_i2c_bus *bus;
1168 struct device_node *np;
1169 static struct whitelist_ent {
1170 char *name;
1171 char *compatible;
1172 int quirks;
1173 } whitelist[] = {
1174 /* XXX Study device-tree's & apple drivers are get the quirks
1175 * right !
1176 */
1177 /* Workaround: It seems that running the clockspreading
1178 * properties on the eMac will cause lockups during boot.
1179 * The machine seems to work fine without that. So for now,
1180 * let's make sure i2c-hwclock doesn't match about "imic"
1181 * clocks and we'll figure out if we really need to do
1182 * something special about those later.
1183 */
1184 { "i2c-hwclock", "imic5002", pmac_i2c_quirk_skip },
1185 { "i2c-hwclock", "imic5003", pmac_i2c_quirk_skip },
1186 { "i2c-hwclock", NULL, pmac_i2c_quirk_invmask },
1187 { "i2c-cpu-voltage", NULL, 0},
1188 { "temp-monitor", NULL, 0 },
1189 { "supply-monitor", NULL, 0 },
1190 { NULL, NULL, 0 },
1191 };
1192
1193 /* Only some devices need to have platform functions instanciated
1194 * here. For now, we have a table. Others, like 9554 i2c GPIOs used
1195 * on Xserve, if we ever do a driver for them, will use their own
1196 * platform function instance
1197 */
1198 list_for_each_entry(bus, &pmac_i2c_busses, link) {
1199 for (np = NULL;
1200 (np = of_get_next_child(bus->busnode, np)) != NULL;) {
1201 struct whitelist_ent *p;
1202 /* If multibus, check if device is on that bus */
1203 if (bus->flags & pmac_i2c_multibus)
1204 if (bus != pmac_i2c_find_bus(np))
1205 continue;
1206 for (p = whitelist; p->name != NULL; p++) {
1207 if (strcmp(np->name, p->name))
1208 continue;
1209 if (p->compatible &&
1210 !of_device_is_compatible(np, p->compatible))
1211 continue;
1212 if (p->quirks & pmac_i2c_quirk_skip)
1213 break;
1214 callback(np, p->quirks);
1215 break;
1216 }
1217 }
1218 }
1219 }
1220
1221 #define MAX_I2C_DATA 64
1222
1223 struct pmac_i2c_pf_inst
1224 {
1225 struct pmac_i2c_bus *bus;
1226 u8 addr;
1227 u8 buffer[MAX_I2C_DATA];
1228 u8 scratch[MAX_I2C_DATA];
1229 int bytes;
1230 int quirks;
1231 };
1232
1233 static void* pmac_i2c_do_begin(struct pmf_function *func, struct pmf_args *args)
1234 {
1235 struct pmac_i2c_pf_inst *inst;
1236 struct pmac_i2c_bus *bus;
1237
1238 bus = pmac_i2c_find_bus(func->node);
1239 if (bus == NULL) {
1240 printk(KERN_ERR "low_i2c: Can't find bus for %s (pfunc)\n",
1241 func->node->full_name);
1242 return NULL;
1243 }
1244 if (pmac_i2c_open(bus, 0)) {
1245 printk(KERN_ERR "low_i2c: Can't open i2c bus for %s (pfunc)\n",
1246 func->node->full_name);
1247 return NULL;
1248 }
1249
1250 /* XXX might need GFP_ATOMIC when called during the suspend process,
1251 * but then, there are already lots of issues with suspending when
1252 * near OOM that need to be resolved, the allocator itself should
1253 * probably make GFP_NOIO implicit during suspend
1254 */
1255 inst = kzalloc(sizeof(struct pmac_i2c_pf_inst), GFP_KERNEL);
1256 if (inst == NULL) {
1257 pmac_i2c_close(bus);
1258 return NULL;
1259 }
1260 inst->bus = bus;
1261 inst->addr = pmac_i2c_get_dev_addr(func->node);
1262 inst->quirks = (int)(long)func->driver_data;
1263 return inst;
1264 }
1265
1266 static void pmac_i2c_do_end(struct pmf_function *func, void *instdata)
1267 {
1268 struct pmac_i2c_pf_inst *inst = instdata;
1269
1270 if (inst == NULL)
1271 return;
1272 pmac_i2c_close(inst->bus);
1273 if (inst)
1274 kfree(inst);
1275 }
1276
1277 static int pmac_i2c_do_read(PMF_STD_ARGS, u32 len)
1278 {
1279 struct pmac_i2c_pf_inst *inst = instdata;
1280
1281 inst->bytes = len;
1282 return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_read, 0, 0,
1283 inst->buffer, len);
1284 }
1285
1286 static int pmac_i2c_do_write(PMF_STD_ARGS, u32 len, const u8 *data)
1287 {
1288 struct pmac_i2c_pf_inst *inst = instdata;
1289
1290 return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 0, 0,
1291 (u8 *)data, len);
1292 }
1293
1294 /* This function is used to do the masking & OR'ing for the "rmw" type
1295 * callbacks. Ze should apply the mask and OR in the values in the
1296 * buffer before writing back. The problem is that it seems that
1297 * various darwin drivers implement the mask/or differently, thus
1298 * we need to check the quirks first
1299 */
1300 static void pmac_i2c_do_apply_rmw(struct pmac_i2c_pf_inst *inst,
1301 u32 len, const u8 *mask, const u8 *val)
1302 {
1303 int i;
1304
1305 if (inst->quirks & pmac_i2c_quirk_invmask) {
1306 for (i = 0; i < len; i ++)
1307 inst->scratch[i] = (inst->buffer[i] & mask[i]) | val[i];
1308 } else {
1309 for (i = 0; i < len; i ++)
1310 inst->scratch[i] = (inst->buffer[i] & ~mask[i])
1311 | (val[i] & mask[i]);
1312 }
1313 }
1314
1315 static int pmac_i2c_do_rmw(PMF_STD_ARGS, u32 masklen, u32 valuelen,
1316 u32 totallen, const u8 *maskdata,
1317 const u8 *valuedata)
1318 {
1319 struct pmac_i2c_pf_inst *inst = instdata;
1320
1321 if (masklen > inst->bytes || valuelen > inst->bytes ||
1322 totallen > inst->bytes || valuelen > masklen)
1323 return -EINVAL;
1324
1325 pmac_i2c_do_apply_rmw(inst, masklen, maskdata, valuedata);
1326
1327 return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 0, 0,
1328 inst->scratch, totallen);
1329 }
1330
1331 static int pmac_i2c_do_read_sub(PMF_STD_ARGS, u8 subaddr, u32 len)
1332 {
1333 struct pmac_i2c_pf_inst *inst = instdata;
1334
1335 inst->bytes = len;
1336 return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_read, 1, subaddr,
1337 inst->buffer, len);
1338 }
1339
1340 static int pmac_i2c_do_write_sub(PMF_STD_ARGS, u8 subaddr, u32 len,
1341 const u8 *data)
1342 {
1343 struct pmac_i2c_pf_inst *inst = instdata;
1344
1345 return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 1,
1346 subaddr, (u8 *)data, len);
1347 }
1348
1349 static int pmac_i2c_do_set_mode(PMF_STD_ARGS, int mode)
1350 {
1351 struct pmac_i2c_pf_inst *inst = instdata;
1352
1353 return pmac_i2c_setmode(inst->bus, mode);
1354 }
1355
1356 static int pmac_i2c_do_rmw_sub(PMF_STD_ARGS, u8 subaddr, u32 masklen,
1357 u32 valuelen, u32 totallen, const u8 *maskdata,
1358 const u8 *valuedata)
1359 {
1360 struct pmac_i2c_pf_inst *inst = instdata;
1361
1362 if (masklen > inst->bytes || valuelen > inst->bytes ||
1363 totallen > inst->bytes || valuelen > masklen)
1364 return -EINVAL;
1365
1366 pmac_i2c_do_apply_rmw(inst, masklen, maskdata, valuedata);
1367
1368 return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 1,
1369 subaddr, inst->scratch, totallen);
1370 }
1371
1372 static int pmac_i2c_do_mask_and_comp(PMF_STD_ARGS, u32 len,
1373 const u8 *maskdata,
1374 const u8 *valuedata)
1375 {
1376 struct pmac_i2c_pf_inst *inst = instdata;
1377 int i, match;
1378
1379 /* Get return value pointer, it's assumed to be a u32 */
1380 if (!args || !args->count || !args->u[0].p)
1381 return -EINVAL;
1382
1383 /* Check buffer */
1384 if (len > inst->bytes)
1385 return -EINVAL;
1386
1387 for (i = 0, match = 1; match && i < len; i ++)
1388 if ((inst->buffer[i] & maskdata[i]) != valuedata[i])
1389 match = 0;
1390 *args->u[0].p = match;
1391 return 0;
1392 }
1393
1394 static int pmac_i2c_do_delay(PMF_STD_ARGS, u32 duration)
1395 {
1396 msleep((duration + 999) / 1000);
1397 return 0;
1398 }
1399
1400
1401 static struct pmf_handlers pmac_i2c_pfunc_handlers = {
1402 .begin = pmac_i2c_do_begin,
1403 .end = pmac_i2c_do_end,
1404 .read_i2c = pmac_i2c_do_read,
1405 .write_i2c = pmac_i2c_do_write,
1406 .rmw_i2c = pmac_i2c_do_rmw,
1407 .read_i2c_sub = pmac_i2c_do_read_sub,
1408 .write_i2c_sub = pmac_i2c_do_write_sub,
1409 .rmw_i2c_sub = pmac_i2c_do_rmw_sub,
1410 .set_i2c_mode = pmac_i2c_do_set_mode,
1411 .mask_and_compare = pmac_i2c_do_mask_and_comp,
1412 .delay = pmac_i2c_do_delay,
1413 };
1414
1415 static void __init pmac_i2c_dev_create(struct device_node *np, int quirks)
1416 {
1417 DBG("dev_create(%s)\n", np->full_name);
1418
1419 pmf_register_driver(np, &pmac_i2c_pfunc_handlers,
1420 (void *)(long)quirks);
1421 }
1422
1423 static void __init pmac_i2c_dev_init(struct device_node *np, int quirks)
1424 {
1425 DBG("dev_create(%s)\n", np->full_name);
1426
1427 pmf_do_functions(np, NULL, 0, PMF_FLAGS_ON_INIT, NULL);
1428 }
1429
1430 static void pmac_i2c_dev_suspend(struct device_node *np, int quirks)
1431 {
1432 DBG("dev_suspend(%s)\n", np->full_name);
1433 pmf_do_functions(np, NULL, 0, PMF_FLAGS_ON_SLEEP, NULL);
1434 }
1435
1436 static void pmac_i2c_dev_resume(struct device_node *np, int quirks)
1437 {
1438 DBG("dev_resume(%s)\n", np->full_name);
1439 pmf_do_functions(np, NULL, 0, PMF_FLAGS_ON_WAKE, NULL);
1440 }
1441
1442 void pmac_pfunc_i2c_suspend(void)
1443 {
1444 pmac_i2c_devscan(pmac_i2c_dev_suspend);
1445 }
1446
1447 void pmac_pfunc_i2c_resume(void)
1448 {
1449 pmac_i2c_devscan(pmac_i2c_dev_resume);
1450 }
1451
1452 /*
1453 * Initialize us: probe all i2c busses on the machine, instantiate
1454 * busses and platform functions as needed.
1455 */
1456 /* This is non-static as it might be called early by smp code */
1457 int __init pmac_i2c_init(void)
1458 {
1459 static int i2c_inited;
1460
1461 if (i2c_inited)
1462 return 0;
1463 i2c_inited = 1;
1464
1465 if (!machine_is(powermac))
1466 return 0;
1467
1468 /* Probe keywest-i2c busses */
1469 kw_i2c_probe();
1470
1471 #ifdef CONFIG_ADB_PMU
1472 /* Probe PMU i2c busses */
1473 pmu_i2c_probe();
1474 #endif
1475
1476 #ifdef CONFIG_PMAC_SMU
1477 /* Probe SMU i2c busses */
1478 smu_i2c_probe();
1479 #endif
1480
1481 /* Now add plaform functions for some known devices */
1482 pmac_i2c_devscan(pmac_i2c_dev_create);
1483
1484 return 0;
1485 }
1486 arch_initcall(pmac_i2c_init);
1487
1488 /* Since pmac_i2c_init can be called too early for the platform device
1489 * registration, we need to do it at a later time. In our case, subsys
1490 * happens to fit well, though I agree it's a bit of a hack...
1491 */
1492 static int __init pmac_i2c_create_platform_devices(void)
1493 {
1494 struct pmac_i2c_bus *bus;
1495 int i = 0;
1496
1497 /* In the case where we are initialized from smp_init(), we must
1498 * not use the timer (and thus the irq). It's safe from now on
1499 * though
1500 */
1501 pmac_i2c_force_poll = 0;
1502
1503 /* Create platform devices */
1504 list_for_each_entry(bus, &pmac_i2c_busses, link) {
1505 bus->platform_dev =
1506 platform_device_alloc("i2c-powermac", i++);
1507 if (bus->platform_dev == NULL)
1508 return -ENOMEM;
1509 bus->platform_dev->dev.platform_data = bus;
1510 platform_device_add(bus->platform_dev);
1511 }
1512
1513 /* Now call platform "init" functions */
1514 pmac_i2c_devscan(pmac_i2c_dev_init);
1515
1516 return 0;
1517 }
1518 subsys_initcall(pmac_i2c_create_platform_devices);
Tomato firmware and modifications.