RT-AC66 3.0.0.4.374.130 core
[tomato.git] / release / src-rt-6.x / linux / linux-2.6 / arch / powerpc / platforms / powermac / cpufreq_32.c
blob1fe35dab0e9eb7d519569ef37265956d0b85613d
1 /*
2 * Copyright (C) 2002 - 2005 Benjamin Herrenschmidt <benh@kernel.crashing.org>
3 * Copyright (C) 2004 John Steele Scott <toojays@toojays.net>
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
9 * TODO: Need a big cleanup here. Basically, we need to have different
10 * cpufreq_driver structures for the different type of HW instead of the
11 * current mess. We also need to better deal with the detection of the
12 * type of machine.
16 #include <linux/module.h>
17 #include <linux/types.h>
18 #include <linux/errno.h>
19 #include <linux/kernel.h>
20 #include <linux/delay.h>
21 #include <linux/sched.h>
22 #include <linux/adb.h>
23 #include <linux/pmu.h>
24 #include <linux/slab.h>
25 #include <linux/cpufreq.h>
26 #include <linux/init.h>
27 #include <linux/sysdev.h>
28 #include <linux/hardirq.h>
29 #include <asm/prom.h>
30 #include <asm/machdep.h>
31 #include <asm/irq.h>
32 #include <asm/pmac_feature.h>
33 #include <asm/mmu_context.h>
34 #include <asm/sections.h>
35 #include <asm/cputable.h>
36 #include <asm/time.h>
37 #include <asm/system.h>
38 #include <asm/mpic.h>
39 #include <asm/keylargo.h>
41 /* WARNING !!! This will cause calibrate_delay() to be called,
42 * but this is an __init function ! So you MUST go edit
43 * init/main.c to make it non-init before enabling DEBUG_FREQ
45 #undef DEBUG_FREQ
48 * There is a problem with the core cpufreq code on SMP kernels,
49 * it won't recalculate the Bogomips properly
51 #ifdef CONFIG_SMP
52 #warning "WARNING, CPUFREQ not recommended on SMP kernels"
53 #endif
55 extern void low_choose_7447a_dfs(int dfs);
56 extern void low_choose_750fx_pll(int pll);
57 extern void low_sleep_handler(void);
60 * Currently, PowerMac cpufreq supports only high & low frequencies
61 * that are set by the firmware
63 static unsigned int low_freq;
64 static unsigned int hi_freq;
65 static unsigned int cur_freq;
66 static unsigned int sleep_freq;
69 * Different models uses different mechanisms to switch the frequency
71 static int (*set_speed_proc)(int low_speed);
72 static unsigned int (*get_speed_proc)(void);
75 * Some definitions used by the various speedprocs
77 static u32 voltage_gpio;
78 static u32 frequency_gpio;
79 static u32 slew_done_gpio;
80 static int no_schedule;
81 static int has_cpu_l2lve;
82 static int is_pmu_based;
84 /* There are only two frequency states for each processor. Values
85 * are in kHz for the time being.
87 #define CPUFREQ_HIGH 0
88 #define CPUFREQ_LOW 1
90 static struct cpufreq_frequency_table pmac_cpu_freqs[] = {
91 {CPUFREQ_HIGH, 0},
92 {CPUFREQ_LOW, 0},
93 {0, CPUFREQ_TABLE_END},
96 static struct freq_attr* pmac_cpu_freqs_attr[] = {
97 &cpufreq_freq_attr_scaling_available_freqs,
98 NULL,
101 static inline void local_delay(unsigned long ms)
103 if (no_schedule)
104 mdelay(ms);
105 else
106 msleep(ms);
109 #ifdef DEBUG_FREQ
110 static inline void debug_calc_bogomips(void)
112 /* This will cause a recalc of bogomips and display the
113 * result. We backup/restore the value to avoid affecting the
114 * core cpufreq framework's own calculation.
116 extern void calibrate_delay(void);
118 unsigned long save_lpj = loops_per_jiffy;
119 calibrate_delay();
120 loops_per_jiffy = save_lpj;
122 #endif /* DEBUG_FREQ */
124 /* Switch CPU speed under 750FX CPU control
126 static int cpu_750fx_cpu_speed(int low_speed)
128 u32 hid2;
130 if (low_speed == 0) {
131 /* ramping up, set voltage first */
132 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05);
133 /* Make sure we sleep for at least 1ms */
134 local_delay(10);
136 /* tweak L2 for high voltage */
137 if (has_cpu_l2lve) {
138 hid2 = mfspr(SPRN_HID2);
139 hid2 &= ~0x2000;
140 mtspr(SPRN_HID2, hid2);
143 #ifdef CONFIG_6xx
144 low_choose_750fx_pll(low_speed);
145 #endif
146 if (low_speed == 1) {
147 /* tweak L2 for low voltage */
148 if (has_cpu_l2lve) {
149 hid2 = mfspr(SPRN_HID2);
150 hid2 |= 0x2000;
151 mtspr(SPRN_HID2, hid2);
154 /* ramping down, set voltage last */
155 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04);
156 local_delay(10);
159 return 0;
162 static unsigned int cpu_750fx_get_cpu_speed(void)
164 if (mfspr(SPRN_HID1) & HID1_PS)
165 return low_freq;
166 else
167 return hi_freq;
170 /* Switch CPU speed using DFS */
171 static int dfs_set_cpu_speed(int low_speed)
173 if (low_speed == 0) {
174 /* ramping up, set voltage first */
175 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05);
176 /* Make sure we sleep for at least 1ms */
177 local_delay(1);
180 /* set frequency */
181 #ifdef CONFIG_6xx
182 low_choose_7447a_dfs(low_speed);
183 #endif
184 udelay(100);
186 if (low_speed == 1) {
187 /* ramping down, set voltage last */
188 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04);
189 local_delay(1);
192 return 0;
195 static unsigned int dfs_get_cpu_speed(void)
197 if (mfspr(SPRN_HID1) & HID1_DFS)
198 return low_freq;
199 else
200 return hi_freq;
204 /* Switch CPU speed using slewing GPIOs
206 static int gpios_set_cpu_speed(int low_speed)
208 int gpio, timeout = 0;
210 /* If ramping up, set voltage first */
211 if (low_speed == 0) {
212 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05);
213 /* Delay is way too big but it's ok, we schedule */
214 local_delay(10);
217 /* Set frequency */
218 gpio = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, frequency_gpio, 0);
219 if (low_speed == ((gpio & 0x01) == 0))
220 goto skip;
222 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, frequency_gpio,
223 low_speed ? 0x04 : 0x05);
224 udelay(200);
225 do {
226 if (++timeout > 100)
227 break;
228 local_delay(1);
229 gpio = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, slew_done_gpio, 0);
230 } while((gpio & 0x02) == 0);
231 skip:
232 /* If ramping down, set voltage last */
233 if (low_speed == 1) {
234 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04);
235 /* Delay is way too big but it's ok, we schedule */
236 local_delay(10);
239 #ifdef DEBUG_FREQ
240 debug_calc_bogomips();
241 #endif
243 return 0;
246 /* Switch CPU speed under PMU control
248 static int pmu_set_cpu_speed(int low_speed)
250 struct adb_request req;
251 unsigned long save_l2cr;
252 unsigned long save_l3cr;
253 unsigned int pic_prio;
254 unsigned long flags;
256 preempt_disable();
258 #ifdef DEBUG_FREQ
259 printk(KERN_DEBUG "HID1, before: %x\n", mfspr(SPRN_HID1));
260 #endif
261 pmu_suspend();
263 /* Disable all interrupt sources on openpic */
264 pic_prio = mpic_cpu_get_priority();
265 mpic_cpu_set_priority(0xf);
267 /* Make sure the decrementer won't interrupt us */
268 asm volatile("mtdec %0" : : "r" (0x7fffffff));
269 /* Make sure any pending DEC interrupt occurring while we did
270 * the above didn't re-enable the DEC */
271 mb();
272 asm volatile("mtdec %0" : : "r" (0x7fffffff));
274 /* We can now disable MSR_EE */
275 local_irq_save(flags);
277 /* Giveup the FPU & vec */
278 enable_kernel_fp();
280 #ifdef CONFIG_ALTIVEC
281 if (cpu_has_feature(CPU_FTR_ALTIVEC))
282 enable_kernel_altivec();
283 #endif /* CONFIG_ALTIVEC */
285 /* Save & disable L2 and L3 caches */
286 save_l3cr = _get_L3CR(); /* (returns -1 if not available) */
287 save_l2cr = _get_L2CR(); /* (returns -1 if not available) */
289 /* Send the new speed command. My assumption is that this command
290 * will cause PLL_CFG[0..3] to be changed next time CPU goes to sleep
292 pmu_request(&req, NULL, 6, PMU_CPU_SPEED, 'W', 'O', 'O', 'F', low_speed);
293 while (!req.complete)
294 pmu_poll();
296 /* Prepare the northbridge for the speed transition */
297 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,1,1);
299 /* Call low level code to backup CPU state and recover from
300 * hardware reset
302 low_sleep_handler();
304 /* Restore the northbridge */
305 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,1,0);
307 /* Restore L2 cache */
308 if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0)
309 _set_L2CR(save_l2cr);
310 /* Restore L3 cache */
311 if (save_l3cr != 0xffffffff && (save_l3cr & L3CR_L3E) != 0)
312 _set_L3CR(save_l3cr);
314 /* Restore userland MMU context */
315 set_context(current->active_mm->context.id, current->active_mm->pgd);
317 #ifdef DEBUG_FREQ
318 printk(KERN_DEBUG "HID1, after: %x\n", mfspr(SPRN_HID1));
319 #endif
321 /* Restore low level PMU operations */
322 pmu_unlock();
324 /* Restore decrementer */
325 wakeup_decrementer();
327 /* Restore interrupts */
328 mpic_cpu_set_priority(pic_prio);
330 /* Let interrupts flow again ... */
331 local_irq_restore(flags);
333 #ifdef DEBUG_FREQ
334 debug_calc_bogomips();
335 #endif
337 pmu_resume();
339 preempt_enable();
341 return 0;
344 static int do_set_cpu_speed(int speed_mode, int notify)
346 struct cpufreq_freqs freqs;
347 unsigned long l3cr;
348 static unsigned long prev_l3cr;
350 freqs.old = cur_freq;
351 freqs.new = (speed_mode == CPUFREQ_HIGH) ? hi_freq : low_freq;
352 freqs.cpu = smp_processor_id();
354 if (freqs.old == freqs.new)
355 return 0;
357 if (notify)
358 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
359 if (speed_mode == CPUFREQ_LOW &&
360 cpu_has_feature(CPU_FTR_L3CR)) {
361 l3cr = _get_L3CR();
362 if (l3cr & L3CR_L3E) {
363 prev_l3cr = l3cr;
364 _set_L3CR(0);
367 set_speed_proc(speed_mode == CPUFREQ_LOW);
368 if (speed_mode == CPUFREQ_HIGH &&
369 cpu_has_feature(CPU_FTR_L3CR)) {
370 l3cr = _get_L3CR();
371 if ((prev_l3cr & L3CR_L3E) && l3cr != prev_l3cr)
372 _set_L3CR(prev_l3cr);
374 if (notify)
375 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
376 cur_freq = (speed_mode == CPUFREQ_HIGH) ? hi_freq : low_freq;
378 return 0;
381 static unsigned int pmac_cpufreq_get_speed(unsigned int cpu)
383 return cur_freq;
386 static int pmac_cpufreq_verify(struct cpufreq_policy *policy)
388 return cpufreq_frequency_table_verify(policy, pmac_cpu_freqs);
391 static int pmac_cpufreq_target( struct cpufreq_policy *policy,
392 unsigned int target_freq,
393 unsigned int relation)
395 unsigned int newstate = 0;
396 int rc;
398 if (cpufreq_frequency_table_target(policy, pmac_cpu_freqs,
399 target_freq, relation, &newstate))
400 return -EINVAL;
402 rc = do_set_cpu_speed(newstate, 1);
404 ppc_proc_freq = cur_freq * 1000ul;
405 return rc;
408 static int pmac_cpufreq_cpu_init(struct cpufreq_policy *policy)
410 if (policy->cpu != 0)
411 return -ENODEV;
413 policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
414 policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
415 policy->cur = cur_freq;
417 cpufreq_frequency_table_get_attr(pmac_cpu_freqs, policy->cpu);
418 return cpufreq_frequency_table_cpuinfo(policy, pmac_cpu_freqs);
421 static u32 read_gpio(struct device_node *np)
423 const u32 *reg = of_get_property(np, "reg", NULL);
424 u32 offset;
426 if (reg == NULL)
427 return 0;
428 /* That works for all keylargos but shall be fixed properly
429 * some day... The problem is that it seems we can't rely
430 * on the "reg" property of the GPIO nodes, they are either
431 * relative to the base of KeyLargo or to the base of the
432 * GPIO space, and the device-tree doesn't help.
434 offset = *reg;
435 if (offset < KEYLARGO_GPIO_LEVELS0)
436 offset += KEYLARGO_GPIO_LEVELS0;
437 return offset;
440 static int pmac_cpufreq_suspend(struct cpufreq_policy *policy, pm_message_t pmsg)
442 /* Ok, this could be made a bit smarter, but let's be robust for now. We
443 * always force a speed change to high speed before sleep, to make sure
444 * we have appropriate voltage and/or bus speed for the wakeup process,
445 * and to make sure our loops_per_jiffies are "good enough", that is will
446 * not cause too short delays if we sleep in low speed and wake in high
447 * speed..
449 no_schedule = 1;
450 sleep_freq = cur_freq;
451 if (cur_freq == low_freq && !is_pmu_based)
452 do_set_cpu_speed(CPUFREQ_HIGH, 0);
453 return 0;
456 static int pmac_cpufreq_resume(struct cpufreq_policy *policy)
458 /* If we resume, first check if we have a get() function */
459 if (get_speed_proc)
460 cur_freq = get_speed_proc();
461 else
462 cur_freq = 0;
464 /* We don't, hrm... we don't really know our speed here, best
465 * is that we force a switch to whatever it was, which is
466 * probably high speed due to our suspend() routine
468 do_set_cpu_speed(sleep_freq == low_freq ?
469 CPUFREQ_LOW : CPUFREQ_HIGH, 0);
471 ppc_proc_freq = cur_freq * 1000ul;
473 no_schedule = 0;
474 return 0;
477 static struct cpufreq_driver pmac_cpufreq_driver = {
478 .verify = pmac_cpufreq_verify,
479 .target = pmac_cpufreq_target,
480 .get = pmac_cpufreq_get_speed,
481 .init = pmac_cpufreq_cpu_init,
482 .suspend = pmac_cpufreq_suspend,
483 .resume = pmac_cpufreq_resume,
484 .flags = CPUFREQ_PM_NO_WARN,
485 .attr = pmac_cpu_freqs_attr,
486 .name = "powermac",
487 .owner = THIS_MODULE,
491 static int pmac_cpufreq_init_MacRISC3(struct device_node *cpunode)
493 struct device_node *volt_gpio_np = of_find_node_by_name(NULL,
494 "voltage-gpio");
495 struct device_node *freq_gpio_np = of_find_node_by_name(NULL,
496 "frequency-gpio");
497 struct device_node *slew_done_gpio_np = of_find_node_by_name(NULL,
498 "slewing-done");
499 const u32 *value;
502 * Check to see if it's GPIO driven or PMU only
504 * The way we extract the GPIO address is slightly hackish, but it
505 * works well enough for now. We need to abstract the whole GPIO
506 * stuff sooner or later anyway
509 if (volt_gpio_np)
510 voltage_gpio = read_gpio(volt_gpio_np);
511 if (freq_gpio_np)
512 frequency_gpio = read_gpio(freq_gpio_np);
513 if (slew_done_gpio_np)
514 slew_done_gpio = read_gpio(slew_done_gpio_np);
516 /* If we use the frequency GPIOs, calculate the min/max speeds based
517 * on the bus frequencies
519 if (frequency_gpio && slew_done_gpio) {
520 int lenp, rc;
521 const u32 *freqs, *ratio;
523 freqs = of_get_property(cpunode, "bus-frequencies", &lenp);
524 lenp /= sizeof(u32);
525 if (freqs == NULL || lenp != 2) {
526 printk(KERN_ERR "cpufreq: bus-frequencies incorrect or missing\n");
527 return 1;
529 ratio = of_get_property(cpunode, "processor-to-bus-ratio*2",
530 NULL);
531 if (ratio == NULL) {
532 printk(KERN_ERR "cpufreq: processor-to-bus-ratio*2 missing\n");
533 return 1;
536 /* Get the min/max bus frequencies */
537 low_freq = min(freqs[0], freqs[1]);
538 hi_freq = max(freqs[0], freqs[1]);
540 /* Grrrr.. It _seems_ that the device-tree is lying on the low bus
541 * frequency, it claims it to be around 84Mhz on some models while
542 * it appears to be approx. 101Mhz on all. Let's hack around here...
543 * fortunately, we don't need to be too precise
545 if (low_freq < 98000000)
546 low_freq = 101000000;
548 /* Convert those to CPU core clocks */
549 low_freq = (low_freq * (*ratio)) / 2000;
550 hi_freq = (hi_freq * (*ratio)) / 2000;
552 /* Now we get the frequencies, we read the GPIO to see what is out current
553 * speed
555 rc = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, frequency_gpio, 0);
556 cur_freq = (rc & 0x01) ? hi_freq : low_freq;
558 set_speed_proc = gpios_set_cpu_speed;
559 return 1;
562 /* If we use the PMU, look for the min & max frequencies in the
563 * device-tree
565 value = of_get_property(cpunode, "min-clock-frequency", NULL);
566 if (!value)
567 return 1;
568 low_freq = (*value) / 1000;
569 /* The PowerBook G4 12" (PowerBook6,1) has an error in the device-tree
570 * here */
571 if (low_freq < 100000)
572 low_freq *= 10;
574 value = of_get_property(cpunode, "max-clock-frequency", NULL);
575 if (!value)
576 return 1;
577 hi_freq = (*value) / 1000;
578 set_speed_proc = pmu_set_cpu_speed;
579 is_pmu_based = 1;
581 return 0;
584 static int pmac_cpufreq_init_7447A(struct device_node *cpunode)
586 struct device_node *volt_gpio_np;
588 if (of_get_property(cpunode, "dynamic-power-step", NULL) == NULL)
589 return 1;
591 volt_gpio_np = of_find_node_by_name(NULL, "cpu-vcore-select");
592 if (volt_gpio_np)
593 voltage_gpio = read_gpio(volt_gpio_np);
594 if (!voltage_gpio){
595 printk(KERN_ERR "cpufreq: missing cpu-vcore-select gpio\n");
596 return 1;
599 /* OF only reports the high frequency */
600 hi_freq = cur_freq;
601 low_freq = cur_freq/2;
603 /* Read actual frequency from CPU */
604 cur_freq = dfs_get_cpu_speed();
605 set_speed_proc = dfs_set_cpu_speed;
606 get_speed_proc = dfs_get_cpu_speed;
608 return 0;
611 static int pmac_cpufreq_init_750FX(struct device_node *cpunode)
613 struct device_node *volt_gpio_np;
614 u32 pvr;
615 const u32 *value;
617 if (of_get_property(cpunode, "dynamic-power-step", NULL) == NULL)
618 return 1;
620 hi_freq = cur_freq;
621 value = of_get_property(cpunode, "reduced-clock-frequency", NULL);
622 if (!value)
623 return 1;
624 low_freq = (*value) / 1000;
626 volt_gpio_np = of_find_node_by_name(NULL, "cpu-vcore-select");
627 if (volt_gpio_np)
628 voltage_gpio = read_gpio(volt_gpio_np);
630 pvr = mfspr(SPRN_PVR);
631 has_cpu_l2lve = !((pvr & 0xf00) == 0x100);
633 set_speed_proc = cpu_750fx_cpu_speed;
634 get_speed_proc = cpu_750fx_get_cpu_speed;
635 cur_freq = cpu_750fx_get_cpu_speed();
637 return 0;
640 /* Currently, we support the following machines:
642 * - Titanium PowerBook 1Ghz (PMU based, 667Mhz & 1Ghz)
643 * - Titanium PowerBook 800 (PMU based, 667Mhz & 800Mhz)
644 * - Titanium PowerBook 400 (PMU based, 300Mhz & 400Mhz)
645 * - Titanium PowerBook 500 (PMU based, 300Mhz & 500Mhz)
646 * - iBook2 500/600 (PMU based, 400Mhz & 500/600Mhz)
647 * - iBook2 700 (CPU based, 400Mhz & 700Mhz, support low voltage)
648 * - Recent MacRISC3 laptops
649 * - All new machines with 7447A CPUs
651 static int __init pmac_cpufreq_setup(void)
653 struct device_node *cpunode;
654 const u32 *value;
656 if (strstr(cmd_line, "nocpufreq"))
657 return 0;
659 /* Assume only one CPU */
660 cpunode = of_find_node_by_type(NULL, "cpu");
661 if (!cpunode)
662 goto out;
664 /* Get current cpu clock freq */
665 value = of_get_property(cpunode, "clock-frequency", NULL);
666 if (!value)
667 goto out;
668 cur_freq = (*value) / 1000;
670 /* Check for 7447A based MacRISC3 */
671 if (machine_is_compatible("MacRISC3") &&
672 of_get_property(cpunode, "dynamic-power-step", NULL) &&
673 PVR_VER(mfspr(SPRN_PVR)) == 0x8003) {
674 pmac_cpufreq_init_7447A(cpunode);
675 /* Check for other MacRISC3 machines */
676 } else if (machine_is_compatible("PowerBook3,4") ||
677 machine_is_compatible("PowerBook3,5") ||
678 machine_is_compatible("MacRISC3")) {
679 pmac_cpufreq_init_MacRISC3(cpunode);
680 /* Else check for iBook2 500/600 */
681 } else if (machine_is_compatible("PowerBook4,1")) {
682 hi_freq = cur_freq;
683 low_freq = 400000;
684 set_speed_proc = pmu_set_cpu_speed;
685 is_pmu_based = 1;
687 /* Else check for TiPb 550 */
688 else if (machine_is_compatible("PowerBook3,3") && cur_freq == 550000) {
689 hi_freq = cur_freq;
690 low_freq = 500000;
691 set_speed_proc = pmu_set_cpu_speed;
692 is_pmu_based = 1;
694 /* Else check for TiPb 400 & 500 */
695 else if (machine_is_compatible("PowerBook3,2")) {
696 /* We only know about the 400 MHz and the 500Mhz model
697 * they both have 300 MHz as low frequency
699 if (cur_freq < 350000 || cur_freq > 550000)
700 goto out;
701 hi_freq = cur_freq;
702 low_freq = 300000;
703 set_speed_proc = pmu_set_cpu_speed;
704 is_pmu_based = 1;
706 /* Else check for 750FX */
707 else if (PVR_VER(mfspr(SPRN_PVR)) == 0x7000)
708 pmac_cpufreq_init_750FX(cpunode);
709 out:
710 of_node_put(cpunode);
711 if (set_speed_proc == NULL)
712 return -ENODEV;
714 pmac_cpu_freqs[CPUFREQ_LOW].frequency = low_freq;
715 pmac_cpu_freqs[CPUFREQ_HIGH].frequency = hi_freq;
716 ppc_proc_freq = cur_freq * 1000ul;
718 printk(KERN_INFO "Registering PowerMac CPU frequency driver\n");
719 printk(KERN_INFO "Low: %d Mhz, High: %d Mhz, Boot: %d Mhz\n",
720 low_freq/1000, hi_freq/1000, cur_freq/1000);
722 return cpufreq_register_driver(&pmac_cpufreq_driver);
725 module_init(pmac_cpufreq_setup);