RT-AC66 3.0.0.4.374.130 core
[tomato.git] / release / src-rt-6.x / linux / linux-2.6 / arch / powerpc / platforms / iseries / setup.c
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1 /*
2 * Copyright (c) 2000 Mike Corrigan <mikejc@us.ibm.com>
3 * Copyright (c) 1999-2000 Grant Erickson <grant@lcse.umn.edu>
5 * Description:
6 * Architecture- / platform-specific boot-time initialization code for
7 * the IBM iSeries LPAR. Adapted from original code by Grant Erickson and
8 * code by Gary Thomas, Cort Dougan <cort@fsmlabs.com>, and Dan Malek
9 * <dan@net4x.com>.
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * as published by the Free Software Foundation; either version
14 * 2 of the License, or (at your option) any later version.
17 #undef DEBUG
19 #include <linux/init.h>
20 #include <linux/threads.h>
21 #include <linux/smp.h>
22 #include <linux/param.h>
23 #include <linux/string.h>
24 #include <linux/seq_file.h>
25 #include <linux/kdev_t.h>
26 #include <linux/major.h>
27 #include <linux/root_dev.h>
28 #include <linux/kernel.h>
30 #include <asm/processor.h>
31 #include <asm/machdep.h>
32 #include <asm/page.h>
33 #include <asm/mmu.h>
34 #include <asm/pgtable.h>
35 #include <asm/mmu_context.h>
36 #include <asm/cputable.h>
37 #include <asm/sections.h>
38 #include <asm/iommu.h>
39 #include <asm/firmware.h>
40 #include <asm/system.h>
41 #include <asm/time.h>
42 #include <asm/paca.h>
43 #include <asm/cache.h>
44 #include <asm/sections.h>
45 #include <asm/abs_addr.h>
46 #include <asm/iseries/hv_lp_config.h>
47 #include <asm/iseries/hv_call_event.h>
48 #include <asm/iseries/hv_call_xm.h>
49 #include <asm/iseries/it_lp_queue.h>
50 #include <asm/iseries/mf.h>
51 #include <asm/iseries/hv_lp_event.h>
52 #include <asm/iseries/lpar_map.h>
53 #include <asm/udbg.h>
54 #include <asm/irq.h>
56 #include "naca.h"
57 #include "setup.h"
58 #include "irq.h"
59 #include "vpd_areas.h"
60 #include "processor_vpd.h"
61 #include "it_lp_naca.h"
62 #include "main_store.h"
63 #include "call_sm.h"
64 #include "call_hpt.h"
66 #ifdef DEBUG
67 #define DBG(fmt...) udbg_printf(fmt)
68 #else
69 #define DBG(fmt...)
70 #endif
72 /* Function Prototypes */
73 static unsigned long build_iSeries_Memory_Map(void);
74 static void iseries_shared_idle(void);
75 static void iseries_dedicated_idle(void);
76 #ifdef CONFIG_PCI
77 extern void iSeries_pci_final_fixup(void);
78 #else
79 static void iSeries_pci_final_fixup(void) { }
80 #endif
82 extern unsigned long iSeries_recal_tb;
83 extern unsigned long iSeries_recal_titan;
85 struct MemoryBlock {
86 unsigned long absStart;
87 unsigned long absEnd;
88 unsigned long logicalStart;
89 unsigned long logicalEnd;
93 * Process the main store vpd to determine where the holes in memory are
94 * and return the number of physical blocks and fill in the array of
95 * block data.
97 static unsigned long iSeries_process_Condor_mainstore_vpd(
98 struct MemoryBlock *mb_array, unsigned long max_entries)
100 unsigned long holeFirstChunk, holeSizeChunks;
101 unsigned long numMemoryBlocks = 1;
102 struct IoHriMainStoreSegment4 *msVpd =
103 (struct IoHriMainStoreSegment4 *)xMsVpd;
104 unsigned long holeStart = msVpd->nonInterleavedBlocksStartAdr;
105 unsigned long holeEnd = msVpd->nonInterleavedBlocksEndAdr;
106 unsigned long holeSize = holeEnd - holeStart;
108 printk("Mainstore_VPD: Condor\n");
110 * Determine if absolute memory has any
111 * holes so that we can interpret the
112 * access map we get back from the hypervisor
113 * correctly.
115 mb_array[0].logicalStart = 0;
116 mb_array[0].logicalEnd = 0x100000000;
117 mb_array[0].absStart = 0;
118 mb_array[0].absEnd = 0x100000000;
120 if (holeSize) {
121 numMemoryBlocks = 2;
122 holeStart = holeStart & 0x000fffffffffffff;
123 holeStart = addr_to_chunk(holeStart);
124 holeFirstChunk = holeStart;
125 holeSize = addr_to_chunk(holeSize);
126 holeSizeChunks = holeSize;
127 printk( "Main store hole: start chunk = %0lx, size = %0lx chunks\n",
128 holeFirstChunk, holeSizeChunks );
129 mb_array[0].logicalEnd = holeFirstChunk;
130 mb_array[0].absEnd = holeFirstChunk;
131 mb_array[1].logicalStart = holeFirstChunk;
132 mb_array[1].logicalEnd = 0x100000000 - holeSizeChunks;
133 mb_array[1].absStart = holeFirstChunk + holeSizeChunks;
134 mb_array[1].absEnd = 0x100000000;
136 return numMemoryBlocks;
139 #define MaxSegmentAreas 32
140 #define MaxSegmentAdrRangeBlocks 128
141 #define MaxAreaRangeBlocks 4
143 static unsigned long iSeries_process_Regatta_mainstore_vpd(
144 struct MemoryBlock *mb_array, unsigned long max_entries)
146 struct IoHriMainStoreSegment5 *msVpdP =
147 (struct IoHriMainStoreSegment5 *)xMsVpd;
148 unsigned long numSegmentBlocks = 0;
149 u32 existsBits = msVpdP->msAreaExists;
150 unsigned long area_num;
152 printk("Mainstore_VPD: Regatta\n");
154 for (area_num = 0; area_num < MaxSegmentAreas; ++area_num ) {
155 unsigned long numAreaBlocks;
156 struct IoHriMainStoreArea4 *currentArea;
158 if (existsBits & 0x80000000) {
159 unsigned long block_num;
161 currentArea = &msVpdP->msAreaArray[area_num];
162 numAreaBlocks = currentArea->numAdrRangeBlocks;
163 printk("ms_vpd: processing area %2ld blocks=%ld",
164 area_num, numAreaBlocks);
165 for (block_num = 0; block_num < numAreaBlocks;
166 ++block_num ) {
167 /* Process an address range block */
168 struct MemoryBlock tempBlock;
169 unsigned long i;
171 tempBlock.absStart =
172 (unsigned long)currentArea->xAdrRangeBlock[block_num].blockStart;
173 tempBlock.absEnd =
174 (unsigned long)currentArea->xAdrRangeBlock[block_num].blockEnd;
175 tempBlock.logicalStart = 0;
176 tempBlock.logicalEnd = 0;
177 printk("\n block %ld absStart=%016lx absEnd=%016lx",
178 block_num, tempBlock.absStart,
179 tempBlock.absEnd);
181 for (i = 0; i < numSegmentBlocks; ++i) {
182 if (mb_array[i].absStart ==
183 tempBlock.absStart)
184 break;
186 if (i == numSegmentBlocks) {
187 if (numSegmentBlocks == max_entries)
188 panic("iSeries_process_mainstore_vpd: too many memory blocks");
189 mb_array[numSegmentBlocks] = tempBlock;
190 ++numSegmentBlocks;
191 } else
192 printk(" (duplicate)");
194 printk("\n");
196 existsBits <<= 1;
198 /* Now sort the blocks found into ascending sequence */
199 if (numSegmentBlocks > 1) {
200 unsigned long m, n;
202 for (m = 0; m < numSegmentBlocks - 1; ++m) {
203 for (n = numSegmentBlocks - 1; m < n; --n) {
204 if (mb_array[n].absStart <
205 mb_array[n-1].absStart) {
206 struct MemoryBlock tempBlock;
208 tempBlock = mb_array[n];
209 mb_array[n] = mb_array[n-1];
210 mb_array[n-1] = tempBlock;
216 * Assign "logical" addresses to each block. These
217 * addresses correspond to the hypervisor "bitmap" space.
218 * Convert all addresses into units of 256K chunks.
221 unsigned long i, nextBitmapAddress;
223 printk("ms_vpd: %ld sorted memory blocks\n", numSegmentBlocks);
224 nextBitmapAddress = 0;
225 for (i = 0; i < numSegmentBlocks; ++i) {
226 unsigned long length = mb_array[i].absEnd -
227 mb_array[i].absStart;
229 mb_array[i].logicalStart = nextBitmapAddress;
230 mb_array[i].logicalEnd = nextBitmapAddress + length;
231 nextBitmapAddress += length;
232 printk(" Bitmap range: %016lx - %016lx\n"
233 " Absolute range: %016lx - %016lx\n",
234 mb_array[i].logicalStart,
235 mb_array[i].logicalEnd,
236 mb_array[i].absStart, mb_array[i].absEnd);
237 mb_array[i].absStart = addr_to_chunk(mb_array[i].absStart &
238 0x000fffffffffffff);
239 mb_array[i].absEnd = addr_to_chunk(mb_array[i].absEnd &
240 0x000fffffffffffff);
241 mb_array[i].logicalStart =
242 addr_to_chunk(mb_array[i].logicalStart);
243 mb_array[i].logicalEnd = addr_to_chunk(mb_array[i].logicalEnd);
247 return numSegmentBlocks;
250 static unsigned long iSeries_process_mainstore_vpd(struct MemoryBlock *mb_array,
251 unsigned long max_entries)
253 unsigned long i;
254 unsigned long mem_blocks = 0;
256 if (cpu_has_feature(CPU_FTR_SLB))
257 mem_blocks = iSeries_process_Regatta_mainstore_vpd(mb_array,
258 max_entries);
259 else
260 mem_blocks = iSeries_process_Condor_mainstore_vpd(mb_array,
261 max_entries);
263 printk("Mainstore_VPD: numMemoryBlocks = %ld \n", mem_blocks);
264 for (i = 0; i < mem_blocks; ++i) {
265 printk("Mainstore_VPD: block %3ld logical chunks %016lx - %016lx\n"
266 " abs chunks %016lx - %016lx\n",
267 i, mb_array[i].logicalStart, mb_array[i].logicalEnd,
268 mb_array[i].absStart, mb_array[i].absEnd);
270 return mem_blocks;
273 static void __init iSeries_get_cmdline(void)
275 char *p, *q;
277 /* copy the command line parameter from the primary VSP */
278 HvCallEvent_dmaToSp(cmd_line, 2 * 64* 1024, 256,
279 HvLpDma_Direction_RemoteToLocal);
281 p = cmd_line;
282 q = cmd_line + 255;
283 while(p < q) {
284 if (!*p || *p == '\n')
285 break;
286 ++p;
288 *p = 0;
291 static void __init iSeries_init_early(void)
293 DBG(" -> iSeries_init_early()\n");
295 iSeries_recal_tb = get_tb();
296 iSeries_recal_titan = HvCallXm_loadTod();
299 * Initialize the DMA/TCE management
301 iommu_init_early_iSeries();
303 /* Initialize machine-dependency vectors */
304 #ifdef CONFIG_SMP
305 smp_init_iSeries();
306 #endif
308 /* Associate Lp Event Queue 0 with processor 0 */
309 HvCallEvent_setLpEventQueueInterruptProc(0, 0);
311 mf_init();
313 DBG(" <- iSeries_init_early()\n");
316 struct mschunks_map mschunks_map = {
317 /* XXX We don't use these, but Piranha might need them. */
318 .chunk_size = MSCHUNKS_CHUNK_SIZE,
319 .chunk_shift = MSCHUNKS_CHUNK_SHIFT,
320 .chunk_mask = MSCHUNKS_OFFSET_MASK,
322 EXPORT_SYMBOL(mschunks_map);
324 void mschunks_alloc(unsigned long num_chunks)
326 klimit = _ALIGN(klimit, sizeof(u32));
327 mschunks_map.mapping = (u32 *)klimit;
328 klimit += num_chunks * sizeof(u32);
329 mschunks_map.num_chunks = num_chunks;
333 * The iSeries may have very large memories ( > 128 GB ) and a partition
334 * may get memory in "chunks" that may be anywhere in the 2**52 real
335 * address space. The chunks are 256K in size. To map this to the
336 * memory model Linux expects, the AS/400 specific code builds a
337 * translation table to translate what Linux thinks are "physical"
338 * addresses to the actual real addresses. This allows us to make
339 * it appear to Linux that we have contiguous memory starting at
340 * physical address zero while in fact this could be far from the truth.
341 * To avoid confusion, I'll let the words physical and/or real address
342 * apply to the Linux addresses while I'll use "absolute address" to
343 * refer to the actual hardware real address.
345 * build_iSeries_Memory_Map gets information from the Hypervisor and
346 * looks at the Main Store VPD to determine the absolute addresses
347 * of the memory that has been assigned to our partition and builds
348 * a table used to translate Linux's physical addresses to these
349 * absolute addresses. Absolute addresses are needed when
350 * communicating with the hypervisor (e.g. to build HPT entries)
352 * Returns the physical memory size
355 static unsigned long __init build_iSeries_Memory_Map(void)
357 u32 loadAreaFirstChunk, loadAreaLastChunk, loadAreaSize;
358 u32 nextPhysChunk;
359 u32 hptFirstChunk, hptLastChunk, hptSizeChunks, hptSizePages;
360 u32 totalChunks,moreChunks;
361 u32 currChunk, thisChunk, absChunk;
362 u32 currDword;
363 u32 chunkBit;
364 u64 map;
365 struct MemoryBlock mb[32];
366 unsigned long numMemoryBlocks, curBlock;
368 /* Chunk size on iSeries is 256K bytes */
369 totalChunks = (u32)HvLpConfig_getMsChunks();
370 mschunks_alloc(totalChunks);
373 * Get absolute address of our load area
374 * and map it to physical address 0
375 * This guarantees that the loadarea ends up at physical 0
376 * otherwise, it might not be returned by PLIC as the first
377 * chunks
380 loadAreaFirstChunk = (u32)addr_to_chunk(itLpNaca.xLoadAreaAddr);
381 loadAreaSize = itLpNaca.xLoadAreaChunks;
384 * Only add the pages already mapped here.
385 * Otherwise we might add the hpt pages
386 * The rest of the pages of the load area
387 * aren't in the HPT yet and can still
388 * be assigned an arbitrary physical address
390 if ((loadAreaSize * 64) > HvPagesToMap)
391 loadAreaSize = HvPagesToMap / 64;
393 loadAreaLastChunk = loadAreaFirstChunk + loadAreaSize - 1;
396 * TODO Do we need to do something if the HPT is in the 64MB load area?
397 * This would be required if the itLpNaca.xLoadAreaChunks includes
398 * the HPT size
401 printk("Mapping load area - physical addr = 0000000000000000\n"
402 " absolute addr = %016lx\n",
403 chunk_to_addr(loadAreaFirstChunk));
404 printk("Load area size %dK\n", loadAreaSize * 256);
406 for (nextPhysChunk = 0; nextPhysChunk < loadAreaSize; ++nextPhysChunk)
407 mschunks_map.mapping[nextPhysChunk] =
408 loadAreaFirstChunk + nextPhysChunk;
411 * Get absolute address of our HPT and remember it so
412 * we won't map it to any physical address
414 hptFirstChunk = (u32)addr_to_chunk(HvCallHpt_getHptAddress());
415 hptSizePages = (u32)HvCallHpt_getHptPages();
416 hptSizeChunks = hptSizePages >>
417 (MSCHUNKS_CHUNK_SHIFT - HW_PAGE_SHIFT);
418 hptLastChunk = hptFirstChunk + hptSizeChunks - 1;
420 printk("HPT absolute addr = %016lx, size = %dK\n",
421 chunk_to_addr(hptFirstChunk), hptSizeChunks * 256);
424 * Determine if absolute memory has any
425 * holes so that we can interpret the
426 * access map we get back from the hypervisor
427 * correctly.
429 numMemoryBlocks = iSeries_process_mainstore_vpd(mb, 32);
432 * Process the main store access map from the hypervisor
433 * to build up our physical -> absolute translation table
435 curBlock = 0;
436 currChunk = 0;
437 currDword = 0;
438 moreChunks = totalChunks;
440 while (moreChunks) {
441 map = HvCallSm_get64BitsOfAccessMap(itLpNaca.xLpIndex,
442 currDword);
443 thisChunk = currChunk;
444 while (map) {
445 chunkBit = map >> 63;
446 map <<= 1;
447 if (chunkBit) {
448 --moreChunks;
449 while (thisChunk >= mb[curBlock].logicalEnd) {
450 ++curBlock;
451 if (curBlock >= numMemoryBlocks)
452 panic("out of memory blocks");
454 if (thisChunk < mb[curBlock].logicalStart)
455 panic("memory block error");
457 absChunk = mb[curBlock].absStart +
458 (thisChunk - mb[curBlock].logicalStart);
459 if (((absChunk < hptFirstChunk) ||
460 (absChunk > hptLastChunk)) &&
461 ((absChunk < loadAreaFirstChunk) ||
462 (absChunk > loadAreaLastChunk))) {
463 mschunks_map.mapping[nextPhysChunk] =
464 absChunk;
465 ++nextPhysChunk;
468 ++thisChunk;
470 ++currDword;
471 currChunk += 64;
475 * main store size (in chunks) is
476 * totalChunks - hptSizeChunks
477 * which should be equal to
478 * nextPhysChunk
480 return chunk_to_addr(nextPhysChunk);
484 * Document me.
486 static void __init iSeries_setup_arch(void)
488 if (get_lppaca()->shared_proc) {
489 ppc_md.idle_loop = iseries_shared_idle;
490 printk(KERN_DEBUG "Using shared processor idle loop\n");
491 } else {
492 ppc_md.idle_loop = iseries_dedicated_idle;
493 printk(KERN_DEBUG "Using dedicated idle loop\n");
496 /* Setup the Lp Event Queue */
497 setup_hvlpevent_queue();
499 printk("Max logical processors = %d\n",
500 itVpdAreas.xSlicMaxLogicalProcs);
501 printk("Max physical processors = %d\n",
502 itVpdAreas.xSlicMaxPhysicalProcs);
505 static void iSeries_show_cpuinfo(struct seq_file *m)
507 seq_printf(m, "machine\t\t: 64-bit iSeries Logical Partition\n");
510 static void __init iSeries_progress(char * st, unsigned short code)
512 printk("Progress: [%04x] - %s\n", (unsigned)code, st);
513 mf_display_progress(code);
516 static void __init iSeries_fixup_klimit(void)
519 * Change klimit to take into account any ram disk
520 * that may be included
522 if (naca.xRamDisk)
523 klimit = KERNELBASE + (u64)naca.xRamDisk +
524 (naca.xRamDiskSize * HW_PAGE_SIZE);
527 static int __init iSeries_src_init(void)
529 /* clear the progress line */
530 if (firmware_has_feature(FW_FEATURE_ISERIES))
531 ppc_md.progress(" ", 0xffff);
532 return 0;
535 late_initcall(iSeries_src_init);
537 static inline void process_iSeries_events(void)
539 asm volatile ("li 0,0x5555; sc" : : : "r0", "r3");
542 static void yield_shared_processor(void)
544 unsigned long tb;
546 HvCall_setEnabledInterrupts(HvCall_MaskIPI |
547 HvCall_MaskLpEvent |
548 HvCall_MaskLpProd |
549 HvCall_MaskTimeout);
551 tb = get_tb();
552 /* Compute future tb value when yield should expire */
553 HvCall_yieldProcessor(HvCall_YieldTimed, tb+tb_ticks_per_jiffy);
556 * The decrementer stops during the yield. Force a fake decrementer
557 * here and let the timer_interrupt code sort out the actual time.
559 get_lppaca()->int_dword.fields.decr_int = 1;
560 ppc64_runlatch_on();
561 process_iSeries_events();
564 static void iseries_shared_idle(void)
566 while (1) {
567 while (!need_resched() && !hvlpevent_is_pending()) {
568 local_irq_disable();
569 ppc64_runlatch_off();
571 /* Recheck with irqs off */
572 if (!need_resched() && !hvlpevent_is_pending())
573 yield_shared_processor();
575 HMT_medium();
576 local_irq_enable();
579 ppc64_runlatch_on();
581 if (hvlpevent_is_pending())
582 process_iSeries_events();
584 preempt_enable_no_resched();
585 schedule();
586 preempt_disable();
590 static void iseries_dedicated_idle(void)
592 set_thread_flag(TIF_POLLING_NRFLAG);
594 while (1) {
595 if (!need_resched()) {
596 while (!need_resched()) {
597 ppc64_runlatch_off();
598 HMT_low();
600 if (hvlpevent_is_pending()) {
601 HMT_medium();
602 ppc64_runlatch_on();
603 process_iSeries_events();
607 HMT_medium();
610 ppc64_runlatch_on();
611 preempt_enable_no_resched();
612 schedule();
613 preempt_disable();
617 #ifndef CONFIG_PCI
618 void __init iSeries_init_IRQ(void) { }
619 #endif
621 static void __iomem *iseries_ioremap(phys_addr_t address, unsigned long size,
622 unsigned long flags)
624 return (void __iomem *)address;
627 static void iseries_iounmap(volatile void __iomem *token)
631 static int __init iseries_probe(void)
633 unsigned long root = of_get_flat_dt_root();
634 if (!of_flat_dt_is_compatible(root, "IBM,iSeries"))
635 return 0;
637 hpte_init_iSeries();
638 /* iSeries does not support 16M pages */
639 cur_cpu_spec->cpu_features &= ~CPU_FTR_16M_PAGE;
641 return 1;
644 define_machine(iseries) {
645 .name = "iSeries",
646 .setup_arch = iSeries_setup_arch,
647 .show_cpuinfo = iSeries_show_cpuinfo,
648 .init_IRQ = iSeries_init_IRQ,
649 .get_irq = iSeries_get_irq,
650 .init_early = iSeries_init_early,
651 .pcibios_fixup = iSeries_pci_final_fixup,
652 .restart = mf_reboot,
653 .power_off = mf_power_off,
654 .halt = mf_power_off,
655 .get_boot_time = iSeries_get_boot_time,
656 .set_rtc_time = iSeries_set_rtc_time,
657 .get_rtc_time = iSeries_get_rtc_time,
658 .calibrate_decr = generic_calibrate_decr,
659 .progress = iSeries_progress,
660 .probe = iseries_probe,
661 .ioremap = iseries_ioremap,
662 .iounmap = iseries_iounmap,
663 /* XXX Implement enable_pmcs for iSeries */
666 void * __init iSeries_early_setup(void)
668 unsigned long phys_mem_size;
670 /* Identify CPU type. This is done again by the common code later
671 * on but calling this function multiple times is fine.
673 identify_cpu(0, mfspr(SPRN_PVR));
675 powerpc_firmware_features |= FW_FEATURE_ISERIES;
676 powerpc_firmware_features |= FW_FEATURE_LPAR;
678 iSeries_fixup_klimit();
681 * Initialize the table which translate Linux physical addresses to
682 * AS/400 absolute addresses
684 phys_mem_size = build_iSeries_Memory_Map();
686 iSeries_get_cmdline();
688 return (void *) __pa(build_flat_dt(phys_mem_size));
691 static void hvputc(char c)
693 if (c == '\n')
694 hvputc('\r');
696 HvCall_writeLogBuffer(&c, 1);
699 void __init udbg_init_iseries(void)
701 udbg_putc = hvputc;