release/src-rt-6.x/linux/linux-2.6/arch/mips/mips-boards/malta/malta_setup.c

   1 /*
   2  * Carsten Langgaard, carstenl@mips.com
   3  * Copyright (C) 2000 MIPS Technologies, Inc.  All rights reserved.
   4  *
   5  *  This program is free software; you can distribute it and/or modify it
   6  *  under the terms of the GNU General Public License (Version 2) as
   7  *  published by the Free Software Foundation.
   8  *
   9  *  This program is distributed in the hope it will be useful, but WITHOUT
  10  *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  *  for more details.
  13  *
  14  *  You should have received a copy of the GNU General Public License along
  15  *  with this program; if not, write to the Free Software Foundation, Inc.,
  16  *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
  17  */
  18 #include <linux/init.h>
  19 #include <linux/sched.h>
  20 #include <linux/ioport.h>
  21 #include <linux/pci.h>
  22 #include <linux/screen_info.h>
  23
  24 #include <asm/cpu.h>
  25 #include <asm/bootinfo.h>
  26 #include <asm/irq.h>
  27 #include <asm/mips-boards/generic.h>
  28 #include <asm/mips-boards/prom.h>
  29 #include <asm/mips-boards/malta.h>
  30 #include <asm/mips-boards/maltaint.h>
  31 #include <asm/dma.h>
  32 #include <asm/time.h>
  33 #include <asm/traps.h>
  34 #ifdef CONFIG_VT
  35 #include <linux/console.h>
  36 #endif
  37
  38 extern void mips_reboot_setup(void);
  39 extern void mips_time_init(void);
  40 extern unsigned long mips_rtc_get_time(void);
  41
  42 #ifdef CONFIG_KGDB
  43 extern void kgdb_config(void);
  44 #endif
  45
  46 struct resource standard_io_resources[] = {
  47         { .name = "dma1", .start = 0x00, .end = 0x1f, .flags = IORESOURCE_BUSY },
  48         { .name = "timer", .start = 0x40, .end = 0x5f, .flags = IORESOURCE_BUSY },
  49         { .name = "keyboard", .start = 0x60, .end = 0x6f, .flags = IORESOURCE_BUSY },
  50         { .name = "dma page reg", .start = 0x80, .end = 0x8f, .flags = IORESOURCE_BUSY },
  51         { .name = "dma2", .start = 0xc0, .end = 0xdf, .flags = IORESOURCE_BUSY },
  52 };
  53
  54 const char *get_system_type(void)
  55 {
  56         return "MIPS Malta";
  57 }
  58
  59 #if defined(CONFIG_MIPS_MT_SMTC)
  60 const char display_string[] = "       SMTC LINUX ON MALTA       ";
  61 #else
  62 const char display_string[] = "        LINUX ON MALTA       ";
  63 #endif /* CONFIG_MIPS_MT_SMTC */
  64
  65 #ifdef CONFIG_BLK_DEV_FD
  66 void __init fd_activate(void)
  67 {
  68         /*
  69          * Activate Floppy Controller in the SMSC FDC37M817 Super I/O
  70          * Controller.
  71          * Done by YAMON 2.00 onwards
  72          */
  73         /* Entering config state. */
  74         SMSC_WRITE(SMSC_CONFIG_ENTER, SMSC_CONFIG_REG);
  75
  76         /* Activate floppy controller. */
  77         SMSC_WRITE(SMSC_CONFIG_DEVNUM, SMSC_CONFIG_REG);
  78         SMSC_WRITE(SMSC_CONFIG_DEVNUM_FLOPPY, SMSC_DATA_REG);
  79         SMSC_WRITE(SMSC_CONFIG_ACTIVATE, SMSC_CONFIG_REG);
  80         SMSC_WRITE(SMSC_CONFIG_ACTIVATE_ENABLE, SMSC_DATA_REG);
  81
  82         /* Exit config state. */
  83         SMSC_WRITE(SMSC_CONFIG_EXIT, SMSC_CONFIG_REG);
  84 }
  85 #endif
  86
  87 void __init plat_mem_setup(void)
  88 {
  89         unsigned int i;
  90
  91         mips_pcibios_init();
  92
  93         /* Request I/O space for devices used on the Malta board. */
  94         for (i = 0; i < ARRAY_SIZE(standard_io_resources); i++)
  95                 request_resource(&ioport_resource, standard_io_resources+i);
  96
  97         /*
  98          * Enable DMA channel 4 (cascade channel) in the PIIX4 south bridge.
  99          */
 100         enable_dma(4);
 101
 102 #ifdef CONFIG_KGDB
 103         kgdb_config ();
 104 #endif
 105
 106         if (mips_revision_sconid == MIPS_REVISION_SCON_BONITO) {
 107                 char *argptr;
 108
 109                 argptr = prom_getcmdline();
 110                 if (strstr(argptr, "debug")) {
 111                         BONITO_BONGENCFG |= BONITO_BONGENCFG_DEBUGMODE;
 112                         printk ("Enabled Bonito debug mode\n");
 113                 }
 114                 else
 115                         BONITO_BONGENCFG &= ~BONITO_BONGENCFG_DEBUGMODE;
 116
 117 #ifdef CONFIG_DMA_COHERENT
 118                 if (BONITO_PCICACHECTRL & BONITO_PCICACHECTRL_CPUCOH_PRES) {
 119                         BONITO_PCICACHECTRL |= BONITO_PCICACHECTRL_CPUCOH_EN;
 120                         printk("Enabled Bonito CPU coherency\n");
 121
 122                         argptr = prom_getcmdline();
 123                         if (strstr(argptr, "iobcuncached")) {
 124                                 BONITO_PCICACHECTRL &= ~BONITO_PCICACHECTRL_IOBCCOH_EN;
 125                                 BONITO_PCIMEMBASECFG = BONITO_PCIMEMBASECFG &
 126                                         ~(BONITO_PCIMEMBASECFG_MEMBASE0_CACHED |
 127                                           BONITO_PCIMEMBASECFG_MEMBASE1_CACHED);
 128                                 printk("Disabled Bonito IOBC coherency\n");
 129                         }
 130                         else {
 131                                 BONITO_PCICACHECTRL |= BONITO_PCICACHECTRL_IOBCCOH_EN;
 132                                 BONITO_PCIMEMBASECFG |=
 133                                         (BONITO_PCIMEMBASECFG_MEMBASE0_CACHED |
 134                                          BONITO_PCIMEMBASECFG_MEMBASE1_CACHED);
 135                                 printk("Enabled Bonito IOBC coherency\n");
 136                         }
 137                 }
 138                 else
 139                         panic("Hardware DMA cache coherency not supported");
 140
 141 #endif
 142         }
 143 #ifdef CONFIG_DMA_COHERENT
 144         else {
 145                 panic("Hardware DMA cache coherency not supported");
 146         }
 147 #endif
 148
 149 #ifdef CONFIG_BLK_DEV_IDE
 150         /* Check PCI clock */
 151         {
 152                 unsigned int __iomem *jmpr_p = (unsigned int *) ioremap(MALTA_JMPRS_REG, sizeof(unsigned int));
 153                 int jmpr = (__raw_readl(jmpr_p) >> 2) & 0x07;
 154                 static const int pciclocks[] __initdata = {
 155                         33, 20, 25, 30, 12, 16, 37, 10
 156                 };
 157                 int pciclock = pciclocks[jmpr];
 158                 char *argptr = prom_getcmdline();
 159
 160                 if (pciclock != 33 && !strstr (argptr, "idebus=")) {
 161                         printk("WARNING: PCI clock is %dMHz, setting idebus\n", pciclock);
 162                         argptr += strlen(argptr);
 163                         sprintf (argptr, " idebus=%d", pciclock);
 164                         if (pciclock < 20 || pciclock > 66)
 165                                 printk ("WARNING: IDE timing calculations will be incorrect\n");
 166                 }
 167         }
 168 #endif
 169 #ifdef CONFIG_BLK_DEV_FD
 170         fd_activate ();
 171 #endif
 172 #ifdef CONFIG_VT
 173 #if defined(CONFIG_VGA_CONSOLE)
 174         screen_info = (struct screen_info) {
 175                 0, 25,                  /* orig-x, orig-y */
 176                 0,                      /* unused */
 177                 0,                      /* orig-video-page */
 178                 0,                      /* orig-video-mode */
 179                 80,                     /* orig-video-cols */
 180                 0,0,0,                  /* ega_ax, ega_bx, ega_cx */
 181                 25,                     /* orig-video-lines */
 182                 VIDEO_TYPE_VGAC,        /* orig-video-isVGA */
 183                 16                      /* orig-video-points */
 184         };
 185 #endif
 186 #endif
 187         mips_reboot_setup();
 188
 189         board_time_init = mips_time_init;
 190         rtc_mips_get_time = mips_rtc_get_time;
 191 }