RT-AC66 3.0.0.4.374.130 core
[tomato.git] / release / src-rt-6.x / linux / linux-2.6 / arch / arm / mach-davinci / psc.c
blobe1b0050283a681f78b2061d594be2a91c7be30bb
1 /*
2 * TI DaVinci Power and Sleep Controller (PSC)
4 * Copyright (C) 2006 Texas Instruments.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 #include <linux/kernel.h>
22 #include <linux/module.h>
23 #include <linux/init.h>
25 #include <asm/io.h>
26 #include <asm/hardware.h>
27 #include <asm/arch/psc.h>
29 #define PTCMD __REG(0x01C41120)
30 #define PDSTAT __REG(0x01C41200)
31 #define PDCTL1 __REG(0x01C41304)
32 #define EPCPR __REG(0x01C41070)
33 #define PTSTAT __REG(0x01C41128)
35 #define MDSTAT IO_ADDRESS(0x01C41800)
36 #define MDCTL IO_ADDRESS(0x01C41A00)
38 #define PINMUX0 __REG(0x01c40000)
39 #define PINMUX1 __REG(0x01c40004)
40 #define VDD3P3V_PWDN __REG(0x01C40048)
42 static void davinci_psc_mux(unsigned int id)
44 switch (id) {
45 case DAVINCI_LPSC_ATA:
46 PINMUX0 |= (1 << 17) | (1 << 16);
47 break;
48 case DAVINCI_LPSC_MMC_SD:
49 /* VDD power manupulations are done in U-Boot for CPMAC
50 * so applies to MMC as well
52 /*Set up the pull regiter for MMC */
53 VDD3P3V_PWDN = 0x0;
54 PINMUX1 &= (~(1 << 9));
55 break;
56 case DAVINCI_LPSC_I2C:
57 PINMUX1 |= (1 << 7);
58 break;
59 case DAVINCI_LPSC_McBSP:
60 PINMUX1 |= (1 << 10);
61 break;
62 default:
63 break;
67 /* Enable or disable a PSC domain */
68 void davinci_psc_config(unsigned int domain, unsigned int id, char enable)
70 volatile unsigned int *mdstat = (unsigned int *)((int)MDSTAT + 4 * id);
71 volatile unsigned int *mdctl = (unsigned int *)((int)MDCTL + 4 * id);
73 if (id < 0)
74 return;
76 if (enable)
77 *mdctl |= 0x00000003; /* Enable Module */
78 else
79 *mdctl &= 0xFFFFFFF2; /* Disable Module */
81 if ((PDSTAT & 0x00000001) == 0) {
82 PDCTL1 |= 0x1;
83 PTCMD = (1 << domain);
84 while ((((EPCPR >> domain) & 1) == 0));
86 PDCTL1 |= 0x100;
87 while (!(((PTSTAT >> domain) & 1) == 0));
88 } else {
89 PTCMD = (1 << domain);
90 while (!(((PTSTAT >> domain) & 1) == 0));
93 if (enable)
94 while (!((*mdstat & 0x0000001F) == 0x3));
95 else
96 while (!((*mdstat & 0x0000001F) == 0x2));
98 if (enable)
99 davinci_psc_mux(id);
102 void __init davinci_psc_init(void)
104 davinci_psc_config(DAVINCI_GPSC_ARMDOMAIN, DAVINCI_LPSC_VPSSMSTR, 1);
105 davinci_psc_config(DAVINCI_GPSC_ARMDOMAIN, DAVINCI_LPSC_VPSSSLV, 1);
106 davinci_psc_config(DAVINCI_GPSC_ARMDOMAIN, DAVINCI_LPSC_TPCC, 1);
107 davinci_psc_config(DAVINCI_GPSC_ARMDOMAIN, DAVINCI_LPSC_TPTC0, 1);
108 davinci_psc_config(DAVINCI_GPSC_ARMDOMAIN, DAVINCI_LPSC_TPTC1, 1);
109 davinci_psc_config(DAVINCI_GPSC_ARMDOMAIN, DAVINCI_LPSC_GPIO, 1);
111 /* Turn on WatchDog timer LPSC. Needed for RESET to work */
112 davinci_psc_config(DAVINCI_GPSC_ARMDOMAIN, DAVINCI_LPSC_TIMER2, 1);