release/src-rt-6.x/include/min_osl.h

   1 /*
   2  * HND Minimal OS Abstraction Layer.
   3  *
   4  * Copyright (C) 2011, Broadcom Corporation. All Rights Reserved.
   5  *
   6  * Permission to use, copy, modify, and/or distribute this software for any
   7  * purpose with or without fee is hereby granted, provided that the above
   8  * copyright notice and this permission notice appear in all copies.
   9  *
  10  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  11  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  12  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
  13  * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  14  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
  15  * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
  16  * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  17  *
  18  * $Id: min_osl.h 260531 2011-05-19 07:18:56Z $
  19  */
  20
  21 #ifndef _min_osl_h_
  22 #define _min_osl_h_
  23
  24 #include <typedefs.h>
  25 #include <hndsoc.h>
  26 #include <sbhndcpu.h>
  27 #include <bcmstdlib.h>
  28
  29 #ifdef  mips
  30 /* Cache support */
  31 extern void caches_on(void);
  32 extern void blast_dcache(void);
  33 extern void blast_icache(void);
  34 #else /* !mips */
  35 /* Cache support (or lack thereof) */
  36 static inline void caches_on(void) { return; };
  37 static inline void blast_dcache(void) { return; };
  38 static inline void blast_icache(void) { return; };
  39 #endif  /* mips */
  40
  41 /* assert & debugging */
  42 #if defined(BCMDBG)
  43 extern void assfail(char *exp, char *file, int line);
  44 #define ASSERT(exp) \
  45         do { if (!(exp)) assfail(#exp, __FILE__, __LINE__); } while (0)
  46 #define TRACE_LOC               OSL_UNCACHED(0x180000d0)        /* BP access address reg in chipc */
  47 #define BCMDBG_TRACE(val)       do {*((uint32 *)TRACE_LOC) = val;} while (0)
  48 #else
  49 #define ASSERT(exp)             do {} while (0)
  50 #define BCMDBG_TRACE(val)       do {} while (0)
  51 #endif
  52
  53 /* PCMCIA attribute space access macros */
  54 #define OSL_PCMCIA_READ_ATTR(osh, offset, buf, size) \
  55         ASSERT(0)
  56 #define OSL_PCMCIA_WRITE_ATTR(osh, offset, buf, size) \
  57         ASSERT(0)
  58
  59 /* PCI configuration space access macros */
  60 #define OSL_PCI_READ_CONFIG(loc, offset, size) \
  61         (offset == 8 ? 0 : 0xffffffff)
  62 #define OSL_PCI_WRITE_CONFIG(loc, offset, size, val) \
  63         do {} while (0)
  64
  65 /* PCI device bus # and slot # */
  66 #define OSL_PCI_BUS(osh)        (0)
  67 #define OSL_PCI_SLOT(osh)       (0)
  68
  69 /* register access macros */
  70 #ifdef  IL_BIGENDIAN
  71 #ifdef  BCMHND74K
  72
  73 #define wreg32(r, v)            (*(volatile uint32 *)((uint32)(r) ^ 4) = (uint32)(v))
  74 #define rreg32(r)               (*(volatile uint32 *)((uint32)(r) ^ 4))
  75 #define wreg16(r, v)            (*(volatile uint16 *)((uint32)(r) ^ 6) = (uint16)(v))
  76 #define rreg16(r)               (*(volatile uint16 *)((uint32)(r) ^ 6))
  77 #define wreg8(r, v)             (*(volatile uint8 *)((uint32)(r) ^ 7) = (uint8)(v))
  78 #define rreg8(r)                (*(volatile uint8 *)((uint32)(r) ^ 7))
  79
  80 #else   /* !BCMHND74K */
  81
  82 #define wreg32(r, v)            (*(volatile uint32*)(r) = (uint32)(v))
  83 #define rreg32(r)               (*(volatile uint32*)(r))
  84 #define wreg16(r, v)            (*(volatile uint16 *)((uint32)(r) ^ 2) = (uint16)(v))
  85 #define rreg16(r)               (*(volatile uint16 *)((uint32)(r) ^ 2))
  86 #define wreg8(r, v)             (*(volatile uint8 *)((uint32)(r) ^ 3) = (uint8)(v))
  87 #define rreg8(r)                (*(volatile uint8 *)((uint32)(r) ^ 3))
  88
  89 #endif  /* BCMHND74K */
  90
  91 #else   /* !IL_BIGENDIAN */
  92
  93 #define wreg32(r, v)            (*(volatile uint32*)(r) = (uint32)(v))
  94 #define rreg32(r)               (*(volatile uint32*)(r))
  95 #define wreg16(r, v)            (*(volatile uint16*)(r) = (uint16)(v))
  96 #define rreg16(r)               (*(volatile uint16*)(r))
  97 #define wreg8(r, v)             (*(volatile uint8*)(r) = (uint8)(v))
  98 #define rreg8(r)                (*(volatile uint8*)(r))
  99
 100 #endif  /* IL_BIGENDIAN */
 101
 102 #define R_REG(osh, r) ({ \
 103         __typeof(*(r)) __osl_v; \
 104         switch (sizeof(*(r))) { \
 105         case sizeof(uint8):     __osl_v = rreg8((void *)(r)); break; \
 106         case sizeof(uint16):    __osl_v = rreg16((void *)(r)); break; \
 107         case sizeof(uint32):    __osl_v = rreg32((void *)(r)); break; \
 108         } \
 109         __osl_v; \
 110 })
 111 #define W_REG(osh, r, v) do { \
 112         switch (sizeof(*(r))) { \
 113         case sizeof(uint8):     wreg8((void *)(r), (v)); break; \
 114         case sizeof(uint16):    wreg16((void *)(r), (v)); break; \
 115         case sizeof(uint32):    wreg32((void *)(r), (v)); break; \
 116         } \
 117 } while (0)
 118 #define AND_REG(osh, r, v)              W_REG(osh, (r), R_REG(osh, r) & (v))
 119 #define OR_REG(osh, r, v)               W_REG(osh, (r), R_REG(osh, r) | (v))
 120
 121 /* general purpose memory allocation */
 122 #define MALLOC(osh, size)       malloc(size)
 123 #define MALLOC_ALIGN(osh, size, align_bits)     malloc_align((size), (align_bits))
 124 #define MFREE(osh, addr, size)  free(addr)
 125 #define MALLOCED(osh)           0
 126 #define MALLOC_FAILED(osh)      0
 127 #define MALLOC_DUMP(osh, b)
 128 extern int free(void *ptr);
 129 extern void *malloc(uint size);
 130 extern void *malloc_align(uint size, uint align_bits);
 131
 132 /* uncached virtual address */
 133 #ifdef  __mips__
 134 #define OSL_UNCACHED(va)        ((void *)KSEG1ADDR((ulong)(va)))
 135 #define OSL_CACHED(va)          ((void *)KSEG0ADDR((ulong)(va)))
 136 #else
 137 #define OSL_UNCACHED(va)        ((void *)(va))
 138 #define OSL_CACHED(va)          ((void *)(va))
 139 #define PHYSADDR_MASK           0xffffffff
 140 #define PHYSADDR(va)            ((uintptr)(va))
 141 #endif
 142
 143 #ifdef __mips__
 144 #define OSL_PREF_RANGE_LD(va, sz) prefetch_range_PREF_LOAD_RETAINED(va, sz)
 145 #define OSL_PREF_RANGE_ST(va, sz) prefetch_range_PREF_STORE_RETAINED(va, sz)
 146 #else /* __mips__ */
 147 #define OSL_PREF_RANGE_LD(va, sz)
 148 #define OSL_PREF_RANGE_ST(va, sz)
 149 #endif /* __mips__ */
 150
 151 /* host/bus architecture-specific address byte swap */
 152 #define BUS_SWAP32(v)           (v)
 153
 154 /* microsecond delay */
 155 #define OSL_DELAY(usec)         udelay(usec)
 156 extern void udelay(uint32 usec);
 157
 158 /* get processor cycle count */
 159 #define OSL_GETCYCLES(x)        ((x) = osl_getcycles())
 160 extern uint32 osl_getcycles(void);
 161
 162 /* map/unmap physical to virtual I/O */
 163 #define REG_MAP(pa, size)       (OSL_UNCACHED(pa))
 164 #define REG_UNMAP(va)           do {} while (0)
 165
 166 /* dereference an address that may cause a bus exception */
 167 #define BUSPROBE(val, addr)     (uint32 *)(addr) = (val)
 168
 169 /* Misc stubs */
 170 #define osl_attach(pdev)        ((osl_t*)pdev)
 171 #define osl_detach(osh)
 172
 173 #define PKTFREESETCB(osh, _tx_fn, _tx_ctx)
 174
 175 extern void *osl_init(void);
 176 #define OSL_ERROR(bcmerror)     osl_error(bcmerror)
 177 extern int osl_error(int);
 178
 179 /* the largest reasonable packet buffer driver uses for ethernet MTU in bytes */
 180 #define PKTBUFSZ                        (MAXPKTBUFSZ - LBUFSZ)
 181
 182 /* packet primitives */
 183 #define PKTGET(osh, len, send)          ((void *)NULL)
 184 #define PKTFREE(osh, p, send)
 185 #define PKTDATA(osh, lb)                ((void *)NULL)
 186 #define PKTLEN(osh, lb)                 0
 187 #define PKTHEADROOM(osh, lb)            0
 188 #define PKTTAILROOM(osh, lb)            0
 189 #define PKTNEXT(osh, lb)                ((void *)NULL)
 190 #define PKTSETNEXT(osh, lb, x)
 191 #define PKTSETLEN(osh, lb, len)
 192 #define PKTPUSH(osh, lb, bytes)
 193 #define PKTPULL(osh, lb, bytes)
 194 #define PKTDUP(osh, p)
 195 #define PKTTAG(lb)                      ((void *)NULL)
 196 #define PKTLINK(lb)                     ((void *)NULL)
 197 #define PKTSETLINK(lb, x)
 198 #define PKTPRIO(lb)                     0
 199 #define PKTSETPRIO(lb, x)
 200 #define PKTSHARED(lb)                   1
 201 #define PKTALLOCED(osh)                 0
 202 #define PKTLIST_DUMP(osh, buf)
 203 #define PKTFRMNATIVE(osh, lb)           ((void *)NULL)
 204 #define PKTTONATIVE(osh, p)             ((struct lbuf *)NULL)
 205 #define PKTSETPOOL(osh, lb, x, y)       do {} while (0)
 206 #define PKTPOOL(osh, lb)                FALSE
 207 #define PKTSHRINK(osh, m)               (m)
 208
 209 /* Global ASSERT type */
 210 extern uint32 g_assert_type;
 211
 212 /* Kernel: File Operations: start */
 213 #define osl_os_open_image(filename)     NULL
 214 #define osl_os_get_image_block(buf, len, image) 0
 215 #define osl_os_close_image(image)       do {} while (0)
 216 /* Kernel: File Operations: end */
 217
 218 #endif  /* _min_osl_h_ */