RT-AC66 3.0.0.4.374.130 core
[tomato.git] / release / src-rt-6.x / cfe / cfe / arch / mips / board / ptswarm / src / ptswarm_devs.c
blobc186cbece1f1fcffb50841e4e85fca8b79cba165
1 /* *********************************************************************
2 * Broadcom Common Firmware Environment (CFE)
3 *
4 * Board device initialization File: ptswarm_devs.c
5 *
6 * This is the "C" part of the board support package. The
7 * routines to create and initialize the console, wire up
8 * device drivers, and do other customization live here.
9 *
10 * Author: Mitch Lichtenberg (mpl@broadcom.com)
12 * modification history
13 * --------------------
14 * 01h,07apr02,gtb incorporate CSWARM board_show_cpu_type() changes.
15 * 01g,31jan02,jmb incorporate Mitch's CSWARM changes.
16 * 01f,23jan02,jmb add a read-only flash driver so that CFE can open
17 * flash while running in the same flash.
18 * 01e,21jan02,jmb read environment variables from NVRAM even in SAFE mode
19 * 01d,07jan02,jmb new flash installation arg, multi-chip support
20 * resizing of CS0-1 depending on boot device.
21 * 01c,20dec01,jmb don't move CS0 to nonstandard address
22 * 01b,19dec01,jmb remap CS0 for easy access of 16M flash in boot area
23 * 01a,14dec01,jmb derived from cswarm_devs. Changed the startflags
24 * table to support 3 different consoles, including
25 * an external uart device.
27 *********************************************************************
29 * Copyright 2000,2001,2002,2003
30 * Broadcom Corporation. All rights reserved.
32 * This software is furnished under license and may be used and
33 * copied only in accordance with the following terms and
34 * conditions. Subject to these conditions, you may download,
35 * copy, install, use, modify and distribute modified or unmodified
36 * copies of this software in source and/or binary form. No title
37 * or ownership is transferred hereby.
39 * 1) Any source code used, modified or distributed must reproduce
40 * and retain this copyright notice and list of conditions
41 * as they appear in the source file.
43 * 2) No right is granted to use any trade name, trademark, or
44 * logo of Broadcom Corporation. The "Broadcom Corporation"
45 * name may not be used to endorse or promote products derived
46 * from this software without the prior written permission of
47 * Broadcom Corporation.
49 * 3) THIS SOFTWARE IS PROVIDED "AS-IS" AND ANY EXPRESS OR
50 * IMPLIED WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED
51 * WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
52 * PURPOSE, OR NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT
53 * SHALL BROADCOM BE LIABLE FOR ANY DAMAGES WHATSOEVER, AND IN
54 * PARTICULAR, BROADCOM SHALL NOT BE LIABLE FOR DIRECT, INDIRECT,
55 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
56 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
57 * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
58 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
59 * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
60 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE), EVEN IF ADVISED OF
61 * THE POSSIBILITY OF SUCH DAMAGE.
62 ********************************************************************* */
66 #include "sbmips.h"
67 #include "lib_types.h"
68 #include "lib_queue.h"
69 #include "lib_printf.h"
70 #include "lib_string.h"
71 #include "cfe_iocb.h"
72 #include "cfe_device.h"
73 #include "cfe_timer.h"
74 #include "dev_ptflash.h"
75 #include "env_subr.h"
76 #include "cfe.h"
78 #include "sb1250_defs.h"
79 #include "sb1250_regs.h"
80 #include "sb1250_pci.h"
81 #include "sb1250_ldt.h"
82 #include "sb1250_scd.h"
83 #include "sb1250_wid.h"
85 #include "bsp_config.h"
87 #include "ptswarm.h"
88 #include "dev_ide.h"
90 /* *********************************************************************
91 * Devices we're importing
92 ********************************************************************* */
93 extern cfe_driver_t ns16550_uart; /* external UART on the I/O bus */
94 extern cfe_driver_t promice_uart; /* promice serial port */
95 extern cfe_driver_t sb1250_uart; /* SB1250 serial ports */
96 extern cfe_driver_t sb1250_ether; /* SB1250 MACs */
97 extern cfe_driver_t sb1250_x1240eeprom; /* Xicor SMBus NVRAM */
98 extern cfe_driver_t sb1250_24lc128eeprom; /* Microchip EEPROM */
99 extern cfe_driver_t ptflashdrv; /* AMD-style flash */
100 extern cfe_driver_t ptflashdrv_ro; /* AMD-style flash */
102 extern void ui_init_cpu1cmds(void);
103 extern void ui_init_swarmcmds(void);
104 extern int ui_init_corecmds(void);
105 extern int ui_init_soccmds(void);
106 extern int ui_init_testcmds(void);
107 extern int ui_init_resetcmds(void);
108 extern int ui_init_tempsensorcmds(void);
109 extern int ui_init_toyclockcmds(void);
110 extern void cs0_remap(void);
111 extern void cs1_remap(void);
113 extern void sb1250_show_cpu_type(void);
115 /* *********************************************************************
116 * Forward declarations
117 ********************************************************************* */
118 static void bootrom_add(unsigned int addr);
119 static void alt_bootrom_add(unsigned int addr);
121 /* *********************************************************************
122 * Some board-specific parameters
123 ********************************************************************* */
126 * Note! Configure the PROMICE for burst mode zero (one byte per
127 * access).
130 #define PROMICE_BASE (0x1FDFFC00)
131 #define PROMICE_WORDSIZE 1
133 /* *********************************************************************
134 * SysConfig switch settings
135 ********************************************************************* */
137 #define PTSWARM_PROMICE_CONSOLE 0x00000001
138 #define PTSWARM_EXTERNAL_UART_CONSOLE 0x00000002
139 #define PTSWARM_INTERNAL_UART_CONSOLE 0x00000004
140 #define PTSWARM_PROMICE_BOOT 0x00000008
143 * There are 8 possible configurations of CFE. They are redundant -- so
144 * customize as you like. The default configuration of '7' is set by the
145 * FPGA as of when the file was created. The FPGA sets the six-bit config
146 * field of the * system config register 0x39. CFE uses the upper 3 bits,
147 * which are all set, giving array index 7.
149 const unsigned int ptswarm_startflags[8] = {
150 PTSWARM_EXTERNAL_UART_CONSOLE, /* 0 : External UART console */
151 PTSWARM_PROMICE_CONSOLE, /* 1 : PromICE console */
152 PTSWARM_INTERNAL_UART_CONSOLE, /* 2 : Internal UART console */
153 PTSWARM_EXTERNAL_UART_CONSOLE, /* 3 : External UART console */
154 PTSWARM_EXTERNAL_UART_CONSOLE, /* 4 : External UART Console */
155 PTSWARM_EXTERNAL_UART_CONSOLE, /* 5 : External UART Console */
156 PTSWARM_EXTERNAL_UART_CONSOLE | PTSWARM_PROMICE_BOOT, /* 6 */
157 CFE_INIT_SAFE | PTSWARM_EXTERNAL_UART_CONSOLE /* 7 : External UART console, safe mode */
162 /* *********************************************************************
163 * board_console_init()
165 * Add the console device and set it to be the primary
166 * console.
168 * Input parameters:
169 * nothing
171 * Return value:
172 * nothing
173 ********************************************************************* */
175 void board_console_init(void)
177 uint64_t syscfg;
178 unsigned temp;
179 int plldiv;
181 syscfg = SBREADCSR(A_SCD_SYSTEM_CFG);
184 * External UART is device "uart0". On the PTSWARM it's the connector
185 * nearest the motherboard.
188 cfe_add_device(&ns16550_uart,UART_PHYS,0,0);
190 /* Internal UART0 is device "uart1" */
192 cfe_add_device(&sb1250_uart,A_DUART,0,0);
194 /* Add the PromICE UART, device "promice0", for good measure */
196 cfe_add_device(&promice_uart,PROMICE_BASE,PROMICE_WORDSIZE,0);
199 * Get the CFE startflags from the upper 3 bits of the "config" field
200 * in the sysconfig register. Only 3 bits are used, because that's
201 * what the CSWARM does.
204 cfe_startflags = ptswarm_startflags[(G_SYS_CONFIG(syscfg)/8) & 0x07];
206 if (cfe_startflags & PTSWARM_PROMICE_CONSOLE) {
207 cfe_set_console("promice0");
209 else if (cfe_startflags & PTSWARM_INTERNAL_UART_CONSOLE) {
210 cfe_set_console("uart1");
212 else {
213 cfe_set_console("uart0");
217 * Set variable that contains CPU speed, spit out config register
220 plldiv = G_SYS_PLL_DIV(syscfg);
222 cfe_cpu_speed = 50000000 * plldiv;
225 * NVRAM (environment variables
227 cfe_add_device(&sb1250_x1240eeprom,X1240_SMBUS_CHAN,X1240_SMBUS_DEV,0);
230 * Turn off the safe flag so the ethernet MAC addresses will get read
231 * from NVRAM
233 temp = cfe_startflags;
234 cfe_startflags &= ~CFE_INIT_SAFE;
236 cfe_set_envdevice("eeprom0"); /* Connect NVRAM subsystem to EEPROM */
238 /* restore SAFE flag if it was set */
239 cfe_startflags = temp;
244 /* *********************************************************************
245 * bootrom_add()
247 * Add the physical flash device to the system
249 * Input parameters:
250 * nothing
252 * Return value:
253 * nothing
254 ********************************************************************* */
256 void bootrom_add(unsigned int addr)
258 #ifndef OLD_FLASHDRV
259 flash_probe_t flashdesc;
260 memset(&flashdesc,0,sizeof(flash_probe_t));
261 flashdesc.flash_phys = addr;
262 flashdesc.flash_size = BOOTROM_SIZE*K64;
263 flashdesc.flash_flags = FLASH_FLG_WIDE;
264 flashdesc.nchips = BOOTROM_NCHIPS;
265 flashdesc.chipsize = BOOTROM_CHIPSIZE;
266 cfe_add_device(&ptflashdrv,NULL,NULL,&flashdesc);
267 memset(&flashdesc,0,sizeof(flash_probe_t));
268 flashdesc.flash_phys = addr;
269 flashdesc.flash_size = BOOTROM_SIZE*K64;
270 flashdesc.flash_flags = FLASH_FLG_WIDE | FLASH_FLG_MANUAL;
271 flashdesc.flash_cmdset = 0x12345678;
272 cfe_add_device(&ptflashdrv_ro,NULL,NULL,&flashdesc);
273 #else
274 cfe_add_device(&ptflashdrv,BOOTROM_PHYS,BOOTROM_SIZE*K64,NULL);
275 #endif
277 /* *********************************************************************
278 * alt_bootrom_add()
280 * Add the promice device to the system as flash
282 * Input parameters:
283 * nothing
285 * Return value:
286 * nothing
287 ********************************************************************* */
289 void alt_bootrom_add(unsigned int addr)
291 #ifndef OLD_FLASHDRV
292 flash_probe_t flashdesc;
293 /* When CS0 is jumped to PromICE, this will be flash */
294 memset(&flashdesc,0,sizeof(flash_probe_t));
295 flashdesc.flash_phys = addr;
296 flashdesc.flash_size = ALT_BOOTROM_SIZE*K64;
297 flashdesc.flash_flags = FLASH_FLG_WIDE;
298 flashdesc.nchips = ALT_BOOTROM_NCHIPS;
299 flashdesc.chipsize = ALT_BOOTROM_CHIPSIZE;
300 cfe_add_device(&ptflashdrv,NULL,NULL,&flashdesc);
301 #else
302 cfe_add_device(&ptflashdrv,ALT_BOOTROM_PHYS,ALT_BOOTROM_SIZE*K64,NULL);
303 #endif
307 /* *********************************************************************
308 * board_device_init()
310 * Initialize and add other devices. Add everything you need
311 * for bootstrap here, like disk drives, flash memory, UARTs,
312 * network controllers, etc.
314 * Input parameters:
315 * nothing
317 * Return value:
318 * nothing
319 ********************************************************************* */
321 void board_device_init(void)
323 uint64_t syscfg;
324 int promice_boot;
327 * Boot ROM
330 syscfg = SBREADCSR(A_SCD_SYSTEM_CFG);
331 promice_boot = ptswarm_startflags[(G_SYS_CONFIG(syscfg)/8) & 0x07] & \
332 PTSWARM_PROMICE_BOOT;
335 * Don't remap chip select 0 when using PromICE, since
336 * PromICE only emulates 2 Meg and we set ALT_BOOTROM
337 * to 2 Meg
339 if (!promice_boot)
341 cs0_remap(); /* Expand CS0 -- this is bootrom and flash */
342 bootrom_add(BOOTROM_PHYS);
343 alt_bootrom_add(ALT_BOOTROM_PHYS);
345 else
347 cs1_remap(); /* Expand CS1 -- it's all flash */
348 alt_bootrom_add(BOOTROM_PHYS);
349 bootrom_add(ALT_BOOTROM_PHYS);
352 cfe_add_device(&sb1250_24lc128eeprom,BIGEEPROM_SMBUS_CHAN,BIGEEPROM_SMBUS_DEV,0);
355 * MACs - must init after environment, since the hw address is stored there
357 cfe_add_device(&sb1250_ether,A_MAC_BASE_0,0,env_getenv("ETH0_HWADDR"));
358 #ifndef _PTSWARM_DIAG_CFG_
359 cfe_add_device(&sb1250_ether,A_MAC_BASE_1,1,env_getenv("ETH1_HWADDR"));
360 cfe_add_device(&sb1250_ether,A_MAC_BASE_2,2,env_getenv("ETH2_HWADDR"));
361 #endif
364 * Set variable that contains CPU speed, spit out config register
367 syscfg = SBREADCSR(A_SCD_SYSTEM_CFG);
368 printf("Config switch: %d\n",G_SYS_CONFIG(syscfg));
371 * Display CPU status
374 sb1250_show_cpu_type();
380 /* *********************************************************************
381 * board_device_reset()
383 * Reset devices. This call is done when the firmware is restarted,
384 * as might happen when an operating system exits, just before the
385 * "reset" command is applied to the installed devices. You can
386 * do whatever board-specific things are here to keep the system
387 * stable, like stopping DMA sources, interrupts, etc.
389 * Input parameters:
390 * nothing
392 * Return value:
393 * nothing
394 ********************************************************************* */
396 void board_device_reset(void)
402 /* *********************************************************************
403 * board_final_init()
405 * Do any final initialization, such as adding commands to the
406 * user interface.
408 * If you don't want a user interface, put the startup code here.
409 * This routine is called just before CFE starts its user interface.
411 * Input parameters:
412 * nothing
414 * Return value:
415 * nothing
416 ********************************************************************* */
418 void board_final_init(void)
420 ui_init_cpu1cmds();
421 ui_init_swarmcmds();
422 ui_init_corecmds();
423 ui_init_soccmds();
424 ui_init_testcmds();
425 ui_init_resetcmds();
426 ui_init_tempsensorcmds();
427 ui_init_toyclockcmds();