release/src-rt-6.x/cfe/cfe/arch/mips/board/bcm96345/include/dev_bcm6345_eth.h

   1 /*
   2 <:copyright-broadcom
   3
   4  Copyright (c) 2002 Broadcom Corporation
   5  All Rights Reserved
   6  No portions of this material may be reproduced in any form without the
   7  written permission of:
   8           Broadcom Corporation
   9           16215 Alton Parkway
  10           Irvine, California 92619
  11  All information contained in this document is Broadcom Corporation
  12  company private, proprietary, and trade secret.
  13
  14 :>
  15 */
  16 #ifndef __BCM6345_ETH_H
  17 #define __BCM6345_ETH_H
  18
  19 #include "board.h"
  20 #include "6345_map.h"
  21 #include "6345_common.h"
  22
  23 #define MII_READ_DELAY  1000
  24 #define MII_WRITE_DELAY 10000
  25
  26 // from linux if_ether.h
  27 #define ETH_ALEN        6               /* Octets in one ethernet addr   */
  28 #define ETH_HLEN        14              /* Total octets in header.       */
  29 #define ETH_ZLEN        60              /* Min. octets in frame sans FCS */
  30 #define ETH_DATA_LEN    1500            /* Max. octets in payload        */
  31 // end if_ether.h
  32
  33 /*---------------------------------------------------------------------*/
  34 /* specify number of BDs and buffers to use                            */
  35 /*---------------------------------------------------------------------*/
  36 #define NR_TX_BDS               3
  37 #define NR_RX_BDS               3
  38 #define ENET_MAX_MTU_SIZE       1520    /* Body(1500) + EH_SIZE(14) + FCS(4) */
  39 #define DMA_MAX_BURST_LENGTH    16      /* in 32 bit words */
  40
  41 #define BRCM_TYPE 0x8874
  42
  43 /* MII Control */
  44 #define EPHY_LOOPBACK                   0x4000
  45 #define EPHY_AUTONEGOTIATE              0x1000
  46 #define EPHY_100MBIT                    0x2000
  47 #define EPHY_FULLDUPLEX                 0x0100
  48 #define EPHY_RESTART_AUTONEGOTIATION    0x0200
  49 /* MII STATUS */
  50 #define EPHY_AUTONEGOTIATION_COMPLETE   0x0020
  51
  52 typedef enum {
  53     MII_EXTERNAL = 0,
  54     MII_INTERNAL = 1,
  55 }   MII_PHYADDR;
  56 #define EPHY_ADDR           MII_INTERNAL
  57
  58 typedef enum {
  59     MII_100MBIT     = 0x0001,
  60     MII_FULLDUPLEX  = 0x0002,
  61     MII_AUTONEG     = 0x0004,
  62 }   MII_CONFIG;
  63
  64 #define MAKE4(x)   ((x[3] & 0xFF) | ((x[2] & 0xFF) << 8) | ((x[1] & 0xFF) << 16) | ((x[0] & 0xFF) << 24))
  65 #define MAKE2(x)   ((x[1] & 0xFF) | ((x[0] & 0xFF) << 8))
  66
  67
  68 #define ERROR(x)        xsprintf x
  69 #ifndef ASSERT
  70 #define ASSERT(x)       if (x); else ERROR(("assert: "__FILE__" line %d\n", __LINE__));
  71 #endif
  72
  73 //#define DUMP_TRACE
  74
  75 #if defined(DUMP_TRACE)
  76 #define TRACE (x)         xprintf x
  77 #else
  78 #define TRACE(x)
  79 #endif
  80
  81 typedef struct PM_Addr {
  82     uint16              valid;          /* 1 indicates the corresponding address is valid */
  83     unsigned char       dAddr[ETH_ALEN];/* perfect match register's destination address */
  84     unsigned int        ref;            /* reference count */
  85 } PM_Addr;
  86 #define MAX_PMADDR      4               /* # of perfect match address */
  87
  88 typedef struct bcm6345_softc {
  89
  90     volatile DmaChannel *dmaChannels;
  91
  92     /* transmit variables */
  93     volatile DmaChannel *txDma;         /* location of transmit DMA register set */
  94     volatile DmaDesc *txBds;            /* Memory location of tx Dma BD ring */
  95     volatile DmaDesc *txFirstBdPtr;     /* ptr to first allocated Tx BD */
  96     volatile DmaDesc *txNextBdPtr;      /* ptr to next Tx BD to transmit with */
  97     volatile DmaDesc *txLastBdPtr;      /* ptr to last allocated Tx BD */
  98
  99     /* receive variables */
 100     volatile DmaChannel *rxDma;         /* location of receive DMA register set */
 101     volatile DmaDesc *rxBds;            /* Memory location of rx bd ring */
 102     volatile DmaDesc *rxFirstBdPtr;     /* ptr to first allocated rx bd */
 103     volatile DmaDesc *rxBdReadPtr;      /* ptr to next rx bd to be processed */
 104     volatile DmaDesc *rxLastBdPtr;      /* ptr to last allocated rx bd */
 105
 106         uint32_t rxBuffers;
 107         uint32_t txBuffers;
 108
 109     uint16          chipId;             /* chip's id */
 110     uint16          chipRev;            /* step */
 111     int             phyAddr;            /* 1 - external MII, 0 - internal MII (default after reset) */
 112 //    PM_Addr         pmAddr[MAX_PMADDR]; /* perfect match address */
 113         uint8_t         hwaddr[ETH_ALEN];
 114
 115 } bcm6345_softc;
 116
 117
 118
 119 #define IncRxBdPtr(x, s) if (x == ((bcm6345_softc *)s)->rxLastBdPtr) \
 120                              x = ((bcm6345_softc *)s)->rxBds; \
 121                       else x++
 122 #define InctxBdPtr(x, s) if (x == ((bcm6345_softc *)s)->txLastBdPtr) \
 123                              x = ((bcm6345_softc *)s)->txBds; \
 124                       else x++
 125
 126 // extern and function prototype
 127
 128 extern int32_t _getticks(void);
 129 static void delay_t(int ticks);
 130 static int internal_open(bcm6345_softc * softc);
 131
 132 #ifdef DUMP_DATA
 133 static void hexdump( unsigned char * src, int srclen, int rowlen, int rows );
 134 #endif
 135
 136 #endif // __BCM6345_ETH_H