2 #GCC = mips64-sb1sim-gcc -DDBG -DBCMDBG
3 GCC
= mips64-sb1sim-gcc
6 OBJDUMP
= mips64-sb1sim-objdump
7 OBJCOPY
= mips64-sb1sim-objcopy
8 RANLIB
= mips64-sb1sim-ranlib
12 # Uncomment to boot from PCI/JTAG
15 # Note: Big endian is not likely to work without some
16 # major source changes in the drivers.
17 # Note: this configuration is for loading into FLASH via
20 # Link & Run uncached (Quickturn ala Epidiag/JTAG)
21 ifeq ($(CFG_EPIBOOT
),1)
27 CFG_UNCACHED_RAMAPP ?
= 1
28 CFG_BOARDNAME
= "BU4704"
29 # For JTAG Boot, uncomment this line
30 CFLAGS
+= -DJTAG_RAM_BOOT
36 # Note: this configuration is for loading into FLASH via
37 # Epidiag via "s flashutl.tcl" and "flwritefile cfe.bin"
38 # Link and Run cached (Note: will not work from Epidiag)
45 CFG_BOARDNAME
= "BU4704"
51 # Define the CPU family
55 # Define for building 4704
61 # Disable Flow control on UART
62 CFLAGS
+= -DNS16550_NO_FLOW
70 # Set the path HND_TOP, below, to the 'src'
71 # directory checked out from the HND's CVS repository.
73 # Below this directory should be the "shared" and "et/sys"
76 # The CFE build procedure will pull in sources required
77 # for the Ethernet driver from this location.
86 include ${TOP}/main
/cfe.mk
93 include ${TOP}/main
/cfe_link.mk