release/src-rt-6.x.4708/router/openssl/crypto/sparc_arch.h

   1 #ifndef __SPARC_ARCH_H__
   2 # define __SPARC_ARCH_H__
   3
   4 # define SPARCV9_TICK_PRIVILEGED (1<<0)
   5 # define SPARCV9_PREFER_FPU      (1<<1)
   6 # define SPARCV9_VIS1            (1<<2)
   7 # define SPARCV9_VIS2            (1<<3)/* reserved */
   8 # define SPARCV9_FMADD           (1<<4)/* reserved for SPARC64 V */
   9 # define SPARCV9_BLK             (1<<5)/* VIS1 block copy */
  10 # define SPARCV9_VIS3            (1<<6)
  11 # define SPARCV9_RANDOM          (1<<7)
  12 # define SPARCV9_64BIT_STACK     (1<<8)
  13
  14 /*
  15  * OPENSSL_sparcv9cap_P[1] is copy of Compatibility Feature Register,
  16  * %asr26, SPARC-T4 and later. There is no SPARCV9_CFR bit in
  17  * OPENSSL_sparcv9cap_P[0], as %cfr copy is sufficient...
  18  */
  19 # define CFR_AES         0x00000001/* Supports AES opcodes */
  20 # define CFR_DES         0x00000002/* Supports DES opcodes */
  21 # define CFR_KASUMI      0x00000004/* Supports KASUMI opcodes */
  22 # define CFR_CAMELLIA    0x00000008/* Supports CAMELLIA opcodes */
  23 # define CFR_MD5         0x00000010/* Supports MD5 opcodes */
  24 # define CFR_SHA1        0x00000020/* Supports SHA1 opcodes */
  25 # define CFR_SHA256      0x00000040/* Supports SHA256 opcodes */
  26 # define CFR_SHA512      0x00000080/* Supports SHA512 opcodes */
  27 # define CFR_MPMUL       0x00000100/* Supports MPMUL opcodes */
  28 # define CFR_MONTMUL     0x00000200/* Supports MONTMUL opcodes */
  29 # define CFR_MONTSQR     0x00000400/* Supports MONTSQR opcodes */
  30 # define CFR_CRC32C      0x00000800/* Supports CRC32C opcodes */
  31
  32 # if defined(OPENSSL_PIC) && !defined(__PIC__)
  33 #  define __PIC__
  34 # endif
  35
  36 # if defined(__SUNPRO_C) && defined(__sparcv9) && !defined(__arch64__)
  37 #  define __arch64__
  38 # endif
  39
  40 # define SPARC_PIC_THUNK(reg)    \
  41         .align  32;             \
  42 .Lpic_thunk:                    \
  43         jmp     %o7 + 8;        \
  44          add    %o7, reg, reg;
  45
  46 # define SPARC_PIC_THUNK_CALL(reg)                       \
  47         sethi   %hi(_GLOBAL_OFFSET_TABLE_-4), reg;      \
  48         call    .Lpic_thunk;                            \
  49          or     reg, %lo(_GLOBAL_OFFSET_TABLE_+4), reg;
  50
  51 # if 1
  52 #  define SPARC_SETUP_GOT_REG(reg)       SPARC_PIC_THUNK_CALL(reg)
  53 # else
  54 #  define SPARC_SETUP_GOT_REG(reg)       \
  55         sethi   %hi(_GLOBAL_OFFSET_TABLE_-4), reg;      \
  56         call    .+8;                                    \
  57         or      reg,%lo(_GLOBAL_OFFSET_TABLE_+4), reg;  \
  58         add     %o7, reg, reg
  59 # endif
  60
  61 # if defined(__arch64__)
  62
  63 #  define SPARC_LOAD_ADDRESS(SYM, reg)   \
  64         setx    SYM, %o7, reg;
  65 #  define LDPTR          ldx
  66 #  define SIZE_T_CC      %xcc
  67 #  define STACK_FRAME    192
  68 #  define STACK_BIAS     2047
  69 #  define STACK_7thARG   (STACK_BIAS+176)
  70
  71 # else
  72
  73 #  define SPARC_LOAD_ADDRESS(SYM, reg)   \
  74         set     SYM, reg;
  75 #  define LDPTR          ld
  76 #  define SIZE_T_CC      %icc
  77 #  define STACK_FRAME    112
  78 #  define STACK_BIAS     0
  79 #  define STACK_7thARG   92
  80 #  define SPARC_LOAD_ADDRESS_LEAF(SYM,reg,tmp) SPARC_LOAD_ADDRESS(SYM,reg)
  81
  82 # endif
  83
  84 # ifdef __PIC__
  85 #  undef SPARC_LOAD_ADDRESS
  86 #  undef SPARC_LOAD_ADDRESS_LEAF
  87 #  define SPARC_LOAD_ADDRESS(SYM, reg)   \
  88         SPARC_SETUP_GOT_REG(reg);       \
  89         sethi   %hi(SYM), %o7;          \
  90         or      %o7, %lo(SYM), %o7;     \
  91         LDPTR   [reg + %o7], reg;
  92 # endif
  93
  94 # ifndef SPARC_LOAD_ADDRESS_LEAF
  95 #  define SPARC_LOAD_ADDRESS_LEAF(SYM, reg, tmp) \
  96         mov     %o7, tmp;                       \
  97         SPARC_LOAD_ADDRESS(SYM, reg)            \
  98         mov     tmp, %o7;
  99 # endif
 100
 101 #endif                          /* __SPARC_ARCH_H__ */