3 Copyright 2005, Broadcom Corporation
6 THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY
7 KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM
8 SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS
9 FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE.
17 #include <sys/ioctl.h>
18 #include <sys/mount.h>
23 #include <sys/reboot.h>
26 #include <sys/types.h>
28 #include <sys/sysinfo.h>
33 #define SHELL "/bin/sh"
35 extern struct nvram_tuple router_defaults
[];
38 restore_defaults_module(char *prefix
)
40 struct nvram_tuple
*t
;
42 for (t
= router_defaults
; t
->name
; t
++) {
43 if(strncmp(t
->name
, prefix
, sizeof(prefix
))!=0) continue;
44 nvram_set(t
->name
, t
->value
);
49 restore_defaults(void)
51 struct nvram_tuple
*t
;
53 char prefix
[] = "usb_pathXXXXXXXXXXXXXXXXX_", tmp
[100];
57 /* Restore defaults if told to or OS has changed */
59 restore_defaults
= !nvram_match("restore_defaults", "0");
62 fprintf(stderr
, "\n## Restoring defaults... ##\n");
64 /* Restore defaults */
65 for (t
= router_defaults
; t
->name
; t
++) {
66 if (restore_defaults
|| !nvram_get(t
->name
)) {
67 nvram_set(t
->name
, t
->value
);
71 nvram_set("os_name", "linux");
72 nvram_set("os_version", tomato_version
);
73 nvram_set("os_date", tomato_buildtime
);
76 if (!nvram_match("extendno_org", nvram_safe_get("extendno")))
78 dbg("Reset TxBF settings...\n");
79 nvram_set("extendno_org", nvram_safe_get("extendno"));
80 nvram_set("wl0_txbf", "1");
81 nvram_set("wl1_txbf", "1");
82 nvram_set("wl0_itxbf", "0");
83 nvram_set("wl1_itxbf", "1");
90 static int fatalsigs
[] = {
101 static int initsigs
[] = {
111 static char *defenv
[] = {
114 "PATH=/usr/bin:/bin:/usr/sbin:/sbin",
120 /* Set terminal settings to reasonable defaults */
121 static void set_term(int fd
)
127 /* set control chars */
128 tty
.c_cc
[VINTR
] = 3; /* C-c */
129 tty
.c_cc
[VQUIT
] = 28; /* C-\ */
130 tty
.c_cc
[VERASE
] = 127; /* C-? */
131 tty
.c_cc
[VKILL
] = 21; /* C-u */
132 tty
.c_cc
[VEOF
] = 4; /* C-d */
133 tty
.c_cc
[VSTART
] = 17; /* C-q */
134 tty
.c_cc
[VSTOP
] = 19; /* C-s */
135 tty
.c_cc
[VSUSP
] = 26; /* C-z */
137 /* use line dicipline 0 */
140 /* Make it be sane */
141 tty
.c_cflag
&= CBAUD
|CBAUDEX
|CSIZE
|CSTOPB
|PARENB
|PARODD
;
142 tty
.c_cflag
|= CREAD
|HUPCL
|CLOCAL
;
146 tty
.c_iflag
= ICRNL
| IXON
| IXOFF
;
149 tty
.c_oflag
= OPOST
| ONLCR
;
153 ISIG
| ICANON
| ECHO
| ECHOE
| ECHOK
| ECHOCTL
| ECHOKE
| IEXTEN
;
155 tcsetattr(fd
, TCSANOW
, &tty
);
158 static int console_init(void)
163 ioctl(0, TIOCNOTTY
, 0);
170 if ((fd
= open(_PATH_CONSOLE
, O_RDWR
)) < 0) {
171 /* Avoid debug messages is redirected to socket packet if no exist a UART chip, added by honor, 2003-12-04 */
172 open("/dev/null", O_RDONLY
);
173 open("/dev/null", O_WRONLY
);
174 open("/dev/null", O_WRONLY
);
175 perror(_PATH_CONSOLE
);
182 ioctl(0, TIOCSCTTY
, 1);
183 tcsetpgrp(0, getpgrp());
190 * Waits for a file descriptor to change status or unblocked signal
191 * @param fd file descriptor
192 * @param timeout seconds to wait before timing out or 0 for no timeout
193 * @return 1 if descriptor changed status or 0 if timed out or -1 on error
195 static int waitfor(int fd
, int timeout
)
198 struct timeval tv
= { timeout
, 0 };
202 return select(fd
+ 1, &rfds
, NULL
, NULL
, (timeout
> 0) ? &tv
: NULL
);
205 static pid_t
run_shell(int timeout
, int nowait
)
210 /* Wait for user input */
211 if (waitfor(STDIN_FILENO
, timeout
) <= 0) return 0;
213 switch (pid
= fork()) {
218 /* Reset signal handlers set for parent process */
219 for (sig
= 0; sig
< (_NSIG
-1); sig
++)
220 signal(sig
, SIG_DFL
);
224 printf("\n\nTomato %s\n\n", tomato_version
);
226 /* Now run it. The new program will take over this PID,
227 * so nothing further in init.c should be run. */
228 execve(SHELL
, (char *[]) { SHELL
, NULL
}, defenv
);
230 /* We're still here? Some error happened. */
238 waitpid(pid
, NULL
, 0);
244 int console_main(int argc
, char *argv
[])
246 for (;;) run_shell(0, 0);
251 static void shutdn(int rb
)
257 _dprintf("shutdn rb=%d\n", rb
);
260 for (i
= 0; i
< sizeof(fatalsigs
) / sizeof(fatalsigs
[0]); i
++)
261 sigaddset(&ss
, fatalsigs
[i
]);
262 for (i
= 0; i
< sizeof(initsigs
) / sizeof(initsigs
[0]); i
++)
263 sigaddset(&ss
, initsigs
[i
]);
264 sigprocmask(SIG_BLOCK
, &ss
, NULL
);
266 for (i
= 30; i
> 0; --i
) {
267 if (((act
= check_action()) == ACT_IDLE
) || (act
== ACT_REBOOT
)) break;
268 _dprintf("Busy with %d. Waiting before shutdown... %d\n", act
, i
);
271 set_action(ACT_REBOOT
);
273 // Disconnect pppd - need this for PPTP/L2TP to finish gracefully
287 umount("/jffs"); // may hang if not
293 for (i
= 4; i
> 0; --i
) {
304 reboot(rb
? RB_AUTOBOOT
: RB_HALT_SYSTEM
);
311 static void handle_fatalsigs(int sig
)
313 _dprintf("fatal sig=%d\n", sig
);
317 /* Fixed the race condition & incorrect code by using sigwait()
318 * instead of pause(). But SIGCHLD is a problem, since other
319 * code: 1) messes with it and 2) depends on CHLD being caught so
320 * that the pid gets immediately reaped instead of left a zombie.
321 * Pidof still shows the pid, even though it's in zombie state.
322 * So this SIGCHLD handler reaps and then signals the mainline by
325 static void handle_reap(int sig
)
331 static int check_nv(const char *name
, const char *value
)
334 if (!nvram_match("manual_boot_nv", "1")) {
335 if (((p
= nvram_get(name
)) == NULL
) || (strcmp(p
, value
) != 0)) {
336 _dprintf("Error: Critical variable %s is invalid. Resetting.\n", name
);
337 nvram_set(name
, value
);
344 static inline int invalid_mac(const char *mac
)
346 return (!mac
|| !(*mac
) || strncasecmp(mac
, "00:90:4c", 8) == 0);
349 static int find_sercom_mac_addr(void)
352 unsigned char m
[6], s
[18];
354 sprintf(s
, MTD_DEV(%dro
), 0);
355 if ((fp
= fopen(s
, "rb"))) {
356 fseek(fp
, 0x1ffa0, SEEK_SET
);
357 fread(m
, sizeof(m
), 1, fp
);
359 sprintf(s
, "%02X:%02X:%02X:%02X:%02X:%02X",
360 m
[0], m
[1], m
[2], m
[3], m
[4], m
[5]);
361 nvram_set("et0macaddr", s
);
362 return !invalid_mac(s
);
367 static int find_dir320_mac_addr(void)
371 int i
, part
, size
, found
= 0;
373 if (!mtd_getinfo("board_data", &part
, &size
))
375 sprintf(s
, MTD_DEV(%dro
), part
);
377 if ((fp
= fopen(s
, "rb"))) {
378 buffer
= malloc(size
);
379 memset(buffer
, 0, size
);
380 fread(buffer
, size
, 1, fp
);
381 if (!memcmp(buffer
, "RGCFG1", 6)) {
382 for (i
= 6; i
< size
- 24; i
++) {
383 if (!memcmp(buffer
+ i
, "lanmac=", 7)) {
384 memcpy(s
, buffer
+ i
+ 7, 17);
386 nvram_set("et0macaddr", s
);
389 else if (!memcmp(buffer
+ i
, "wanmac=", 7)) {
390 memcpy(s
, buffer
+ i
+ 7, 17);
392 nvram_set("il0macaddr", s
);
395 nvram_set("et0macaddr", s
);
406 strcpy(s
, nvram_safe_get("wl0_hwaddr"));
408 nvram_set("et0macaddr", s
);
413 static int init_vlan_ports(void)
416 int model
= get_model();
420 switch (check_hw_type()) {
421 case HW_BCM5352E
: // G v4, GS v3, v4
422 dirty
|= check_nv("vlan0ports", "3 2 1 0 5*");
427 dirty
|= check_nv("vlan0ports", "0 5*");
428 dirty
|= check_nv("vlan1ports", "1 5");
429 dirty
|= check_nv("vlan_enable", "1");
433 case MODEL_WL500GPv2
:
436 if (nvram_match("vlan1ports", "0 5u")) // 520GU or 330GE or WL500GE?
437 dirty
|= check_nv("vlan1ports", "0 5");
438 else if (nvram_match("vlan1ports", "4 5u"))
439 dirty
|= check_nv("vlan1ports", "4 5");
442 dirty
|= check_nv("vlan0ports", "1 2 3 4 5*");
443 dirty
|= check_nv("vlan1ports", "0 5");
447 dirty
|= (nvram_get("vlan2ports") != NULL
);
448 nvram_unset("vlan2ports");
449 dirty
|= check_nv("vlan0ports", "1 2 3 4 5*");
450 dirty
|= check_nv("vlan1ports", "0 5");
452 case MODEL_WRT310Nv1
:
453 dirty
|= check_nv("vlan1ports", "1 2 3 4 8*");
454 dirty
|= check_nv("vlan2ports", "0 8");
457 dirty
|= check_nv("vlan0ports", "0 1 2 3 5*");
458 dirty
|= check_nv("vlan1ports", "4 5");
463 case MODEL_WNR3500LV2
:
466 dirty
|= check_nv("vlan1ports", "4 3 2 1 8*");
467 dirty
|= check_nv("vlan2ports", "0 8");
470 dirty
|= check_nv("vlan1ports", "1 2 3 4 8*");
471 dirty
|= check_nv("vlan2ports", "0 8");
472 dirty
|= check_nv("boot_wait", "on");
473 dirty
|= check_nv("wait_time", "5");
476 dirty
|= check_nv("vlan1ports", "1 2 3 4 8*");
477 dirty
|= check_nv("vlan2ports", "0 8");
478 dirty
|= check_nv("ledbh0", "11");
479 dirty
|= check_nv("ledbh1", "11");
480 dirty
|= check_nv("ledbh2", "11");
481 dirty
|= check_nv("ledbh11", "136");
482 // must flash tt through tftp.
483 dirty
|= check_nv("boot_wait", "on");
484 dirty
|= check_nv("wait_time", "5");
487 dirty
|= check_nv("vlan2ports", "0 1 2 3 5*");
488 dirty
|= check_nv("vlan1ports", "4 5");
491 dirty
|= check_nv("vlan1ports", "4 5");
492 dirty
|= check_nv("vlan2ports", "3 2 1 0 5*");
494 case MODEL_WNR2000v2
:
495 dirty
|= check_nv("vlan1ports", "4 3 2 1 5*");
496 dirty
|= check_nv("vlan2ports", "0 5");
500 dirty
|= check_nv("vlan1ports", "1 2 3 4 5*");
501 dirty
|= check_nv("vlan2ports", "0 5");
503 case MODEL_RG200E_CA
:
504 dirty
|= check_nv("vlan2ports", "0 5");
507 dirty
|= check_nv("vlan1ports", "4 5");
511 dirty
|= check_nv("vlan0ports", "1 2 3 4 5*");
512 dirty
|= check_nv("vlan1ports", "0 5");
517 dirty
|= check_nv("vlan0ports", "3 2 1 0 5*");
518 dirty
|= check_nv("vlan1ports", "4 5");
520 case MODEL_WRT610Nv2
:
521 case MODEL_F5D8235v3
:
522 dirty
|= check_nv("vlan1ports", "1 2 3 4 8*");
523 dirty
|= check_nv("vlan2ports", "0 8");
527 dirty
|= check_nv("vlan1ports", "3 2 1 0 8*");
528 dirty
|= check_nv("vlan2ports", "4 8");
537 dirty
|= check_nv("vlan1ports", "0 1 2 3 5*");
538 dirty
|= check_nv("vlan2ports", "4 5");
542 dirty
|= check_nv("vlan1ports", "1 2 3 4 5*");
543 dirty
|= check_nv("vlan2ports", "0 5");
548 dirty
|= check_nv("vlan1ports", "0 1 2 3 8*");
549 dirty
|= check_nv("vlan2ports", "4 8");
552 dirty
|= check_nv("vlan1ports", "4 3 2 1 8*");
553 dirty
|= check_nv("vlan2ports", "4 8");
554 dirty
|= check_nv("boot_wait", "on");
555 dirty
|= check_nv("wait_time", "5");
557 case MODEL_TDN6
: //bwq518
558 dirty
|= check_nv("vlan1ports", "1 2 3 4 5*");
559 dirty
|= check_nv("vlan2ports", "0 5");
560 dirty
|= check_nv("boot_wait", "on");
561 dirty
|= check_nv("wait_time", "5");
563 case MODEL_WRT160Nv3
:
564 if (nvram_match("vlan1ports", "1 2 3 4 5*")) {
565 // fix lan port numbering on CSE41, CSE51
566 dirty
|= check_nv("vlan1ports", "4 3 2 1 5*");
568 else if (nvram_match("vlan1ports", "1 2 3 4 8*")) {
570 dirty
|= check_nv("vlan1ports", "4 3 2 1 8*");
574 #ifdef CONFIG_BCMWL6A
577 dirty
|= check_nv("vlan1ports", "3 2 1 0 5*");
578 dirty
|= check_nv("vlan2ports", "4 5");
582 dirty
|= check_nv("vlan1ports", "0 1 2 3 5*");
583 dirty
|= check_nv("vlan2ports", "4 5");
590 dirty
|= check_nv("vlan1ports", "1 2 3 4 5*");
591 dirty
|= check_nv("vlan2ports", "0 5");
595 dirty
|= check_nv("vlan1ports", "0 1 2 3 5*");
596 dirty
|= check_nv("vlan2ports", "4 5");
599 dirty
|= check_nv("vlan1ports", "1 2 3 4 5*");
600 dirty
|= check_nv("vlan2ports", "0 5");
603 dirty
|= check_nv("vlan1ports", "0 2 5*");
604 dirty
|= check_nv("vlan2ports", "4 5");
613 static void check_bootnv(void)
621 dirty
= check_nv("wl0_leddc", "0x640000") | check_nv("wl1_leddc", "0x640000");
625 dirty
|= check_nv("vlan0hwname", "et0");
626 dirty
|= check_nv("vlan1hwname", "et0");
629 dirty
|= check_nv("wl0gpio0", "130");
633 // need to cleanup some variables...
634 if ((nvram_get("t_model") == NULL
) && (nvram_get("MyFirmwareVersion") != NULL
)) {
635 nvram_unset("MyFirmwareVersion");
636 nvram_set("restore_defaults", "1");
640 dirty
|= check_nv("wl0gpio1", "0x02");
643 /* fix WL500W mac adresses for WAN port */
644 if (invalid_mac(nvram_get("et1macaddr"))) {
645 strcpy(mac
, nvram_safe_get("et0macaddr"));
647 dirty
|= check_nv("et1macaddr", mac
);
649 dirty
|= check_nv("wl0gpio0", "0x88");
652 dirty
|= check_nv("sdram_init", "0x0009"); // 32MB; defaults: 0x000b, 0x0009
653 dirty
|= check_nv("wl0gpio0", "136");
655 case MODEL_WL500GPv2
:
657 dirty
|= check_nv("wl0gpio1", "136");
660 dirty
|= check_nv("vlan0hwname", "et0");
661 dirty
|= check_nv("vlan1hwname", "et0");
662 dirty
|= check_nv("boardflags", "0x00000100"); // set BFL_ENETVLAN
663 nvram_unset("wl0gpio0");
666 if (strlen(nvram_safe_get("et0macaddr")) == 12 ||
667 strlen(nvram_safe_get("il0macaddr")) == 12) {
668 dirty
|= find_dir320_mac_addr();
670 if (nvram_get("vlan2hwname") != NULL
) {
671 nvram_unset("vlan2hwname");
674 dirty
|= check_nv("wandevs", "vlan1");
675 dirty
|= check_nv("vlan1hwname", "et0");
676 dirty
|= check_nv("wl0gpio0", "8");
677 dirty
|= check_nv("wl0gpio1", "0");
678 dirty
|= check_nv("wl0gpio2", "0");
679 dirty
|= check_nv("wl0gpio3", "0");
682 dirty
|= check_nv("wandevs", "vlan1");
683 dirty
|= check_nv("vlan0hwname", "et0");
684 dirty
|= check_nv("vlan1hwname", "et0");
687 if (invalid_mac(nvram_get("et0macaddr"))) {
688 dirty
|= find_sercom_mac_addr();
691 case MODEL_WRT160Nv1
:
692 case MODEL_WRT310Nv1
:
694 dirty
|= check_nv("wl0gpio0", "8");
698 dirty
|= check_nv("boardflags", "0x00000710"); // needed to enable USB
699 dirty
|= check_nv("vlan2hwname", "et0");
700 dirty
|= check_nv("ledbh0", "7");
702 case MODEL_WNR3500LV2
:
703 dirty
|= check_nv("vlan2hwname", "et0");
705 case MODEL_WNR2000v2
:
706 dirty
|= check_nv("ledbh5", "8");
709 dirty
|= check_nv("reset_gpio", "5");
710 dirty
|= check_nv("ledbh0", "136");
711 dirty
|= check_nv("ledbh1", "11");
712 /* fall through, same as RT-N16 */
714 dirty
|= check_nv("vlan2hwname", "et0");
717 case MODEL_RG200E_CA
:
719 dirty
|= check_nv("vlan1hwname", "et0");
720 dirty
|= check_nv("vlan2hwname", "et0");
721 dirty
|= check_nv("boardflags", "0x710"); // set BFL_ENETVLAN, enable VLAN
722 dirty
|= check_nv("reset_gpio", "30");
724 case MODEL_WRT610Nv2
:
725 dirty
|= check_nv("vlan2hwname", "et0");
726 dirty
|= check_nv("pci/1/1/ledbh2", "8");
727 dirty
|= check_nv("sb/1/ledbh1", "8");
728 if (invalid_mac(nvram_get("pci/1/1/macaddr"))) {
729 strcpy(mac
, nvram_safe_get("et0macaddr"));
731 dirty
|= check_nv("pci/1/1/macaddr", mac
);
738 case MODEL_F5D8235v3
:
739 if (nvram_match("sb/1/macaddr", nvram_safe_get("et0macaddr"))) {
740 strcpy(mac
, nvram_safe_get("et0macaddr"));
742 dirty
|= check_nv("sb/1/macaddr", mac
);
744 dirty
|= check_nv("pci/1/1/macaddr", mac
);
747 dirty
|= check_nv("vlan2hwname", "et0");
748 if (strncasecmp(nvram_safe_get("pci/2/1/macaddr"), "00:90:4c", 8) == 0) {
749 strcpy(mac
, nvram_safe_get("et0macaddr"));
751 dirty
|= check_nv("pci/2/1/macaddr", mac
);
755 dirty
|= check_nv("vlan2hwname", "et0");
756 if (strncasecmp(nvram_safe_get("pci/1/1/macaddr"), "00:90:4c", 8) == 0 ||
757 strncasecmp(nvram_safe_get("sb/1/macaddr"), "00:90:4c", 8) == 0) {
758 strcpy(mac
, nvram_safe_get("et0macaddr"));
760 dirty
|= check_nv("sb/1/macaddr", mac
);
762 dirty
|= check_nv("pci/1/1/macaddr", mac
);
771 case MODEL_WRT160Nv3
:
774 dirty
|= check_nv("vlan2hwname", "et0");
782 nvram_unset("et1macaddr");
783 dirty
|= check_nv("wl0_ifname", "eth1");
784 dirty
|= check_nv("wl1_ifname", "eth2");
789 if (strncmp(nvram_safe_get("pmon_ver"), "CFE", 3) != 0) return;
791 hardware
= check_hw_type();
792 if (!nvram_get("boardtype") ||
793 !nvram_get("boardnum") ||
794 !nvram_get("boardflags") ||
795 !nvram_get("clkfreq") ||
796 !nvram_get("os_flash_addr") ||
797 !nvram_get("dl_ram_addr") ||
798 !nvram_get("os_ram_addr") ||
799 !nvram_get("scratch") ||
800 !nvram_get("et0macaddr") ||
801 ((hardware
!= HW_BCM4704_BCM5325F
) && (!nvram_get("vlan0ports") || !nvram_get("vlan0hwname")))) {
802 _dprintf("Unable to find critical settings, erasing NVRAM\n");
807 dirty
|= check_nv("aa0", "3");
808 dirty
|= check_nv("wl0gpio0", "136");
809 dirty
|= check_nv("wl0gpio2", "0");
810 dirty
|= check_nv("wl0gpio3", "0");
811 dirty
|= check_nv("cctl", "0");
812 dirty
|= check_nv("ccode", "0");
816 /* Lower the DDR ram drive strength , the value will be stable for all boards
817 Latency 3 is more stable for all ddr 20050420 by honor */
818 dirty
|= check_nv("sdram_init", "0x010b");
819 dirty
|= check_nv("sdram_config", "0x0062");
820 if (!nvram_match("debug_clkfix", "0")) {
821 dirty
|= check_nv("clkfreq", "216");
824 nvram_set("sdram_ncdl", "0x0");
826 dirty
|= check_nv("pa0itssit", "62");
827 dirty
|= check_nv("pa0b0", "0x15eb");
828 dirty
|= check_nv("pa0b1", "0xfa82");
829 dirty
|= check_nv("pa0b2", "0xfe66");
830 //dirty |= check_nv("pa0maxpwr", "0x4e");
832 case HW_BCM5352E
: // G v4, GS v3, v4
833 dirty
|= check_nv("sdram_init", "0x010b");
834 dirty
|= check_nv("sdram_config", "0x0062");
836 nvram_set("sdram_ncdl", "0x0");
838 dirty
|= check_nv("pa0itssit", "62");
839 dirty
|= check_nv("pa0b0", "0x168b");
840 dirty
|= check_nv("pa0b1", "0xfabf");
841 dirty
|= check_nv("pa0b2", "0xfeaf");
842 //dirty |= check_nv("pa0maxpwr", "0x4e");
845 dirty
|= check_nv("pa0itssit", "62");
846 dirty
|= check_nv("pa0b0", "0x1326");
847 dirty
|= check_nv("pa0b1", "0xFB51");
848 dirty
|= check_nv("pa0b2", "0xFE87");
849 //dirty |= check_nv("pa0maxpwr", "0x4e");
851 case HW_BCM4704_BCM5325F
:
855 dirty
|= check_nv("pa0itssit", "62");
856 dirty
|= check_nv("pa0b0", "0x170c");
857 dirty
|= check_nv("pa0b1", "0xfa24");
858 dirty
|= check_nv("pa0b2", "0xfe70");
859 //dirty |= check_nv("pa0maxpwr", "0x48");
866 dirty
|= init_vlan_ports();
870 REBOOT
: // do a simple reboot
877 static int init_nvram(void)
879 unsigned long features
;
889 sprintf(s
, "%d", model
);
890 nvram_set("t_model", s
);
899 name
= "WRT54G/GS/GL";
900 switch (check_hw_type()) {
902 nvram_set("gpio2", "adm_eecs");
903 nvram_set("gpio3", "adm_eesk");
904 nvram_unset("gpio4");
905 nvram_set("gpio5", "adm_eedi");
906 nvram_set("gpio6", "adm_rc");
909 nvram_unset("gpio2");
910 nvram_unset("gpio3");
911 nvram_unset("gpio4");
912 nvram_unset("gpio5");
913 nvram_unset("gpio6");
916 nvram_set("opo", "0x0008");
917 nvram_set("ag0", "0x02");
920 nvram_set("gpio2", "ses_led");
921 nvram_set("gpio3", "ses_led2");
922 nvram_set("gpio4", "ses_button");
923 features
= SUP_SES
| SUP_WHAM_LED
;
930 if (!nvram_match("t_fix1", (char *)name
)) {
931 nvram_set("lan_ifnames", "vlan0 eth1");
932 nvram_set("gpio2", "ses_button");
933 nvram_set("reset_gpio", "7");
935 nvram_set("pa0itssit", "62");
936 nvram_set("pa0b0", "0x1542");
937 nvram_set("pa0b1", "0xfacb");
938 nvram_set("pa0b2", "0xfec7");
939 //nvram_set("pa0maxpwr", "0x4c");
942 case MODEL_WRTSL54GS
:
945 features
= SUP_SES
| SUP_WHAM_LED
;
950 features
= SUP_SES
| SUP_AOSS_LED
| SUP_BRAU
;
953 case MODEL_WZRRSG54HP
:
956 features
= SUP_SES
| SUP_AOSS_LED
| SUP_HPAMP
;
958 case MODEL_WZRRSG54HP
:
959 name
= "WZR-RS-G54HP";
966 features
= SUP_SES
| SUP_AOSS_LED
| SUP_BRAU
| SUP_HPAMP
;
970 bf
= strtoul(nvram_safe_get("boardflags"), NULL
, 0);
976 if ( nvram_is_empty("wlx_hpamp") || nvram_match("wlx_hpamp", "")) {
977 if (nvram_get_int("wl_txpwr") > 10) nvram_set("wl_txpwr", "10");
978 nvram_set("wlx_hpamp", "1");
979 nvram_set("wlx_hperx", "0");
983 if (nvram_match("wlx_hpamp", "0")) {
989 if (nvram_match("wlx_hperx", "0")) {
996 sprintf(s
, "0x%lX", n
);
997 nvram_set("boardflags", s
);
1001 syslog(LOG_WARNING
, "Unexpected: boardflag=%lX", bf
);
1012 features
= SUP_SES
| SUP_AOSS_LED
;
1014 case MODEL_WHR2A54G54
:
1016 name
= "WHR2-A54G54";
1017 features
= SUP_SES
| SUP_AOSS_LED
| SUP_BRAU
;
1019 case MODEL_WHR3AG54
:
1022 features
= SUP_SES
| SUP_AOSS_LED
;
1027 features
= SUP_SES
| SUP_AOSS_LED
;
1029 case MODEL_WZRRSG54
:
1031 name
= "WZR-RS-G54";
1032 features
= SUP_SES
| SUP_AOSS_LED
;
1034 case MODEL_WVRG54NF
:
1036 name
= "WVR-G54-NF";
1042 features
= SUP_SES
| SUP_AOSS_LED
;
1048 case MODEL_WR850GV1
:
1051 features
= SUP_NONVE
;
1053 case MODEL_WR850GV2
:
1055 name
= "WR850G v2/v3";
1056 features
= SUP_NONVE
;
1063 nvram_set("usb_ohci", "-1");
1065 if (!nvram_match("t_fix1", (char *)name
)) {
1066 nvram_set("lan_ifnames", "vlan0 eth1 eth2 eth3"); // set to "vlan0 eth2" by DD-WRT; default: vlan0 eth1
1072 features
= SUP_SES
| SUP_80211N
;
1074 nvram_set("usb_ohci", "-1");
1082 nvram_set("usb_uhci", "-1");
1085 case MODEL_WX6615GT
:
1098 case MODEL_WLA2G54L
:
1101 if (!nvram_match("t_fix1", (char *)name
)) {
1102 nvram_set("lan_ifnames", "vlan0 eth1 eth2");
1103 nvram_set("wl_ifname", "eth1");
1104 nvram_set("wan_ifname", "none");
1109 name
= "TrueMobile 2300";
1118 #ifndef WL_BSS_INFO_VERSION
1119 #error WL_BSS_INFO_VERSION
1121 #if WL_BSS_INFO_VERSION >= 108
1127 nvram_set("opo", "12");
1133 features
= SUP_SES
| SUP_AOSS_LED
| SUP_BRAU
;
1135 nvram_set("opo", "0x0008");
1136 nvram_set("ag0", "0x0C");
1138 #ifdef CONFIG_BCMWL5
1142 features
= SUP_SES
| SUP_80211N
;
1143 if (!nvram_match("t_fix1", (char *)name
)) {
1144 #ifdef TCONFIG_USBAP
1145 nvram_set("wl1_hwaddr", nvram_safe_get("0:macaddr"));
1146 nvram_set("ehciirqt", "3");
1147 nvram_set("qtdc_pid", "48407");
1148 nvram_set("qtdc_vid", "2652");
1149 nvram_set("qtdc0_ep", "4");
1150 nvram_set("qtdc0_sz", "0");
1151 nvram_set("qtdc1_ep", "18");
1152 nvram_set("qtdc1_sz", "10");
1153 nvram_set("lan_ifnames", "vlan1 eth1 eth2");
1154 nvram_set("landevs", "vlan1 wl0 wl1");
1155 nvram_set("wl0_ifname", "wl0");
1156 nvram_set("wl1_ifname", "wl1");
1158 nvram_set("lan_ifnames", "vlan1 eth1");
1159 nvram_set("landevs", "vlan1 wl0");
1161 nvram_set("wl_ifname", "eth1");
1162 nvram_set("wan_ifnameX", "vlan2");
1163 nvram_set("wandevs", "vlan2");
1166 case MODEL_DIR620C1
:
1168 name
= "Dir-620 C1";
1169 features
= SUP_SES
| SUP_80211N
;
1170 if (!nvram_match("t_fix1", (char *)name
)) {
1171 #ifdef TCONFIG_USBAP
1172 nvram_set("lan_ifnames", "vlan1 eth1 eth2");
1173 nvram_set("landevs", "vlan1 wl0 wl1");
1174 nvram_set("wl0_ifname", "eth1");
1175 nvram_set("wl1_ifname", "eth2");
1177 nvram_set("lan_ifnames", "vlan1 eth1");
1178 nvram_set("landevs", "vlan1 wl0");
1180 nvram_set("wan_ifnameX", "vlan2");
1181 nvram_set("wl_ifname", "eth1");
1188 features
= SUP_SES
| SUP_80211N
;
1190 nvram_set("usb_uhci", "-1");
1192 if (!nvram_match("t_fix1", (char *)name
)) {
1193 nvram_set("lan_ifnames", "vlan1 eth1");
1194 nvram_set("wan_ifname", "vlan2");
1195 nvram_set("wan_ifnames", "vlan2");
1196 nvram_set("wan_ifnameX", "vlan2");
1197 nvram_set("wl_ifname", "eth1");
1203 features
= SUP_SES
| SUP_80211N
;
1205 nvram_set("usb_uhci", "-1");
1207 if (!nvram_match("t_fix1", (char *)name
)) {
1208 nvram_set("lan_ifnames", "vlan1 eth1");
1209 nvram_set("wan_ifname", "vlan2");
1210 nvram_set("wan_ifnames", "vlan2");
1211 nvram_set("wan_ifnameX", "vlan2");
1212 nvram_set("wl_ifname", "eth1");
1215 case MODEL_RG200E_CA
:
1218 features
= SUP_SES
| SUP_80211N
;
1220 nvram_set("usb_uhci", "-1");
1222 if (!nvram_match("t_fix1", (char *)name
)) {
1223 nvram_set("lan_ifnames", "vlan1 eth1");
1224 nvram_set("wan_ifname", "vlan2");
1225 nvram_set("wan_ifnames", "vlan2");
1226 nvram_set("wan_ifnameX", "vlan2");
1227 nvram_set("wl_ifname", "eth1");
1233 features
= SUP_SES
| SUP_80211N
;
1235 nvram_set("usb_uhci", "-1");
1237 if (!nvram_match("t_fix1", (char *)name
)) {
1238 nvram_set("lan_ifnames", "vlan1 eth1");
1239 nvram_set("wan_ifname", "vlan2");
1240 nvram_set("wan_ifnames", "vlan2");
1241 nvram_set("wan_ifnameX", "vlan2");
1242 nvram_set("wl_ifname", "eth1");
1248 features
= SUP_SES
| SUP_80211N
;
1250 nvram_set("usb_uhci", "-1");
1252 if (!nvram_match("t_fix1", (char *)name
)) {
1253 nvram_set("lan_ifnames", "vlan1 eth1 eth2");
1254 nvram_set("wan_ifnameX", "vlan2");
1255 nvram_set("wan_ifnames", "vlan2");
1256 nvram_set("wan_ifnameX", "vlan2");
1257 nvram_set("wl_ifnames", "eth1 eth2");
1258 nvram_set("wl_ifname", "eth1");
1259 nvram_set("wl0_ifname", "eth1");
1260 nvram_set("wl1_ifname", "eth2");
1261 nvram_set("wl0_bw_cap","3");
1262 nvram_set("wl0_chanspec","1l");
1263 nvram_set("wl1_bw_cap","7");
1264 nvram_set("wl1_chanspec","36/80");
1265 nvram_set("blink_5g_interface","eth2");
1266 //nvram_set("landevs", "vlan1 wl0 wl1");
1267 //nvram_set("wandevs", "vlan2");
1270 nvram_set("wl0_hwaddr", nvram_safe_get("sb/1/macaddr"));
1271 nvram_set("wl1_hwaddr", nvram_safe_get("0:macaddr"));
1277 features
= SUP_SES
| SUP_80211N
;
1279 nvram_set("usb_uhci", "-1");
1281 if (!nvram_match("t_fix1", (char *)name
)) {
1282 nvram_set("lan_ifnames", "vlan1 eth1 eth2");
1283 nvram_set("wan_ifnameX", "vlan2");
1284 nvram_set("wan_ifnames", "vlan2");
1285 nvram_set("wan_ifnameX", "vlan2");
1286 nvram_set("wl_ifnames", "eth1 eth2");
1287 nvram_set("wl_ifname", "eth1");
1288 nvram_set("wl0_ifname", "eth1");
1289 nvram_set("wl1_ifname", "eth2");
1290 nvram_set("wl0_bw_cap","3");
1291 nvram_set("wl0_chanspec","1l");
1292 nvram_set("wl1_bw_cap","7");
1293 nvram_set("wl1_chanspec","36/80");
1294 nvram_set("blink_5g_interface","eth2");
1297 nvram_set("wl0_hwaddr", nvram_safe_get("sb/1/macaddr"));
1298 nvram_set("wl1_hwaddr", nvram_safe_get("0:macaddr"));
1304 name
= nvram_match("boardrev", "0x1153") ? "RT-N10P" : "RT-N10";
1305 features
= SUP_SES
| SUP_80211N
;
1306 if (!nvram_match("t_fix1", (char *)name
)) {
1307 nvram_set("lan_ifnames", "vlan0 eth1");
1308 nvram_set("wan_ifnameX", "vlan1");
1309 nvram_set("wl_ifname", "eth1");
1315 features
= SUP_SES
| SUP_80211N
;
1317 nvram_set("usb_uhci", "-1");
1319 if (!nvram_match("t_fix1", (char *)name
)) {
1320 nvram_set("lan_ifnames", "vlan0 eth1");
1321 nvram_set("wan_ifnameX", "vlan1");
1322 nvram_set("wl_ifname", "eth1");
1328 features
= SUP_SES
| SUP_BRAU
| SUP_80211N
;
1329 if (!nvram_match("t_fix1", (char *)name
)) {
1330 nvram_set("lan_ifnames", "vlan0 eth1");
1331 nvram_set("wan_ifnameX", "vlan1");
1332 nvram_set("wl_ifname", "eth1");
1338 features
= SUP_80211N
;
1339 if (!nvram_match("t_fix1", (char *)name
)) {
1340 nvram_set("lan_ifnames", "vlan0 eth1");
1341 nvram_set("wan_ifnameX", "vlan1");
1342 nvram_set("wl_ifname", "eth1");
1348 features
= SUP_SES
| SUP_80211N
| SUP_1000ET
;
1350 nvram_set("usb_uhci", "-1");
1352 if (!nvram_match("t_fix1", (char *)name
)) {
1353 nvram_set("lan_ifnames", "vlan1 eth1");
1354 nvram_set("wan_iface", "vlan2");
1355 nvram_set("wan_ifname", "vlan2");
1356 nvram_set("wan_ifnameX", "vlan2");
1357 nvram_set("wan_ifnames", "vlan2");
1358 nvram_set("wl_ifname", "eth1");
1364 features
= SUP_SES
| SUP_80211N
| SUP_1000ET
;
1366 nvram_set("usb_uhci", "-1");
1368 if (!nvram_match("t_fix1", (char *)name
)) {
1369 nvram_set("lan_ifnames", "vlan1 eth1");
1370 nvram_set("wan_ifnameX", "vlan2");
1371 nvram_set("wl_ifname", "eth1");
1372 nvram_set("vlan_enable", "1");
1378 name
= nvram_match("boardrev", "0x1446") ? "RT-N53 A1" : "RT-N53";
1379 features
= SUP_SES
| SUP_80211N
;
1380 #if defined(LINUX26) && defined(TCONFIG_USBAP)
1381 if (nvram_get_int("usb_storage") == 1) nvram_set("usb_storage", "-1");
1383 if (!nvram_match("t_fix1", (char *)name
)) {
1384 #ifdef TCONFIG_USBAP
1385 nvram_set("wl1_hwaddr", nvram_safe_get("0:macaddr"));
1386 nvram_set("ehciirqt", "3");
1387 nvram_set("qtdc_pid", "48407");
1388 nvram_set("qtdc_vid", "2652");
1389 nvram_set("qtdc0_ep", "4");
1390 nvram_set("qtdc0_sz", "0");
1391 nvram_set("qtdc1_ep", "18");
1392 nvram_set("qtdc1_sz", "10");
1393 nvram_set("lan_ifnames", "vlan2 eth1 eth2");
1394 nvram_set("landevs", "vlan2 wl0 wl1");
1395 nvram_set("wl1_ifname", "eth2");
1397 nvram_set("lan_ifnames", "vlan2 eth1");
1398 nvram_set("landevs", "vlan2 wl0");
1400 nvram_set("lan_ifname", "br0");
1401 nvram_set("wl_ifname", "eth1");
1402 nvram_set("wl0_ifname", "eth1");
1403 nvram_set("wan_ifnameX", "vlan1");
1404 nvram_set("wandevs", "vlan1");
1405 nvram_unset("vlan0ports");
1408 #ifdef CONFIG_BCMWL6A
1412 features
= SUP_SES
| SUP_80211N
| SUP_1000ET
;
1414 nvram_set("usb_uhci", "-1");
1416 if (!nvram_match("t_fix1", (char *)name
)) {
1417 nvram_set("vlan1hwname", "et0");
1418 nvram_set("vlan2hwname", "et0");
1419 nvram_set("lan_ifname", "br0");
1420 nvram_set("landevs", "vlan1 wl0");
1421 nvram_set("lan_ifnames", "vlan1 eth1");
1422 nvram_set("wan_ifnames", "vlan2");
1423 nvram_set("wan_ifnameX", "vlan2");
1424 nvram_set("wandevs", "vlan2");
1425 nvram_set("wl_ifnames", "eth1");
1426 nvram_set("wl_ifname", "eth1");
1427 nvram_set("wl0_ifname", "eth1");
1430 nvram_set("wl0_hwaddr", nvram_safe_get("0:macaddr"));
1433 nvram_set("usb_usb3", "1");
1434 nvram_set("xhci_ports", "1-1");
1435 nvram_set("ehci_ports", "2-1 2-2");
1436 nvram_set("ohci_ports", "3-1 3-2");
1442 features
= SUP_SES
| SUP_80211N
| SUP_1000ET
| SUP_80211AC
;
1444 nvram_set("usb_uhci", "-1");
1446 if (!nvram_match("t_fix1", (char *)name
)) {
1447 nvram_set("vlan1hwname", "et0");
1448 nvram_set("vlan2hwname", "et0");
1449 nvram_set("lan_ifname", "br0");
1450 nvram_set("landevs", "vlan1 wl0 wl1");
1451 nvram_set("lan_ifnames", "vlan1 eth1 eth2");
1452 nvram_set("wan_ifnames", "vlan2");
1453 nvram_set("wan_ifnameX", "vlan2");
1454 nvram_set("wandevs", "vlan2");
1455 nvram_set("wl_ifnames", "eth1 eth2");
1456 nvram_set("wl_ifname", "eth1");
1457 nvram_set("wl0_ifname", "eth1");
1458 nvram_set("wl1_ifname", "eth2");
1461 nvram_set("wl0_hwaddr", nvram_safe_get("0:macaddr"));
1462 nvram_set("wl1_hwaddr", nvram_safe_get("1:macaddr"));
1465 nvram_set("usb_usb3", "1");
1466 nvram_set("xhci_ports", "1-1");
1467 nvram_set("ehci_ports", "2-1 2-2");
1468 nvram_set("ohci_ports", "3-1 3-2");
1470 // force wl1 settings
1471 nvram_set("wl1_bw", "3");
1472 nvram_set("wl1_bw_cap", "7");
1473 nvram_set("wl1_chanspec", "149/80");
1474 nvram_set("wl1_nctrlsb", "lower");
1475 nvram_set("0:ccode", "SG");
1476 nvram_set("1:ccode", "SG");
1477 nvram_set("wl_country", "SG");
1478 nvram_set("wl_country_code", "SG");
1480 nvram_set("1:ledbh6", "136"); // fixup 5 ghz led - from dd-wrt
1481 nvram_unset("1:ledbh10"); // fixup 5 ghz led - from dd-wrt
1486 name
= nvram_match("boardrev", "0x1103") ? "RT-AC68P/U B1" : "RT-AC68R/U";
1487 features
= SUP_SES
| SUP_80211N
| SUP_1000ET
| SUP_80211AC
;
1489 nvram_set("usb_uhci", "-1");
1491 if (!nvram_match("t_fix1", (char *)name
)) {
1492 nvram_set("vlan1hwname", "et0");
1493 nvram_set("vlan2hwname", "et0");
1494 nvram_set("lan_ifname", "br0");
1495 nvram_set("landevs", "vlan1 wl0 wl1");
1496 nvram_set("lan_ifnames", "vlan1 eth1 eth2");
1497 nvram_set("wan_ifnames", "vlan2");
1498 nvram_set("wan_ifnameX", "vlan2");
1499 nvram_set("wandevs", "vlan2");
1500 nvram_set("wl_ifnames", "eth1 eth2");
1501 nvram_set("wl_ifname", "eth1");
1502 nvram_set("wl0_ifname", "eth1");
1503 nvram_set("wl1_ifname", "eth2");
1506 nvram_set("wl0_hwaddr", nvram_safe_get("0:macaddr"));
1507 nvram_set("wl1_hwaddr", nvram_safe_get("1:macaddr"));
1510 nvram_set("usb_usb3", "1");
1511 nvram_set("xhci_ports", "1-1");
1512 nvram_set("ehci_ports", "2-1 2-2");
1513 nvram_set("ohci_ports", "3-1 3-2");
1515 // force wl1 settings
1516 nvram_set("wl1_bw", "3");
1517 nvram_set("wl1_bw_cap", "7");
1518 nvram_set("wl1_chanspec", "149/80");
1519 nvram_set("wl1_nctrlsb", "lower");
1520 nvram_set("0:ccode", "SG");
1521 nvram_set("1:ccode", "SG");
1522 nvram_set("wl_country", "SG");
1523 nvram_set("wl_country_code", "SG");
1531 if(nvram_match("board_id", "U12H245T00_NETGEAR")) //R6250
1533 else if(nvram_match("board_id", "U12H332T00_NETGEAR")) //R6400
1536 name
= model
== MODEL_R7000
? "R7000" : "R6300v2"; //R7000 or R6300v2
1538 features
= SUP_SES
| SUP_80211N
| SUP_1000ET
| SUP_80211AC
;
1540 nvram_set("usb_uhci", "-1");
1542 if (!nvram_match("t_fix1", (char *)name
)) {
1543 if (get_model() == MODEL_R6300v2
) {
1544 nvram_set("lan_invert", "1");
1546 nvram_set("vlan1hwname", "et0");
1547 nvram_set("vlan2hwname", "et0");
1548 nvram_set("lan_ifname", "br0");
1549 nvram_set("landevs", "vlan1 wl0 wl1");
1550 nvram_set("lan_ifnames", "vlan1 eth1 eth2");
1551 nvram_set("wan_ifnames", "vlan2");
1552 nvram_set("wan_ifnameX", "vlan2");
1553 nvram_set("wandevs", "vlan2");
1554 nvram_set("wl_ifnames", "eth1 eth2");
1555 nvram_set("wl_ifname", "eth1");
1556 nvram_set("wl0_ifname", "eth1");
1557 nvram_set("wl1_ifname", "eth2");
1559 //disable second *fake* LAN interface
1560 nvram_unset("et1macaddr");
1562 // fix WL mac for 2,4G
1563 nvram_set("pci/1/1/macaddr", nvram_safe_get("et0macaddr"));
1565 // fix WL mac for 5G
1566 strcpy(s
, nvram_safe_get("pci/1/1/macaddr"));
1568 nvram_set("pci/2/1/macaddr", s
);
1571 nvram_set("usb_usb3", "1");
1572 nvram_set("xhci_ports", "1-1");
1573 nvram_set("ehci_ports", "2-1 2-2");
1574 nvram_set("ohci_ports", "3-1 3-2");
1576 // force wl1 settings
1577 nvram_set("wl1_bw", "3");
1578 nvram_set("wl1_bw_cap", "7");
1579 nvram_set("wl1_chanspec", "149/80");
1580 nvram_set("wl1_nctrlsb", "lower");
1581 nvram_set("wl_country", "SG");
1582 nvram_set("wl_country_code", "SG");
1583 nvram_set("blink_wl", "1");
1585 // bcm4360ac_defaults - fix problem of loading driver failed with code 21
1586 nvram_set("pci/1/1/aa2g", "7");
1587 nvram_set("pci/1/1/agbg0", "71");
1588 nvram_set("pci/1/1/agbg1", "71");
1589 nvram_set("pci/1/1/agbg2", "71");
1590 nvram_set("pci/1/1/antswitch", "0");
1591 nvram_set("pci/1/1/boardflags", "0x1000");
1592 nvram_set("pci/1/1/boardflags2", "0x100002");
1593 nvram_set("pci/1/1/boardflags3", "0x10000003");
1594 nvram_set("pci/1/1/boardnum", "57359");
1595 nvram_set("pci/1/1/boardrev", "0x1150");
1596 nvram_set("pci/1/1/boardtype", "0x661");
1597 nvram_set("pci/1/1/cckbw202gpo", "0");
1598 nvram_set("pci/1/1/cckbw20ul2gpo", "0");
1599 nvram_set("pci/1/1/devid", "0x43a1");
1600 nvram_set("pci/1/1/dot11agduphrpo", "0");
1601 nvram_set("pci/1/1/dot11agduplrpo", "0");
1602 nvram_set("pci/1/1/dot11agofdmhrbw202gpo", "0xCA86");
1603 nvram_set("pci/1/1/epagain2g", "0");
1604 nvram_set("pci/1/1/femctrl", "3");
1605 nvram_set("pci/1/1/gainctrlsph", "0");
1606 nvram_set("pci/1/1/maxp2ga0", "106");
1607 nvram_set("pci/1/1/maxp2ga1", "106");
1608 nvram_set("pci/1/1/maxp2ga2", "106");
1609 nvram_set("pci/1/1/mcsbw202gpo", "0xA976A600");
1610 nvram_set("pci/1/1/mcsbw402gpo", "0xA976A600");
1611 nvram_set("pci/1/1/measpower", "0x7f");
1612 nvram_set("pci/1/1/measpower1", "0x7f");
1613 nvram_set("pci/1/1/measpower2", "0x7f");
1614 nvram_set("pci/1/1/noiselvl2ga0", "31");
1615 nvram_set("pci/1/1/noiselvl2ga1", "31");
1616 nvram_set("pci/1/1/noiselvl2ga2", "31");
1617 nvram_set("pci/1/1/ofdmlrbw202gpo", "0");
1618 nvram_set("pci/1/1/pa2ga0", "0xFF32,0x1C30,0xFCA3");
1619 nvram_set("pci/1/1/pa2ga1", "0xFF35,0x1BE3,0xFCB0");
1620 nvram_set("pci/1/1/pa2ga2", "0xFF33,0x1BE1,0xFCB0");
1621 nvram_set("pci/1/1/papdcap2g", "0");
1622 nvram_set("pci/1/1/pdgain2g", "14");
1623 nvram_set("pci/1/1/pdoffset2g40ma0", "15");
1624 nvram_set("pci/1/1/pdoffset2g40ma1", "15");
1625 nvram_set("pci/1/1/pdoffset2g40ma2", "15");
1626 nvram_set("pci/1/1/pdoffset2g40mvalid", "1");
1627 nvram_set("pci/1/1/pdoffset40ma0", "0");
1628 nvram_set("pci/1/1/pdoffset40ma1", "0");
1629 nvram_set("pci/1/1/pdoffset40ma2", "0");
1630 nvram_set("pci/1/1/pdoffset80ma0", "0");
1631 nvram_set("pci/1/1/pdoffset80ma1", "0");
1632 nvram_set("pci/1/1/pdoffset80ma2", "0");
1633 nvram_set("pci/1/1/regrev", "66");
1634 nvram_set("pci/1/1/rpcal2g", "0xefb");
1635 nvram_set("pci/1/1/rxgainerr2ga0", "63");
1636 nvram_set("pci/1/1/rxgainerr2ga1", "31");
1637 nvram_set("pci/1/1/rxgainerr2ga2", "31");
1638 nvram_set("pci/1/1/rxgains2gelnagaina0", "3");
1639 nvram_set("pci/1/1/rxgains2gelnagaina1", "3");
1640 nvram_set("pci/1/1/rxgains2gelnagaina2", "3");
1641 nvram_set("pci/1/1/rxgains2gtrelnabypa0", "1");
1642 nvram_set("pci/1/1/rxgains2gtrelnabypa1", "1");
1643 nvram_set("pci/1/1/rxgains2gtrelnabypa2", "1");
1644 nvram_set("pci/1/1/rxgains2gtrisoa0", "7");
1645 nvram_set("pci/1/1/rxgains2gtrisoa1", "7");
1646 nvram_set("pci/1/1/rxgains2gtrisoa2", "7");
1647 nvram_set("pci/1/1/sar2g", "18");
1648 nvram_set("pci/1/1/sromrev", "11");
1649 nvram_set("pci/1/1/subband5gver", "0x4");
1650 nvram_set("pci/1/1/subvid", "0x14e4");
1651 nvram_set("pci/1/1/tssifloor2g", "0x3ff");
1652 nvram_set("pci/1/1/tssiposslope2g", "1");
1653 nvram_set("pci/1/1/tworangetssi2g", "0");
1654 nvram_set("pci/1/1/xtalfreq", "65535");
1655 nvram_set("pci/2/1/aa2g", "7");
1656 nvram_set("pci/2/1/aa5g", "0");
1657 nvram_set("pci/2/1/aga0", "0");
1658 nvram_set("pci/2/1/aga1", "0");
1659 nvram_set("pci/2/1/aga2", "0");
1660 nvram_set("pci/2/1/agbg0", "0");
1661 nvram_set("pci/2/1/agbg1", "0");
1662 nvram_set("pci/2/1/agbg2", "0");
1663 nvram_set("pci/2/1/antswitch", "0");
1664 nvram_set("pci/2/1/boardflags", "0x30000000");
1665 nvram_set("pci/2/1/boardflags2", "0x300002");
1666 nvram_set("pci/2/1/boardflags3", "0x10000000");
1667 nvram_set("pci/2/1/boardnum", "20507");
1668 nvram_set("pci/2/1/boardrev", "0x1451");
1669 nvram_set("pci/2/1/boardtype", "0x621");
1670 nvram_set("pci/2/1/cckbw202gpo", "0");
1671 nvram_set("pci/2/1/cckbw20ul2gpo", "0");
1672 nvram_set("pci/2/1/devid", "0x43a2");
1673 nvram_set("pci/2/1/dot11agduphrpo", "0");
1674 nvram_set("pci/2/1/dot11agduplrpo", "0");
1675 nvram_set("pci/2/1/dot11agofdmhrbw202gpo", "0");
1676 nvram_set("pci/2/1/epagain2g", "0");
1677 nvram_set("pci/2/1/epagain5g", "0");
1678 nvram_set("pci/2/1/femctrl", "3");
1679 nvram_set("pci/2/1/gainctrlsph", "0");
1680 nvram_set("pci/2/1/maxp2ga0", "76");
1681 nvram_set("pci/2/1/maxp2ga1", "76");
1682 nvram_set("pci/2/1/maxp2ga2", "76");
1683 nvram_set("pci/2/1/maxp5ga0", "106,106,106,106");
1684 nvram_set("pci/2/1/maxp5ga1", "106,106,106,106");
1685 nvram_set("pci/2/1/maxp5ga2", "106,106,106,106");
1686 nvram_set("pci/2/1/mcsbw1605ghpo", "0");
1687 nvram_set("pci/2/1/mcsbw1605glpo", "0");
1688 nvram_set("pci/2/1/mcsbw1605gmpo", "0");
1689 nvram_set("pci/2/1/mcsbw1605hpo", "0");
1690 nvram_set("pci/2/1/mcsbw202gpo", "0");
1691 nvram_set("pci/2/1/mcsbw205ghpo", "0xBA768600");
1692 nvram_set("pci/2/1/mcsbw205glpo", "0xBA768600");
1693 nvram_set("pci/2/1/mcsbw205gmpo", "0xBA768600");
1694 nvram_set("pci/2/1/mcsbw402gpo", "0");
1695 nvram_set("pci/2/1/mcsbw405ghpo", "0xBA768600");
1696 nvram_set("pci/2/1/mcsbw405glpo", "0xBA768600");
1697 nvram_set("pci/2/1/mcsbw405gmpo", "0xBA768600");
1698 nvram_set("pci/2/1/mcsbw805ghpo", "0xBA768600");
1699 nvram_set("pci/2/1/mcsbw805glpo", "0xBA768600");
1700 nvram_set("pci/2/1/mcsbw805gmpo", "0xBA768600");
1701 nvram_set("pci/2/1/mcslr5ghpo", "0");
1702 nvram_set("pci/2/1/mcslr5glpo", "0");
1703 nvram_set("pci/2/1/mcslr5gmpo", "0");
1704 nvram_set("pci/2/1/measpower", "0x7f");
1705 nvram_set("pci/2/1/measpower1", "0x7f");
1706 nvram_set("pci/2/1/measpower2", "0x7f");
1707 nvram_set("pci/2/1/noiselvl2ga0", "31");
1708 nvram_set("pci/2/1/noiselvl2ga1", "31");
1709 nvram_set("pci/2/1/noiselvl2ga2", "31");
1710 nvram_set("pci/2/1/noiselvl5ga0", "31,31,31,31");
1711 nvram_set("pci/2/1/noiselvl5ga1", "31,31,31,31");
1712 nvram_set("pci/2/1/noiselvl5ga2", "31,31,31,31");
1713 nvram_set("pci/2/1/ofdmlrbw202gpo", "0");
1714 nvram_set("pci/2/1/pa2ga0", "0xfe72,0x14c0,0xfac7");
1715 nvram_set("pci/2/1/pa2ga1", "0xfe80,0x1472,0xfabc");
1716 nvram_set("pci/2/1/pa2ga2", "0xfe82,0x14bf,0xfad9");
1717 nvram_set("pci/2/1/pa5ga0", "0xFF4C,0x1808,0xFD1B,0xFF4C,0x18CF,0xFD0C,0xFF4A,0x1920,0xFD08,0xFF4C,0x1949,0xFCF6");
1718 nvram_set("pci/2/1/pa5ga1", "0xFF4A,0x18AC,0xFD0B,0xFF44,0x1904,0xFCFF,0xFF56,0x1A09,0xFCFC,0xFF4F,0x19AB,0xFCEF");
1719 nvram_set("pci/2/1/pa5ga2", "0xFF4C,0x1896,0xFD11,0xFF43,0x192D,0xFCF5,0xFF50,0x19EE,0xFCF1,0xFF52,0x19C6,0xFCF1");
1720 nvram_set("pci/2/1/papdcap2g", "0");
1721 nvram_set("pci/2/1/papdcap5g", "0");
1722 nvram_set("pci/2/1/pdgain2g", "4");
1723 nvram_set("pci/2/1/pdgain5g", "4");
1724 nvram_set("pci/2/1/pdoffset2g40ma0", "15");
1725 nvram_set("pci/2/1/pdoffset2g40ma1", "15");
1726 nvram_set("pci/2/1/pdoffset2g40ma2", "15");
1727 nvram_set("pci/2/1/pdoffset2g40mvalid", "1");
1728 nvram_set("pci/2/1/pdoffset40ma0", "4369");
1729 nvram_set("pci/2/1/pdoffset40ma1", "4369");
1730 nvram_set("pci/2/1/pdoffset40ma2", "4369");
1731 nvram_set("pci/2/1/pdoffset80ma0", "0");
1732 nvram_set("pci/2/1/pdoffset80ma1", "0");
1733 nvram_set("pci/2/1/pdoffset80ma2", "0");
1734 nvram_set("pci/2/1/phycal_tempdelta", "255");
1735 nvram_set("pci/2/1/rawtempsense", "0x1ff");
1736 nvram_set("pci/2/1/regrev", "66");
1737 nvram_set("pci/2/1/rpcal2g", "0");
1738 nvram_set("pci/2/1/rpcal5gb0", "0x7c0c");
1739 nvram_set("pci/2/1/rpcal5gb1", "0x880a");
1740 nvram_set("pci/2/1/rpcal5gb2", "0x7b04");
1741 nvram_set("pci/2/1/rpcal5gb3", "0x8c12");
1742 nvram_set("pci/2/1/rxchain", "7");
1743 nvram_set("pci/2/1/rxgainerr2ga0", "63");
1744 nvram_set("pci/2/1/rxgainerr2ga1", "31");
1745 nvram_set("pci/2/1/rxgainerr2ga2", "31");
1746 nvram_set("pci/2/1/rxgainerr5ga0", "63,63,63,63");
1747 nvram_set("pci/2/1/rxgainerr5ga1", "31,31,31,31");
1748 nvram_set("pci/2/1/rxgainerr5ga2", "31,31,31,31");
1749 nvram_set("pci/2/1/rxgains2gelnagaina0", "0");
1750 nvram_set("pci/2/1/rxgains2gelnagaina1", "0");
1751 nvram_set("pci/2/1/rxgains2gelnagaina2", "0");
1752 nvram_set("pci/2/1/rxgains2gtrelnabypa0", "0");
1753 nvram_set("pci/2/1/rxgains2gtrelnabypa1", "0");
1754 nvram_set("pci/2/1/rxgains2gtrelnabypa2", "0");
1755 nvram_set("pci/2/1/rxgains2gtrisoa0", "0");
1756 nvram_set("pci/2/1/rxgains2gtrisoa1", "0");
1757 nvram_set("pci/2/1/rxgains2gtrisoa2", "0");
1758 nvram_set("pci/2/1/rxgains5gelnagaina0", "4");
1759 nvram_set("pci/2/1/rxgains5gelnagaina1", "4");
1760 nvram_set("pci/2/1/rxgains5gelnagaina2", "4");
1761 nvram_set("pci/2/1/rxgains5ghelnagaina0", "3");
1762 nvram_set("pci/2/1/rxgains5ghelnagaina1", "3");
1763 nvram_set("pci/2/1/rxgains5ghelnagaina2", "4");
1764 nvram_set("pci/2/1/rxgains5ghtrelnabypa0", "1");
1765 nvram_set("pci/2/1/rxgains5ghtrelnabypa1", "1");
1766 nvram_set("pci/2/1/rxgains5ghtrelnabypa2", "1");
1767 nvram_set("pci/2/1/rxgains5ghtrisoa0", "5");
1768 nvram_set("pci/2/1/rxgains5ghtrisoa1", "4");
1769 nvram_set("pci/2/1/rxgains5ghtrisoa2", "4");
1770 nvram_set("pci/2/1/rxgains5gmelnagaina0", "3");
1771 nvram_set("pci/2/1/rxgains5gmelnagaina1", "4");
1772 nvram_set("pci/2/1/rxgains5gmelnagaina2", "4");
1773 nvram_set("pci/2/1/rxgains5gmtrelnabypa0", "1");
1774 nvram_set("pci/2/1/rxgains5gmtrelnabypa1", "1");
1775 nvram_set("pci/2/1/rxgains5gmtrelnabypa2", "1");
1776 nvram_set("pci/2/1/rxgains5gmtrisoa0", "5");
1777 nvram_set("pci/2/1/rxgains5gmtrisoa1", "4");
1778 nvram_set("pci/2/1/rxgains5gmtrisoa2", "4");
1779 nvram_set("pci/2/1/rxgains5gtrelnabypa0", "1");
1780 nvram_set("pci/2/1/rxgains5gtrelnabypa1", "1");
1781 nvram_set("pci/2/1/rxgains5gtrelnabypa2", "1");
1782 nvram_set("pci/2/1/rxgains5gtrisoa0", "7");
1783 nvram_set("pci/2/1/rxgains5gtrisoa1", "6");
1784 nvram_set("pci/2/1/rxgains5gtrisoa2", "5");
1785 nvram_set("pci/2/1/sar2g", "18");
1786 nvram_set("pci/2/1/sar5g", "15");
1787 nvram_set("pci/2/1/sb20in40hrpo", "0");
1788 nvram_set("pci/2/1/sb20in40lrpo", "0");
1789 nvram_set("pci/2/1/sb20in80and160hr5ghpo", "0");
1790 nvram_set("pci/2/1/sb20in80and160hr5glpo", "0");
1791 nvram_set("pci/2/1/sb20in80and160hr5gmpo", "0");
1792 nvram_set("pci/2/1/sb20in80and160lr5ghpo", "0");
1793 nvram_set("pci/2/1/sb20in80and160lr5glpo", "0");
1794 nvram_set("pci/2/1/sb20in80and160lr5gmpo", "0");
1795 nvram_set("pci/2/1/sb40and80hr5ghpo", "0");
1796 nvram_set("pci/2/1/sb40and80hr5glpo", "0");
1797 nvram_set("pci/2/1/sb40and80hr5gmpo", "0");
1798 nvram_set("pci/2/1/sb40and80lr5ghpo", "0");
1799 nvram_set("pci/2/1/sb40and80lr5glpo", "0");
1800 nvram_set("pci/2/1/sb40and80lr5gmpo", "0");
1801 nvram_set("pci/2/1/sromrev", "11");
1802 nvram_set("pci/2/1/subband5gver", "0x4");
1803 nvram_set("pci/2/1/subvid", "0x14e4");
1804 nvram_set("pci/2/1/tempcorrx", "0x3f");
1805 nvram_set("pci/2/1/tempoffset", "255");
1806 nvram_set("pci/2/1/tempsense_option", "0x3");
1807 nvram_set("pci/2/1/tempsense_slope", "0xff");
1808 nvram_set("pci/2/1/temps_hysteresis", "15");
1809 nvram_set("pci/2/1/temps_period", "15");
1810 nvram_set("pci/2/1/tempthresh", "255");
1811 nvram_set("pci/2/1/tssifloor2g", "0x3ff");
1812 nvram_set("pci/2/1/tssifloor5g", "0x3ff,0x3ff,0x3ff,0x3ff");
1813 nvram_set("pci/2/1/tssiposslope2g", "1");
1814 nvram_set("pci/2/1/tssiposslope5g", "1");
1815 nvram_set("pci/2/1/tworangetssi2g", "0");
1816 nvram_set("pci/2/1/tworangetssi5g", "0");
1817 nvram_set("pci/2/1/txchain", "7");
1818 nvram_set("pci/2/1/xtalfreq", "65535");
1824 features
= SUP_SES
| SUP_80211N
| SUP_1000ET
| SUP_80211AC
;
1826 nvram_set("usb_uhci", "-1");
1828 if (!nvram_match("t_fix1", (char *)name
)) {
1829 nvram_set("vlan1hwname", "et0");
1830 nvram_set("vlan2hwname", "et0");
1831 nvram_set("lan_ifname", "br0");
1832 nvram_set("landevs", "vlan1 wl0 wl1");
1833 nvram_set("lan_ifnames", "vlan1 eth1 eth2");
1834 nvram_set("wan_ifnames", "vlan2");
1835 nvram_set("wan_ifnameX", "vlan2");
1836 nvram_set("wandevs", "vlan2");
1837 nvram_set("wl_ifnames", "eth1 eth2");
1838 nvram_set("wl_ifname", "eth1");
1839 nvram_set("wl0_ifname", "eth1");
1840 nvram_set("wl1_ifname", "eth2");
1842 // fix WL mac for 5G
1843 strcpy(s
, nvram_safe_get("pci/1/1/macaddr"));
1845 nvram_set("pci/2/1/macaddr", s
);
1848 nvram_set("usb_usb3", "1");
1849 nvram_set("xhci_ports", "1-1");
1850 nvram_set("ehci_ports", "2-1 2-2");
1851 nvram_set("ohci_ports", "3-1 3-2");
1853 // force wl1 settings
1854 nvram_set("wl1_bw", "3");
1855 nvram_set("wl1_bw_cap", "7");
1856 nvram_set("wl1_chanspec", "149/80");
1857 nvram_set("wl1_nctrlsb", "lower");
1858 nvram_set("wl_country", "SG");
1859 nvram_set("wl_country_code", "SG");
1861 // bcm4360ac_defaults - fix problem of loading driver failed with code 21
1862 nvram_set("pci/1/1/aa2g", "7");
1863 nvram_set("pci/1/1/agbg0", "71");
1864 nvram_set("pci/1/1/agbg1", "71");
1865 nvram_set("pci/1/1/agbg2", "71");
1866 nvram_set("pci/1/1/antswitch", "0");
1867 nvram_set("pci/1/1/boardflags", "0x1000");
1868 nvram_set("pci/1/1/boardflags2", "0x100002");
1869 nvram_set("pci/1/1/boardflags3", "0x10000003");
1870 nvram_set("pci/1/1/boardnum", "57359");
1871 nvram_set("pci/1/1/boardrev", "0x1150");
1872 nvram_set("pci/1/1/boardtype", "0x661");
1873 nvram_set("pci/1/1/cckbw202gpo", "0");
1874 nvram_set("pci/1/1/cckbw20ul2gpo", "0");
1875 nvram_set("pci/1/1/ccode", "EU");
1876 nvram_set("pci/1/1/devid", "0x43a1");
1877 nvram_set("pci/1/1/dot11agduphrpo", "0");
1878 nvram_set("pci/1/1/dot11agduplrpo", "0");
1879 nvram_set("pci/1/1/dot11agofdmhrbw202gpo", "0xCA86");
1880 nvram_set("pci/1/1/epagain2g", "0");
1881 nvram_set("pci/1/1/femctrl", "3");
1882 nvram_set("pci/1/1/gainctrlsph", "0");
1883 // nvram_set("pci/1/1/macaddr", "E4:F4:C6:01:47:7C");
1884 nvram_set("pci/1/1/maxp2ga0", "106");
1885 nvram_set("pci/1/1/maxp2ga1", "106");
1886 nvram_set("pci/1/1/maxp2ga2", "106");
1887 nvram_set("pci/1/1/mcsbw202gpo", "0xA976A600");
1888 nvram_set("pci/1/1/mcsbw402gpo", "0xA976A600");
1889 nvram_set("pci/1/1/measpower", "0x7f");
1890 nvram_set("pci/1/1/measpower1", "0x7f");
1891 nvram_set("pci/1/1/measpower2", "0x7f");
1892 nvram_set("pci/1/1/noiselvl2ga0", "31");
1893 nvram_set("pci/1/1/noiselvl2ga1", "31");
1894 nvram_set("pci/1/1/noiselvl2ga2", "31");
1895 nvram_set("pci/1/1/ofdmlrbw202gpo", "0");
1896 nvram_set("pci/1/1/pa2ga0", "0xFF32,0x1C30,0xFCA3");
1897 nvram_set("pci/1/1/pa2ga1", "0xFF35,0x1BE3,0xFCB0");
1898 nvram_set("pci/1/1/pa2ga2", "0xFF33,0x1BE1,0xFCB0");
1899 nvram_set("pci/1/1/papdcap2g", "0");
1900 nvram_set("pci/1/1/pdgain2g", "14");
1901 nvram_set("pci/1/1/pdoffset2g40ma0", "15");
1902 nvram_set("pci/1/1/pdoffset2g40ma1", "15");
1903 nvram_set("pci/1/1/pdoffset2g40ma2", "15");
1904 nvram_set("pci/1/1/pdoffset2g40mvalid", "1");
1905 nvram_set("pci/1/1/pdoffset40ma0", "0");
1906 nvram_set("pci/1/1/pdoffset40ma1", "0");
1907 nvram_set("pci/1/1/pdoffset40ma2", "0");
1908 nvram_set("pci/1/1/pdoffset80ma0", "0");
1909 nvram_set("pci/1/1/pdoffset80ma1", "0");
1910 nvram_set("pci/1/1/pdoffset80ma2", "0");
1911 nvram_set("pci/1/1/regrev", "66");
1912 nvram_set("pci/1/1/rpcal2g", "0x5f7");
1913 nvram_set("pci/1/1/rxgainerr2ga0", "63");
1914 nvram_set("pci/1/1/rxgainerr2ga1", "31");
1915 nvram_set("pci/1/1/rxgainerr2ga2", "31");
1916 nvram_set("pci/1/1/rxgains2gelnagaina0", "3");
1917 nvram_set("pci/1/1/rxgains2gelnagaina1", "3");
1918 nvram_set("pci/1/1/rxgains2gelnagaina2", "3");
1919 nvram_set("pci/1/1/rxgains2gtrelnabypa0", "1");
1920 nvram_set("pci/1/1/rxgains2gtrelnabypa1", "1");
1921 nvram_set("pci/1/1/rxgains2gtrelnabypa2", "1");
1922 nvram_set("pci/1/1/rxgains2gtrisoa0", "7");
1923 nvram_set("pci/1/1/rxgains2gtrisoa1", "7");
1924 nvram_set("pci/1/1/rxgains2gtrisoa2", "7");
1925 nvram_set("pci/1/1/sar2g", "18");
1926 nvram_set("pci/1/1/sromrev", "11");
1927 nvram_set("pci/1/1/subband5gver", "0x4");
1928 nvram_set("pci/1/1/subvid", "0x14e4");
1929 nvram_set("pci/1/1/tssifloor2g", "0x3ff");
1930 nvram_set("pci/1/1/tssiposslope2g", "1");
1931 nvram_set("pci/1/1/tworangetssi2g", "0");
1932 nvram_set("pci/1/1/xtalfreq", "65535");
1933 nvram_set("pci/2/1/aa2g", "7");
1934 nvram_set("pci/2/1/aa5g", "0");
1935 nvram_set("pci/2/1/aga0", "0");
1936 nvram_set("pci/2/1/aga1", "0");
1937 nvram_set("pci/2/1/aga2", "0");
1938 nvram_set("pci/2/1/agbg0", "0");
1939 nvram_set("pci/2/1/agbg1", "0");
1940 nvram_set("pci/2/1/agbg2", "0");
1941 nvram_set("pci/2/1/antswitch", "0");
1942 nvram_set("pci/2/1/boardflags", "0x30000000");
1943 nvram_set("pci/2/1/boardflags2", "0x300002");
1944 nvram_set("pci/2/1/boardflags3", "0x10000000");
1945 nvram_set("pci/2/1/boardnum", "20507");
1946 nvram_set("pci/2/1/boardrev", "0x1451");
1947 nvram_set("pci/2/1/boardtype", "0x621");
1948 nvram_set("pci/2/1/cckbw202gpo", "0");
1949 nvram_set("pci/2/1/cckbw20ul2gpo", "0");
1950 nvram_set("pci/2/1/ccode", "SG");
1951 nvram_set("pci/2/1/devid", "0x43a2");
1952 nvram_set("pci/2/1/dot11agduphrpo", "0");
1953 nvram_set("pci/2/1/dot11agduplrpo", "0");
1954 nvram_set("pci/2/1/dot11agofdmhrbw202gpo", "0");
1955 nvram_set("pci/2/1/epagain2g", "0");
1956 nvram_set("pci/2/1/epagain5g", "0");
1957 nvram_set("pci/2/1/femctrl", "3");
1958 nvram_set("pci/2/1/gainctrlsph", "0");
1959 // nvram_set("pci/2/1/macaddr", "E4:F4:C6:01:47:7B");
1960 nvram_set("pci/2/1/maxp2ga0", "76");
1961 nvram_set("pci/2/1/maxp2ga1", "76");
1962 nvram_set("pci/2/1/maxp2ga2", "76");
1963 nvram_set("pci/2/1/maxp5ga0", "106,106,106,106");
1964 nvram_set("pci/2/1/maxp5ga1", "106,106,106,106");
1965 nvram_set("pci/2/1/maxp5ga2", "106,106,106,106");
1966 nvram_set("pci/2/1/mcsbw1605ghpo", "0");
1967 nvram_set("pci/2/1/mcsbw1605glpo", "0");
1968 nvram_set("pci/2/1/mcsbw1605gmpo", "0");
1969 nvram_set("pci/2/1/mcsbw1605hpo", "0");
1970 nvram_set("pci/2/1/mcsbw202gpo", "0");
1971 nvram_set("pci/2/1/mcsbw205ghpo", "0xBA768600");
1972 nvram_set("pci/2/1/mcsbw205glpo", "0xBA768600");
1973 nvram_set("pci/2/1/mcsbw205gmpo", "0xBA768600");
1974 nvram_set("pci/2/1/mcsbw402gpo", "0");
1975 nvram_set("pci/2/1/mcsbw405ghpo", "0xBA768600");
1976 nvram_set("pci/2/1/mcsbw405glpo", "0xBA768600");
1977 nvram_set("pci/2/1/mcsbw405gmpo", "0xBA768600");
1978 nvram_set("pci/2/1/mcsbw805ghpo", "0xBA768600");
1979 nvram_set("pci/2/1/mcsbw805glpo", "0xBA768600");
1980 nvram_set("pci/2/1/mcsbw805gmpo", "0xBA768600");
1981 nvram_set("pci/2/1/mcslr5ghpo", "0");
1982 nvram_set("pci/2/1/mcslr5glpo", "0");
1983 nvram_set("pci/2/1/mcslr5gmpo", "0");
1984 nvram_set("pci/2/1/measpower", "0x7f");
1985 nvram_set("pci/2/1/measpower1", "0x7f");
1986 nvram_set("pci/2/1/measpower2", "0x7f");
1987 nvram_set("pci/2/1/noiselvl2ga0", "31");
1988 nvram_set("pci/2/1/noiselvl2ga1", "31");
1989 nvram_set("pci/2/1/noiselvl2ga2", "31");
1990 nvram_set("pci/2/1/noiselvl5ga0", "31,31,31,31");
1991 nvram_set("pci/2/1/noiselvl5ga1", "31,31,31,31");
1992 nvram_set("pci/2/1/noiselvl5ga2", "31,31,31,31");
1993 nvram_set("pci/2/1/ofdmlrbw202gpo", "0");
1994 nvram_set("pci/2/1/pa2ga0", "0xfe72,0x14c0,0xfac7");
1995 nvram_set("pci/2/1/pa2ga1", "0xfe80,0x1472,0xfabc");
1996 nvram_set("pci/2/1/pa2ga2", "0xfe82,0x14bf,0xfad9");
1997 nvram_set("pci/2/1/pa5ga0", "0xFF4C,0x1808,0xFD1B,0xFF4C,0x18CF,0xFD0C,0xFF4A,0x1920,0xFD08,0xFF4C,0x1949,0xFCF6");
1998 nvram_set("pci/2/1/pa5ga1", "0xFF4A,0x18AC,0xFD0B,0xFF44,0x1904,0xFCFF,0xFF56,0x1A09,0xFCFC,0xFF4F,0x19AB,0xFCEF");
1999 nvram_set("pci/2/1/pa5ga2", "0xFF4C,0x1896,0xFD11,0xFF43,0x192D,0xFCF5,0xFF50,0x19EE,0xFCF1,0xFF52,0x19C6,0xFCF1");
2000 nvram_set("pci/2/1/papdcap2g", "0");
2001 nvram_set("pci/2/1/papdcap5g", "0");
2002 nvram_set("pci/2/1/pdgain2g", "4");
2003 nvram_set("pci/2/1/pdgain5g", "4");
2004 nvram_set("pci/2/1/pdoffset2g40ma0", "15");
2005 nvram_set("pci/2/1/pdoffset2g40ma1", "15");
2006 nvram_set("pci/2/1/pdoffset2g40ma2", "15");
2007 nvram_set("pci/2/1/pdoffset2g40mvalid", "1");
2008 nvram_set("pci/2/1/pdoffset40ma0", "4369");
2009 nvram_set("pci/2/1/pdoffset40ma1", "4369");
2010 nvram_set("pci/2/1/pdoffset40ma2", "4369");
2011 nvram_set("pci/2/1/pdoffset80ma0", "0");
2012 nvram_set("pci/2/1/pdoffset80ma1", "0");
2013 nvram_set("pci/2/1/pdoffset80ma2", "0");
2014 nvram_set("pci/2/1/phycal_tempdelta", "255");
2015 nvram_set("pci/2/1/rawtempsense", "0x1ff");
2016 nvram_set("pci/2/1/regrev", "66");
2017 nvram_set("pci/2/1/rpcal2g", "0");
2018 nvram_set("pci/2/1/rpcal5gb0", "0x610c");
2019 nvram_set("pci/2/1/rpcal5gb1", "0x6a09");
2020 nvram_set("pci/2/1/rpcal5gb2", "0x5eff");
2021 nvram_set("pci/2/1/rpcal5gb3", "0x700c");
2022 nvram_set("pci/2/1/rxchain", "7");
2023 nvram_set("pci/2/1/rxgainerr2ga0", "63");
2024 nvram_set("pci/2/1/rxgainerr2ga1", "31");
2025 nvram_set("pci/2/1/rxgainerr2ga2", "31");
2026 nvram_set("pci/2/1/rxgainerr5ga0", "63,63,63,63");
2027 nvram_set("pci/2/1/rxgainerr5ga1", "31,31,31,31");
2028 nvram_set("pci/2/1/rxgainerr5ga2", "31,31,31,31");
2029 nvram_set("pci/2/1/rxgains2gelnagaina0", "0");
2030 nvram_set("pci/2/1/rxgains2gelnagaina1", "0");
2031 nvram_set("pci/2/1/rxgains2gelnagaina2", "0");
2032 nvram_set("pci/2/1/rxgains2gtrelnabypa0", "0");
2033 nvram_set("pci/2/1/rxgains2gtrelnabypa1", "0");
2034 nvram_set("pci/2/1/rxgains2gtrelnabypa2", "0");
2035 nvram_set("pci/2/1/rxgains2gtrisoa0", "0");
2036 nvram_set("pci/2/1/rxgains2gtrisoa1", "0");
2037 nvram_set("pci/2/1/rxgains2gtrisoa2", "0");
2038 nvram_set("pci/2/1/rxgains5gelnagaina0", "4");
2039 nvram_set("pci/2/1/rxgains5gelnagaina1", "4");
2040 nvram_set("pci/2/1/rxgains5gelnagaina2", "4");
2041 nvram_set("pci/2/1/rxgains5ghelnagaina0", "3");
2042 nvram_set("pci/2/1/rxgains5ghelnagaina1", "3");
2043 nvram_set("pci/2/1/rxgains5ghelnagaina2", "4");
2044 nvram_set("pci/2/1/rxgains5ghtrelnabypa0", "1");
2045 nvram_set("pci/2/1/rxgains5ghtrelnabypa1", "1");
2046 nvram_set("pci/2/1/rxgains5ghtrelnabypa2", "1");
2047 nvram_set("pci/2/1/rxgains5ghtrisoa0", "5");
2048 nvram_set("pci/2/1/rxgains5ghtrisoa1", "4");
2049 nvram_set("pci/2/1/rxgains5ghtrisoa2", "4");
2050 nvram_set("pci/2/1/rxgains5gmelnagaina0", "3");
2051 nvram_set("pci/2/1/rxgains5gmelnagaina1", "4");
2052 nvram_set("pci/2/1/rxgains5gmelnagaina2", "4");
2053 nvram_set("pci/2/1/rxgains5gmtrelnabypa0", "1");
2054 nvram_set("pci/2/1/rxgains5gmtrelnabypa1", "1");
2055 nvram_set("pci/2/1/rxgains5gmtrelnabypa2", "1");
2056 nvram_set("pci/2/1/rxgains5gmtrisoa0", "5");
2057 nvram_set("pci/2/1/rxgains5gmtrisoa1", "4");
2058 nvram_set("pci/2/1/rxgains5gmtrisoa2", "4");
2059 nvram_set("pci/2/1/rxgains5gtrelnabypa0", "1");
2060 nvram_set("pci/2/1/rxgains5gtrelnabypa1", "1");
2061 nvram_set("pci/2/1/rxgains5gtrelnabypa2", "1");
2062 nvram_set("pci/2/1/rxgains5gtrisoa0", "7");
2063 nvram_set("pci/2/1/rxgains5gtrisoa1", "6");
2064 nvram_set("pci/2/1/rxgains5gtrisoa2", "5");
2065 nvram_set("pci/2/1/sar2g", "18");
2066 nvram_set("pci/2/1/sar5g", "15");
2067 nvram_set("pci/2/1/sb20in40hrpo", "0");
2068 nvram_set("pci/2/1/sb20in40lrpo", "0");
2069 nvram_set("pci/2/1/sb20in80and160hr5ghpo", "0");
2070 nvram_set("pci/2/1/sb20in80and160hr5glpo", "0");
2071 nvram_set("pci/2/1/sb20in80and160hr5gmpo", "0");
2072 nvram_set("pci/2/1/sb20in80and160lr5ghpo", "0");
2073 nvram_set("pci/2/1/sb20in80and160lr5glpo", "0");
2074 nvram_set("pci/2/1/sb20in80and160lr5gmpo", "0");
2075 nvram_set("pci/2/1/sb40and80hr5ghpo", "0");
2076 nvram_set("pci/2/1/sb40and80hr5glpo", "0");
2077 nvram_set("pci/2/1/sb40and80hr5gmpo", "0");
2078 nvram_set("pci/2/1/sb40and80lr5ghpo", "0");
2079 nvram_set("pci/2/1/sb40and80lr5glpo", "0");
2080 nvram_set("pci/2/1/sb40and80lr5gmpo", "0");
2081 nvram_set("pci/2/1/sromrev", "11");
2082 nvram_set("pci/2/1/subband5gver", "0x4");
2083 nvram_set("pci/2/1/subvid", "0x14e4");
2084 nvram_set("pci/2/1/tempcorrx", "0x3f");
2085 nvram_set("pci/2/1/tempoffset", "255");
2086 nvram_set("pci/2/1/tempsense_option", "0x3");
2087 nvram_set("pci/2/1/tempsense_slope", "0xff");
2088 nvram_set("pci/2/1/temps_hysteresis", "15");
2089 nvram_set("pci/2/1/temps_period", "15");
2090 nvram_set("pci/2/1/tempthresh", "255");
2091 nvram_set("pci/2/1/tssifloor2g", "0x3ff");
2092 nvram_set("pci/2/1/tssifloor5g", "0x3ff,0x3ff,0x3ff,0x3ff");
2093 nvram_set("pci/2/1/tssiposslope2g", "1");
2094 nvram_set("pci/2/1/tssiposslope5g", "1");
2095 nvram_set("pci/2/1/tworangetssi2g", "0");
2096 nvram_set("pci/2/1/tworangetssi5g", "0");
2097 nvram_set("pci/2/1/txchain", "7");
2098 nvram_set("pci/2/1/xtalfreq", "65535");
2105 features
= SUP_SES
| SUP_80211N
| SUP_1000ET
| SUP_80211AC
;
2107 nvram_set("usb_uhci", "-1");
2109 if (!nvram_match("t_fix1", (char *)name
)) {
2110 nvram_set("vlan1hwname", "et0");
2111 nvram_set("vlan2hwname", "et0");
2112 nvram_set("lan_ifname", "br0");
2113 nvram_set("landevs", "vlan1 wl0 wl1");
2114 nvram_set("lan_ifnames", "vlan1 eth1 eth2");
2115 nvram_set("wan_ifnames", "vlan2");
2116 nvram_set("wan_ifnameX", "vlan2");
2117 nvram_set("wandevs", "vlan2");
2118 nvram_set("wl_ifnames", "eth1 eth2");
2119 nvram_set("wl_ifname", "eth1");
2120 nvram_set("wl0_ifname", "eth1");
2121 nvram_set("wl1_ifname", "eth2");
2124 strcpy(s
, nvram_safe_get("et0macaddr"));
2126 nvram_set("0:macaddr", s
);
2128 nvram_set("1:macaddr", s
);
2131 nvram_set("usb_usb3", "1");
2132 nvram_set("xhci_ports", "1-1");
2133 nvram_set("ehci_ports", "2-1 2-2");
2134 nvram_set("ohci_ports", "3-1 3-2");
2137 nvram_set("boot_wait", "off");
2138 nvram_set("wait_time", "1");
2140 // 2.4GHz module defaults
2141 nvram_set("devpath0", "pci/1/1");
2142 nvram_set("0:aa2g", "7");
2143 nvram_set("0:ag0", "0");
2144 nvram_set("0:ag1", "0");
2145 nvram_set("0:ag2", "0");
2146 nvram_set("0:antswctl2g", "0");
2147 nvram_set("0:antswitch", "0");
2148 nvram_set("0:boardflags2", "0x00100000");
2149 nvram_set("0:boardflags", "0x80001200");
2150 nvram_set("0:boardtype", "0x59b");
2151 nvram_set("0:boardvendor", "0x14e4");
2152 nvram_set("0:cckbw202gpo", "0x0000");
2153 nvram_set("0:cckbw20ul2gpo", "0x0000");
2154 nvram_set("0:ccode", "#a");
2155 nvram_set("0:devid", "0x4332");
2156 nvram_set("0:elna2g", "2");
2157 nvram_set("0:extpagain2g", "3");
2158 nvram_set("0:ledbh0", "11");
2159 // nvram_set("0:ledbh1", "11");
2160 nvram_set("0:ledbh2", "14");
2161 nvram_set("0:ledbh3", "1");
2162 nvram_set("0:ledbh12", "11");
2163 nvram_set("0:leddc", "0xffff");
2164 nvram_set("0:legofdm40duppo", "0x0");
2165 nvram_set("0:legofdmbw202gpo", "0x88888888");
2166 nvram_set("0:legofdmbw20ul2gpo", "0x88888888");
2167 nvram_set("0:maxp2ga0", "0x46");
2168 nvram_set("0:maxp2ga1", "0x46");
2169 nvram_set("0:maxp2ga2", "0x46");
2170 nvram_set("0:mcs32po", "0x0");
2171 nvram_set("0:mcsbw202gpo", "0x88888888");
2172 nvram_set("0:mcsbw20ul2gpo", "0x88888888");
2173 nvram_set("0:mcsbw402gpo", "0x88888888");
2174 nvram_set("0:pa2gw0a0", "0xfe63");
2175 nvram_set("0:pa2gw0a1", "0xfe78");
2176 nvram_set("0:pa2gw0a2", "0xfe65");
2177 nvram_set("0:pa2gw1a0", "0x1dfd");
2178 nvram_set("0:pa2gw1a1", "0x1e4a");
2179 nvram_set("0:pa2gw1a2", "0x1e74");
2180 nvram_set("0:pa2gw2a0", "0xf8c7");
2181 nvram_set("0:pa2gw2a1", "0xf8d8");
2182 nvram_set("0:pa2gw2a2", "0xf8b9");
2183 nvram_set("0:parefldovoltage", "35");
2184 nvram_set("0:pdetrange2g", "3");
2185 nvram_set("0:phycal_tempdelta", "0");
2186 nvram_set("0:regrev", "0");
2187 nvram_set("0:rxchain", "7");
2188 nvram_set("0:sromrev", "9");
2189 nvram_set("0:tempoffset", "0");
2190 nvram_set("0:temps_hysteresis", "5");
2191 nvram_set("0:temps_period", "5");
2192 nvram_set("0:tempthresh", "120");
2193 nvram_set("0:triso2g", "3");
2194 nvram_set("0:tssipos2g", "1");
2195 nvram_set("0:txchain", "7");
2196 nvram_set("0:venid", "0x14e4");
2197 nvram_set("0:xtalfreq", "20000");
2199 // 5GHz module defaults
2200 nvram_set("devpath1", "pci/2/1");
2201 nvram_set("1:aa2g", "0");
2202 nvram_set("1:aa5g", "7");
2203 nvram_set("1:agbg0", "71");
2204 nvram_set("1:agbg1", "71");
2205 nvram_set("1:agbg2", "133");
2206 nvram_set("1:antswitch", "0");
2207 nvram_set("1:boardflags2", "0x00300002");
2208 nvram_set("1:boardflags3", "0x0");
2209 nvram_set("1:boardflags", "0x30000000");
2210 nvram_set("1:boardnum", "20771");
2211 nvram_set("1:boardrev", "0x1402");
2212 nvram_set("1:boardtype", "0x621");
2213 nvram_set("1:boardvendor", "0x14e4");
2214 nvram_set("1:cckbw202gpo", "0");
2215 nvram_set("1:cckbw20ul2gpo", "0");
2216 nvram_set("1:ccode", "#a");
2217 nvram_set("1:devid", "0x43a2");
2218 nvram_set("1:dot11agduphrpo", "0");
2219 nvram_set("1:dot11agduplrpo", "0");
2220 nvram_set("1:epagain2g", "0");
2221 nvram_set("1:epagain5g", "0");
2222 nvram_set("1:femctrl", "3");
2223 nvram_set("1:gainctrlsph", "0");
2224 nvram_set("1:maxp2ga0", "76");
2225 nvram_set("1:maxp2ga1", "76");
2226 nvram_set("1:maxp2ga2", "76");
2227 nvram_set("1:maxp5ga0", "70,70,86,86");
2228 nvram_set("1:maxp5ga1", "70,70,86,86");
2229 nvram_set("1:maxp5ga2", "70,70,86,86");
2230 nvram_set("1:mcsbw402gpo", "0");
2231 nvram_set("1:mcsbw1605ghpo", "0");
2232 nvram_set("1:mcsbw1605gmpo", "0");
2233 nvram_set("1:mcsbw402gpo", "0");
2234 nvram_set("1:mcsbw1605glpo", "0x00222222");
2235 nvram_set("1:mcsbw205ghpo", "0xaa880000");
2236 nvram_set("1:mcsbw205glpo", "0x66666666");
2237 nvram_set("1:mcsbw205gmpo", "0x66666666");
2238 nvram_set("1:mcsbw405ghpo", "0xaa880000");
2239 nvram_set("1:mcsbw405glpo", "0x22222222");
2240 nvram_set("1:mcsbw405gmpo", "0x22222222");
2241 nvram_set("1:mcsbw805ghpo", "0x88880000");
2242 nvram_set("1:mcsbw805glpo", "0x00222222");
2243 nvram_set("1:mcsbw805gmpo", "0x00222222");
2244 nvram_set("1:mcslr5ghpo", "0");
2245 nvram_set("1:mcslr5glpo", "0");
2246 nvram_set("1:mcslr5gmpo", "0");
2247 nvram_set("1:measpower1", "0x7f");
2248 nvram_set("1:measpower2", "0x7f");
2249 nvram_set("1:measpower", "0x7f");
2250 nvram_set("1:noiselvl2ga0", "31");
2251 nvram_set("1:noiselvl2ga1", "31");
2252 nvram_set("1:noiselvl2ga2", "31");
2253 nvram_set("1:noiselvl5ga0", "31,31,31,31");
2254 nvram_set("1:noiselvl5ga1", "31,31,31,31");
2255 nvram_set("1:noiselvl5ga2", "31,31,31,31");
2256 nvram_set("1:ofdmlrbw202gpo", "0");
2257 nvram_set("1:pa2ga0", "0xfe72,0x14c0,0xfac7");
2258 nvram_set("1:pa2ga1", "0xfe80,0x1472,0xfabc");
2259 nvram_set("1:pa2ga2", "0xfe82,0x14bf,0xfad9");
2260 nvram_set("1:pa5ga0", "0xff31,0x1a56,0xfcc7,0xff35,0x1a8f,0xfcc1,0xff35,0x18d4,0xfcf4,0xff2d,0x18d5,0xfce8");
2261 nvram_set("1:pa5ga1", "0xff30,0x190f,0xfce6,0xff38,0x1abc,0xfcc0,0xff0f,0x1762,0xfcef,0xff18,0x1648,0xfd23");
2262 nvram_set("1:pa5ga2", "0xff32,0x18f6,0xfce8,0xff36,0x195d,0xfcdf,0xff28,0x16ae,0xfd1e,0xff28,0x166c,0xfd2b");
2263 nvram_set("1:papdcap2g", "0");
2264 nvram_set("1:papdcap5g", "0");
2265 nvram_set("1:pcieingress_war", "15");
2266 nvram_set("1:pdgain2g", "4");
2267 nvram_set("1:pdgain5g", "4");
2268 nvram_set("1:pdoffset40ma0", "0x1111");
2269 nvram_set("1:pdoffset40ma1", "0x1111");
2270 nvram_set("1:pdoffset40ma2", "0x1111");
2271 nvram_set("1:pdoffset80ma0", "0");
2272 nvram_set("1:pdoffset80ma1", "0");
2273 nvram_set("1:pdoffset80ma2", "0xfecc");
2274 nvram_set("1:phycal_tempdelta", "255");
2275 nvram_set("1:rawtempsense", "0x1ff");
2276 nvram_set("1:regrev", "0");
2277 nvram_set("1:rxchain", "7");
2278 nvram_set("1:rxgainerr2ga0", "63");
2279 nvram_set("1:rxgainerr2ga1", "31");
2280 nvram_set("1:rxgainerr2ga2", "31");
2281 nvram_set("1:rxgainerr5ga0", "63,63,63,63");
2282 nvram_set("1:rxgainerr5ga1", "31,31,31,31");
2283 nvram_set("1:rxgainerr5ga2", "31,31,31,31");
2284 nvram_set("1:rxgains2gelnagaina0", "0");
2285 nvram_set("1:rxgains2gelnagaina1", "0");
2286 nvram_set("1:rxgains2gelnagaina2", "0");
2287 nvram_set("1:rxgains2gtrisoa0", "0");
2288 nvram_set("1:rxgains2gtrisoa1", "0");
2289 nvram_set("1:rxgains2gtrisoa2", "0");
2290 nvram_set("1:rxgains5gelnagaina0", "1");
2291 nvram_set("1:rxgains5gelnagaina1", "1");
2292 nvram_set("1:rxgains5gelnagaina2", "1");
2293 nvram_set("1:rxgains5ghelnagaina0", "2");
2294 nvram_set("1:rxgains5ghelnagaina1", "2");
2295 nvram_set("1:rxgains5ghelnagaina2", "3");
2296 nvram_set("1:rxgains5ghtrelnabypa0", "1");
2297 nvram_set("1:rxgains5ghtrelnabypa1", "1");
2298 nvram_set("1:rxgains5ghtrelnabypa2", "1");
2299 nvram_set("1:rxgains5ghtrisoa0", "5");
2300 nvram_set("1:rxgains5ghtrisoa1", "4");
2301 nvram_set("1:rxgains5ghtrisoa2", "4");
2302 nvram_set("1:rxgains5gmelnagaina0", "2");
2303 nvram_set("1:rxgains5gmelnagaina1", "2");
2304 nvram_set("1:rxgains5gmelnagaina2", "3");
2305 nvram_set("1:rxgains5gmtrelnabypa0", "1");
2306 nvram_set("1:rxgains5gmtrelnabypa1", "1");
2307 nvram_set("1:rxgains5gmtrelnabypa2", "1");
2308 nvram_set("1:rxgains5gmtrisoa0", "5");
2309 nvram_set("1:rxgains5gmtrisoa1", "4");
2310 nvram_set("1:rxgains5gmtrisoa2", "4");
2311 nvram_set("1:rxgains5gtrelnabypa0", "1");
2312 nvram_set("1:rxgains5gtrelnabypa1", "1");
2313 nvram_set("1:rxgains5gtrelnabypa2", "1");
2314 nvram_set("1:rxgains5gtrisoa0", "7");
2315 nvram_set("1:rxgains5gtrisoa1", "6");
2316 nvram_set("1:rxgains5gtrisoa2", "5");
2317 nvram_set("1:sar2g", "18");
2318 nvram_set("1:sar5g", "15");
2319 nvram_set("1:sb20in40hrpo", "0");
2320 nvram_set("1:sb20in40lrpo", "0");
2321 nvram_set("1:sb20in80and160hr5ghpo", "0");
2322 nvram_set("1:sb20in80and160hr5glpo", "0");
2323 nvram_set("1:sb20in80and160hr5gmpo", "0");
2324 nvram_set("1:sb20in80and160lr5ghpo", "0");
2325 nvram_set("1:sb20in80and160lr5glpo", "0");
2326 nvram_set("1:sb20in80and160lr5gmpo", "0");
2327 nvram_set("1:sb40and80hr5ghpo", "0");
2328 nvram_set("1:sb40and80hr5glpo", "0");
2329 nvram_set("1:sb40and80hr5gmpo", "0");
2330 nvram_set("1:sb40and80lr5ghpo", "0");
2331 nvram_set("1:sb40and80lr5glpo", "0");
2332 nvram_set("1:sb40and80lr5gmpo", "0");
2333 nvram_set("1:sromrev", "11");
2334 nvram_set("1:subband5gver", "4");
2335 nvram_set("1:subvid", "0x14e4");
2336 nvram_set("1:tempcorrx", "0x3f");
2337 nvram_set("1:tempoffset", "255");
2338 nvram_set("1:temps_hysteresis", "15");
2339 nvram_set("1:temps_period", "15");
2340 nvram_set("1:tempsense_option", "0x3");
2341 nvram_set("1:tempsense_slope", "0xff");
2342 nvram_set("1:tempthresh", "255");
2343 nvram_set("1:tssiposslope2g", "1");
2344 nvram_set("1:tssiposslope5g", "1");
2345 nvram_set("1:tworangetssi2g", "0");
2346 nvram_set("1:tworangetssi5g", "0");
2347 nvram_set("1:txchain", "7");
2348 nvram_set("1:venid", "0x14e4");
2349 nvram_set("1:xtalfreq", "40000");
2356 features
= SUP_80211N
| SUP_1000ET
| SUP_80211AC
;
2358 nvram_set("usb_uhci", "-1");
2361 if (!nvram_match("t_fix1", (char *)name
)) {
2362 nvram_set("boot_wait", "on");
2363 nvram_set("wait_time", "10"); // failsafe for default R1D CFE
2364 nvram_set("uart_en", "1"); // failsafe for default R1D CFE
2365 nvram_set("router_name", "X-R1D");
2367 nvram_set("vlan1hwname", "et0");
2368 nvram_set("vlan2hwname", "et0");
2369 nvram_set("lan_ifname", "br0");
2370 nvram_set("landevs", "vlan1 wl0 wl1");
2371 nvram_set("lan_ifnames", "vlan1 eth1 eth2");
2372 nvram_set("wan_ifnames", "vlan2");
2373 nvram_set("wan_ifnameX", "vlan2");
2374 nvram_set("wandevs", "vlan2");
2375 nvram_set("wl_ifnames", "eth1 eth2");
2376 nvram_set("wl_ifname", "eth2");
2377 nvram_set("wl0_ifname", "eth2");
2378 nvram_set("wl1_ifname", "eth1");
2381 strcpy(s
, nvram_safe_get("et0macaddr"));
2383 nvram_set("pci/2/1/macaddr", s
);
2384 nvram_set("wl1_hwaddr", s
);
2386 nvram_set("pci/1/1/macaddr", s
);
2387 nvram_set("wl0_hwaddr", s
);
2389 // force 5G settings
2390 nvram_set("wl0_channel", "149");
2391 nvram_set("wl0_bw", "3");
2392 nvram_set("wl0_bw_cap", "7");
2393 nvram_set("wl0_chanspec", "149/80");
2394 nvram_set("wl0_nctrlsb", "lower");
2395 nvram_set("wl0_nband", "1");
2396 nvram_set("wl0_nbw", "80");
2397 nvram_set("wl0_nbw_cap", "3");
2398 // force 2G settings
2399 nvram_set("wl1_channel", "6");
2400 nvram_set("wl1_bw_cap","3");
2401 nvram_set("wl1_chanspec","6l");
2402 nvram_set("wl1_nctrlsb", "lower");
2403 nvram_set("wl1_nband", "2");
2404 nvram_set("wl1_nbw", "40");
2405 nvram_set("wl1_nbw_cap", "1");
2407 nvram_set("pci/1/1/ccode", "SG");
2408 nvram_set("pci/2/1/ccode", "SG");
2409 nvram_set("pci/1/1/regrev", "0");
2410 nvram_set("pci/2/1/regrev", "0");
2411 nvram_set("wl0_country", "SG");
2412 nvram_set("wl0_country_code", "SG");
2413 nvram_set("wl0_country_rev", "0");
2414 nvram_set("wl1_country", "SG");
2415 nvram_set("wl1_country_code", "SG");
2416 nvram_set("wl1_country_rev", "0");
2417 nvram_set("wl0_ssid", "MiWiFi_5G");
2418 nvram_set("wl1_ssid", "MiWiFi");
2421 nvram_set("usb_usb3", "0");
2422 nvram_set("xhci_ports", "1-1");
2423 nvram_set("ehci_ports", "2-1 2-2");
2424 nvram_set("ohci_ports", "3-1 3-2");
2426 // 2.4GHz module defaults
2427 nvram_set("pci/2/1/aa2g", "3");
2428 nvram_set("pci/2/1/ag0", "2");
2429 nvram_set("pci/2/1/ag1", "2");
2430 nvram_set("pci/2/1/antswctl2g", "0");
2431 nvram_set("pci/2/1/antswitch", "0");
2432 nvram_set("pci/2/1/boardflags", "0x80001000");
2433 nvram_set("pci/2/1/boardflags2", "0x00000800");
2434 nvram_set("pci/2/1/boardrev", "0x1301");
2435 nvram_set("pci/2/1/bw40po", "0");
2436 nvram_set("pci/2/1/bwduppo", "0");
2437 nvram_set("pci/2/1/bxa2g", "0");
2438 nvram_set("pci/2/1/cck2gpo", "0x8880");
2439 nvram_set("pci/2/1/cddpo", "0");
2440 nvram_set("pci/2/1/devid", "0x43A9");
2441 nvram_set("pci/2/1/elna2g", "2");
2442 nvram_set("pci/2/1/extpagain2g", "3");
2443 nvram_set("pci/2/1/freqoffset_corr", "0");
2444 nvram_set("pci/2/1/hw_iqcal_en", "0");
2445 nvram_set("pci/2/1/iqcal_swp_dis", "0");
2446 nvram_set("pci/2/1/itt2ga1", "32");
2447 nvram_set("pci/2/1/ledbh0", "255");
2448 nvram_set("pci/2/1/ledbh1", "255");
2449 nvram_set("pci/2/1/ledbh2", "255");
2450 nvram_set("pci/2/1/ledbh3", "131");
2451 nvram_set("pci/2/1/leddc", "65535");
2452 nvram_set("pci/2/1/maxp2ga0", "0x2072");
2453 nvram_set("pci/2/1/maxp2ga1", "0x2072");
2454 nvram_set("pci/2/1/mcs2gpo0", "0x8888");
2455 nvram_set("pci/2/1/mcs2gpo1", "0x8888");
2456 nvram_set("pci/2/1/mcs2gpo2", "0x8888");
2457 nvram_set("pci/2/1/mcs2gpo3", "0xDDB8");
2458 nvram_set("pci/2/1/mcs2gpo4", "0x8888");
2459 nvram_set("pci/2/1/mcs2gpo5", "0xA988");
2460 nvram_set("pci/2/1/mcs2gpo6", "0x8888");
2461 nvram_set("pci/2/1/mcs2gpo7", "0xDDC8");
2462 nvram_set("pci/2/1/measpower1", "0");
2463 nvram_set("pci/2/1/measpower2", "0");
2464 nvram_set("pci/2/1/measpower", "0");
2465 nvram_set("pci/2/1/ofdm2gpo", "0xAA888888");
2466 nvram_set("pci/2/1/opo", "68");
2467 nvram_set("pci/2/1/pa2gw0a0", "0xFE77");
2468 nvram_set("pci/2/1/pa2gw0a1", "0xFE76");
2469 nvram_set("pci/2/1/pa2gw1a0", "0x1C37");
2470 nvram_set("pci/2/1/pa2gw1a1", "0x1C5C");
2471 nvram_set("pci/2/1/pa2gw2a0", "0xF95D");
2472 nvram_set("pci/2/1/pa2gw2a1", "0xF94F");
2473 nvram_set("pci/2/1/pcieingress_war", "15");
2474 nvram_set("pci/2/1/pdetrange2g", "3");
2475 nvram_set("pci/2/1/phycal_tempdelta", "0");
2476 nvram_set("pci/2/1/rawtempsense", "0");
2477 nvram_set("pci/2/1/rssisav2g", "0");
2478 nvram_set("pci/2/1/rssismc2g", "0");
2479 nvram_set("pci/2/1/rssismf2g", "0");
2480 nvram_set("pci/2/1/rxchain", "3");
2481 nvram_set("pci/2/1/rxpo2g", "0");
2482 nvram_set("pci/2/1/sromrev", "8");
2483 nvram_set("pci/2/1/stbcpo", "0");
2484 nvram_set("pci/2/1/tempcorrx", "0");
2485 nvram_set("pci/2/1/tempoffset", "0");
2486 nvram_set("pci/2/1/temps_hysteresis", "0");
2487 nvram_set("pci/2/1/temps_period", "0");
2488 nvram_set("pci/2/1/tempsense_option", "0");
2489 nvram_set("pci/2/1/tempsense_slope", "0");
2490 nvram_set("pci/2/1/tempthresh", "120");
2491 nvram_set("pci/2/1/triso2g", "4");
2492 nvram_set("pci/2/1/tssipos2g", "1");
2493 nvram_set("pci/2/1/txchain", "3");
2495 // 5GHz module defaults
2496 nvram_set("pci/1/1/aa5g", "7");
2497 nvram_set("pci/1/1/aga0", "01");
2498 nvram_set("pci/1/1/aga1", "01");
2499 nvram_set("pci/1/1/aga2", "133");
2500 nvram_set("pci/1/1/antswitch", "0");
2501 nvram_set("pci/1/1/boardflags", "0x30000000");
2502 nvram_set("pci/1/1/boardflags2", "0x00300002");
2503 nvram_set("pci/1/1/boardflags3", "0x00000000");
2504 nvram_set("pci/1/1/boardvendor", "0x14E4");
2505 nvram_set("pci/1/1/devid", "0x43B3");
2506 nvram_set("pci/1/1/dot11agduphrpo", "0");
2507 nvram_set("pci/1/1/dot11agduplrpo", "0");
2508 nvram_set("pci/1/1/epagain5g", "0");
2509 nvram_set("pci/1/1/femctrl", "3");
2510 nvram_set("pci/1/1/gainctrlsph", "0");
2511 nvram_set("pci/1/1/maxp5ga0", "0x5E,0x5E,0x5E,0x5E");
2512 nvram_set("pci/1/1/maxp5ga1", "0x5E,0x5E,0x5E,0x5E");
2513 nvram_set("pci/1/1/maxp5ga2", "0x5E,0x5E,0x5E,0x5E");
2514 nvram_set("pci/1/1/mcsbw1605ghpo", "0");
2515 nvram_set("pci/1/1/mcsbw1605glpo", "0");
2516 nvram_set("pci/1/1/mcsbw1605gmpo", "0");
2517 nvram_set("pci/1/1/mcsbw205ghpo", "0x55540000");
2518 nvram_set("pci/1/1/mcsbw205glpo", "0x88642222");
2519 nvram_set("pci/1/1/mcsbw205gmpo", "0x88642222");
2520 nvram_set("pci/1/1/mcsbw405ghpo", "0x85542000");
2521 nvram_set("pci/1/1/mcsbw405glpo", "0xA8842222");
2522 nvram_set("pci/1/1/mcsbw405gmpo", "0xA8842222");
2523 nvram_set("pci/1/1/mcsbw805ghpo", "0x85542000");
2524 nvram_set("pci/1/1/mcsbw805glpo", "0xAA842222");
2525 nvram_set("pci/1/1/mcsbw805gmpo", "0xAA842222");
2526 nvram_set("pci/1/1/mcslr5ghpo", "0");
2527 nvram_set("pci/1/1/mcslr5glpo", "0");
2528 nvram_set("pci/1/1/mcslr5gmpo", "0");
2529 nvram_set("pci/1/1/measpower1", "0x7F");
2530 nvram_set("pci/1/1/measpower2", "0x7F");
2531 nvram_set("pci/1/1/measpower", "0x7F");
2532 nvram_set("pci/1/1/pa5ga0", "0xFF90,0x1E37,0xFCB8,0xFF38,0x189B,0xFD00,0xFF33,0x1A66,0xFCC4,0xFF2F,0x1748,0xFD21");
2533 nvram_set("pci/1/1/pa5ga1", "0xFF1B,0x18A2,0xFCB6,0xFF34,0x183F,0xFD12,0xFF37,0x1AA1,0xFCC0,0xFF2F,0x1889,0xFCFB");
2534 nvram_set("pci/1/1/pa5ga2", "0xFF1D,0x1653,0xFD33,0xFF38,0x1A2A,0xFCCE,0xFF35,0x1A93,0xFCC1,0xFF3A,0x1ABD,0xFCC0");
2535 nvram_set("pci/1/1/papdcap5g", "0");
2536 nvram_set("pci/1/1/pcieingress_war", "15");
2537 nvram_set("pci/1/1/pdgain5g", "4");
2538 nvram_set("pci/1/1/pdoffset40ma0", "0x1111");
2539 nvram_set("pci/1/1/pdoffset40ma1", "0x1111");
2540 nvram_set("pci/1/1/pdoffset40ma2", "0x1111");
2541 nvram_set("pci/1/1/pdoffset80ma0", "0");
2542 nvram_set("pci/1/1/pdoffset80ma1", "0");
2543 nvram_set("pci/1/1/pdoffset80ma2", "0");
2544 nvram_set("pci/1/1/phycal_tempdelta", "255");
2545 nvram_set("pci/1/1/rawtempsense", "0x1FF");
2546 nvram_set("pci/1/1/rxchain", "7");
2547 nvram_set("pci/1/1/rxgains5gelnagaina0", "1");
2548 nvram_set("pci/1/1/rxgains5gelnagaina1", "1");
2549 nvram_set("pci/1/1/rxgains5gelnagaina2", "1");
2550 nvram_set("pci/1/1/rxgains5ghelnagaina0", "2");
2551 nvram_set("pci/1/1/rxgains5ghelnagaina1", "2");
2552 nvram_set("pci/1/1/rxgains5ghelnagaina2", "3");
2553 nvram_set("pci/1/1/rxgains5ghtrelnabypa0", "1");
2554 nvram_set("pci/1/1/rxgains5ghtrelnabypa1", "1");
2555 nvram_set("pci/1/1/rxgains5ghtrelnabypa2", "1");
2556 nvram_set("pci/1/1/rxgains5ghtrisoa0", "5");
2557 nvram_set("pci/1/1/rxgains5ghtrisoa1", "4");
2558 nvram_set("pci/1/1/rxgains5ghtrisoa2", "4");
2559 nvram_set("pci/1/1/rxgains5gmelnagaina0", "2");
2560 nvram_set("pci/1/1/rxgains5gmelnagaina1", "2");
2561 nvram_set("pci/1/1/rxgains5gmelnagaina2", "3");
2562 nvram_set("pci/1/1/rxgains5gmtrelnabypa0", "1");
2563 nvram_set("pci/1/1/rxgains5gmtrelnabypa1", "1");
2564 nvram_set("pci/1/1/rxgains5gmtrelnabypa2", "1");
2565 nvram_set("pci/1/1/rxgains5gmtrisoa0", "5");
2566 nvram_set("pci/1/1/rxgains5gmtrisoa1", "4");
2567 nvram_set("pci/1/1/rxgains5gmtrisoa2", "4");
2568 nvram_set("pci/1/1/rxgains5gtrelnabypa0", "1");
2569 nvram_set("pci/1/1/rxgains5gtrelnabypa1", "1");
2570 nvram_set("pci/1/1/rxgains5gtrelnabypa2", "1");
2571 nvram_set("pci/1/1/rxgains5gtrisoa0", "7");
2572 nvram_set("pci/1/1/rxgains5gtrisoa1", "6");
2573 nvram_set("pci/1/1/rxgains5gtrisoa2", "5");
2574 nvram_set("pci/1/1/sar5g", "15");
2575 nvram_set("pci/1/1/sb20in40hrpo", "0");
2576 nvram_set("pci/1/1/sb20in40lrpo", "0");
2577 nvram_set("pci/1/1/sb20in80and160hr5ghpo", "0");
2578 nvram_set("pci/1/1/sb20in80and160hr5glpo", "0");
2579 nvram_set("pci/1/1/sb20in80and160hr5gmpo", "0");
2580 nvram_set("pci/1/1/sb20in80and160lr5ghpo", "0");
2581 nvram_set("pci/1/1/sb20in80and160lr5glpo", "0");
2582 nvram_set("pci/1/1/sb20in80and160lr5gmpo", "0");
2583 nvram_set("pci/1/1/sb40and80hr5ghpo", "0");
2584 nvram_set("pci/1/1/sb40and80hr5glpo", "0");
2585 nvram_set("pci/1/1/sb40and80hr5gmpo", "0");
2586 nvram_set("pci/1/1/sb40and80lr5ghpo", "0");
2587 nvram_set("pci/1/1/sb40and80lr5glpo", "0");
2588 nvram_set("pci/1/1/sb40and80lr5gmpo", "0");
2589 nvram_set("pci/1/1/sromrev", "11");
2590 nvram_set("pci/1/1/subband5gver", "4");
2591 nvram_set("pci/1/1/tempcorrx", "0x3F");
2592 nvram_set("pci/1/1/tempoffset", "255");
2593 nvram_set("pci/1/1/temps_hysteresis", "15");
2594 nvram_set("pci/1/1/temps_period", "15");
2595 nvram_set("pci/1/1/tempsense_option", "3");
2596 nvram_set("pci/1/1/tempsense_slope", "255");
2597 nvram_set("pci/1/1/tempthresh", "255");
2598 nvram_set("pci/1/1/tssiposslope5g", "1");
2599 nvram_set("pci/1/1/tworangetssi5g", "0");
2600 nvram_set("pci/1/1/txchain", "7");
2601 nvram_set("pci/1/1/venid", "0x14E4");
2602 nvram_set("pci/1/1/xtalfreq", "0x40000");
2606 mfr
= "Cisco Linksys";
2607 if (strstr(nvram_safe_get("modelNumber"), "EA6500") != NULL
)
2611 features
= SUP_SES
| SUP_80211N
| SUP_1000ET
| SUP_80211AC
;
2614 nvram_set("usb_uhci", "-1");
2616 if (!nvram_match("t_fix1", (char *)name
)) {
2617 nvram_set("vlan1hwname", "et0");
2618 nvram_set("vlan2hwname", "et0");
2619 nvram_set("lan_ifname", "br0");
2620 nvram_set("landevs", "vlan1 wl0 wl1");
2621 nvram_set("lan_ifnames", "vlan1 eth1 eth2");
2622 nvram_set("wan_ifnames", "vlan2");
2623 nvram_set("wan_ifnameX", "vlan2");
2624 nvram_set("wandevs", "vlan2");
2625 nvram_set("wl_ifnames", "eth1 eth2");
2626 nvram_set("wl_ifname", "eth1");
2627 nvram_set("wl0_ifname", "eth1");
2628 nvram_set("wl1_ifname", "eth2");
2629 //nvram_set("wl0_country_code", "Q2");
2630 //nvram_set("wl1_country_code", "Q2");
2631 //nvram_set("wl0_country_rev", "33");
2632 //nvram_set("wl1_country_rev", "33");
2634 nvram_set("0:ccode", "#a");
2635 nvram_set("1:ccode", "#a");
2636 nvram_set("0:regrev", "0");
2637 nvram_set("1:regrev", "0");
2638 nvram_set("wl0_country_code", "#a");
2639 nvram_set("wl0_country_rev", "0");
2640 nvram_set("wl0_reg_mode", "off");
2641 nvram_set("wl1_country_code", "#a");
2642 nvram_set("wl1_country_rev", "0");
2643 nvram_set("wl1_reg_mode", "off");
2646 strcpy(s
, nvram_safe_get("et0macaddr"));
2648 nvram_set("0:macaddr", s
);
2650 nvram_set("1:macaddr", s
);
2653 nvram_set("usb_usb3", "1");
2654 nvram_set("xhci_ports", "1-1");
2655 nvram_set("ehci_ports", "2-1 2-2");
2656 nvram_set("ohci_ports", "3-1 3-2");
2659 nvram_set("boot_wait", "on");
2660 nvram_set("wait_time", "1");
2662 // 2.4GHz module defaults
2663 //nvram_set("devpath0", "pci/1/1");
2664 nvram_set("0:aa2g", "7");
2665 nvram_set("0:ag0", "0");
2666 nvram_set("0:ag1", "0");
2667 nvram_set("0:ag2", "0");
2668 nvram_set("0:antswctl2g", "0");
2669 nvram_set("0:antswitch", "0");
2670 nvram_set("0:boardflags2", "0x00100000");
2671 nvram_set("0:boardflags", "0x80001200");
2672 nvram_set("0:cckbw202gpo", "0x4444");
2673 nvram_set("0:cckbw20ul2gpo", "0x4444");
2674 nvram_set("0:devid", "0x4332");
2675 nvram_set("0:elna2g", "2");
2676 nvram_set("0:extpagain2g", "3");
2677 nvram_set("0:ledbh0", "11");
2678 nvram_set("0:ledbh1", "11");
2679 nvram_set("0:ledbh2", "11");
2680 nvram_set("0:ledbh3", "11");
2681 nvram_set("0:ledbh12", "2");
2682 nvram_set("0:leddc", "0xFFFF");
2683 nvram_set("0:legofdm40duppo", "0x0");
2684 nvram_set("0:legofdmbw202gpo", "0x55553300");
2685 nvram_set("0:legofdmbw20ul2gpo", "0x55553300");
2686 nvram_set("0:maxp2ga0", "0x60");
2687 nvram_set("0:maxp2ga1", "0x60");
2688 nvram_set("0:maxp2ga2", "0x60");
2689 nvram_set("0:mcs32po", "0x0006");
2690 nvram_set("0:mcsbw202gpo", "0xAA997755");
2691 nvram_set("0:mcsbw20ul2gpo", "0xAA997755");
2692 nvram_set("0:mcsbw402gpo", "0xAA997755");
2693 nvram_set("0:pa2gw0a0", "0xFE7C");
2694 nvram_set("0:pa2gw0a1", "0xFE85");
2695 nvram_set("0:pa2gw0a2", "0xFE82");
2696 nvram_set("0:pa2gw1a0", "0x1E9B");
2697 nvram_set("0:pa2gw1a1", "0x1EA5");
2698 nvram_set("0:pa2gw1a2", "0x1EC5");
2699 nvram_set("0:pa2gw2a0", "0xF8B4");
2700 nvram_set("0:pa2gw2a1", "0xF8C0");
2701 nvram_set("0:pa2gw2a2", "0xF8B8");
2702 nvram_set("0:parefldovoltage", "60");
2703 nvram_set("0:pdetrange2g", "3");
2704 nvram_set("0:phycal_tempdelta", "0");
2705 nvram_set("0:rxchain", "7");
2706 nvram_set("0:sromrev", "9");
2707 nvram_set("0:temps_hysteresis", "5");
2708 nvram_set("0:temps_period", "5");
2709 nvram_set("0:tempthresh", "120");
2710 nvram_set("0:tssipos2g", "1");
2711 nvram_set("0:txchain", "7");
2712 nvram_set("0:venid", "0x14E4");
2713 nvram_set("0:xtalfreq", "20000");
2715 // 5GHz module defaults
2716 nvram_set("1:aa2g", "7");
2717 nvram_set("1:aa5g", "7");
2718 nvram_set("1:aga0", "0");
2719 nvram_set("1:aga1", "0");
2720 nvram_set("1:aga2", "0");
2721 nvram_set("1:antswitch", "0");
2722 nvram_set("1:boardflags2", "0x00200002");
2723 nvram_set("1:boardflags3", "0x0");
2724 nvram_set("1:boardflags", "0x30000000");
2725 nvram_set("1:devid", "0x43A2");
2726 nvram_set("1:dot11agduphrpo", "0");
2727 nvram_set("1:dot11agduplrpo", "0");
2728 nvram_set("1:epagain5g", "0");
2729 nvram_set("1:femctrl", "3");
2730 nvram_set("1:gainctrlsph", "0");
2731 nvram_set("1:ledbh0", "11");
2732 nvram_set("1:ledbh1", "11");
2733 nvram_set("1:ledbh2", "11");
2734 nvram_set("1:ledbh3", "11");
2735 nvram_set("1:ledbh10", "2");
2736 nvram_set("1:leddc", "0xFFFF");
2737 nvram_set("1:maxp5ga0", "0x5C,0x5C,0x5C,0x5C");
2738 nvram_set("1:maxp5ga1", "0x5C,0x5C,0x5C,0x5C");
2739 nvram_set("1:maxp5ga2", "0x5C,0x5C,0x5C,0x5C");
2740 nvram_set("1:mcsbw1605ghpo", "0");
2741 nvram_set("1:mcsbw1605glpo", "0");
2742 nvram_set("1:mcsbw1605gmpo", "0");
2743 nvram_set("1:mcsbw205ghpo", "0xDD553300");
2744 nvram_set("1:mcsbw205glpo", "0xDD553300");
2745 nvram_set("1:mcsbw205gmpo", "0xDD553300");
2746 nvram_set("1:mcsbw405ghpo", "0xEE885544");
2747 nvram_set("1:mcsbw405glpo", "0xEE885544");
2748 nvram_set("1:mcsbw405gmpo", "0xEE885544");
2749 nvram_set("1:mcsbw805ghpo", "0xEE885544");
2750 nvram_set("1:mcsbw805glpo", "0xEE885544");
2751 nvram_set("1:mcsbw805gmpo", "0xEE885544");
2752 nvram_set("1:mcslr5ghpo", "0");
2753 nvram_set("1:mcslr5glpo", "0");
2754 nvram_set("1:mcslr5gmpo", "0");
2755 nvram_set("1:pa5ga0", "0xff2b,0x1898,0xfcf2,0xff2c,0x1947,0xfcda,0xff33,0x18f9,0xfcec,0xff2d,0x18ef,0xfce4");
2756 nvram_set("1:pa5ga1", "0xff31,0x1930,0xfce3,0xff30,0x1974,0xfcd9,0xff31,0x18db,0xfcee,0xff37,0x194e,0xfce1");
2757 nvram_set("1:pa5ga2", "0xff2e,0x193c,0xfcde,0xff2c,0x1831,0xfcf9,0xff30,0x18c6,0xfcef,0xff30,0x1942,0xfce0");
2758 nvram_set("1:papdcap5g", "0");
2759 nvram_set("1:pdgain5g", "4");
2760 nvram_set("1:pdoffset40ma0", "0x1111");
2761 nvram_set("1:pdoffset40ma1", "0x1111");
2762 nvram_set("1:pdoffset40ma2", "0x1111");
2763 nvram_set("1:pdoffset80ma0", "0");
2764 nvram_set("1:pdoffset80ma1", "0");
2765 nvram_set("1:pdoffset80ma2", "0");
2766 nvram_set("1:phycal_tempdelta", "0");
2767 nvram_set("1:rxchain", "7");
2768 nvram_set("1:rxgains5gelnagaina0", "1");
2769 nvram_set("1:rxgains5gelnagaina1", "1");
2770 nvram_set("1:rxgains5gelnagaina2", "1");
2771 nvram_set("1:rxgains5ghelnagaina0", "2");
2772 nvram_set("1:rxgains5ghelnagaina1", "2");
2773 nvram_set("1:rxgains5ghelnagaina2", "3");
2774 nvram_set("1:rxgains5ghtrelnabypa0", "1");
2775 nvram_set("1:rxgains5ghtrelnabypa1", "1");
2776 nvram_set("1:rxgains5ghtrelnabypa2", "1");
2777 nvram_set("1:rxgains5ghtrisoa0", "5");
2778 nvram_set("1:rxgains5ghtrisoa1", "4");
2779 nvram_set("1:rxgains5ghtrisoa2", "4");
2780 nvram_set("1:rxgains5gmelnagaina0", "2");
2781 nvram_set("1:rxgains5gmelnagaina1", "2");
2782 nvram_set("1:rxgains5gmelnagaina2", "3");
2783 nvram_set("1:rxgains5gmtrelnabypa0", "1");
2784 nvram_set("1:rxgains5gmtrelnabypa1", "1");
2785 nvram_set("1:rxgains5gmtrelnabypa2", "1");
2786 nvram_set("1:rxgains5gmtrisoa0", "5");
2787 nvram_set("1:rxgains5gmtrisoa1", "4");
2788 nvram_set("1:rxgains5gmtrisoa2", "4");
2789 nvram_set("1:rxgains5gtrelnabypa0", "1");
2790 nvram_set("1:rxgains5gtrelnabypa1", "1");
2791 nvram_set("1:rxgains5gtrelnabypa2", "1");
2792 nvram_set("1:rxgains5gtrisoa0", "7");
2793 nvram_set("1:rxgains5gtrisoa1", "6");
2794 nvram_set("1:rxgains5gtrisoa2", "5");
2795 nvram_set("1:sar2g", "18");
2796 nvram_set("1:sar5g", "15");
2797 nvram_set("1:sb20in40hrpo", "0");
2798 nvram_set("1:sb20in40lrpo", "0");
2799 nvram_set("1:sb20in80and160hr5ghpo", "0");
2800 nvram_set("1:sb20in80and160hr5glpo", "0");
2801 nvram_set("1:sb20in80and160hr5gmpo", "0");
2802 nvram_set("1:sb20in80and160lr5ghpo", "0");
2803 nvram_set("1:sb20in80and160lr5glpo", "0");
2804 nvram_set("1:sb20in80and160lr5gmpo", "0");
2805 nvram_set("1:sb40and80hr5ghpo", "0");
2806 nvram_set("1:sb40and80hr5glpo", "0");
2807 nvram_set("1:sb40and80hr5gmpo", "0");
2808 nvram_set("1:sb40and80lr5ghpo", "0");
2809 nvram_set("1:sb40and80lr5glpo", "0");
2810 nvram_set("1:sb40and80lr5gmpo", "0");
2811 nvram_set("1:sromrev", "11");
2812 nvram_set("1:subband5gver", "4");
2813 nvram_set("1:tempoffset", "0");
2814 nvram_set("1:temps_hysteresis", "5");
2815 nvram_set("1:temps_period", "5");
2816 nvram_set("1:tempthresh", "120");
2817 nvram_set("1:tssiposslope5g", "1");
2818 nvram_set("1:tworangetssi5g", "0");
2819 nvram_set("1:txchain", "7");
2820 nvram_set("1:venid", "0x14E4");
2821 nvram_set("1:xtalfreq", "40000");
2823 nvram_set("acs_2g_ch_no_ovlp", "1");
2824 nvram_set("acs_2g_ch_no_restrict", "1");
2826 nvram_set("devpath0", "pci/1/1/");
2827 nvram_set("devpath1", "pci/2/1/");
2828 nvram_set("partialboots", "0");
2834 features
= SUP_SES
| SUP_80211N
| SUP_1000ET
| SUP_80211AC
;
2837 nvram_set("usb_uhci", "-1");
2839 if (!nvram_match("t_fix1", (char *)name
)) {
2840 nvram_set("vlan1hwname", "et0");
2841 nvram_set("vlan2hwname", "et0");
2842 nvram_set("lan_ifname", "br0");
2843 nvram_set("landevs", "vlan1 wl0 wl1");
2844 nvram_set("lan_ifnames", "vlan1 eth1 eth2");
2845 nvram_set("wan_ifnames", "vlan2");
2846 nvram_set("wan_ifnameX", "vlan2");
2847 nvram_set("wandevs", "vlan2");
2848 nvram_set("wl_ifnames", "eth1 eth2");
2849 nvram_set("wl_ifname", "eth1");
2850 nvram_set("wl0_ifname", "eth1");
2851 nvram_set("wl1_ifname", "eth2");
2852 //nvram_set("wl0_country_code", "Q2");
2853 //nvram_set("wl1_country_code", "Q2");
2854 //nvram_set("wl0_country_rev", "33");
2855 //nvram_set("wl1_country_rev", "33");
2857 nvram_set("0:ccode", "#a");
2858 nvram_set("1:ccode", "#a");
2859 nvram_set("0:regrev", "0");
2860 nvram_set("1:regrev", "0");
2861 nvram_set("wl0_country_code", "#a");
2862 nvram_set("wl0_country_rev", "0");
2863 nvram_set("wl0_reg_mode", "off");
2864 nvram_set("wl1_country_code", "#a");
2865 nvram_set("wl1_country_rev", "0");
2866 nvram_set("wl1_reg_mode", "off");
2869 strcpy(s
, nvram_safe_get("et0macaddr"));
2871 nvram_set("0:macaddr", s
);
2873 nvram_set("1:macaddr", s
);
2876 nvram_set("usb_usb3", "1");
2877 nvram_set("xhci_ports", "1-1");
2878 nvram_set("ehci_ports", "2-1 2-2");
2879 nvram_set("ohci_ports", "3-1 3-2");
2882 nvram_set("boot_wait", "on");
2883 nvram_set("wait_time", "1");
2885 // 2.4GHz module defaults
2886 nvram_set("0:aa2g", "7");
2887 nvram_set("0:agbg0", "0x47");
2888 nvram_set("0:agbg1", "0x47");
2889 nvram_set("0:agbg2", "0x47");
2890 nvram_set("0:antswitch", "0");
2891 nvram_set("0:boardflags", "0x00001000");
2892 nvram_set("0:boardflags2", "0x00100002");
2893 nvram_set("0:boardflags3", "0x00000003");
2894 nvram_set("0:cckbw202gpo", "0x0");
2895 nvram_set("0:cckbw20ul2gpo", "0x0");
2896 nvram_set("0:devid", "0x43A1");
2897 nvram_set("0:dot11agduphrpo", "0x0");
2898 nvram_set("0:dot11agduplrpo", "0x0");
2899 nvram_set("0:dot11agofdmhrbw202gpo", "0x6666");
2900 nvram_set("0:epagain2g", "0");
2901 nvram_set("0:femctrl", "3");
2902 nvram_set("0:gainctrlsph", "0");
2903 nvram_set("0:ledbh0", "0xFF");
2904 nvram_set("0:ledbh1", "0xFF");
2905 nvram_set("0:ledbh10", "2");
2906 nvram_set("0:ledbh2", "0xFF");
2907 nvram_set("0:ledbh3", "0xFF");
2908 nvram_set("0:leddc", "0xFFFF");
2909 nvram_set("0:maxp2ga0", "0x62");
2910 nvram_set("0:maxp2ga1", "0x62");
2911 nvram_set("0:maxp2ga2", "0x62");
2912 nvram_set("0:mcsbw202gpo", "0xCC666600");
2913 nvram_set("0:mcsbw402gpo", "0xCC666600");
2914 nvram_set("0:ofdmlrbw202gpo", "0x0");
2915 nvram_set("0:pa2ga0", "0xff22,0x1a4f,0xfcc1");
2916 nvram_set("0:pa2ga1", "0xff22,0x1a71,0xfcbb");
2917 nvram_set("0:pa2ga2", "0xff1f,0x1a21,0xfcc2");
2918 nvram_set("0:papdcap2g", "0");
2919 nvram_set("0:parefldovoltage", "35");
2920 nvram_set("0:pdgain2g", "14");
2921 nvram_set("0:pdoffset2g40ma0", "0x3");
2922 nvram_set("0:pdoffset2g40ma1", "0x3");
2923 nvram_set("0:pdoffset2g40ma2", "0x3");
2924 nvram_set("0:phycal_tempdelta", "0");
2925 //nvram_set("0:rpcal2g", "47823");
2926 nvram_set("0:rpcal2g", "53985");
2927 nvram_set("0:rxchain", "7");
2928 nvram_set("0:rxgains2gelnagaina0", "4");
2929 nvram_set("0:rxgains2gelnagaina1", "4");
2930 nvram_set("0:rxgains2gelnagaina2", "4");
2931 nvram_set("0:rxgains2gtrelnabypa0", "1");
2932 nvram_set("0:rxgains2gtrelnabypa1", "1");
2933 nvram_set("0:rxgains2gtrelnabypa2", "1");
2934 nvram_set("0:rxgains2gtrisoa0", "7");
2935 nvram_set("0:rxgains2gtrisoa1", "7");
2936 nvram_set("0:rxgains2gtrisoa2", "7");
2937 nvram_set("0:sb20in40hrpo", "0x0");
2938 nvram_set("0:sb20in40lrpo", "0x0");
2939 nvram_set("0:sromrev", "11");
2940 nvram_set("0:tempoffset", "0");
2941 nvram_set("0:temps_hysteresis", "5");
2942 nvram_set("0:temps_period", "5");
2943 nvram_set("0:tempthresh", "120");
2944 nvram_set("0:tssiposslope2g", "1");
2945 nvram_set("0:tworangetssi2g", "0");
2946 nvram_set("0:txchain", "7");
2947 nvram_set("0:venid", "0x14E4");
2948 nvram_set("0:xtalfreq", "40000");
2950 // 5GHz module defaults
2951 nvram_set("1:aa5g", "7");
2952 nvram_set("1:aga0", "0");
2953 nvram_set("1:aga1", "0");
2954 nvram_set("1:aga2", "0");
2955 nvram_set("1:antswitch", "0");
2956 nvram_set("1:boardflags", "0x30000000");
2957 nvram_set("1:boardflags2", "0x00200002");
2958 nvram_set("1:boardflags3", "0x00000000");
2959 nvram_set("1:devid", "0x43A2");
2960 nvram_set("1:dot11agduphrpo", "0x0");
2961 nvram_set("1:dot11agduplrpo", "0x0");
2962 nvram_set("1:epagain5g", "0");
2963 nvram_set("1:femctrl", "3");
2964 nvram_set("1:gainctrlsph", "0");
2965 nvram_set("1:ledbh0", "11");
2966 nvram_set("1:ledbh1", "11");
2967 nvram_set("1:ledbh10", "2");
2968 nvram_set("1:ledbh2", "11");
2969 nvram_set("1:ledbh3", "11");
2970 nvram_set("1:leddc", "0xFFFF");
2971 nvram_set("1:maxp5ga0", "0x5C,0x5C,0x5C,0x5C");
2972 nvram_set("1:maxp5ga1", "0x5C,0x5C,0x5C,0x5C");
2973 nvram_set("1:maxp5ga2", "0x5C,0x5C,0x5C,0x5C");
2974 nvram_set("1:mcsbw205ghpo", "0xBB555500");
2975 nvram_set("1:mcsbw205glpo", "0xBB555500");
2976 nvram_set("1:mcsbw205gmpo", "0xBB555500");
2977 nvram_set("1:mcsbw405ghpo", "0xBB777700");
2978 nvram_set("1:mcsbw405glpo", "0xBB777700");
2979 nvram_set("1:mcsbw405gmpo", "0xBB777700");
2980 nvram_set("1:mcsbw805ghpo", "0xBB777700");
2981 nvram_set("1:mcsbw805glpo", "0xBB777733");
2982 nvram_set("1:mcsbw805gmpo", "0xBB777700");
2983 nvram_set("1:mcslr5ghpo", "0x0");
2984 nvram_set("1:mcslr5glpo", "0x0");
2985 nvram_set("1:mcslr5gmpo", "0x0");
2986 nvram_set("1:pa5ga0", "0xff2e,0x185a,0xfcfc,0xff37,0x1903,0xfcf1,0xff4b,0x197f,0xfcff,0xff37,0x180f,0xfd12");
2987 nvram_set("1:pa5ga1", "0xff33,0x1944,0xfce5,0xff30,0x18c6,0xfcf5,0xff40,0x19c7,0xfce5,0xff38,0x18cc,0xfcf9");
2988 nvram_set("1:pa5ga2", "0xff34,0x1962,0xfce1,0xff35,0x193b,0xfceb,0xff38,0x1921,0xfcf1,0xff39,0x188f,0xfd00");
2989 nvram_set("1:papdcap5g", "0");
2990 nvram_set("1:parefldovoltage", "35");
2991 nvram_set("1:pdgain5g", "4");
2992 nvram_set("1:pdoffset40ma0", "0x1111");
2993 nvram_set("1:pdoffset40ma1", "0x1111");
2994 nvram_set("1:pdoffset40ma2", "0x1111");
2995 nvram_set("1:pdoffset80ma0", "0xEEEE");
2996 nvram_set("1:pdoffset80ma1", "0xEEEE");
2997 nvram_set("1:pdoffset80ma2", "0xEEEE");
2998 nvram_set("1:phycal_tempdelta", "0");
2999 //nvram_set("1:rpcal5gb0", "32015");
3000 //nvram_set("1:rpcal5gb3", "35617");
3001 nvram_set("1:rpcal5gb0", "41773");
3002 nvram_set("1:rpcal5gb3", "42547");
3003 nvram_set("1:rxchain", "7");
3004 nvram_set("1:rxgains5gelnagaina0", "1");
3005 nvram_set("1:rxgains5gelnagaina1", "1");
3006 nvram_set("1:rxgains5gelnagaina2", "1");
3007 nvram_set("1:rxgains5ghelnagaina0", "2");
3008 nvram_set("1:rxgains5ghelnagaina1", "2");
3009 nvram_set("1:rxgains5ghelnagaina2", "3");
3010 nvram_set("1:rxgains5ghtrelnabypa0", "1");
3011 nvram_set("1:rxgains5ghtrelnabypa1", "1");
3012 nvram_set("1:rxgains5ghtrelnabypa2", "1");
3013 nvram_set("1:rxgains5ghtrisoa0", "5");
3014 nvram_set("1:rxgains5ghtrisoa1", "4");
3015 nvram_set("1:rxgains5ghtrisoa2", "4");
3016 nvram_set("1:rxgains5gmelnagaina0", "2");
3017 nvram_set("1:rxgains5gmelnagaina1", "2");
3018 nvram_set("1:rxgains5gmelnagaina2", "3");
3019 nvram_set("1:rxgains5gmtrelnabypa0", "1");
3020 nvram_set("1:rxgains5gmtrelnabypa1", "1");
3021 nvram_set("1:rxgains5gmtrelnabypa2", "1");
3022 nvram_set("1:rxgains5gmtrisoa0", "5");
3023 nvram_set("1:rxgains5gmtrisoa1", "4");
3024 nvram_set("1:rxgains5gmtrisoa2", "4");
3025 nvram_set("1:rxgains5gtrelnabypa0", "1");
3026 nvram_set("1:rxgains5gtrelnabypa1", "1");
3027 nvram_set("1:rxgains5gtrelnabypa2", "1");
3028 nvram_set("1:rxgains5gtrisoa0", "7");
3029 nvram_set("1:rxgains5gtrisoa1", "6");
3030 nvram_set("1:rxgains5gtrisoa2", "5");
3031 nvram_set("1:sb20in40hrpo", "0x0");
3032 nvram_set("1:sb20in40lrpo", "0x0");
3033 nvram_set("1:sb20in80and160hr5ghpo", "0x0");
3034 nvram_set("1:sb20in80and160hr5glpo", "0x0");
3035 nvram_set("1:sb20in80and160hr5gmpo", "0x0");
3036 nvram_set("1:sb20in80and160lr5ghpo", "0x0");
3037 nvram_set("1:sb20in80and160lr5glpo", "0x0");
3038 nvram_set("1:sb20in80and160lr5gmpo", "0x0");
3039 nvram_set("1:sb40and80hr5ghpo", "0x0");
3040 nvram_set("1:sb40and80hr5glpo", "0x0");
3041 nvram_set("1:sb40and80hr5gmpo", "0x0");
3042 nvram_set("1:sb40and80lr5ghpo", "0x0");
3043 nvram_set("1:sb40and80lr5glpo", "0x0");
3044 nvram_set("1:sb40and80lr5gmpo", "0x0");
3045 nvram_set("1:sromrev", "11");
3046 nvram_set("1:subband5gver", "4");
3047 nvram_set("1:tempoffset", "0");
3048 nvram_set("1:temps_hysteresis", "5");
3049 nvram_set("1:temps_period", "5");
3050 nvram_set("1:tempthresh", "120");
3051 nvram_set("1:tssiposslope5g", "1");
3052 nvram_set("1:tworangetssi5g", "0");
3053 nvram_set("1:txchain", "7");
3054 nvram_set("1:venid", "0x14E4");
3055 nvram_set("1:xtalfreq", "40000");
3057 nvram_set("acs_2g_ch_no_ovlp", "1");
3058 nvram_set("acs_2g_ch_no_restrict", "1");
3060 nvram_set("devpath0", "pci/1/1/");
3061 nvram_set("devpath1", "pci/2/1/");
3062 nvram_set("partialboots", "0");
3067 name
= "WZR-1750DHP";
3068 features
= SUP_SES
| SUP_80211N
| SUP_1000ET
| SUP_80211AC
;
3071 nvram_set("usb_uhci", "-1");
3073 if (!nvram_match("t_fix1", (char *)name
)) {
3074 nvram_set("vlan1hwname", "et0");
3075 nvram_set("vlan2hwname", "et0");
3076 nvram_set("lan_ifname", "br0");
3077 nvram_set("landevs", "vlan1 wl0 wl1");
3078 nvram_set("lan_ifnames", "vlan1 eth1 eth2");
3079 nvram_set("wan_ifnames", "vlan2");
3080 nvram_set("wan_ifnameX", "vlan2");
3081 nvram_set("wandevs", "vlan2");
3082 nvram_set("wl_ifnames", "eth2 eth1");
3083 nvram_set("wl_ifname", "eth2");
3084 nvram_set("wl0_ifname", "eth2");
3085 nvram_set("wl1_ifname", "eth1");
3087 // force wl settings
3088 nvram_set("wl0_bw", "3");
3089 nvram_set("wl0_bw_cap", "7");
3090 nvram_set("wl0_chanspec", "149/80");
3091 nvram_set("wl0_nctrlsb", "lower");
3092 nvram_set("1:ccode", "SG");
3093 nvram_set("0:ccode", "SG");
3094 nvram_set("1:regrev", "0");
3095 nvram_set("0:regrev", "0");
3096 nvram_set("wl_country", "SG");
3097 nvram_set("wl_country_code", "SG");
3099 // fix WL mac for 2,4G
3100 nvram_set("wl0_hwaddr", nvram_safe_get("0:macaddr"));
3102 // fix WL mac for 5G
3103 strcpy(s
, nvram_safe_get("0:macaddr"));
3105 nvram_set("wl1_hwaddr", s
);
3108 nvram_set("usb_usb3", "1");
3109 nvram_set("xhci_ports", "1-1");
3110 nvram_set("ehci_ports", "2-1 2-2");
3111 nvram_set("ohci_ports", "3-1 3-2");
3114 nvram_set("boot_wait", "on");
3115 nvram_set("wait_time", "1");
3117 // 2.4GHz module defaults
3118 nvram_set("devpath0", "pci/2/1");
3119 nvram_set("0:aa2g", "3");
3120 nvram_set("0:ag0", "2");
3121 nvram_set("0:ag1", "2");
3122 nvram_set("0:antswctl2g", "0");
3123 nvram_set("0:antswitch", "0");
3124 nvram_set("0:boardflags", "0x80001000");
3125 nvram_set("0:boardflags2", "0x00000800");
3126 nvram_set("0:boardrev", "0x1301");
3127 nvram_set("0:bw40po", "0");
3128 nvram_set("0:bwduppo", "0");
3129 nvram_set("0:bxa2g", "0");
3130 nvram_set("0:cck2gpo", "0x8880");
3131 nvram_set("0:cddpo", "0");
3132 nvram_set("0:devid", "0x43A9");
3133 nvram_set("0:elna2g", "2");
3134 nvram_set("0:extpagain2g", "3");
3135 nvram_set("0:freqoffset_corr", "0");
3136 nvram_set("0:hw_iqcal_en", "0");
3137 nvram_set("0:iqcal_swp_dis", "0");
3138 nvram_set("0:itt2ga1", "32");
3139 nvram_set("0:ledbh0", "255");
3140 nvram_set("0:ledbh1", "255");
3141 nvram_set("0:ledbh2", "255");
3142 nvram_set("0:ledbh3", "131");
3143 nvram_set("0:ledbh12", "7");
3144 nvram_set("0:leddc", "65535");
3145 nvram_set("0:maxp2ga0", "0x2072");
3146 nvram_set("0:maxp2ga1", "0x2072");
3147 nvram_set("0:mcs2gpo0", "0x8888");
3148 nvram_set("0:mcs2gpo1", "0x8888");
3149 nvram_set("0:mcs2gpo2", "0x8888");
3150 nvram_set("0:mcs2gpo3", "0xDDB8");
3151 nvram_set("0:mcs2gpo4", "0x8888");
3152 nvram_set("0:mcs2gpo5", "0xA988");
3153 nvram_set("0:mcs2gpo6", "0x8888");
3154 nvram_set("0:mcs2gpo7", "0xDDC8");
3155 nvram_set("0:measpower1", "0");
3156 nvram_set("0:measpower2", "0");
3157 nvram_set("0:measpower", "0");
3158 nvram_set("0:ofdm2gpo", "0xAA888888");
3159 nvram_set("0:opo", "68");
3160 nvram_set("0:pa2gw0a0", "0xFE77");
3161 nvram_set("0:pa2gw0a1", "0xFE76");
3162 nvram_set("0:pa2gw1a0", "0x1C37");
3163 nvram_set("0:pa2gw1a1", "0x1C5C");
3164 nvram_set("0:pa2gw2a0", "0xF95D");
3165 nvram_set("0:pa2gw2a1", "0xF94F");
3166 nvram_set("0:pcieingress_war", "15");
3167 nvram_set("0:pdetrange2g", "3");
3168 nvram_set("0:phycal_tempdelta", "0");
3169 nvram_set("0:rawtempsense", "0");
3170 nvram_set("0:rssisav2g", "0");
3171 nvram_set("0:rssismc2g", "0");
3172 nvram_set("0:rssismf2g", "0");
3173 nvram_set("0:rxchain", "3");
3174 nvram_set("0:rxpo2g", "0");
3175 nvram_set("0:sromrev", "8");
3176 nvram_set("0:stbcpo", "0");
3177 nvram_set("0:tempcorrx", "0");
3178 nvram_set("0:tempoffset", "0");
3179 nvram_set("0:temps_hysteresis", "0");
3180 nvram_set("0:temps_period", "0");
3181 nvram_set("0:tempsense_option", "0");
3182 nvram_set("0:tempsense_slope", "0");
3183 nvram_set("0:tempthresh", "120");
3184 nvram_set("0:triso2g", "4");
3185 nvram_set("0:tssipos2g", "1");
3186 nvram_set("0:txchain", "3");
3188 // 5GHz module defaults
3189 nvram_set("devpath1", "pci/1/1");
3190 nvram_set("1:aa5g", "7");
3191 nvram_set("1:aga0", "01");
3192 nvram_set("1:aga1", "01");
3193 nvram_set("1:aga2", "133");
3194 nvram_set("1:antswitch", "0");
3195 nvram_set("1:boardflags", "0x30000000");
3196 nvram_set("1:boardflags2", "0x00300002");
3197 nvram_set("1:boardflags3", "0x00000000");
3198 nvram_set("1:boardvendor", "0x14E4");
3199 nvram_set("1:devid", "0x43B3");
3200 nvram_set("1:dot11agduphrpo", "0");
3201 nvram_set("1:dot11agduplrpo", "0");
3202 nvram_set("1:epagain5g", "0");
3203 nvram_set("1:femctrl", "3");
3204 nvram_set("1:gainctrlsph", "0");
3205 nvram_set("1:ledbh10", "7");
3206 nvram_set("1:maxp5ga0", "0x5E,0x5E,0x5E,0x5E");
3207 nvram_set("1:maxp5ga1", "0x5E,0x5E,0x5E,0x5E");
3208 nvram_set("1:maxp5ga2", "0x5E,0x5E,0x5E,0x5E");
3209 nvram_set("1:mcsbw1605ghpo", "0");
3210 nvram_set("1:mcsbw1605glpo", "0");
3211 nvram_set("1:mcsbw1605gmpo", "0");
3212 nvram_set("1:mcsbw205ghpo", "0x55540000");
3213 nvram_set("1:mcsbw205glpo", "0x88642222");
3214 nvram_set("1:mcsbw205gmpo", "0x88642222");
3215 nvram_set("1:mcsbw405ghpo", "0x85542000");
3216 nvram_set("1:mcsbw405glpo", "0xA8842222");
3217 nvram_set("1:mcsbw405gmpo", "0xA8842222");
3218 nvram_set("1:mcsbw805ghpo", "0x85542000");
3219 nvram_set("1:mcsbw805glpo", "0xAA842222");
3220 nvram_set("1:mcsbw805gmpo", "0xAA842222");
3221 nvram_set("1:mcslr5ghpo", "0");
3222 nvram_set("1:mcslr5glpo", "0");
3223 nvram_set("1:mcslr5gmpo", "0");
3224 nvram_set("1:measpower1", "0x7F");
3225 nvram_set("1:measpower2", "0x7F");
3226 nvram_set("1:measpower", "0x7F");
3227 nvram_set("1:pa5ga0", "0xFF90,0x1E37,0xFCB8,0xFF38,0x189B,0xFD00,0xFF33,0x1A66,0xFCC4,0xFF2F,0x1748,0xFD21");
3228 nvram_set("1:pa5ga1", "0xFF1B,0x18A2,0xFCB6,0xFF34,0x183F,0xFD12,0xFF37,0x1AA1,0xFCC0,0xFF2F,0x1889,0xFCFB");
3229 nvram_set("1:pa5ga2", "0xFF1D,0x1653,0xFD33,0xFF38,0x1A2A,0xFCCE,0xFF35,0x1A93,0xFCC1,0xFF3A,0x1ABD,0xFCC0");
3230 nvram_set("1:papdcap5g", "0");
3231 nvram_set("1:pcieingress_war", "15");
3232 nvram_set("1:pdgain5g", "4");
3233 nvram_set("1:pdoffset40ma0", "0x1111");
3234 nvram_set("1:pdoffset40ma1", "0x1111");
3235 nvram_set("1:pdoffset40ma2", "0x1111");
3236 nvram_set("1:pdoffset80ma0", "0");
3237 nvram_set("1:pdoffset80ma1", "0");
3238 nvram_set("1:pdoffset80ma2", "0");
3239 nvram_set("1:phycal_tempdelta", "255");
3240 nvram_set("1:rawtempsense", "0x1FF");
3241 nvram_set("1:rxchain", "7");
3242 nvram_set("1:rxgains5gelnagaina0", "1");
3243 nvram_set("1:rxgains5gelnagaina1", "1");
3244 nvram_set("1:rxgains5gelnagaina2", "1");
3245 nvram_set("1:rxgains5ghelnagaina0", "2");
3246 nvram_set("1:rxgains5ghelnagaina1", "2");
3247 nvram_set("1:rxgains5ghelnagaina2", "3");
3248 nvram_set("1:rxgains5ghtrelnabypa0", "1");
3249 nvram_set("1:rxgains5ghtrelnabypa1", "1");
3250 nvram_set("1:rxgains5ghtrelnabypa2", "1");
3251 nvram_set("1:rxgains5ghtrisoa0", "5");
3252 nvram_set("1:rxgains5ghtrisoa1", "4");
3253 nvram_set("1:rxgains5ghtrisoa2", "4");
3254 nvram_set("1:rxgains5gmelnagaina0", "2");
3255 nvram_set("1:rxgains5gmelnagaina1", "2");
3256 nvram_set("1:rxgains5gmelnagaina2", "3");
3257 nvram_set("1:rxgains5gmtrelnabypa0", "1");
3258 nvram_set("1:rxgains5gmtrelnabypa1", "1");
3259 nvram_set("1:rxgains5gmtrelnabypa2", "1");
3260 nvram_set("1:rxgains5gmtrisoa0", "5");
3261 nvram_set("1:rxgains5gmtrisoa1", "4");
3262 nvram_set("1:rxgains5gmtrisoa2", "4");
3263 nvram_set("1:rxgains5gtrelnabypa0", "1");
3264 nvram_set("1:rxgains5gtrelnabypa1", "1");
3265 nvram_set("1:rxgains5gtrelnabypa2", "1");
3266 nvram_set("1:rxgains5gtrisoa0", "7");
3267 nvram_set("1:rxgains5gtrisoa1", "6");
3268 nvram_set("1:rxgains5gtrisoa2", "5");
3269 nvram_set("1:sar5g", "15");
3270 nvram_set("1:sb20in40hrpo", "0");
3271 nvram_set("1:sb20in40lrpo", "0");
3272 nvram_set("1:sb20in80and160hr5ghpo", "0");
3273 nvram_set("1:sb20in80and160hr5glpo", "0");
3274 nvram_set("1:sb20in80and160hr5gmpo", "0");
3275 nvram_set("1:sb20in80and160lr5ghpo", "0");
3276 nvram_set("1:sb20in80and160lr5glpo", "0");
3277 nvram_set("1:sb20in80and160lr5gmpo", "0");
3278 nvram_set("1:sb40and80hr5ghpo", "0");
3279 nvram_set("1:sb40and80hr5glpo", "0");
3280 nvram_set("1:sb40and80hr5gmpo", "0");
3281 nvram_set("1:sb40and80lr5ghpo", "0");
3282 nvram_set("1:sb40and80lr5glpo", "0");
3283 nvram_set("1:sb40and80lr5gmpo", "0");
3284 nvram_set("1:sromrev", "11");
3285 nvram_set("1:subband5gver", "4");
3286 nvram_set("1:tempcorrx", "0x3F");
3287 nvram_set("1:tempoffset", "255");
3288 nvram_set("1:temps_hysteresis", "15");
3289 nvram_set("1:temps_period", "15");
3290 nvram_set("1:tempsense_option", "3");
3291 nvram_set("1:tempsense_slope", "255");
3292 nvram_set("1:tempthresh", "255");
3293 nvram_set("1:tssiposslope5g", "1");
3294 nvram_set("1:tworangetssi5g", "0");
3295 nvram_set("1:txchain", "7");
3296 nvram_set("1:venid", "0x14E4");
3297 nvram_set("1:xtalfreq", "0x40000");
3304 #ifdef TCONFIG_AC66U
3306 features
= SUP_SES
| SUP_80211N
| SUP_1000ET
| SUP_80211AC
;
3309 features
= SUP_SES
| SUP_80211N
| SUP_1000ET
;
3310 #if defined(LINUX26) && defined(TCONFIG_MICROSD)
3311 if (nvram_get_int("usb_mmc") == -1) nvram_set("usb_mmc", "1");
3316 nvram_set("usb_uhci", "-1");
3318 if (!nvram_match("t_fix1", (char *)name
)) {
3319 nvram_set("lan_ifnames", "vlan1 eth1 eth2");
3320 nvram_set("wan_ifnameX", "vlan2");
3321 nvram_set("wl_ifnames", "eth1 eth2");
3322 #ifdef TCONFIG_AC66U
3323 nvram_set("wl_ifname", "eth1");
3324 nvram_set("wl0_ifname", "eth1");
3325 nvram_set("wl1_ifname", "eth2");
3327 nvram_set("landevs", "vlan1 wl0 wl1");
3328 nvram_set("wandevs", "vlan2");
3329 #ifndef TCONFIG_AC66U
3330 #if defined(LINUX26) && defined(TCONFIG_USB)
3331 nvram_set("usb_noled", "1-1.4"); /* SD/MMC Card */
3334 nvram_set("wl1_bw_cap","7");
3335 nvram_set("wl1_chanspec","36/80");
3336 nvram_set("wl0_bw_cap","3");
3337 nvram_set("wl0_chanspec","1l");
3338 nvram_set("blink_5g_interface","eth2");
3341 strcpy(s
, nvram_safe_get("et0macaddr"));
3343 nvram_set("wl0_hwaddr", s
);
3345 nvram_set("wl1_hwaddr", s
);
3347 // bcm4360ac_defaults
3348 nvram_set("pci/2/1/aa2g", "0");
3349 nvram_set("pci/2/1/aa5g", "7");
3350 nvram_set("pci/2/1/aga0", "71");
3351 nvram_set("pci/2/1/aga1", "71");
3352 nvram_set("pci/2/1/aga2", "71");
3353 nvram_set("pci/2/1/agbg0", "133");
3354 nvram_set("pci/2/1/agbg1", "133");
3355 nvram_set("pci/2/1/agbg2", "133");
3356 nvram_set("pci/2/1/antswitch", "0");
3357 nvram_set("pci/2/1/cckbw202gpo", "0");
3358 nvram_set("pci/2/1/cckbw20ul2gpo", "0");
3359 nvram_set("pci/2/1/dot11agofdmhrbw202gpo", "0");
3360 nvram_set("pci/2/1/femctrl", "3");
3361 nvram_set("pci/2/1/papdcap2g", "0");
3362 nvram_set("pci/2/1/tworangetssi2g", "0");
3363 nvram_set("pci/2/1/pdgain2g", "4");
3364 nvram_set("pci/2/1/epagain2g", "0");
3365 nvram_set("pci/2/1/tssiposslope2g", "1");
3366 nvram_set("pci/2/1/gainctrlsph", "0");
3367 nvram_set("pci/2/1/papdcap5g", "0");
3368 nvram_set("pci/2/1/tworangetssi5g", "0");
3369 nvram_set("pci/2/1/pdgain5g", "4");
3370 nvram_set("pci/2/1/epagain5g", "0");
3371 nvram_set("pci/2/1/tssiposslope5g", "1");
3372 nvram_set("pci/2/1/maxp2ga0", "76");
3373 nvram_set("pci/2/1/maxp2ga1", "76");
3374 nvram_set("pci/2/1/maxp2ga2", "76");
3375 nvram_set("pci/2/1/mcsbw202gpo", "0");
3376 nvram_set("pci/2/1/mcsbw402gpo", "0");
3377 nvram_set("pci/2/1/measpower", "0x7f");
3378 nvram_set("pci/2/1/measpower1", "0x7f");
3379 nvram_set("pci/2/1/measpower2", "0x7f");
3380 nvram_set("pci/2/1/noiselvl2ga0", "31");
3381 nvram_set("pci/2/1/noiselvl2ga1", "31");
3382 nvram_set("pci/2/1/noiselvl2ga2", "31");
3383 nvram_set("pci/2/1/noiselvl5gha0", "31");
3384 nvram_set("pci/2/1/noiselvl5gha1", "31");
3385 nvram_set("pci/2/1/noiselvl5gha2", "31");
3386 nvram_set("pci/2/1/noiselvl5gla0", "31");
3387 nvram_set("pci/2/1/noiselvl5gla1", "31");
3388 nvram_set("pci/2/1/noiselvl5gla2", "31");
3389 nvram_set("pci/2/1/noiselvl5gma0", "31");
3390 nvram_set("pci/2/1/noiselvl5gma1", "31");
3391 nvram_set("pci/2/1/noiselvl5gma2", "31");
3392 nvram_set("pci/2/1/noiselvl5gua0", "31");
3393 nvram_set("pci/2/1/noiselvl5gua1", "31");
3394 nvram_set("pci/2/1/noiselvl5gua2", "31");
3395 nvram_set("pci/2/1/ofdmlrbw202gpo", "0");
3396 nvram_set("pci/2/1/pa2ga0", "0xfe72,0x14c0,0xfac7");
3397 nvram_set("pci/2/1/pa2ga1", "0xfe80,0x1472,0xfabc");
3398 nvram_set("pci/2/1/pa2ga2", "0xfe82,0x14bf,0xfad9");
3399 nvram_set("pci/2/1/pcieingress_war", "15");
3400 nvram_set("pci/2/1/phycal_tempdelta", "255");
3401 nvram_set("pci/2/1/rawtempsense", "0x1ff");
3402 nvram_set("pci/2/1/rxchain", "7");
3403 nvram_set("pci/2/1/rxgainerr2g", "0xffff");
3404 nvram_set("pci/2/1/rxgainerr5g", "0xffff,0xffff,0xffff,0xffff");
3405 nvram_set("pci/2/1/rxgains2gelnagaina0", "0");
3406 nvram_set("pci/2/1/rxgains2gelnagaina1", "0");
3407 nvram_set("pci/2/1/rxgains2gelnagaina2", "0");
3408 nvram_set("pci/2/1/rxgains2gtrelnabypa0", "0");
3409 nvram_set("pci/2/1/rxgains2gtrelnabypa1", "0");
3410 nvram_set("pci/2/1/rxgains2gtrelnabypa2", "0");
3411 nvram_set("pci/2/1/rxgains2gtrisoa0", "0");
3412 nvram_set("pci/2/1/rxgains2gtrisoa1", "0");
3413 nvram_set("pci/2/1/rxgains2gtrisoa2", "0");
3414 nvram_set("pci/2/1/sar2g", "18");
3415 nvram_set("pci/2/1/sar5g", "15");
3416 nvram_set("pci/2/1/sromrev", "11");
3417 nvram_set("pci/2/1/subband5gver", "0x4");
3418 nvram_set("pci/2/1/tempcorrx", "0x3f");
3419 nvram_set("pci/2/1/tempoffset", "255");
3420 nvram_set("pci/2/1/temps_hysteresis", "15");
3421 nvram_set("pci/2/1/temps_period", "15");
3422 nvram_set("pci/2/1/tempsense_option", "0x3");
3423 nvram_set("pci/2/1/tempsense_slope", "0xff");
3424 nvram_set("pci/2/1/tempthresh", "255");
3425 nvram_set("pci/2/1/txchain", "7");
3426 nvram_set("pci/2/1/ledbh0", "2");
3427 nvram_set("pci/2/1/ledbh1", "5");
3428 nvram_set("pci/2/1/ledbh2", "4");
3429 nvram_set("pci/2/1/ledbh3", "11");
3430 nvram_set("pci/2/1/ledbh10", "7");
3432 //force EU country for eth2
3433 nvram_set("pci/2/1/ccode", "EU");
3434 #endif // TCONFIG_AC66U
3437 #ifdef CONFIG_BCMWL6
3441 features
= SUP_SES
| SUP_80211N
| SUP_1000ET
| SUP_80211AC
;
3443 nvram_set("usb_uhci", "-1");
3445 if (!nvram_match("t_fix1", (char *)name
)) {
3446 nvram_set("lan_ifnames", "vlan1 eth1 eth2");
3447 nvram_set("wan_ifnameX", "vlan2");
3448 nvram_set("wl_ifnames", "eth1 eth2");
3449 nvram_set("wl_ifname", "eth1");
3450 nvram_set("wl0_ifname", "eth2");
3451 nvram_set("wl1_ifname", "eth1");
3452 nvram_set("wl0_bw_cap","7");
3453 nvram_set("wl0_chanspec","36/80");
3454 nvram_set("wl1_bw_cap","3");
3455 nvram_set("wl1_chanspec","1l");
3456 nvram_set("blink_5g_interface","eth1");
3457 //nvram_set("landevs", "vlan1 wl0 wl1");
3458 //nvram_set("wandevs", "vlan2");
3461 strcpy(s
, nvram_safe_get("et0macaddr"));
3462 nvram_set("wl0_hwaddr", nvram_safe_get("0:macaddr"));
3463 nvram_set("wl1_hwaddr", nvram_safe_get("1:macaddr"));
3465 // fix ssid according to 5G(eth2) and 2.4G(eth1)
3466 nvram_set("wl_ssid","Tomato50");
3467 nvram_set("wl0_ssid","Tomato50");
3468 nvram_set("wl1_ssid","Tomato24");
3473 if (nvram_match("product", "WLI-H4-D1300")) {
3474 name
= "WLI-H4-D1300";
3476 else if (nvram_match("product", "WZR-D1100H")) {
3477 name
= "WZR-D1100H";
3480 name
= "WZR-D1800H";
3482 features
= SUP_SES
| SUP_AOSS_LED
| SUP_80211N
| SUP_1000ET
| SUP_80211AC
;
3484 nvram_set("usb_uhci", "-1");
3486 if (!nvram_match("t_fix1", (char *)name
)) {
3487 nvram_set("lan_ifnames", "vlan1 eth1 eth2");
3488 nvram_set("wan_ifnameX", "vlan2");
3489 nvram_set("wl_ifnames", "eth1 eth2");
3490 nvram_set("wl_ifname", "eth1");
3491 nvram_set("wl0_ifname", "eth2");
3492 nvram_set("wl1_ifname", "eth1");
3493 nvram_set("wl0_bw_cap","7");
3494 nvram_set("wl0_chanspec","36/80");
3495 nvram_set("wl1_bw_cap","3");
3496 nvram_set("wl1_chanspec","1l");
3497 nvram_set("blink_5g_interface","eth1");
3500 strcpy(s
, nvram_safe_get("et0macaddr"));
3503 for (i
= 0; i
< strlen(s
); i
++) if ( s
[i
] == '-') s
[i
] = ':';
3504 nvram_set("et0macaddr",s
);
3506 nvram_set("wl0_hwaddr", s
);
3508 nvram_set("wl1_hwaddr", s
);
3510 // fix ssid according to 5G(eth2) and 2.4G(eth1)
3511 nvram_set("wl_ssid","Tomato50");
3512 nvram_set("wl0_ssid","Tomato50");
3513 nvram_set("wl1_ssid","Tomato24");
3515 nvram_set("pci/2/1/maxp2ga0", "0x70");
3516 nvram_set("pci/2/1/maxp2ga1", "0x70");
3517 nvram_set("pci/2/1/maxp2ga2", "0x70");
3518 nvram_set("pci/2/1/maxp5ga0", "0x6A");
3519 nvram_set("pci/2/1/maxp5ga1", "0x6A");
3520 nvram_set("pci/2/1/maxp5ga2", "0x6A");
3521 nvram_set("pci/2/1/cckbw202gpo", "0x5555");
3522 nvram_set("pci/2/1/cckbw20ul2gpo", "0x5555");
3523 nvram_set("pci/2/1/legofdmbw202gpo", "0x97555555");
3524 nvram_set("pci/2/1/legofdmbw20ul2gpo", "0x97555555");
3525 nvram_set("pci/2/1/mcsbw202gpo", "0xDA755555");
3526 nvram_set("pci/2/1/mcsbw20ul2gpo", "0xDA755555");
3527 nvram_set("pci/2/1/mcsbw402gpo", "0xFC965555");
3528 nvram_set("pci/2/1/cckbw205gpo", "0x5555");
3529 nvram_set("pci/2/1/cckbw20ul5gpo", "0x5555");
3530 nvram_set("pci/2/1/legofdmbw205gpo", "0x97555555");
3531 nvram_set("pci/2/1/legofdmbw20ul5gpo", "0x97555555");
3532 nvram_set("pci/2/1/legofdmbw205gmpo", "0x77777777");
3533 nvram_set("pci/2/1/legofdmbw20ul5gmpo", "0x77777777");
3534 nvram_set("pci/2/1/legofdmbw205ghpo", "0x77777777");
3535 nvram_set("pci/2/1/legofdmbw20ul5ghpo", "0x77777777");
3536 nvram_set("pci/2/1/mcsbw205ghpo", "0x77777777");
3537 nvram_set("pci/2/1/mcsbw20ul5ghpo", "0x77777777");
3538 nvram_set("pci/2/1/mcsbw205gpo", "0xDA755555");
3539 nvram_set("pci/2/1/mcsbw20ul5gpo", "0xDA755555");
3540 nvram_set("pci/2/1/mcsbw405gpo", "0xFC965555");
3541 nvram_set("pci/2/1/mcsbw405ghpo", "0x77777777");
3542 nvram_set("pci/2/1/mcsbw405ghpo", "0x77777777");
3543 nvram_set("pci/2/1/mcs32po", "0x7777");
3544 nvram_set("pci/2/1/legofdm40duppo", "0x0000");
3545 nvram_set("pci/1/1/maxp5ga0", "104,104,104,104");
3546 nvram_set("pci/1/1/maxp5ga1", "104,104,104,104");
3547 nvram_set("pci/1/1/maxp5ga2", "104,104,104,104");
3548 nvram_set("pci/1/1/mcsbw205glpo", "0xBB975311");
3549 nvram_set("pci/1/1/mcsbw405glpo", "0xBB975311");
3550 nvram_set("pci/1/1/mcsbw805glpo", "0xBB975311");
3551 nvram_set("pci/1/1/mcsbw205gmpo", "0xBB975311");
3552 nvram_set("pci/1/1/mcsbw405gmpo", "0xBB975311");
3553 nvram_set("pci/1/1/mcsbw805gmpo", "0xBB975311");
3554 nvram_set("pci/1/1/mcsbw205ghpo", "0xBB975311");
3555 nvram_set("pci/1/1/mcsbw405ghpo", "0xBB975311");
3556 nvram_set("pci/1/1/mcsbw805ghpo", "0xBB975311");
3558 //force US country for 5G eth1, modified by bwq518
3559 nvram_set("pci/1/1/ccode", "US");
3560 nvram_set("wl1_country_code", "US");
3561 nvram_set("regulation_domain_5G", "US");
3564 case MODEL_EA6500V1
:
3567 features
= SUP_SES
| SUP_80211N
| SUP_1000ET
| SUP_80211AC
;
3569 nvram_set("usb_uhci", "-1");
3571 if (!nvram_match("t_fix1", (char *)name
)) {
3572 nvram_set("lan_ifnames", "vlan1 eth1 eth2");
3573 nvram_set("wan_ifnameX", "vlan2");
3574 nvram_set("wl_ifnames", "eth1 eth2");
3575 nvram_set("wl_ifname", "eth1");
3576 nvram_set("wl0_ifname", "eth1");
3577 nvram_set("wl1_ifname", "eth2");
3578 nvram_set("wl0_bw_cap","7");
3579 nvram_set("wl0_chanspec","36/80");
3580 nvram_set("wl1_bw_cap","3");
3581 nvram_set("wl1_chanspec","1l");
3582 nvram_set("blink_5g_interface","eth1");
3584 // fix ssid according to 5G(eth1) and 2.4G(eth2)
3585 nvram_set("wl_ssid","Tomato50");
3586 nvram_set("wl0_ssid","Tomato50");
3587 nvram_set("wl1_ssid","Tomato24");
3589 //force US country for 5G eth1, modified by bwq518
3590 nvram_set("pci/1/1/ccode", nvram_safe_get("ccode"));
3591 nvram_set("regulation_domain_5G", nvram_safe_get("ccode"));
3594 #endif // CONFIG_BCMWL6
3595 case MODEL_WNR3500L
:
3597 name
= "WNR3500L/U/v2";
3598 features
= SUP_SES
| SUP_AOSS_LED
| SUP_80211N
| SUP_1000ET
;
3599 if (!nvram_match("t_fix1", (char *)name
)) {
3600 nvram_set("sromrev", "3");
3601 nvram_set("lan_ifnames", "vlan1 eth1");
3602 nvram_set("wan_ifnameX", "vlan2");
3603 nvram_set("wl_ifname", "eth1");
3606 case MODEL_WNR3500LV2
:
3608 name
= "WNR3500L v2";
3609 features
= SUP_SES
| SUP_AOSS_LED
| SUP_80211N
| SUP_1000ET
;
3610 if (!nvram_match("t_fix1", (char *)name
)) {
3611 nvram_set("lan_ifnames", "vlan1 eth1");
3612 nvram_set("wan_ifnameX", "vlan2");
3613 nvram_set("wl_ifname", "eth1");
3616 case MODEL_WNR2000v2
:
3618 name
= "WNR2000 v2";
3619 features
= SUP_SES
| SUP_AOSS_LED
| SUP_80211N
;
3620 if (!nvram_match("t_fix1", (char *)name
)) {
3621 nvram_set("lan_ifnames", "vlan0 eth1");
3622 nvram_set("wan_ifnameX", "vlan1");
3623 nvram_set("wl_ifname", "eth1");
3630 case MODEL_F5D8235v3
:
3632 features
= SUP_SES
| SUP_80211N
;
3635 name
= "Share Max N300 (F7D3301/F7D7301) v1";
3638 name
= "Share N300 (F7D3302/F7D7302) v1";
3641 name
= "Play Max / N600 HD (F7D4301/F7D8301) v1";
3644 name
= "Play N600 (F7D4302/F7D8302) v1";
3646 case MODEL_F5D8235v3
:
3647 name
= "N F5D8235-4 v3";
3651 nvram_set("usb_uhci", "-1");
3653 if (!nvram_match("t_fix1", (char *)name
)) {
3654 nvram_set("lan_ifnames", "vlan1 eth1 eth2");
3655 nvram_set("wan_ifnameX", "vlan2");
3656 nvram_set("landevs", "vlan1 wl0 wl1");
3657 nvram_set("wandevs", "vlan2");
3663 name
= nvram_safe_get("boot_hw_model");
3664 ver
= nvram_safe_get("boot_hw_ver");
3665 features
= SUP_SES
| SUP_80211N
;
3666 if (!nvram_match("t_fix1", (char *)name
)) {
3667 nvram_set("lan_ifnames", "vlan1 eth1");
3668 nvram_set("wan_ifnameX", "vlan2");
3669 nvram_set("wl_ifname", "eth1");
3674 name
= nvram_safe_get("boot_hw_model");
3675 ver
= nvram_safe_get("boot_hw_ver");
3676 features
= SUP_SES
| SUP_80211N
;
3678 nvram_set("usb_uhci", "-1");
3680 if (!nvram_match("t_fix1", (char *)name
)) {
3681 nvram_set("lan_ifnames", "vlan1 eth1");
3682 nvram_set("wan_ifnameX", "vlan2");
3683 nvram_set("wl_ifname", "eth1");
3688 name
= nvram_safe_get("boot_hw_model");
3689 ver
= nvram_safe_get("boot_hw_ver");
3690 features
= SUP_SES
| SUP_80211N
;
3691 #if defined(LINUX26) && defined(TCONFIG_USBAP)
3692 if (nvram_get_int("usb_storage") == 1) nvram_set("usb_storage", "-1");
3694 if (!nvram_match("t_fix1", (char *)name
)) {
3695 #ifdef TCONFIG_USBAP
3696 nvram_set("wl1_hwaddr", nvram_safe_get("0:macaddr"));
3697 nvram_set("ehciirqt", "3");
3698 nvram_set("qtdc_pid", "48407");
3699 nvram_set("qtdc_vid", "2652");
3700 nvram_set("qtdc0_ep", "4");
3701 nvram_set("qtdc0_sz", "0");
3702 nvram_set("qtdc1_ep", "18");
3703 nvram_set("qtdc1_sz", "10");
3704 nvram_set("lan_ifnames", "vlan1 eth1 eth2");
3705 nvram_set("landevs", "vlan1 wl0 wl1");
3706 nvram_set("wl0_ifname", "eth1");
3707 nvram_set("wl1_ifname", "eth2");
3709 nvram_set("lan_ifnames", "vlan1 eth1");
3710 nvram_set("landevs", "vlan1 wl0");
3712 nvram_set("wan_ifnameX", "vlan2");
3713 nvram_set("wl_ifname", "eth1");
3719 name
= nvram_safe_get("boot_hw_model");
3720 ver
= nvram_safe_get("boot_hw_ver");
3721 features
= SUP_SES
| SUP_80211N
| SUP_1000ET
;
3723 nvram_set("usb_uhci", "-1");
3725 if (!nvram_match("t_fix1", (char *)name
)) {
3726 #ifdef TCONFIG_USBAP
3727 nvram_set("wl1_hwaddr", nvram_safe_get("usb/0xBD17/macaddr"));
3728 nvram_set("ehciirqt", "3");
3729 nvram_set("qtdc_pid", "48407");
3730 nvram_set("qtdc_vid", "2652");
3731 nvram_set("qtdc0_ep", "4");
3732 nvram_set("qtdc0_sz", "0");
3733 nvram_set("qtdc1_ep", "18");
3734 nvram_set("qtdc1_sz", "10");
3735 nvram_set("lan_ifnames", "vlan1 eth1 eth2");
3736 nvram_set("landevs", "vlan1 wl0 wl1");
3737 nvram_set("wl0_ifname", "eth1");
3738 nvram_set("wl1_ifname", "eth2");
3740 nvram_set("lan_ifnames", "vlan1 eth1");
3741 nvram_set("landevs", "vlan1 wl0");
3743 nvram_set("wl_ifname", "eth1");
3744 nvram_set("wan_ifnameX", "vlan2");
3748 case MODEL_WRT160Nv3
:
3749 // same as M10, M20, WRT310Nv2, E1000v1
3751 name
= nvram_safe_get("boot_hw_model");
3752 ver
= nvram_safe_get("boot_hw_ver");
3753 if (nvram_match("boot_hw_model", "E100")){
3756 if (nvram_match("boot_hw_model", "M10") || nvram_match("boot_hw_model", "M20")){
3759 features
= SUP_SES
| SUP_80211N
| SUP_WHAM_LED
;
3760 if (!nvram_match("t_fix1", (char *)name
)) {
3761 nvram_set("lan_ifnames", "vlan1 eth1");
3762 nvram_set("wan_ifnameX", "vlan2");
3763 nvram_set("wl_ifname", "eth1");
3768 name
= nvram_match("boardrev", "0x1307") ? "E2000" : "WRT320N";
3769 features
= SUP_SES
| SUP_80211N
| SUP_WHAM_LED
| SUP_1000ET
;
3770 if (!nvram_match("t_fix1", (char *)name
)) {
3771 nvram_set("lan_ifnames", "vlan1 eth1");
3772 nvram_set("wan_ifnameX", "vlan2");
3773 nvram_set("wl_ifname", "eth1");
3776 case MODEL_WRT610Nv2
:
3778 name
= nvram_match("boot_hw_model", "E300") ? "E3000" : "WRT610N v2";
3779 features
= SUP_SES
| SUP_80211N
| SUP_WHAM_LED
| SUP_1000ET
;
3781 nvram_set("usb_uhci", "-1");
3783 if (!nvram_match("t_fix1", (char *)name
)) {
3784 nvram_set("lan_ifnames", "vlan1 eth1 eth2");
3785 nvram_set("wan_ifnameX", "vlan2");
3786 nvram_set("wl_ifname", "eth1");
3792 features
= SUP_SES
| SUP_80211N
| SUP_1000ET
;
3794 nvram_set("usb_uhci", "-1");
3796 if (!nvram_match("t_fix1", (char *)name
)) {
3797 nvram_set("lan_ifnames", "vlan1 eth1 eth2");
3798 nvram_set("wan_ifnameX", "vlan2");
3799 nvram_set("wl_ifname", "eth1");
3802 #endif // CONFIG_BCMWL5
3807 // The 330gE has only one wired port which can act either as WAN or LAN.
3808 // Failsafe mode is to have it start as a LAN port so you can get an IP
3809 // address via DHCP and access the router config page.
3810 if (!nvram_match("t_fix1", (char *)name
)) {
3811 nvram_set("wl_ifname", "eth1");
3812 nvram_set("lan_ifnames", "eth1");
3813 nvram_set("wan_ifnameX", "eth0");
3814 nvram_set("wan_islan", "1");
3815 nvram_set("wan_proto", "disabled");
3818 case MODEL_WL500GPv2
:
3820 name
= "WL-500gP v2";
3823 nvram_set("usb_uhci", "-1");
3831 nvram_set("usb_uhci", "-1");
3836 name
= "WL-500g Deluxe";
3837 // features = SUP_SES;
3839 nvram_set("usb_ohci", "-1");
3841 if (!nvram_match("t_fix1", (char *)name
)) {
3842 nvram_set("wl_ifname", "eth1");
3843 nvram_set("lan_ifnames", "vlan0 eth1");
3844 nvram_set("wan_ifnameX", "vlan1");
3845 nvram_unset("wl0gpio0");
3852 if (!nvram_match("t_fix1", (char *)name
)) {
3853 nvram_set("wan_ifnameX", "vlan1");
3854 nvram_set("wl_ifname", "eth1");
3859 name
= "ZXV10 H618B";
3860 features
= SUP_SES
| SUP_AOSS_LED
;
3862 nvram_set("usb_uhci", "-1");
3864 if (!nvram_match("t_fix1", (char *)name
)) {
3865 nvram_set("lan_ifnames", "vlan0 eth1");
3866 nvram_set("wan_ifname", "vlan1");
3867 nvram_set("wan_ifnames", "vlan1");
3868 nvram_set("wan_ifnameX", "vlan1");
3869 nvram_set("wl_ifname", "eth1");
3872 case MODEL_WL1600GL
:
3877 #endif // WL_BSS_INFO_VERSION >= 108
3878 case MODEL_WZRG300N
:
3881 features
= SUP_SES
| SUP_AOSS_LED
| SUP_BRAU
| SUP_80211N
;
3883 case MODEL_WRT160Nv1
:
3886 name
= (model
== MODEL_WRT300N
) ? "WRT300N v1" : "WRT160N v1";
3887 features
= SUP_SES
| SUP_80211N
;
3888 if (!nvram_match("t_fix1", (char *)name
)) {
3889 nvram_set("wan_ifnameX", "eth1");
3890 nvram_set("lan_ifnames", "eth0 eth2");
3893 case MODEL_WRT310Nv1
:
3895 name
= "WRT310N v1";
3896 features
= SUP_SES
| SUP_80211N
| SUP_WHAM_LED
| SUP_1000ET
;
3897 if (!nvram_match("t_fix1", (char *)name
)) {
3898 nvram_set("lan_ifnames", "vlan1 eth1");
3899 nvram_set("wan_ifnameX", "vlan2");
3900 nvram_set("wl_ifname", "eth1");
3906 nvram_set("t_fix1", name
);
3907 if (ver
&& strcmp(ver
, "")) {
3908 sprintf(s
, "%s %s v%s", mfr
, name
, ver
);
3910 sprintf(s
, "%s %s", mfr
, name
);
3914 snprintf(s
, sizeof(s
), "%s %d/%s/%s/%s/%s", mfr
, check_hw_type(),
3915 nvram_safe_get("boardtype"), nvram_safe_get("boardnum"), nvram_safe_get("boardrev"), nvram_safe_get("boardflags"));
3918 nvram_set("t_model_name", s
);
3920 nvram_set("pa0maxpwr", "400"); // allow Tx power up tp 400 mW, needed for ND only
3922 sprintf(s
, "0x%lX", features
);
3923 nvram_set("t_features", s
);
3926 note: set wan_ifnameX if wan_ifname needs to be overriden
3929 if (nvram_is_empty("wan_ifnameX")) {
3931 nvram_set("wan_ifnameX", ((strtoul(nvram_safe_get("boardflags"), NULL
, 0) & BFL_ENETVLAN
) ||
3932 (check_hw_type() == HW_BCM4712
)) ? "vlan1" : "eth1");
3934 p
= nvram_safe_get("wan_ifname");
3935 if ((*p
== 0) || (nvram_match("wl_ifname", p
))) {
3936 p
= ((strtoul(nvram_safe_get("boardflags"), NULL
, 0) & BFL_ENETVLAN
) ||
3937 (check_hw_type() == HW_BCM4712
)) ? "vlan1" : "eth1";
3939 nvram_set("wan_ifnameX", p
);
3943 //!!TB - do not force country code here to allow nvram override
3944 //nvram_set("wl_country", "JP");
3945 //nvram_set("wl_country_code", "JP");
3946 nvram_set("wan_get_dns", "");
3947 nvram_set("wan_get_domain", "");
3948 nvram_set("ppp_get_ip", "");
3949 nvram_set("action_service", "");
3950 nvram_set("jffs2_format", "0");
3951 nvram_set("rrules_radio", "-1");
3952 nvram_unset("https_crt_gen");
3953 nvram_unset("log_wmclear");
3955 nvram_set("ipv6_get_dns", "");
3957 #ifdef TCONFIG_MEDIA_SERVER
3958 nvram_unset("ms_rescan");
3960 if (nvram_get_int("http_id_gen") == 1) nvram_unset("http_id");
3962 nvram_unset("sch_rboot_last");
3963 nvram_unset("sch_rcon_last");
3964 nvram_unset("sch_c1_last");
3965 nvram_unset("sch_c2_last");
3966 nvram_unset("sch_c3_last");
3968 nvram_set("brau_state", "");
3969 if ((features
& SUP_BRAU
) == 0) nvram_set("script_brau", "");
3970 if ((features
& SUP_SES
) == 0) nvram_set("sesx_script", "");
3972 if ((features
& SUP_1000ET
) == 0) nvram_set("jumbo_frame_enable", "0");
3974 // compatibility with old versions
3975 if (nvram_match("wl_net_mode", "disabled")) {
3976 nvram_set("wl_radio", "0");
3977 nvram_set("wl_net_mode", "mixed");
3983 #ifndef TCONFIG_BCMARM
3984 /* Get the special files from nvram and copy them to disc.
3985 * These were files saved with "nvram setfile2nvram <filename>".
3986 * Better hope that they were saved with full pathname.
3988 static void load_files_from_nvram(void)
3992 char buf
[NVRAM_SPACE
];
3994 if (nvram_getall(buf
, sizeof(buf
)) != 0)
3997 for (name
= buf
; *name
; name
+= strlen(name
) + 1) {
3998 if (strncmp(name
, "FILE:", 5) == 0) { /* This special name marks a file to get. */
3999 if ((cp
= strchr(name
, '=')) == NULL
)
4002 syslog(LOG_INFO
, "Loading file '%s' from nvram", name
+ 5);
4003 nvram_nvram2file(name
, name
+ 5);
4004 if (memcmp(".autorun", cp
- 8, 9) == 0)
4008 /* Start any autorun files that may have been loaded into one of the standard places. */
4010 run_nvscript(".autorun", NULL
, 3);
4014 #if defined(LINUX26) && defined(TCONFIG_USB)
4015 static inline void tune_min_free_kbytes(void)
4017 struct sysinfo info
;
4019 memset(&info
, 0, sizeof(struct sysinfo
));
4021 if (info
.totalram
>= 55 * 1024 * 1024) {
4022 // If we have 64MB+ RAM, tune min_free_kbytes
4023 // to reduce page allocation failure errors.
4024 f_write_string("/proc/sys/vm/min_free_kbytes", "8192", 0, 0);
4029 static void sysinit(void)
4031 static int noconsole
= 0;
4032 static const time_t tm
= 0;
4040 mount("proc", "/proc", "proc", 0, NULL
);
4041 mount("tmpfs", "/tmp", "tmpfs", 0, NULL
);
4044 mount("devfs", "/dev", "tmpfs", MS_MGC_VAL
| MS_NOATIME
, NULL
);
4045 mknod("/dev/null", S_IFCHR
| 0666, makedev(1, 3));
4046 mknod("/dev/console", S_IFCHR
| 0600, makedev(5, 1));
4047 mount("sysfs", "/sys", "sysfs", MS_MGC_VAL
, NULL
);
4048 mkdir("/dev/shm", 0777);
4049 mkdir("/dev/pts", 0777);
4050 mknod("/dev/pts/ptmx", S_IRWXU
|S_IFCHR
, makedev(5, 2));
4051 mknod("/dev/pts/0", S_IRWXU
|S_IFCHR
, makedev(136, 0));
4052 mknod("/dev/pts/1", S_IRWXU
|S_IFCHR
, makedev(136, 1));
4053 mount("devpts", "/dev/pts", "devpts", MS_MGC_VAL
, NULL
);
4056 if (console_init()) noconsole
= 1;
4060 static const char *mkd
[] = {
4061 "/tmp/etc", "/tmp/var", "/tmp/home", "/tmp/mnt",
4062 "/tmp/splashd", //!!Victek
4063 "/tmp/share", "/var/webmon", // !!TB
4064 "/var/log", "/var/run", "/var/tmp", "/var/lib", "/var/lib/misc",
4065 "/var/spool", "/var/spool/cron", "/var/spool/cron/crontabs",
4066 "/tmp/var/wwwext", "/tmp/var/wwwext/cgi-bin", // !!TB - CGI support
4070 for (i
= 0; mkd
[i
]; ++i
) {
4071 mkdir(mkd
[i
], 0755);
4073 mkdir("/var/lock", 0777);
4074 mkdir("/var/tmp/dhcp", 0777);
4075 mkdir("/home/root", 0700);
4076 chmod("/tmp", 0777);
4077 f_write("/etc/hosts", NULL
, 0, 0, 0644); // blank
4078 f_write("/etc/fstab", NULL
, 0, 0, 0644); // !!TB - blank
4079 simple_unlock("cron");
4080 simple_unlock("firewall");
4081 simple_unlock("restrictions");
4084 if ((d
= opendir("/rom/etc")) != NULL
) {
4085 while ((de
= readdir(d
)) != NULL
) {
4086 if (de
->d_name
[0] == '.') continue;
4087 snprintf(s
, sizeof(s
), "%s/%s", "/rom/etc", de
->d_name
);
4088 snprintf(t
, sizeof(t
), "%s/%s", "/etc", de
->d_name
);
4093 symlink("/proc/mounts", "/etc/mtab");
4095 #ifdef TCONFIG_SAMBASRV
4096 if ((d
= opendir("/usr/codepages")) != NULL
) {
4097 while ((de
= readdir(d
)) != NULL
) {
4098 if (de
->d_name
[0] == '.') continue;
4099 snprintf(s
, sizeof(s
), "/usr/codepages/%s", de
->d_name
);
4100 snprintf(t
, sizeof(t
), "/usr/share/%s", de
->d_name
);
4108 eval("hotplug2", "--coldplug");
4111 static const char *dn
[] = {
4112 "null", "zero", "random", "urandom", "full", "ptmx", "nvram",
4115 for (i
= 0; dn
[i
]; ++i
) {
4116 snprintf(s
, sizeof(s
), "/dev/%s", dn
[i
]);
4119 chmod("/dev/gpio", 0660);
4122 set_action(ACT_IDLE
);
4124 for (i
= 0; defenv
[i
]; ++i
) {
4129 printf("\n\nHit ENTER for console...\n\n");
4136 // disable IPv6 by default on all interfaces
4137 f_write_string("/proc/sys/net/ipv6/conf/default/disable_ipv6", "1", 0, 0);
4140 for (i
= 0; i
< sizeof(fatalsigs
) / sizeof(fatalsigs
[0]); i
++) {
4141 signal(fatalsigs
[i
], handle_fatalsigs
);
4143 signal(SIGCHLD
, handle_reap
);
4145 #ifdef CONFIG_BCMWL5
4146 // ctf must be loaded prior to any other modules
4147 if (nvram_invmatch("ctf_disable", "1"))
4156 switch (hardware
= check_hw_type()) {
4158 modprobe("bcm57xx");
4165 //load after initnvram as Broadcom Wl require pci/x/1/devid and pci/x/1/macaddr nvram to be set first for DIR-865L
4166 //else 5G interface will not start!
4167 //must be tested on other routers to determine if loading nvram 1st will cause problems!
4170 //config_loopback();
4172 // eval("nvram", "defaults", "--initcheck");
4173 restore_defaults(); // restore default if necessary
4176 // set the packet size
4177 if (nvram_get_int("jumbo_frame_enable")) {
4178 // only set the size here - 'enable' flag is set by the driver
4179 // eval("et", "robowr", "0x40", "0x01", "0x1F"); // (1 << 0) | (1 << 1) | (1 << 2) | (1 << 3) | (1 << 4)
4180 eval("et", "robowr", "0x40", "0x05", nvram_safe_get("jumbo_frame_size"));
4183 //load after init_nvram
4188 klogctl(8, NULL
, nvram_get_int("console_loglevel"));
4190 #if defined(LINUX26) && defined(TCONFIG_USB)
4191 tune_min_free_kbytes();
4194 set_host_domain_name();
4200 #ifdef CONFIG_BCMWL6
4204 if (!noconsole
) xstart("console");
4206 i
= nvram_get_int("sesx_led");
4207 led(LED_AMBER
, (i
& 1) != 0);
4208 led(LED_WHITE
, (i
& 2) != 0);
4209 led(LED_AOSS
, (i
& 4) != 0);
4210 led(LED_BRIDGE
, (i
& 8) != 0);
4214 int init_main(int argc
, char *argv
[])
4220 nvram_unset("debug_rc_svc");
4224 sigemptyset(&sigset
);
4225 for (i
= 0; i
< sizeof(initsigs
) / sizeof(initsigs
[0]); i
++) {
4226 sigaddset(&sigset
, initsigs
[i
]);
4228 sigprocmask(SIG_BLOCK
, &sigset
, NULL
);
4230 #if defined(DEBUG_NOISY)
4231 nvram_set("debug_logeval", "1");
4232 nvram_set("debug_cprintf", "1");
4233 nvram_set("debug_cprintf_file", "1");
4234 nvram_set("debug_ddns", "1");
4239 state
= SIGUSR2
; /* START */
4242 TRACE_PT("main loop signal/state=%d\n", state
);
4245 case SIGUSR1
: /* USER1: service handler */
4249 case SIGHUP
: /* RESTART */
4250 case SIGINT
: /* STOP */
4251 case SIGQUIT
: /* HALT */
4252 case SIGTERM
: /* REBOOT */
4254 unlink("/var/notice/sysup");
4256 if( nvram_match( "webmon_bkp", "1" ) )
4257 xstart( "/usr/sbin/webmon_bkp", "hourly" ); // make a copy before halt/reboot router
4259 run_nvscript("script_shut", NULL
, 10);
4267 if ((state
== SIGTERM
/* REBOOT */) ||
4268 (state
== SIGQUIT
/* HALT */)) {
4269 remove_storage_main(1);
4272 shutdn(state
== SIGTERM
/* REBOOT */);
4275 if (state
== SIGINT
/* STOP */) {
4279 // SIGHUP (RESTART) falls through
4281 case SIGUSR2
: /* START */
4282 SET_LED(RELEASE_WAN_CONTROL
);
4285 #ifndef TCONFIG_BCMARM
4286 load_files_from_nvram();
4290 fd
= file_lock("usb"); // hold off automount processing
4293 xstart("/usr/sbin/mymotd", "init");
4294 run_nvscript("script_init", NULL
, 2);
4296 file_unlock(fd
); // allow to process usb hotplug events
4299 * On RESTART some partitions can stay mounted if they are busy at the moment.
4300 * In that case USB drivers won't unload, and hotplug won't kick off again to
4301 * remount those drives that actually got unmounted. Make sure to remount ALL
4302 * partitions here by simulating hotplug event.
4304 if (state
== SIGHUP
/* RESTART */)
4305 add_remove_usbhost("-1", 1);
4316 #ifdef CONFIG_BCMWL5
4318 /* Restart NAS one more time - for some reason without
4319 * this the new driver doesn't always bring WDS up.
4326 syslog(LOG_INFO
, "%s: Tomato %s", nvram_safe_get("t_model_name"), tomato_version
);
4329 notice_set("sysup", "");
4333 chld_reap(0); /* Periodically reap zombies. */
4335 sigwait(&sigset
, &state
);
4341 int reboothalt_main(int argc
, char *argv
[])
4343 int reboot
= (strstr(argv
[0], "reboot") != NULL
);
4344 puts(reboot
? "Rebooting..." : "Shutting down...");
4347 kill(1, reboot
? SIGTERM
: SIGQUIT
);
4349 /* In the case we're hung, we'll get stuck and never actually reboot.
4350 * The only way out is to pull power.
4351 * So after 'reset_wait' seconds (default: 20), forcibly crash & restart.
4354 int wait
= nvram_get_int("reset_wait") ? : 20;
4355 if ((wait
< 10) || (wait
> 120)) wait
= 10;
4357 f_write("/proc/sysrq-trigger", "s", 1, 0 , 0); /* sync disks */
4359 puts("Still running... Doing machine reset.");
4361 f_write("/proc/sysrq-trigger", "s", 1, 0 , 0); /* sync disks */
4363 f_write("/proc/sysrq-trigger", "b", 1, 0 , 0); /* machine reset */