Tomato-ND 1.21

[tomato.git] / release / src / include / lpphyregs.h

/*
 *-----------------------------------------------------------------------------
 *  Copyright 1999 - 2006, Broadcom Corporation
 *  All Rights Reserved.
 *  
 *  This is UNPUBLISHED PROPRIETARY SOURCE CODE of Broadcom Corporation;
 *  the contents of this file may not be disclosed to third parties, copied or
 *  duplicated in any form, in whole or in part, without the prior written
 *  permission of Broadcom Corporation.
 *
 *-----------------------------------------------------------------------------
 *
 * DO NOT EDIT THIS FILE, IT WAS MACHINE GENERATED
 * by regdb.pl version @(#)$Id$
 * on Wed Apr 19 13:46:35 2006
*/
/* FILE-CSTYLED */

/* LPPHY registers */
#define LPPHY_BphyVersion       0x000
#define LPPHY_bphyBBConfig      0x001
#define LPPHY_bphyRxStatus0     0x004
#define LPPHY_bphyRxStatus1     0x005
#define LPPHY_bphyCrsThresh     0x006
#define LPPHY_bphyTxError       0x007
#define LPPHY_bphyChannel       0x008
#define LPPHY_bphyworkAround    0x009
#define LPPHY_bphyTest  0x00a
#define LPPHY_bphyFourwireAddress       0x00b
#define LPPHY_bphyFourwireDataHi        0x00c
#define LPPHY_bphyFourwireDataLo        0x00d
#define LPPHY_BphyBistStatus    0x00e
#define LPPHY_PARampTxTimeout   0x010
#define LPPHY_RFSynthDCTimer    0x011
#define LPPHY_PARampTxTimein    0x012
#define LPPHY_RxFiltTimein      0x013
#define LPPHY_PLLCoeff  0x018
#define LPPHY_PllOut    0x019
#define LPPHY_RSSIThreshold     0x020
#define LPPHY_IQThresholdHH     0x021
#define LPPHY_IQThresholdH      0x022
#define LPPHY_IQThresholdL      0x023
#define LPPHY_IQThresholdLL     0x024
#define LPPHY_AgcGain   0x025
#define LPPHY_LNAGainRange      0x026
#define LPPHY_JSSI      0x027
#define LPPHY_TSSIControl       0x028
#define LPPHY_TSSI      0x029
#define LPPHY_TRLoss    0x02a
#define LPPHY_L0Leakage 0x02b
#define LPPHY_LORSSIAcc 0x02c
#define LPPHY_LoIQMagAcc        0x02d
#define LPPHY_TxDCOffset1       0x02e
#define LPPHY_TxDCOffset2       0x02f
#define LPPHY_SyncPeakCnt       0x030
#define LPPHY_SyncFreq  0x031
#define LPPHY_SyncDiversityControl      0x032
#define LPPHY_PeakEnergyL       0x033
#define LPPHY_PeakEnergyH       0x034
#define LPPHY_SyncControl       0x035
#define LPPHY_DsssStep  0x038
#define LPPHY_DsssWarmup        0x039
#define LPPHY_DsssSigPow        0x03d
#define LPPHY_SfdDetectBlockTIme        0x040
#define LPPHY_SFDTimeOut        0x041
#define LPPHY_SFDControl        0x042
#define LPPHY_rxDebug   0x043
#define LPPHY_RxDelayComp       0x044
#define LPPHY_CRSDropoutTimeout 0x045
#define LPPHY_PseudoShortTimeout        0x046
#define LPPHY_PR3931    0x047
#define LPPHY_DSSSCoeff1        0x048
#define LPPHY_DSSSCoeff2        0x049
#define LPPHY_CCKCoeff1 0x04a
#define LPPHY_CCKCoeff2 0x04b
#define LPPHY_TRCorr    0x04c
#define LPPHY_AngleScale        0x04d
#define LPPHY_OptionalModes2    0x04f
#define LPPHY_CCKLMSStepSize    0x050
#define LPPHY_DFEBypass 0x051
#define LPPHY_CCKStartDelayLong 0x052
#define LPPHY_CCKStartDelayShort        0x053
#define LPPHY_PprocChDelay      0x054
#define LPPHY_PProcOnOff        0x055
#define LPPHY_LNAGainTwoBit10   0x05b
#define LPPHY_LNAGainTwoBit32   0x05c
#define LPPHY_OptionalModes     0x05d
#define LPPHY_bphyRxStatus2     0x05e
#define LPPHY_bphyRxStatus3     0x05f
#define LPPHY_pwdnDacDelay      0x063
#define LPPHY_FineDigiGainCtrl  0x067
#define LPPHY_Lg2GainTblLNA8    0x068
#define LPPHY_Lg2GainTblLNA28   0x069
#define LPPHY_GainTblLNATrSw    0x06a
#define LPPHY_PeakEnergy        0x06b
#define LPPHY_lg2InitGain       0x06c
#define LPPHY_BlankCountLnaPga  0x06d
#define LPPHY_LNAGainTwoBit54   0x06e
#define LPPHY_LNAGainTwoBit76   0x06f
#define LPPHY_JSSIControl       0x070
#define LPPHY_Lg2GainTblLNA44   0x071
#define LPPHY_Lg2GainTblLNA62   0x072
#define LPPHY_Version   0x400
#define LPPHY_BBConfig  0x401
#define LPPHY_RxStatus0 0x404
#define LPPHY_RxStatus1 0x405
#define LPPHY_TxError   0x407
#define LPPHY_Channel   0x408
#define LPPHY_workAround        0x409
#define LPPHY_FourwireAddress   0x40b
#define LPPHY_FourwireDataHi    0x40c
#define LPPHY_FourwireDataLo    0x40d
#define LPPHY_BistStatus0       0x40e
#define LPPHY_BistStatus1       0x40f
#define LPPHY_crsgainCtrl       0x410
#define LPPHY_ofdmPwrThresh0    0x411
#define LPPHY_ofdmPwrThresh1    0x412
#define LPPHY_ofdmPwrThresh2    0x413
#define LPPHY_dsssPwrThresh0    0x414
#define LPPHY_dsssPwrThresh1    0x415
#define LPPHY_MinPwrLevel       0x416
#define LPPHY_ofdmSyncThresh0   0x417
#define LPPHY_ofdmSyncThresh1   0x418
#define LPPHY_FineFreqEst       0x419
#define LPPHY_IDLEafterPktRXTimeout     0x41a
#define LPPHY_LTRNCtrl  0x41b
#define LPPHY_DCOffsetTransient 0x41c
#define LPPHY_PreambleInTimeout 0x41d
#define LPPHY_PreambleConfirmTimeout    0x41e
#define LPPHY_ClipThresh        0x41f
#define LPPHY_ClipCtrThresh     0x420
#define LPPHY_ofdmSyncTimerCtrl 0x421
#define LPPHY_WaitforPHYSelTimeout      0x422
#define LPPHY_HiGainDB  0x423
#define LPPHY_LowGainDB 0x424
#define LPPHY_VeryLowGainDB     0x425
#define LPPHY_gainMismatch      0x426
#define LPPHY_gaindirectMismatch        0x427
#define LPPHY_PwrThresh0        0x428
#define LPPHY_PwrThresh1        0x429
#define LPPHY_DetectorDlyAdjust 0x42a
#define LPPHY_ReducedDetectorDly        0x42b
#define LPPHY_dataTimeout       0x42c
#define LPPHY_correlatorDisDly  0x42d
#define LPPHY_DiversityGainBack 0x42e
#define LPPHY_DSSSConfirmCnt    0x42f
#define LPPHY_DCBlankInterval   0x430
#define LPPHY_gainMismatchLimit 0x431
#define LPPHY_crsedthresh       0x432
#define LPPHY_phaseshiftControl 0x433
#define LPPHY_InputPowerDB      0x434
#define LPPHY_ofdmsyncCtrl      0x435
#define LPPHY_AfeADCCtrl0       0x436
#define LPPHY_AfeADCCtrl1       0x437
#define LPPHY_AfeADCCtrl2       0x438
#define LPPHY_AfeDACCtrl        0x439
#define LPPHY_AfeCtrl   0x43a
#define LPPHY_AfeCtrlOvr        0x43b
#define LPPHY_AfeCtrlOvrVal     0x43c
#define LPPHY_AfeRSSICtrl0      0x43d
#define LPPHY_AfeRSSICtrl1      0x43e
#define LPPHY_AfeRSSISel        0x43f
#define LPPHY_RadarThresh       0x440
#define LPPHY_RadarblankInterval        0x441
#define LPPHY_RadarminfmInterval        0x442
#define LPPHY_Radargaintimeout  0x443
#define LPPHY_Radarpulsetimeout 0x444
#define LPPHY_RadardetectFMCtrl 0x445
#define LPPHY_RadardetectEn     0x446
#define LPPHY_RadarRdDataReg    0x447
#define LPPHY_lpphyCtrl 0x448
#define LPPHY_classifierCtrl    0x449
#define LPPHY_resetCtrl 0x44a
#define LPPHY_ClkEnCtrl 0x44b
#define LPPHY_RFOverride0       0x44c
#define LPPHY_RFOverrideVal0    0x44d
#define LPPHY_TRLookup1 0x44e
#define LPPHY_TRLookup2 0x44f
#define LPPHY_RssiSelLookup1    0x450
#define LPPHY_iqloCalCmd        0x451
#define LPPHY_iqloCalCmdNnum    0x452
#define LPPHY_iqloCalCmdGctl    0x453
#define LPPHY_macintDbgReg      0x454
#define LPPHY_TableAddress      0x455
#define LPPHY_TabledataLo       0x456
#define LPPHY_TabledataHi       0x457
#define LPPHY_phyCrsEnableAddress       0x458
#define LPPHY_IdletimeCtrl      0x459
#define LPPHY_IdletimeCrsOnLo   0x45a
#define LPPHY_IdletimeCrsOnHi   0x45b
#define LPPHY_IdletimeMeasTimeLo        0x45c
#define LPPHY_IdletimeMeasTimeHi        0x45d
#define LPPHY_ResetlenOfdmTxAddr        0x45e
#define LPPHY_ResetlenOfdmRxAddr        0x45f
#define LPPHY_reg_crs_enable    0x460
#define LPPHY_PlcpTmtStr0CtrMin 0x461
#define LPPHY_PktfsmResetLenValue       0x462
#define LPPHY_readsym2resetCtrl 0x463
#define LPPHY_Dcfilterdelay1    0x464
#define LPPHY_packetrxActivetimeout     0x465
#define LPPHY_ed_timeoutValue   0x466
#define LPPHY_holdcrsOnValue    0x467
#define LPPHY_ofdmtx_phycrsDelayValue   0x469
#define LPPHY_ccktx_phycrsDelayValue    0x46a
#define LPPHY_EdonconfirmTimerValue     0x46b
#define LPPHY_EdoffconfirmTimerValue    0x46c
#define LPPHY_phycrsoffTimerValue       0x46d
#define LPPHY_adcCompCtrl       0x470
#define LPPHY_log2RBPSKAddress  0x471
#define LPPHY_log2RQPSKAddress  0x472
#define LPPHY_log2R16QAMAddress 0x473
#define LPPHY_log2R64QAMAddress 0x474
#define LPPHY_offsetBPSKAddress 0x475
#define LPPHY_offsetQPSKAddress 0x476
#define LPPHY_offset16QAMAddress        0x477
#define LPPHY_offset64QAMAddress        0x478
#define LPPHY_Alpha1    0x479
#define LPPHY_Alpha2    0x47a
#define LPPHY_Beta1     0x47b
#define LPPHY_Beta2     0x47c
#define LPPHY_LoopNumAddr       0x47d
#define LPPHY_StrCollmaxSampAddress     0x47e
#define LPPHY_MaxSampCoarseFineAddress  0x47f
#define LPPHY_MaxSampCoarseStr0CtrAddress       0x480
#define LPPHY_IQEnableWaitTimeAddress   0x481
#define LPPHY_IQNumSampsAddress 0x482
#define LPPHY_IQAccHiAddress    0x483
#define LPPHY_IQAccLoAddress    0x484
#define LPPHY_IQIPWRAccHiAddress        0x485
#define LPPHY_IQIPWRAccLoAddress        0x486
#define LPPHY_IQQPWRAccHiAddress        0x487
#define LPPHY_IQQPWRAccLoAddress        0x488
#define LPPHY_MaxNumsteps       0x489
#define LPPHY_RotorPhaseAddr    0x48a
#define LPPHY_AdvancedRetardRotorAddr   0x48b
#define LPPHY_rssiAdcdelayCtrlAddr      0x48d
#define LPPHY_tssiStatusAddr    0x48e
#define LPPHY_tempsenseStatusAddr       0x48f
#define LPPHY_tempsenseCtrlAddr 0x490
#define LPPHY_wrssistatusAddr   0x491
#define LPPHY_mufactoraddr      0x492
#define LPPHY_scramstateAddr    0x493
#define LPPHY_txholdoffaddr     0x494
#define LPPHY_pktgainvalAddr    0x495
#define LPPHY_CoarseestimAddr   0x496
#define LPPHY_stateTransitionAddr       0x497
#define LPPHY_trnoffsetAddr     0x498
#define LPPHY_NumRotorAddr      0x499
#define LPPHY_ViterbiOffsetAddr 0x49a
#define LPPHY_SamplecollectwaitAddr     0x49b
#define LPPHY_AphyControlAddr   0x49c
#define LPPHY_NumPassThroughAddr        0x49d
#define LPPHY_RxCompcoeff       0x49e
#define LPPHY_cpaRotateValue    0x49f
#define LPPHY_SampleplayCnt     0x4a0
#define LPPHY_SampplayBufControl        0x4a1
#define LPPHY_fourwireControl   0x4a2
#define LPPHY_cpaTailCountValue 0x4a3
#define LPPHY_TxPwrCtrlCmd      0x4a4
#define LPPHY_TxPwrCtrlNnum     0x4a5
#define LPPHY_TxPwrCtrlIdleTssi 0x4a6
#define LPPHY_TxPwrCtrlTargetPwr        0x4a7
#define LPPHY_TxPwrCtrlDeltaPwrLimit    0x4a8
#define LPPHY_TxPwrCtrlBaseIndex        0x4a9
#define LPPHY_TxPwrCtrlPwrIndex 0x4aa
#define LPPHY_TxPwrCtrlStatus   0x4ab
#define LPPHY_lprfsignallut     0x4ac
#define LPPHY_RxRadioControlFltrState   0x4ad
#define LPPHY_RxRadioControl    0x4ae
#define LPPHY_nrssistatusAddr   0x4af
#define LPPHY_rfoverride2       0x4b0
#define LPPHY_rfoverride2val    0x4b1
#define LPPHY_psctrlovrval0     0x4b2
#define LPPHY_psctrlovrval1     0x4b3
#define LPPHY_psctrlovrval2     0x4b4
#define LPPHY_txgainctrlovrval  0x4b5
#define LPPHY_rxgainctrlovrval  0x4b6
#define LPPHY_afe_ddfs  0x4b7
#define LPPHY_afe_ddfs_pointer_init     0x4b8
#define LPPHY_afe_ddfs_incr_init        0x4b9
#define LPPHY_mrcNoiseReduction 0x4ba
#define LPPHY_TRLookup3 0x4bb
#define LPPHY_TRLookup4 0x4bc
#define LPPHY_RadarFifoStatus   0x4bd
#define LPPHY_gpioOutEn 0x4be
#define LPPHY_gpioSel   0x4bf
#define LPPHY_gpioOut   0x4c0

/* Bits in LPPHY_BphyVersion */
#define LPPHY_BphyVersion_analogType_SHIFT      12
#define LPPHY_BphyVersion_analogType_MASK       (0xf << LPPHY_BphyVersion_analogType_SHIFT)
#define LPPHY_BphyVersion_phyType_SHIFT 8
#define LPPHY_BphyVersion_phyType_MASK  (0xf << LPPHY_BphyVersion_phyType_SHIFT)
#define LPPHY_BphyVersion_version_SHIFT 0
#define LPPHY_BphyVersion_version_MASK  (0xf << LPPHY_BphyVersion_version_SHIFT)

/* Bits in LPPHY_bphyBBConfig */
#define LPPHY_bphyBBConfig_SleepControl_SHIFT   3
#define LPPHY_bphyBBConfig_SleepControl_MASK    (0x7 << LPPHY_bphyBBConfig_SleepControl_SHIFT)
#define LPPHY_bphyBBConfig_PassBadFrames_SHIFT  6
#define LPPHY_bphyBBConfig_PassBadFrames_MASK   (0x1 << LPPHY_bphyBBConfig_PassBadFrames_SHIFT)
#define LPPHY_bphyBBConfig_AntDiv_SHIFT 7
#define LPPHY_bphyBBConfig_AntDiv_MASK  (0x3 << LPPHY_bphyBBConfig_AntDiv_SHIFT)
#define LPPHY_bphyBBConfig_SFDFree_SHIFT        9
#define LPPHY_bphyBBConfig_SFDFree_MASK (0x1 << LPPHY_bphyBBConfig_SFDFree_SHIFT)
#define LPPHY_bphyBBConfig_Darwin_SHIFT 12
#define LPPHY_bphyBBConfig_Darwin_MASK  (0x1 << LPPHY_bphyBBConfig_Darwin_SHIFT)
#define LPPHY_bphyBBConfig_UseMtxParity_SHIFT   13
#define LPPHY_bphyBBConfig_UseMtxParity_MASK    (0x1 << LPPHY_bphyBBConfig_UseMtxParity_SHIFT)
#define LPPHY_bphyBBConfig_resetCCA_SHIFT       14
#define LPPHY_bphyBBConfig_resetCCA_MASK        (0x1 << LPPHY_bphyBBConfig_resetCCA_SHIFT)
#define LPPHY_bphyBBConfig_MacResetRX_SHIFT     15
#define LPPHY_bphyBBConfig_MacResetRX_MASK      (0x1 << LPPHY_bphyBBConfig_MacResetRX_SHIFT)

/* Bits in LPPHY_bphyRxStatus0 */
#define LPPHY_bphyRxStatus0_rxstatus0_SHIFT     0
#define LPPHY_bphyRxStatus0_rxstatus0_MASK      (0xffff << LPPHY_bphyRxStatus0_rxstatus0_SHIFT)

/* Bits in LPPHY_bphyRxStatus1 */
#define LPPHY_bphyRxStatus1_rxstatus1_SHIFT     0
#define LPPHY_bphyRxStatus1_rxstatus1_MASK      (0xffff << LPPHY_bphyRxStatus1_rxstatus1_SHIFT)

/* Bits in LPPHY_bphyCrsThresh */
#define LPPHY_bphyCrsThresh_EnergyOff_SHIFT     0
#define LPPHY_bphyCrsThresh_EnergyOff_MASK      (0xff << LPPHY_bphyCrsThresh_EnergyOff_SHIFT)
#define LPPHY_bphyCrsThresh_EnergyOn_SHIFT      8
#define LPPHY_bphyCrsThresh_EnergyOn_MASK       (0xff << LPPHY_bphyCrsThresh_EnergyOn_SHIFT)

/* Bits in LPPHY_bphyTxError */
#define LPPHY_bphyTxError_pbccSelected_SHIFT    0
#define LPPHY_bphyTxError_pbccSelected_MASK     (0x1 << LPPHY_bphyTxError_pbccSelected_SHIFT)
#define LPPHY_bphyTxError_InvalidHdr_SHIFT      1
#define LPPHY_bphyTxError_InvalidHdr_MASK       (0x1 << LPPHY_bphyTxError_InvalidHdr_SHIFT)
#define LPPHY_bphyTxError_InvalidRate_SHIFT     2
#define LPPHY_bphyTxError_InvalidRate_MASK      (0x1 << LPPHY_bphyTxError_InvalidRate_SHIFT)
#define LPPHY_bphyTxError_LengthLong_SHIFT      3
#define LPPHY_bphyTxError_LengthLong_MASK       (0x1 << LPPHY_bphyTxError_LengthLong_SHIFT)
#define LPPHY_bphyTxError_LengthShort_SHIFT     4
#define LPPHY_bphyTxError_LengthShort_MASK      (0x1 << LPPHY_bphyTxError_LengthShort_SHIFT)
#define LPPHY_bphyTxError_SendFrameErr_SHIFT    5
#define LPPHY_bphyTxError_SendFrameErr_MASK     (0x1 << LPPHY_bphyTxError_SendFrameErr_SHIFT)

/* Bits in LPPHY_bphyChannel */
#define LPPHY_bphyChannel_channel_SHIFT 0
#define LPPHY_bphyChannel_channel_MASK  (0xff << LPPHY_bphyChannel_channel_SHIFT)
#define LPPHY_bphyChannel_vcolock_SHIFT 15
#define LPPHY_bphyChannel_vcolock_MASK  (0x1 << LPPHY_bphyChannel_vcolock_SHIFT)

/* Bits in LPPHY_bphyworkAround */
#define LPPHY_bphyworkAround_workAroundCtrl_SHIFT       0
#define LPPHY_bphyworkAround_workAroundCtrl_MASK        (0xffff << LPPHY_bphyworkAround_workAroundCtrl_SHIFT)

/* Bits in LPPHY_bphyTest */
#define LPPHY_bphyTest_testMode_SHIFT   0
#define LPPHY_bphyTest_testMode_MASK    (0x7f << LPPHY_bphyTest_testMode_SHIFT)
#define LPPHY_bphyTest_loopback_SHIFT   7
#define LPPHY_bphyTest_loopback_MASK    (0x1 << LPPHY_bphyTest_loopback_SHIFT)
#define LPPHY_bphyTest_dcComp_SHIFT     8
#define LPPHY_bphyTest_dcComp_MASK      (0x1 << LPPHY_bphyTest_dcComp_SHIFT)
#define LPPHY_bphyTest_TestCarrSup_SHIFT        9
#define LPPHY_bphyTest_TestCarrSup_MASK (0x1 << LPPHY_bphyTest_TestCarrSup_SHIFT)
#define LPPHY_bphyTest_TestUnscram_SHIFT        10
#define LPPHY_bphyTest_TestUnscram_MASK (0x1 << LPPHY_bphyTest_TestUnscram_SHIFT)
#define LPPHY_bphyTest_FiltSel2_SHIFT   11
#define LPPHY_bphyTest_FiltSel2_MASK    (0x1 << LPPHY_bphyTest_FiltSel2_SHIFT)
#define LPPHY_bphyTest_SwapIQ_SHIFT     14
#define LPPHY_bphyTest_SwapIQ_MASK      (0x1 << LPPHY_bphyTest_SwapIQ_SHIFT)

/* Bits in LPPHY_bphyFourwireAddress */
#define LPPHY_bphyFourwireAddress_fourwireAddress_SHIFT 0
#define LPPHY_bphyFourwireAddress_fourwireAddress_MASK  (0x1ff << LPPHY_bphyFourwireAddress_fourwireAddress_SHIFT)
#define LPPHY_bphyFourwireAddress_fourwireChipEn_SHIFT  14
#define LPPHY_bphyFourwireAddress_fourwireChipEn_MASK   (0x3 << LPPHY_bphyFourwireAddress_fourwireChipEn_SHIFT)

/* Bits in LPPHY_bphyFourwireDataHi */
#define LPPHY_bphyFourwireDataHi_fourwireDataHi_SHIFT   0
#define LPPHY_bphyFourwireDataHi_fourwireDataHi_MASK    (0xffff << LPPHY_bphyFourwireDataHi_fourwireDataHi_SHIFT)

/* Bits in LPPHY_bphyFourwireDataLo */
#define LPPHY_bphyFourwireDataLo_fourwireDataLo_SHIFT   0
#define LPPHY_bphyFourwireDataLo_fourwireDataLo_MASK    (0xffff << LPPHY_bphyFourwireDataLo_fourwireDataLo_SHIFT)

/* Bits in LPPHY_BphyBistStatus */
#define LPPHY_BphyBistStatus_status_SHIFT       0
#define LPPHY_BphyBistStatus_status_MASK        (0xffff << LPPHY_BphyBistStatus_status_SHIFT)

/* Bits in LPPHY_PARampTxTimeout */
#define LPPHY_PARampTxTimeout_PADownTime_SHIFT  0
#define LPPHY_PARampTxTimeout_PADownTime_MASK   (0xff << LPPHY_PARampTxTimeout_PADownTime_SHIFT)
#define LPPHY_PARampTxTimeout_TxPuDownTime_SHIFT        8
#define LPPHY_PARampTxTimeout_TxPuDownTime_MASK (0xff << LPPHY_PARampTxTimeout_TxPuDownTime_SHIFT)

/* Bits in LPPHY_RFSynthDCTimer */
#define LPPHY_RFSynthDCTimer_timeout_SHIFT      0
#define LPPHY_RFSynthDCTimer_timeout_MASK       (0xffff << LPPHY_RFSynthDCTimer_timeout_SHIFT)

/* Bits in LPPHY_PARampTxTimein */
#define LPPHY_PARampTxTimein_PAUpTime_SHIFT     0
#define LPPHY_PARampTxTimein_PAUpTime_MASK      (0xff << LPPHY_PARampTxTimein_PAUpTime_SHIFT)
#define LPPHY_PARampTxTimein_TxPuUpTime_SHIFT   8
#define LPPHY_PARampTxTimein_TxPuUpTime_MASK    (0xff << LPPHY_PARampTxTimein_TxPuUpTime_SHIFT)

/* Bits in LPPHY_RxFiltTimein */
#define LPPHY_RxFiltTimein_FilterUpTime_SHIFT   0
#define LPPHY_RxFiltTimein_FilterUpTime_MASK    (0xff << LPPHY_RxFiltTimein_FilterUpTime_SHIFT)
#define LPPHY_RxFiltTimein_RxPuUpTime_SHIFT     8
#define LPPHY_RxFiltTimein_RxPuUpTime_MASK      (0xff << LPPHY_RxFiltTimein_RxPuUpTime_SHIFT)

/* Bits in LPPHY_PLLCoeff */
#define LPPHY_PLLCoeff_C2_SHIFT 0
#define LPPHY_PLLCoeff_C2_MASK  (0xff << LPPHY_PLLCoeff_C2_SHIFT)
#define LPPHY_PLLCoeff_C1_SHIFT 8
#define LPPHY_PLLCoeff_C1_MASK  (0xff << LPPHY_PLLCoeff_C1_SHIFT)

/* Bits in LPPHY_PllOut */
#define LPPHY_PllOut_pllOut_SHIFT       0
#define LPPHY_PllOut_pllOut_MASK        (0xfff << LPPHY_PllOut_pllOut_SHIFT)

/* Bits in LPPHY_RSSIThreshold */
#define LPPHY_RSSIThreshold_SatLo_SHIFT 0
#define LPPHY_RSSIThreshold_SatLo_MASK  (0xff << LPPHY_RSSIThreshold_SatLo_SHIFT)
#define LPPHY_RSSIThreshold_SatHi_SHIFT 8
#define LPPHY_RSSIThreshold_SatHi_MASK  (0xff << LPPHY_RSSIThreshold_SatHi_SHIFT)

/* Bits in LPPHY_IQThresholdHH */
#define LPPHY_IQThresholdHH_ThreshHH_SHIFT      0
#define LPPHY_IQThresholdHH_ThreshHH_MASK       (0xffff << LPPHY_IQThresholdHH_ThreshHH_SHIFT)

/* Bits in LPPHY_IQThresholdH */
#define LPPHY_IQThresholdH_ThreshH_SHIFT        0
#define LPPHY_IQThresholdH_ThreshH_MASK (0xffff << LPPHY_IQThresholdH_ThreshH_SHIFT)

/* Bits in LPPHY_IQThresholdL */
#define LPPHY_IQThresholdL_ThreshL_SHIFT        0
#define LPPHY_IQThresholdL_ThreshL_MASK (0xffff << LPPHY_IQThresholdL_ThreshL_SHIFT)

/* Bits in LPPHY_IQThresholdLL */
#define LPPHY_IQThresholdLL_ThreshLL_SHIFT      0
#define LPPHY_IQThresholdLL_ThreshLL_MASK       (0xffff << LPPHY_IQThresholdLL_ThreshLL_SHIFT)

/* Bits in LPPHY_AgcGain */
#define LPPHY_AgcGain_gain_SHIFT        0
#define LPPHY_AgcGain_gain_MASK (0xffff << LPPHY_AgcGain_gain_SHIFT)

/* Bits in LPPHY_LNAGainRange */
#define LPPHY_LNAGainRange_LNAGainRange_SHIFT   0
#define LPPHY_LNAGainRange_LNAGainRange_MASK    (0xff << LPPHY_LNAGainRange_LNAGainRange_SHIFT)
#define LPPHY_LNAGainRange_ptrThresh_SHIFT      8
#define LPPHY_LNAGainRange_ptrThresh_MASK       (0xf << LPPHY_LNAGainRange_ptrThresh_SHIFT)
#define LPPHY_LNAGainRange_lnaOn_SHIFT  14
#define LPPHY_LNAGainRange_lnaOn_MASK   (0x1 << LPPHY_LNAGainRange_lnaOn_SHIFT)
#define LPPHY_LNAGainRange_DigiGainEn_SHIFT     15
#define LPPHY_LNAGainRange_DigiGainEn_MASK      (0x1 << LPPHY_LNAGainRange_DigiGainEn_SHIFT)

/* Bits in LPPHY_JSSI */
#define LPPHY_JSSI_JSSI_SHIFT   0
#define LPPHY_JSSI_JSSI_MASK    (0xff << LPPHY_JSSI_JSSI_SHIFT)

/* Bits in LPPHY_TSSIControl */
#define LPPHY_TSSIControl_TSSIDelayM1_SHIFT     0
#define LPPHY_TSSIControl_TSSIDelayM1_MASK      (0xff << LPPHY_TSSIControl_TSSIDelayM1_SHIFT)
#define LPPHY_TSSIControl_UseAlternateTSSI_SHIFT        8
#define LPPHY_TSSIControl_UseAlternateTSSI_MASK (0x1 << LPPHY_TSSIControl_UseAlternateTSSI_SHIFT)
#define LPPHY_TSSIControl_TSSIEn_SHIFT  15
#define LPPHY_TSSIControl_TSSIEn_MASK   (0x1 << LPPHY_TSSIControl_TSSIEn_SHIFT)

/* Bits in LPPHY_TSSI */
#define LPPHY_TSSI_TSSI_SHIFT   0
#define LPPHY_TSSI_TSSI_MASK    (0x3f << LPPHY_TSSI_TSSI_SHIFT)

/* Bits in LPPHY_TRLoss */
#define LPPHY_TRLoss_ThreshLow_SHIFT    0
#define LPPHY_TRLoss_ThreshLow_MASK     (0xf << LPPHY_TRLoss_ThreshLow_SHIFT)
#define LPPHY_TRLoss_ThreshHigh_SHIFT   4
#define LPPHY_TRLoss_ThreshHigh_MASK    (0xf << LPPHY_TRLoss_ThreshHigh_SHIFT)
#define LPPHY_TRLoss_TrInc_SHIFT        8
#define LPPHY_TRLoss_TrInc_MASK (0xf << LPPHY_TRLoss_TrInc_SHIFT)
#define LPPHY_TRLoss_TrLossEn_SHIFT     15
#define LPPHY_TRLoss_TrLossEn_MASK      (0x1 << LPPHY_TRLoss_TrLossEn_SHIFT)

/* Bits in LPPHY_L0Leakage */
#define LPPHY_L0Leakage_TrigDelay_SHIFT 0
#define LPPHY_L0Leakage_TrigDelay_MASK  (0x3f << LPPHY_L0Leakage_TrigDelay_SHIFT)
#define LPPHY_L0Leakage_CapLen_SHIFT    8
#define LPPHY_L0Leakage_CapLen_MASK     (0x3f << LPPHY_L0Leakage_CapLen_SHIFT)

/* Bits in LPPHY_LORSSIAcc */
#define LPPHY_LORSSIAcc_RSSIAccum_SHIFT 0
#define LPPHY_LORSSIAcc_RSSIAccum_MASK  (0xffff << LPPHY_LORSSIAcc_RSSIAccum_SHIFT)

/* Bits in LPPHY_LoIQMagAcc */
#define LPPHY_LoIQMagAcc_IQMagAccum_SHIFT       0
#define LPPHY_LoIQMagAcc_IQMagAccum_MASK        (0xffff << LPPHY_LoIQMagAcc_IQMagAccum_SHIFT)

/* Bits in LPPHY_TxDCOffset1 */
#define LPPHY_TxDCOffset1_dcOffsetScale_SHIFT   0
#define LPPHY_TxDCOffset1_dcOffsetScale_MASK    (0xff << LPPHY_TxDCOffset1_dcOffsetScale_SHIFT)
#define LPPHY_TxDCOffset1_dcOffsetOvr_SHIFT     14
#define LPPHY_TxDCOffset1_dcOffsetOvr_MASK      (0x1 << LPPHY_TxDCOffset1_dcOffsetOvr_SHIFT)
#define LPPHY_TxDCOffset1_dcOffsetEn_SHIFT      15
#define LPPHY_TxDCOffset1_dcOffsetEn_MASK       (0x1 << LPPHY_TxDCOffset1_dcOffsetEn_SHIFT)

/* Bits in LPPHY_TxDCOffset2 */
#define LPPHY_TxDCOffset2_DcOffsetQOvrVal_SHIFT 0
#define LPPHY_TxDCOffset2_DcOffsetQOvrVal_MASK  (0xff << LPPHY_TxDCOffset2_DcOffsetQOvrVal_SHIFT)
#define LPPHY_TxDCOffset2_DcOffsetIOvrVal_SHIFT 8
#define LPPHY_TxDCOffset2_DcOffsetIOvrVal_MASK  (0xff << LPPHY_TxDCOffset2_DcOffsetIOvrVal_SHIFT)

/* Bits in LPPHY_SyncPeakCnt */
#define LPPHY_SyncPeakCnt_MaxPeakCntM1_SHIFT    0
#define LPPHY_SyncPeakCnt_MaxPeakCntM1_MASK     (0x7 << LPPHY_SyncPeakCnt_MaxPeakCntM1_SHIFT)
#define LPPHY_SyncPeakCnt_Kthresh_SHIFT 3
#define LPPHY_SyncPeakCnt_Kthresh_MASK  (0xff << LPPHY_SyncPeakCnt_Kthresh_SHIFT)

/* Bits in LPPHY_SyncFreq */
#define LPPHY_SyncFreq_FreqOffset_SHIFT 0
#define LPPHY_SyncFreq_FreqOffset_MASK  (0xfff << LPPHY_SyncFreq_FreqOffset_SHIFT)

/* Bits in LPPHY_SyncDiversityControl */
#define LPPHY_SyncDiversityControl_CompRssiThresh_SHIFT 0
#define LPPHY_SyncDiversityControl_CompRssiThresh_MASK  (0x3f << LPPHY_SyncDiversityControl_CompRssiThresh_SHIFT)
#define LPPHY_SyncDiversityControl_CompRssiDelay_SHIFT  6
#define LPPHY_SyncDiversityControl_CompRssiDelay_MASK   (0xf << LPPHY_SyncDiversityControl_CompRssiDelay_SHIFT)
#define LPPHY_SyncDiversityControl_LnaGatesDiversity_SHIFT      10
#define LPPHY_SyncDiversityControl_LnaGatesDiversity_MASK       (0x1 << LPPHY_SyncDiversityControl_LnaGatesDiversity_SHIFT)

/* Bits in LPPHY_PeakEnergyL */
#define LPPHY_PeakEnergyL_minAvgIQPwr_SHIFT     0
#define LPPHY_PeakEnergyL_minAvgIQPwr_MASK      (0xffff << LPPHY_PeakEnergyL_minAvgIQPwr_SHIFT)

/* Bits in LPPHY_PeakEnergyH */
#define LPPHY_PeakEnergyH_minAvgIQPwr_SHIFT     0
#define LPPHY_PeakEnergyH_minAvgIQPwr_MASK      (0x1f << LPPHY_PeakEnergyH_minAvgIQPwr_SHIFT)

/* Bits in LPPHY_SyncControl */
#define LPPHY_SyncControl_WarmupDurationM1_SHIFT        0
#define LPPHY_SyncControl_WarmupDurationM1_MASK (0x7f << LPPHY_SyncControl_WarmupDurationM1_SHIFT)
#define LPPHY_SyncControl_ToggleCutoff_SHIFT    7
#define LPPHY_SyncControl_ToggleCutoff_MASK     (0x1 << LPPHY_SyncControl_ToggleCutoff_SHIFT)
#define LPPHY_SyncControl_AngleStartPoint_SHIFT 8
#define LPPHY_SyncControl_AngleStartPoint_MASK  (0x1f << LPPHY_SyncControl_AngleStartPoint_SHIFT)

/* Bits in LPPHY_DsssStep */
#define LPPHY_DsssStep_LMSStep_SHIFT    0
#define LPPHY_DsssStep_LMSStep_MASK     (0xfff << LPPHY_DsssStep_LMSStep_SHIFT)

/* Bits in LPPHY_DsssWarmup */
#define LPPHY_DsssWarmup_WarmupDurationM1_SHIFT 0
#define LPPHY_DsssWarmup_WarmupDurationM1_MASK  (0xff << LPPHY_DsssWarmup_WarmupDurationM1_SHIFT)

/* Bits in LPPHY_DsssSigPow */
#define LPPHY_DsssSigPow_SigPow_SHIFT   0
#define LPPHY_DsssSigPow_SigPow_MASK    (0xff << LPPHY_DsssSigPow_SigPow_SHIFT)

/* Bits in LPPHY_SfdDetectBlockTIme */
#define LPPHY_SfdDetectBlockTIme_BlockTime_SHIFT        0
#define LPPHY_SfdDetectBlockTIme_BlockTime_MASK (0x3f << LPPHY_SfdDetectBlockTIme_BlockTime_SHIFT)

/* Bits in LPPHY_SFDTimeOut */
#define LPPHY_SFDTimeOut_short_SHIFT    8
#define LPPHY_SFDTimeOut_short_MASK     (0xff << LPPHY_SFDTimeOut_short_SHIFT)
#define LPPHY_SFDTimeOut_long_SHIFT     0
#define LPPHY_SFDTimeOut_long_MASK      (0xff << LPPHY_SFDTimeOut_long_SHIFT)

/* Bits in LPPHY_SFDControl */
#define LPPHY_SFDControl_UseLongTimeout_SHIFT   0
#define LPPHY_SFDControl_UseLongTimeout_MASK    (0x1 << LPPHY_SFDControl_UseLongTimeout_SHIFT)

/* Bits in LPPHY_rxDebug */
#define LPPHY_rxDebug_SfdDetectBitCnt_SHIFT     0
#define LPPHY_rxDebug_SfdDetectBitCnt_MASK      (0xff << LPPHY_rxDebug_SfdDetectBitCnt_SHIFT)
#define LPPHY_rxDebug_MainRxSmState_SHIFT       8
#define LPPHY_rxDebug_MainRxSmState_MASK        (0x7 << LPPHY_rxDebug_MainRxSmState_SHIFT)

/* Bits in LPPHY_RxDelayComp */
#define LPPHY_RxDelayComp_DelayComp_SHIFT       0
#define LPPHY_RxDelayComp_DelayComp_MASK        (0xff << LPPHY_RxDelayComp_DelayComp_SHIFT)

/* Bits in LPPHY_CRSDropoutTimeout */
#define LPPHY_CRSDropoutTimeout_Timeout_SHIFT   0
#define LPPHY_CRSDropoutTimeout_Timeout_MASK    (0xffff << LPPHY_CRSDropoutTimeout_Timeout_SHIFT)

/* Bits in LPPHY_PseudoShortTimeout */
#define LPPHY_PseudoShortTimeout_ShortSFDNZeros_SHIFT   0
#define LPPHY_PseudoShortTimeout_ShortSFDNZeros_MASK    (0xf << LPPHY_PseudoShortTimeout_ShortSFDNZeros_SHIFT)

/* Bits in LPPHY_PR3931 */
#define LPPHY_PR3931_PR3931Val_SHIFT    0
#define LPPHY_PR3931_PR3931Val_MASK     (0xf << LPPHY_PR3931_PR3931Val_SHIFT)

/* Bits in LPPHY_DSSSCoeff1 */
#define LPPHY_DSSSCoeff1_C1_SHIFT       0
#define LPPHY_DSSSCoeff1_C1_MASK        (0x1ff << LPPHY_DSSSCoeff1_C1_SHIFT)

/* Bits in LPPHY_DSSSCoeff2 */
#define LPPHY_DSSSCoeff2_C2_SHIFT       0
#define LPPHY_DSSSCoeff2_C2_MASK        (0x1ff << LPPHY_DSSSCoeff2_C2_SHIFT)

/* Bits in LPPHY_CCKCoeff1 */
#define LPPHY_CCKCoeff1_C1_SHIFT        0
#define LPPHY_CCKCoeff1_C1_MASK (0x1ff << LPPHY_CCKCoeff1_C1_SHIFT)

/* Bits in LPPHY_CCKCoeff2 */
#define LPPHY_CCKCoeff2_C2_SHIFT        0
#define LPPHY_CCKCoeff2_C2_MASK (0x1ff << LPPHY_CCKCoeff2_C2_SHIFT)

/* Bits in LPPHY_TRCorr */
#define LPPHY_TRCorr_TRCorr_SHIFT       0
#define LPPHY_TRCorr_TRCorr_MASK        (0xff << LPPHY_TRCorr_TRCorr_SHIFT)

/* Bits in LPPHY_AngleScale */
#define LPPHY_AngleScale_angleScale_SHIFT       0
#define LPPHY_AngleScale_angleScale_MASK        (0x7f << LPPHY_AngleScale_angleScale_SHIFT)

/* Bits in LPPHY_OptionalModes2 */
#define LPPHY_OptionalModes2_DCBlockMode_SHIFT  1
#define LPPHY_OptionalModes2_DCBlockMode_MASK   (0x1 << LPPHY_OptionalModes2_DCBlockMode_SHIFT)
#define LPPHY_OptionalModes2_AlphaSel_SHIFT     2
#define LPPHY_OptionalModes2_AlphaSel_MASK      (0x3 << LPPHY_OptionalModes2_AlphaSel_SHIFT)

/* Bits in LPPHY_CCKLMSStepSize */
#define LPPHY_CCKLMSStepSize_StepSize_SHIFT     0
#define LPPHY_CCKLMSStepSize_StepSize_MASK      (0x7 << LPPHY_CCKLMSStepSize_StepSize_SHIFT)

/* Bits in LPPHY_DFEBypass */
#define LPPHY_DFEBypass_Bypass_SHIFT    0
#define LPPHY_DFEBypass_Bypass_MASK     (0x1 << LPPHY_DFEBypass_Bypass_SHIFT)

/* Bits in LPPHY_CCKStartDelayLong */
#define LPPHY_CCKStartDelayLong_StartDelayLong_SHIFT    0
#define LPPHY_CCKStartDelayLong_StartDelayLong_MASK     (0xfff << LPPHY_CCKStartDelayLong_StartDelayLong_SHIFT)

/* Bits in LPPHY_CCKStartDelayShort */
#define LPPHY_CCKStartDelayShort_StartDelayShort_SHIFT  0
#define LPPHY_CCKStartDelayShort_StartDelayShort_MASK   (0xfff << LPPHY_CCKStartDelayShort_StartDelayShort_SHIFT)

/* Bits in LPPHY_PprocChDelay */
#define LPPHY_PprocChDelay_ChannelDelay_SHIFT   0
#define LPPHY_PprocChDelay_ChannelDelay_MASK    (0x1f << LPPHY_PprocChDelay_ChannelDelay_SHIFT)

/* Bits in LPPHY_PProcOnOff */
#define LPPHY_PProcOnOff_OnOff_SHIFT    0
#define LPPHY_PProcOnOff_OnOff_MASK     (0x1 << LPPHY_PProcOnOff_OnOff_SHIFT)

/* Bits in LPPHY_LNAGainTwoBit10 */
#define LPPHY_LNAGainTwoBit10_LNAGainRangeTwoBit0_SHIFT 0
#define LPPHY_LNAGainTwoBit10_LNAGainRangeTwoBit0_MASK  (0xff << LPPHY_LNAGainTwoBit10_LNAGainRangeTwoBit0_SHIFT)
#define LPPHY_LNAGainTwoBit10_LNAGainRangeTwoBit1_SHIFT 8
#define LPPHY_LNAGainTwoBit10_LNAGainRangeTwoBit1_MASK  (0xff << LPPHY_LNAGainTwoBit10_LNAGainRangeTwoBit1_SHIFT)

/* Bits in LPPHY_LNAGainTwoBit32 */
#define LPPHY_LNAGainTwoBit32_LNAGainRangeTwoBit2_SHIFT 0
#define LPPHY_LNAGainTwoBit32_LNAGainRangeTwoBit2_MASK  (0xff << LPPHY_LNAGainTwoBit32_LNAGainRangeTwoBit2_SHIFT)
#define LPPHY_LNAGainTwoBit32_LNAGainRangeTwoBit3_SHIFT 8
#define LPPHY_LNAGainTwoBit32_LNAGainRangeTwoBit3_MASK  (0xff << LPPHY_LNAGainTwoBit32_LNAGainRangeTwoBit3_SHIFT)

/* Bits in LPPHY_OptionalModes */
#define LPPHY_OptionalModes_WaitStateTime_SHIFT 0
#define LPPHY_OptionalModes_WaitStateTime_MASK  (0x7f << LPPHY_OptionalModes_WaitStateTime_SHIFT)
#define LPPHY_OptionalModes_DcCmpEnSel_SHIFT    7
#define LPPHY_OptionalModes_DcCmpEnSel_MASK     (0x1 << LPPHY_OptionalModes_DcCmpEnSel_SHIFT)
#define LPPHY_OptionalModes_LNA0_SHIFT  8
#define LPPHY_OptionalModes_LNA0_MASK   (0x3 << LPPHY_OptionalModes_LNA0_SHIFT)
#define LPPHY_OptionalModes_LNA1_SHIFT  10
#define LPPHY_OptionalModes_LNA1_MASK   (0x3 << LPPHY_OptionalModes_LNA1_SHIFT)
#define LPPHY_OptionalModes_MvgAvgEn_SHIFT      12
#define LPPHY_OptionalModes_MvgAvgEn_MASK       (0x1 << LPPHY_OptionalModes_MvgAvgEn_SHIFT)
#define LPPHY_OptionalModes_CtrlRegDcRmEn_SHIFT 13
#define LPPHY_OptionalModes_CtrlRegDcRmEn_MASK  (0x1 << LPPHY_OptionalModes_CtrlRegDcRmEn_SHIFT)
#define LPPHY_OptionalModes_Const_SHIFT 14
#define LPPHY_OptionalModes_Const_MASK  (0x1 << LPPHY_OptionalModes_Const_SHIFT)

/* Bits in LPPHY_bphyRxStatus2 */
#define LPPHY_bphyRxStatus2_rxstatus2_SHIFT     0
#define LPPHY_bphyRxStatus2_rxstatus2_MASK      (0xffff << LPPHY_bphyRxStatus2_rxstatus2_SHIFT)

/* Bits in LPPHY_bphyRxStatus3 */
#define LPPHY_bphyRxStatus3_rxstatus3_SHIFT     0
#define LPPHY_bphyRxStatus3_rxstatus3_MASK      (0xffff << LPPHY_bphyRxStatus3_rxstatus3_SHIFT)

/* Bits in LPPHY_pwdnDacDelay */
#define LPPHY_pwdnDacDelay_DownTime_SHIFT       0
#define LPPHY_pwdnDacDelay_DownTime_MASK        (0xff << LPPHY_pwdnDacDelay_DownTime_SHIFT)

/* Bits in LPPHY_FineDigiGainCtrl */
#define LPPHY_FineDigiGainCtrl_SampleCount_SHIFT        0
#define LPPHY_FineDigiGainCtrl_SampleCount_MASK (0x1f << LPPHY_FineDigiGainCtrl_SampleCount_SHIFT)
#define LPPHY_FineDigiGainCtrl_BypassOvr_SHIFT  14
#define LPPHY_FineDigiGainCtrl_BypassOvr_MASK   (0x1 << LPPHY_FineDigiGainCtrl_BypassOvr_SHIFT)
#define LPPHY_FineDigiGainCtrl_Enable_SHIFT     15
#define LPPHY_FineDigiGainCtrl_Enable_MASK      (0x1 << LPPHY_FineDigiGainCtrl_Enable_SHIFT)

/* Bits in LPPHY_Lg2GainTblLNA8 */
#define LPPHY_Lg2GainTblLNA8_LNA000_SHIFT       0
#define LPPHY_Lg2GainTblLNA8_LNA000_MASK        (0xff << LPPHY_Lg2GainTblLNA8_LNA000_SHIFT)
#define LPPHY_Lg2GainTblLNA8_LNA001_SHIFT       8
#define LPPHY_Lg2GainTblLNA8_LNA001_MASK        (0xff << LPPHY_Lg2GainTblLNA8_LNA001_SHIFT)

/* Bits in LPPHY_Lg2GainTblLNA28 */
#define LPPHY_Lg2GainTblLNA28_LNA010_SHIFT      0
#define LPPHY_Lg2GainTblLNA28_LNA010_MASK       (0xff << LPPHY_Lg2GainTblLNA28_LNA010_SHIFT)
#define LPPHY_Lg2GainTblLNA28_LNA011_SHIFT      8
#define LPPHY_Lg2GainTblLNA28_LNA011_MASK       (0xff << LPPHY_Lg2GainTblLNA28_LNA011_SHIFT)

/* Bits in LPPHY_GainTblLNATrSw */
#define LPPHY_GainTblLNATrSw_TrSw0_SHIFT        0
#define LPPHY_GainTblLNATrSw_TrSw0_MASK (0xff << LPPHY_GainTblLNATrSw_TrSw0_SHIFT)
#define LPPHY_GainTblLNATrSw_TrSw1_SHIFT        8
#define LPPHY_GainTblLNATrSw_TrSw1_MASK (0xff << LPPHY_GainTblLNATrSw_TrSw1_SHIFT)

/* Bits in LPPHY_PeakEnergy */
#define LPPHY_PeakEnergy_Thresh_SHIFT   0
#define LPPHY_PeakEnergy_Thresh_MASK    (0xff << LPPHY_PeakEnergy_Thresh_SHIFT)
#define LPPHY_PeakEnergy_Min_SHIFT      8
#define LPPHY_PeakEnergy_Min_MASK       (0xff << LPPHY_PeakEnergy_Min_SHIFT)

/* Bits in LPPHY_lg2InitGain */
#define LPPHY_lg2InitGain_InitGain_SHIFT        0
#define LPPHY_lg2InitGain_InitGain_MASK (0xff << LPPHY_lg2InitGain_InitGain_SHIFT)
#define LPPHY_lg2InitGain_adjMinPower_SHIFT     8
#define LPPHY_lg2InitGain_adjMinPower_MASK      (0x1 << LPPHY_lg2InitGain_adjMinPower_SHIFT)
#define LPPHY_lg2InitGain_BlankingEn_SHIFT      9
#define LPPHY_lg2InitGain_BlankingEn_MASK       (0x1 << LPPHY_lg2InitGain_BlankingEn_SHIFT)

/* Bits in LPPHY_BlankCountLnaPga */
#define LPPHY_BlankCountLnaPga_PGA_SHIFT        0
#define LPPHY_BlankCountLnaPga_PGA_MASK (0xff << LPPHY_BlankCountLnaPga_PGA_SHIFT)
#define LPPHY_BlankCountLnaPga_LNA_SHIFT        8
#define LPPHY_BlankCountLnaPga_LNA_MASK (0xff << LPPHY_BlankCountLnaPga_LNA_SHIFT)

/* Bits in LPPHY_LNAGainTwoBit54 */
#define LPPHY_LNAGainTwoBit54_LNAGainRangeTwoBit4_SHIFT 0
#define LPPHY_LNAGainTwoBit54_LNAGainRangeTwoBit4_MASK  (0xff << LPPHY_LNAGainTwoBit54_LNAGainRangeTwoBit4_SHIFT)
#define LPPHY_LNAGainTwoBit54_LNAGainRangeTwoBit5_SHIFT 8
#define LPPHY_LNAGainTwoBit54_LNAGainRangeTwoBit5_MASK  (0xff << LPPHY_LNAGainTwoBit54_LNAGainRangeTwoBit5_SHIFT)

/* Bits in LPPHY_LNAGainTwoBit76 */
#define LPPHY_LNAGainTwoBit76_LNAGainRangeTwoBit6_SHIFT 0
#define LPPHY_LNAGainTwoBit76_LNAGainRangeTwoBit6_MASK  (0xff << LPPHY_LNAGainTwoBit76_LNAGainRangeTwoBit6_SHIFT)
#define LPPHY_LNAGainTwoBit76_LNAGainRangeTwoBit7_SHIFT 8
#define LPPHY_LNAGainTwoBit76_LNAGainRangeTwoBit7_MASK  (0xff << LPPHY_LNAGainTwoBit76_LNAGainRangeTwoBit7_SHIFT)

/* Bits in LPPHY_JSSIControl */
#define LPPHY_JSSIControl_UseGmodeJSSI_SHIFT    0
#define LPPHY_JSSIControl_UseGmodeJSSI_MASK     (0x1 << LPPHY_JSSIControl_UseGmodeJSSI_SHIFT)

/* Bits in LPPHY_Lg2GainTblLNA44 */
#define LPPHY_Lg2GainTblLNA44_LNA100_SHIFT      0
#define LPPHY_Lg2GainTblLNA44_LNA100_MASK       (0xff << LPPHY_Lg2GainTblLNA44_LNA100_SHIFT)
#define LPPHY_Lg2GainTblLNA44_LNA101_SHIFT      8
#define LPPHY_Lg2GainTblLNA44_LNA101_MASK       (0xff << LPPHY_Lg2GainTblLNA44_LNA101_SHIFT)

/* Bits in LPPHY_Lg2GainTblLNA62 */
#define LPPHY_Lg2GainTblLNA62_LNA110_SHIFT      0
#define LPPHY_Lg2GainTblLNA62_LNA110_MASK       (0xff << LPPHY_Lg2GainTblLNA62_LNA110_SHIFT)
#define LPPHY_Lg2GainTblLNA62_LNA111_SHIFT      8
#define LPPHY_Lg2GainTblLNA62_LNA111_MASK       (0xff << LPPHY_Lg2GainTblLNA62_LNA111_SHIFT)

/* Bits in LPPHY_Version */
#define LPPHY_Version_analogType_SHIFT  12
#define LPPHY_Version_analogType_MASK   (0xf << LPPHY_Version_analogType_SHIFT)
#define LPPHY_Version_phyType_SHIFT     8
#define LPPHY_Version_phyType_MASK      (0xf << LPPHY_Version_phyType_SHIFT)
#define LPPHY_Version_version_SHIFT     0
#define LPPHY_Version_version_MASK      (0xf << LPPHY_Version_version_SHIFT)

/* Bits in LPPHY_BBConfig */
#define LPPHY_BBConfig_UseMtxParity_SHIFT       13
#define LPPHY_BBConfig_UseMtxParity_MASK        (0x1 << LPPHY_BBConfig_UseMtxParity_SHIFT)
#define LPPHY_BBConfig_resetCCA_SHIFT   14
#define LPPHY_BBConfig_resetCCA_MASK    (0x1 << LPPHY_BBConfig_resetCCA_SHIFT)

/* Bits in LPPHY_RxStatus0 */
#define LPPHY_RxStatus0_rxstatus2phyregs_SHIFT  0
#define LPPHY_RxStatus0_rxstatus2phyregs_MASK   (0xffff << LPPHY_RxStatus0_rxstatus2phyregs_SHIFT)

/* Bits in LPPHY_RxStatus1 */
#define LPPHY_RxStatus1_rxstatus2phyregs_SHIFT  0
#define LPPHY_RxStatus1_rxstatus2phyregs_MASK   (0xffff << LPPHY_RxStatus1_rxstatus2phyregs_SHIFT)

/* Bits in LPPHY_TxError */
#define LPPHY_TxError_send_frame_err_SHIFT      5
#define LPPHY_TxError_send_frame_err_MASK       (0x1 << LPPHY_TxError_send_frame_err_SHIFT)
#define LPPHY_TxError_lengthmismatch_short_SHIFT        4
#define LPPHY_TxError_lengthmismatch_short_MASK (0x1 << LPPHY_TxError_lengthmismatch_short_SHIFT)
#define LPPHY_TxError_lengthmismatch_long_SHIFT 3
#define LPPHY_TxError_lengthmismatch_long_MASK  (0x1 << LPPHY_TxError_lengthmismatch_long_SHIFT)
#define LPPHY_TxError_invalidrate_SHIFT 2
#define LPPHY_TxError_invalidrate_MASK  (0x1 << LPPHY_TxError_invalidrate_SHIFT)

/* Bits in LPPHY_Channel */
#define LPPHY_Channel_currentChannel_SHIFT      0
#define LPPHY_Channel_currentChannel_MASK       (0xff << LPPHY_Channel_currentChannel_SHIFT)

/* Bits in LPPHY_workAround */
#define LPPHY_workAround_workAroundCtrl_SHIFT   0
#define LPPHY_workAround_workAroundCtrl_MASK    (0xffff << LPPHY_workAround_workAroundCtrl_SHIFT)

/* Bits in LPPHY_FourwireAddress */
#define LPPHY_FourwireAddress_fourwireAddress_SHIFT     0
#define LPPHY_FourwireAddress_fourwireAddress_MASK      (0x1ff << LPPHY_FourwireAddress_fourwireAddress_SHIFT)
#define LPPHY_FourwireAddress_fourwireChipEn_SHIFT      14
#define LPPHY_FourwireAddress_fourwireChipEn_MASK       (0x3 << LPPHY_FourwireAddress_fourwireChipEn_SHIFT)

/* Bits in LPPHY_FourwireDataHi */
#define LPPHY_FourwireDataHi_fourwireDataHi_SHIFT       0
#define LPPHY_FourwireDataHi_fourwireDataHi_MASK        (0xffff << LPPHY_FourwireDataHi_fourwireDataHi_SHIFT)

/* Bits in LPPHY_FourwireDataLo */
#define LPPHY_FourwireDataLo_fourwireDataLo_SHIFT       0
#define LPPHY_FourwireDataLo_fourwireDataLo_MASK        (0xffff << LPPHY_FourwireDataLo_fourwireDataLo_SHIFT)

/* Bits in LPPHY_BistStatus0 */
#define LPPHY_BistStatus0_bistFail_SHIFT        0
#define LPPHY_BistStatus0_bistFail_MASK (0xffff << LPPHY_BistStatus0_bistFail_SHIFT)

/* Bits in LPPHY_BistStatus1 */
#define LPPHY_BistStatus1_bistFail_SHIFT        0
#define LPPHY_BistStatus1_bistFail_MASK (0xffff << LPPHY_BistStatus1_bistFail_SHIFT)

/* Bits in LPPHY_crsgainCtrl */
#define LPPHY_crsgainCtrl_enableadccomponlyafterpktrx_SHIFT     12
#define LPPHY_crsgainCtrl_enableadccomponlyafterpktrx_MASK      (0x1 << LPPHY_crsgainCtrl_enableadccomponlyafterpktrx_SHIFT)
#define LPPHY_crsgainCtrl_phycrsctrl_SHIFT      8
#define LPPHY_crsgainCtrl_phycrsctrl_MASK       (0xf << LPPHY_crsgainCtrl_phycrsctrl_SHIFT)
#define LPPHY_crsgainCtrl_crseddisable_SHIFT    7
#define LPPHY_crsgainCtrl_crseddisable_MASK     (0x1 << LPPHY_crsgainCtrl_crseddisable_SHIFT)
#define LPPHY_crsgainCtrl_DSSSDetectionEnable_SHIFT     6
#define LPPHY_crsgainCtrl_DSSSDetectionEnable_MASK      (0x1 << LPPHY_crsgainCtrl_DSSSDetectionEnable_SHIFT)
#define LPPHY_crsgainCtrl_OFDMDetectionEnable_SHIFT     5
#define LPPHY_crsgainCtrl_OFDMDetectionEnable_MASK      (0x1 << LPPHY_crsgainCtrl_OFDMDetectionEnable_SHIFT)
#define LPPHY_crsgainCtrl_BPHYGatingEnable_SHIFT        4
#define LPPHY_crsgainCtrl_BPHYGatingEnable_MASK (0x1 << LPPHY_crsgainCtrl_BPHYGatingEnable_SHIFT)
#define LPPHY_crsgainCtrl_APHYGatingEnable_SHIFT        3
#define LPPHY_crsgainCtrl_APHYGatingEnable_MASK (0x1 << LPPHY_crsgainCtrl_APHYGatingEnable_SHIFT)
#define LPPHY_crsgainCtrl_MRCEnable_SHIFT       2
#define LPPHY_crsgainCtrl_MRCEnable_MASK        (0x1 << LPPHY_crsgainCtrl_MRCEnable_SHIFT)
#define LPPHY_crsgainCtrl_DiversityChkEnable_SHIFT      1
#define LPPHY_crsgainCtrl_DiversityChkEnable_MASK       (0x1 << LPPHY_crsgainCtrl_DiversityChkEnable_SHIFT)
#define LPPHY_crsgainCtrl_DefaultAntenna_SHIFT  0
#define LPPHY_crsgainCtrl_DefaultAntenna_MASK   (0x1 << LPPHY_crsgainCtrl_DefaultAntenna_SHIFT)

/* Bits in LPPHY_ofdmPwrThresh0 */
#define LPPHY_ofdmPwrThresh0_ofdmPwrThresh0_SHIFT       0
#define LPPHY_ofdmPwrThresh0_ofdmPwrThresh0_MASK        (0xff << LPPHY_ofdmPwrThresh0_ofdmPwrThresh0_SHIFT)
#define LPPHY_ofdmPwrThresh0_ofdmPwrThresh1_SHIFT       8
#define LPPHY_ofdmPwrThresh0_ofdmPwrThresh1_MASK        (0xff << LPPHY_ofdmPwrThresh0_ofdmPwrThresh1_SHIFT)

/* Bits in LPPHY_ofdmPwrThresh1 */
#define LPPHY_ofdmPwrThresh1_ofdmPwrThresh2_SHIFT       0
#define LPPHY_ofdmPwrThresh1_ofdmPwrThresh2_MASK        (0xff << LPPHY_ofdmPwrThresh1_ofdmPwrThresh2_SHIFT)
#define LPPHY_ofdmPwrThresh1_ofdmPwrThresh3_SHIFT       8
#define LPPHY_ofdmPwrThresh1_ofdmPwrThresh3_MASK        (0xff << LPPHY_ofdmPwrThresh1_ofdmPwrThresh3_SHIFT)

/* Bits in LPPHY_ofdmPwrThresh2 */
#define LPPHY_ofdmPwrThresh2_ofdmPwrThresh4_SHIFT       0
#define LPPHY_ofdmPwrThresh2_ofdmPwrThresh4_MASK        (0xff << LPPHY_ofdmPwrThresh2_ofdmPwrThresh4_SHIFT)

/* Bits in LPPHY_dsssPwrThresh0 */
#define LPPHY_dsssPwrThresh0_dsssPwrThresh0_SHIFT       0
#define LPPHY_dsssPwrThresh0_dsssPwrThresh0_MASK        (0xff << LPPHY_dsssPwrThresh0_dsssPwrThresh0_SHIFT)
#define LPPHY_dsssPwrThresh0_dsssPwrThresh1_SHIFT       8
#define LPPHY_dsssPwrThresh0_dsssPwrThresh1_MASK        (0xff << LPPHY_dsssPwrThresh0_dsssPwrThresh1_SHIFT)

/* Bits in LPPHY_dsssPwrThresh1 */
#define LPPHY_dsssPwrThresh1_dsssPwrThresh2_SHIFT       0
#define LPPHY_dsssPwrThresh1_dsssPwrThresh2_MASK        (0xff << LPPHY_dsssPwrThresh1_dsssPwrThresh2_SHIFT)
#define LPPHY_dsssPwrThresh1_dsssPwrThresh3_SHIFT       8
#define LPPHY_dsssPwrThresh1_dsssPwrThresh3_MASK        (0xff << LPPHY_dsssPwrThresh1_dsssPwrThresh3_SHIFT)

/* Bits in LPPHY_MinPwrLevel */
#define LPPHY_MinPwrLevel_ofdmMinPwrLevel_SHIFT 0
#define LPPHY_MinPwrLevel_ofdmMinPwrLevel_MASK  (0xff << LPPHY_MinPwrLevel_ofdmMinPwrLevel_SHIFT)
#define LPPHY_MinPwrLevel_dsssMinPwrLevel_SHIFT 8
#define LPPHY_MinPwrLevel_dsssMinPwrLevel_MASK  (0xff << LPPHY_MinPwrLevel_dsssMinPwrLevel_SHIFT)

/* Bits in LPPHY_ofdmSyncThresh0 */
#define LPPHY_ofdmSyncThresh0_ofdmSyncThresh0_SHIFT     0
#define LPPHY_ofdmSyncThresh0_ofdmSyncThresh0_MASK      (0xff << LPPHY_ofdmSyncThresh0_ofdmSyncThresh0_SHIFT)
#define LPPHY_ofdmSyncThresh0_ofdmSyncThresh1_SHIFT     8
#define LPPHY_ofdmSyncThresh0_ofdmSyncThresh1_MASK      (0xff << LPPHY_ofdmSyncThresh0_ofdmSyncThresh1_SHIFT)

/* Bits in LPPHY_ofdmSyncThresh1 */
#define LPPHY_ofdmSyncThresh1_ofdmSyncThresh2_SHIFT     0
#define LPPHY_ofdmSyncThresh1_ofdmSyncThresh2_MASK      (0xf << LPPHY_ofdmSyncThresh1_ofdmSyncThresh2_SHIFT)
#define LPPHY_ofdmSyncThresh1_ofdmSyncThresh3_SHIFT     8
#define LPPHY_ofdmSyncThresh1_ofdmSyncThresh3_MASK      (0xf << LPPHY_ofdmSyncThresh1_ofdmSyncThresh3_SHIFT)

/* Bits in LPPHY_FineFreqEst */
#define LPPHY_FineFreqEst_FineFreqEstDly_SHIFT  0
#define LPPHY_FineFreqEst_FineFreqEstDly_MASK   (0xff << LPPHY_FineFreqEst_FineFreqEstDly_SHIFT)
#define LPPHY_FineFreqEst_FineFreqEstLength_SHIFT       8
#define LPPHY_FineFreqEst_FineFreqEstLength_MASK        (0xff << LPPHY_FineFreqEst_FineFreqEstLength_SHIFT)

/* Bits in LPPHY_IDLEafterPktRXTimeout */
#define LPPHY_IDLEafterPktRXTimeout_APHYIdleAfterPktRxTimeOut_SHIFT     0
#define LPPHY_IDLEafterPktRXTimeout_APHYIdleAfterPktRxTimeOut_MASK      (0xff << LPPHY_IDLEafterPktRXTimeout_APHYIdleAfterPktRxTimeOut_SHIFT)
#define LPPHY_IDLEafterPktRXTimeout_BPHYIdleAfterPktRxTimeOut_SHIFT     8
#define LPPHY_IDLEafterPktRXTimeout_BPHYIdleAfterPktRxTimeOut_MASK      (0xff << LPPHY_IDLEafterPktRXTimeout_BPHYIdleAfterPktRxTimeOut_SHIFT)

/* Bits in LPPHY_LTRNCtrl */
#define LPPHY_LTRNCtrl_LTRNBlankingLength_SHIFT 0
#define LPPHY_LTRNCtrl_LTRNBlankingLength_MASK  (0x7f << LPPHY_LTRNCtrl_LTRNBlankingLength_SHIFT)
#define LPPHY_LTRNCtrl_crsLTRNOffset_SHIFT      7
#define LPPHY_LTRNCtrl_crsLTRNOffset_MASK       (0x1f << LPPHY_LTRNCtrl_crsLTRNOffset_SHIFT)

/* Bits in LPPHY_DCOffsetTransient */
#define LPPHY_DCOffsetTransient_dcOffsetTransientThresh_SHIFT   0
#define LPPHY_DCOffsetTransient_dcOffsetTransientThresh_MASK    (0xff << LPPHY_DCOffsetTransient_dcOffsetTransientThresh_SHIFT)
#define LPPHY_DCOffsetTransient_dcOffsetTransientFreeCtr_SHIFT  8
#define LPPHY_DCOffsetTransient_dcOffsetTransientFreeCtr_MASK   (0x7 << LPPHY_DCOffsetTransient_dcOffsetTransientFreeCtr_SHIFT)
#define LPPHY_DCOffsetTransient_dcOffEstShiftSlow_SHIFT 11
#define LPPHY_DCOffsetTransient_dcOffEstShiftSlow_MASK  (0x3 << LPPHY_DCOffsetTransient_dcOffEstShiftSlow_SHIFT)
#define LPPHY_DCOffsetTransient_dcOffEstShiftFast_SHIFT 13
#define LPPHY_DCOffsetTransient_dcOffEstShiftFast_MASK  (0x3 << LPPHY_DCOffsetTransient_dcOffEstShiftFast_SHIFT)

/* Bits in LPPHY_PreambleInTimeout */
#define LPPHY_PreambleInTimeout_OFDMPreambleInDataTimeOut_SHIFT 0
#define LPPHY_PreambleInTimeout_OFDMPreambleInDataTimeOut_MASK  (0xff << LPPHY_PreambleInTimeout_OFDMPreambleInDataTimeOut_SHIFT)
#define LPPHY_PreambleInTimeout_DSSSPreambleInDataTimeOut_SHIFT 8
#define LPPHY_PreambleInTimeout_DSSSPreambleInDataTimeOut_MASK  (0xff << LPPHY_PreambleInTimeout_DSSSPreambleInDataTimeOut_SHIFT)

/* Bits in LPPHY_PreambleConfirmTimeout */
#define LPPHY_PreambleConfirmTimeout_OFDMPreambleConfirmTimeout_SHIFT   0
#define LPPHY_PreambleConfirmTimeout_OFDMPreambleConfirmTimeout_MASK    (0xff << LPPHY_PreambleConfirmTimeout_OFDMPreambleConfirmTimeout_SHIFT)
#define LPPHY_PreambleConfirmTimeout_DSSSPreambleConfirmTimeout_SHIFT   8
#define LPPHY_PreambleConfirmTimeout_DSSSPreambleConfirmTimeout_MASK    (0xff << LPPHY_PreambleConfirmTimeout_DSSSPreambleConfirmTimeout_SHIFT)

/* Bits in LPPHY_ClipThresh */
#define LPPHY_ClipThresh_ClipThresh_SHIFT       0
#define LPPHY_ClipThresh_ClipThresh_MASK        (0x7f << LPPHY_ClipThresh_ClipThresh_SHIFT)

/* Bits in LPPHY_ClipCtrThresh */
#define LPPHY_ClipCtrThresh_ClipCtrThreshHiGain_SHIFT   0
#define LPPHY_ClipCtrThresh_ClipCtrThreshHiGain_MASK    (0x1f << LPPHY_ClipCtrThresh_ClipCtrThreshHiGain_SHIFT)
#define LPPHY_ClipCtrThresh_clipCtrThreshLoGain_SHIFT   5
#define LPPHY_ClipCtrThresh_clipCtrThreshLoGain_MASK    (0x1f << LPPHY_ClipCtrThresh_clipCtrThreshLoGain_SHIFT)
#define LPPHY_ClipCtrThresh_clipCtrThresh_SHIFT 10
#define LPPHY_ClipCtrThresh_clipCtrThresh_MASK  (0x1f << LPPHY_ClipCtrThresh_clipCtrThresh_SHIFT)

/* Bits in LPPHY_ofdmSyncTimerCtrl */
#define LPPHY_ofdmSyncTimerCtrl_OFDMPreambleSyncTimeOut_SHIFT   0
#define LPPHY_ofdmSyncTimerCtrl_OFDMPreambleSyncTimeOut_MASK    (0xff << LPPHY_ofdmSyncTimerCtrl_OFDMPreambleSyncTimeOut_SHIFT)
#define LPPHY_ofdmSyncTimerCtrl_ofdmSyncConfirmTime_SHIFT       8
#define LPPHY_ofdmSyncTimerCtrl_ofdmSyncConfirmTime_MASK        (0x1f << LPPHY_ofdmSyncTimerCtrl_ofdmSyncConfirmTime_SHIFT)

/* Bits in LPPHY_WaitforPHYSelTimeout */
#define LPPHY_WaitforPHYSelTimeout_AphyWaitforOfdmSeltimeout_SHIFT      0
#define LPPHY_WaitforPHYSelTimeout_AphyWaitforOfdmSeltimeout_MASK       (0xff << LPPHY_WaitforPHYSelTimeout_AphyWaitforOfdmSeltimeout_SHIFT)
#define LPPHY_WaitforPHYSelTimeout_BPHYWaitforCCKSeltimeout_SHIFT       8
#define LPPHY_WaitforPHYSelTimeout_BPHYWaitforCCKSeltimeout_MASK        (0xff << LPPHY_WaitforPHYSelTimeout_BPHYWaitforCCKSeltimeout_SHIFT)

/* Bits in LPPHY_HiGainDB */
#define LPPHY_HiGainDB_HiGainDB_SHIFT   0
#define LPPHY_HiGainDB_HiGainDB_MASK    (0xff << LPPHY_HiGainDB_HiGainDB_SHIFT)
#define LPPHY_HiGainDB_MedHiGainDB_SHIFT        8
#define LPPHY_HiGainDB_MedHiGainDB_MASK (0xff << LPPHY_HiGainDB_MedHiGainDB_SHIFT)

/* Bits in LPPHY_LowGainDB */
#define LPPHY_LowGainDB_LowGainDB_SHIFT 0
#define LPPHY_LowGainDB_LowGainDB_MASK  (0xff << LPPHY_LowGainDB_LowGainDB_SHIFT)
#define LPPHY_LowGainDB_MedLowGainDB_SHIFT      8
#define LPPHY_LowGainDB_MedLowGainDB_MASK       (0xff << LPPHY_LowGainDB_MedLowGainDB_SHIFT)

/* Bits in LPPHY_VeryLowGainDB */
#define LPPHY_VeryLowGainDB_veryLowGainDB_SHIFT 0
#define LPPHY_VeryLowGainDB_veryLowGainDB_MASK  (0xff << LPPHY_VeryLowGainDB_veryLowGainDB_SHIFT)
#define LPPHY_VeryLowGainDB_NominalPwrDB_SHIFT  8
#define LPPHY_VeryLowGainDB_NominalPwrDB_MASK   (0xff << LPPHY_VeryLowGainDB_NominalPwrDB_SHIFT)

/* Bits in LPPHY_gainMismatch */
#define LPPHY_gainMismatch_GainMismatchHigain_SHIFT     0
#define LPPHY_gainMismatch_GainMismatchHigain_MASK      (0xf << LPPHY_gainMismatch_GainMismatchHigain_SHIFT)
#define LPPHY_gainMismatch_GainMismatchNomgain_SHIFT    4
#define LPPHY_gainMismatch_GainMismatchNomgain_MASK     (0xf << LPPHY_gainMismatch_GainMismatchNomgain_SHIFT)
#define LPPHY_gainMismatch_ofdmGainMismatchLogain_SHIFT 8
#define LPPHY_gainMismatch_ofdmGainMismatchLogain_MASK  (0xf << LPPHY_gainMismatch_ofdmGainMismatchLogain_SHIFT)
#define LPPHY_gainMismatch_GainmisMatchPktRx_SHIFT      12
#define LPPHY_gainMismatch_GainmisMatchPktRx_MASK       (0xf << LPPHY_gainMismatch_GainmisMatchPktRx_SHIFT)

/* Bits in LPPHY_gaindirectMismatch */
#define LPPHY_gaindirectMismatch_MedHigainDirectMismatch_SHIFT  0
#define LPPHY_gaindirectMismatch_MedHigainDirectMismatch_MASK   (0xf << LPPHY_gaindirectMismatch_MedHigainDirectMismatch_SHIFT)
#define LPPHY_gaindirectMismatch_LogainDirectMismatch_SHIFT     4
#define LPPHY_gaindirectMismatch_LogainDirectMismatch_MASK      (0xf << LPPHY_gaindirectMismatch_LogainDirectMismatch_SHIFT)
#define LPPHY_gaindirectMismatch_GainmisMatchMedGain_SHIFT      8
#define LPPHY_gaindirectMismatch_GainmisMatchMedGain_MASK       (0x1f << LPPHY_gaindirectMismatch_GainmisMatchMedGain_SHIFT)

/* Bits in LPPHY_PwrThresh0 */
#define LPPHY_PwrThresh0_SlowPwrLoThresh_SHIFT  0
#define LPPHY_PwrThresh0_SlowPwrLoThresh_MASK   (0xf << LPPHY_PwrThresh0_SlowPwrLoThresh_SHIFT)
#define LPPHY_PwrThresh0_SlowPwrHiThresh_SHIFT  4
#define LPPHY_PwrThresh0_SlowPwrHiThresh_MASK   (0xf << LPPHY_PwrThresh0_SlowPwrHiThresh_SHIFT)
#define LPPHY_PwrThresh0_StableSignalThresh_SHIFT       12
#define LPPHY_PwrThresh0_StableSignalThresh_MASK        (0xf << LPPHY_PwrThresh0_StableSignalThresh_SHIFT)

/* Bits in LPPHY_PwrThresh1 */
#define LPPHY_PwrThresh1_LargeGainMismatchThresh_SHIFT  0
#define LPPHY_PwrThresh1_LargeGainMismatchThresh_MASK   (0xf << LPPHY_PwrThresh1_LargeGainMismatchThresh_SHIFT)
#define LPPHY_PwrThresh1_LoPwrMismatchThresh_SHIFT      4
#define LPPHY_PwrThresh1_LoPwrMismatchThresh_MASK       (0x1f << LPPHY_PwrThresh1_LoPwrMismatchThresh_SHIFT)
#define LPPHY_PwrThresh1_PktRxSignalDropThresh_SHIFT    9
#define LPPHY_PwrThresh1_PktRxSignalDropThresh_MASK     (0xf << LPPHY_PwrThresh1_PktRxSignalDropThresh_SHIFT)

/* Bits in LPPHY_DetectorDlyAdjust */
#define LPPHY_DetectorDlyAdjust_fastPwrDlyAdjustment_SHIFT      0
#define LPPHY_DetectorDlyAdjust_fastPwrDlyAdjustment_MASK       (0xf << LPPHY_DetectorDlyAdjust_fastPwrDlyAdjustment_SHIFT)
#define LPPHY_DetectorDlyAdjust_clipDetectorDlyAdjustment_SHIFT 4
#define LPPHY_DetectorDlyAdjust_clipDetectorDlyAdjustment_MASK  (0xf << LPPHY_DetectorDlyAdjust_clipDetectorDlyAdjustment_SHIFT)
#define LPPHY_DetectorDlyAdjust_DetectorDlyAdjustment_SHIFT     8
#define LPPHY_DetectorDlyAdjust_DetectorDlyAdjustment_MASK      (0xf << LPPHY_DetectorDlyAdjust_DetectorDlyAdjustment_SHIFT)
#define LPPHY_DetectorDlyAdjust_ofdmfiltDlyAdjustment_SHIFT     12
#define LPPHY_DetectorDlyAdjust_ofdmfiltDlyAdjustment_MASK      (0xf << LPPHY_DetectorDlyAdjust_ofdmfiltDlyAdjustment_SHIFT)

/* Bits in LPPHY_ReducedDetectorDly */
#define LPPHY_ReducedDetectorDly_reducedDetectorDlyThresh_SHIFT 0
#define LPPHY_ReducedDetectorDly_reducedDetectorDlyThresh_MASK  (0xff << LPPHY_ReducedDetectorDly_reducedDetectorDlyThresh_SHIFT)
#define LPPHY_ReducedDetectorDly_searchModeDlyAdjustment_SHIFT  8
#define LPPHY_ReducedDetectorDly_searchModeDlyAdjustment_MASK   (0xf << LPPHY_ReducedDetectorDly_searchModeDlyAdjustment_SHIFT)

/* Bits in LPPHY_dataTimeout */
#define LPPHY_dataTimeout_NominalGainAdjTimeOut_SHIFT   0
#define LPPHY_dataTimeout_NominalGainAdjTimeOut_MASK    (0xff << LPPHY_dataTimeout_NominalGainAdjTimeOut_SHIFT)
#define LPPHY_dataTimeout_PWrChgInDataModeTimeOut_SHIFT 8
#define LPPHY_dataTimeout_PWrChgInDataModeTimeOut_MASK  (0xff << LPPHY_dataTimeout_PWrChgInDataModeTimeOut_SHIFT)

/* Bits in LPPHY_correlatorDisDly */
#define LPPHY_correlatorDisDly_CorrelatorDisableDly_SHIFT       0
#define LPPHY_correlatorDisDly_CorrelatorDisableDly_MASK        (0xff << LPPHY_correlatorDisDly_CorrelatorDisableDly_SHIFT)

/* Bits in LPPHY_DiversityGainBack */
#define LPPHY_DiversityGainBack_DiversityGainBackoffDB_SHIFT    0
#define LPPHY_DiversityGainBack_DiversityGainBackoffDB_MASK     (0x1f << LPPHY_DiversityGainBack_DiversityGainBackoffDB_SHIFT)

/* Bits in LPPHY_DSSSConfirmCnt */
#define LPPHY_DSSSConfirmCnt_DSSSConfirmCntHiGain_SHIFT 0
#define LPPHY_DSSSConfirmCnt_DSSSConfirmCntHiGain_MASK  (0x7 << LPPHY_DSSSConfirmCnt_DSSSConfirmCntHiGain_SHIFT)
#define LPPHY_DSSSConfirmCnt_DSSSConfirmCntLoGain_SHIFT 3
#define LPPHY_DSSSConfirmCnt_DSSSConfirmCntLoGain_MASK  (0x7 << LPPHY_DSSSConfirmCnt_DSSSConfirmCntLoGain_SHIFT)

/* Bits in LPPHY_DCBlankInterval */
#define LPPHY_DCBlankInterval_DCBlankIntervalHiGain_SHIFT       0
#define LPPHY_DCBlankInterval_DCBlankIntervalHiGain_MASK        (0x3f << LPPHY_DCBlankInterval_DCBlankIntervalHiGain_SHIFT)
#define LPPHY_DCBlankInterval_DCBlankIntervalLoGain_SHIFT       6
#define LPPHY_DCBlankInterval_DCBlankIntervalLoGain_MASK        (0x3f << LPPHY_DCBlankInterval_DCBlankIntervalLoGain_SHIFT)

/* Bits in LPPHY_gainMismatchLimit */
#define LPPHY_gainMismatchLimit_gainmismatchlimit_SHIFT 0
#define LPPHY_gainMismatchLimit_gainmismatchlimit_MASK  (0x3f << LPPHY_gainMismatchLimit_gainmismatchlimit_SHIFT)
#define LPPHY_gainMismatchLimit_crsoffthreshdsss_SHIFT  8
#define LPPHY_gainMismatchLimit_crsoffthreshdsss_MASK   (0xff << LPPHY_gainMismatchLimit_crsoffthreshdsss_SHIFT)

/* Bits in LPPHY_crsedthresh */
#define LPPHY_crsedthresh_edonthreshold_SHIFT   0
#define LPPHY_crsedthresh_edonthreshold_MASK    (0xff << LPPHY_crsedthresh_edonthreshold_SHIFT)
#define LPPHY_crsedthresh_edoffthreshold_SHIFT  8
#define LPPHY_crsedthresh_edoffthreshold_MASK   (0xff << LPPHY_crsedthresh_edoffthreshold_SHIFT)

/* Bits in LPPHY_phaseshiftControl */
#define LPPHY_phaseshiftControl_phaseshiftblankinginterval_SHIFT        0
#define LPPHY_phaseshiftControl_phaseshiftblankinginterval_MASK (0x3f << LPPHY_phaseshiftControl_phaseshiftblankinginterval_SHIFT)
#define LPPHY_phaseshiftControl_maxgainmismatchphaseShifter_SHIFT       6
#define LPPHY_phaseshiftControl_maxgainmismatchphaseShifter_MASK        (0xf << LPPHY_phaseshiftControl_maxgainmismatchphaseShifter_SHIFT)
#define LPPHY_phaseshiftControl_phaseshifterThresh_SHIFT        10
#define LPPHY_phaseshiftControl_phaseshifterThresh_MASK (0x7 << LPPHY_phaseshiftControl_phaseshifterThresh_SHIFT)

/* Bits in LPPHY_InputPowerDB */
#define LPPHY_InputPowerDB_inputpwroffsetdb_SHIFT       0
#define LPPHY_InputPowerDB_inputpwroffsetdb_MASK        (0xff << LPPHY_InputPowerDB_inputpwroffsetdb_SHIFT)
#define LPPHY_InputPowerDB_transientfreeThresh_SHIFT    8
#define LPPHY_InputPowerDB_transientfreeThresh_MASK     (0x7 << LPPHY_InputPowerDB_transientfreeThresh_SHIFT)

/* Bits in LPPHY_ofdmsyncCtrl */
#define LPPHY_ofdmsyncCtrl_ofdmsyncendchkminpwr_SHIFT   0
#define LPPHY_ofdmsyncCtrl_ofdmsyncendchkminpwr_MASK    (0xff << LPPHY_ofdmsyncCtrl_ofdmsyncendchkminpwr_SHIFT)
#define LPPHY_ofdmsyncCtrl_ofdmsyncendcheckthresh_SHIFT 8
#define LPPHY_ofdmsyncCtrl_ofdmsyncendcheckthresh_MASK  (0x3 << LPPHY_ofdmsyncCtrl_ofdmsyncendcheckthresh_SHIFT)

/* Bits in LPPHY_AfeADCCtrl0 */
#define LPPHY_AfeADCCtrl0_adc_ctrl0_SHIFT       0
#define LPPHY_AfeADCCtrl0_adc_ctrl0_MASK        (0xffff << LPPHY_AfeADCCtrl0_adc_ctrl0_SHIFT)

/* Bits in LPPHY_AfeADCCtrl1 */
#define LPPHY_AfeADCCtrl1_adc_ctrl1_SHIFT       0
#define LPPHY_AfeADCCtrl1_adc_ctrl1_MASK        (0xffff << LPPHY_AfeADCCtrl1_adc_ctrl1_SHIFT)

/* Bits in LPPHY_AfeADCCtrl2 */
#define LPPHY_AfeADCCtrl2_adc_ctrl2_SHIFT       0
#define LPPHY_AfeADCCtrl2_adc_ctrl2_MASK        (0xff << LPPHY_AfeADCCtrl2_adc_ctrl2_SHIFT)
#define LPPHY_AfeADCCtrl2_adciq_lowpower_SHIFT  8
#define LPPHY_AfeADCCtrl2_adciq_lowpower_MASK   (0x1 << LPPHY_AfeADCCtrl2_adciq_lowpower_SHIFT)

/* Bits in LPPHY_AfeDACCtrl */
#define LPPHY_AfeDACCtrl_dac_ctrl_SHIFT 0
#define LPPHY_AfeDACCtrl_dac_ctrl_MASK  (0xfff << LPPHY_AfeDACCtrl_dac_ctrl_SHIFT)
#define LPPHY_AfeDACCtrl_dac_clk_disable_SHIFT  12
#define LPPHY_AfeDACCtrl_dac_clk_disable_MASK   (0x1 << LPPHY_AfeDACCtrl_dac_clk_disable_SHIFT)

/* Bits in LPPHY_AfeCtrl */
#define LPPHY_AfeCtrl_pwdn_adc_SHIFT    0
#define LPPHY_AfeCtrl_pwdn_adc_MASK     (0x1 << LPPHY_AfeCtrl_pwdn_adc_SHIFT)
#define LPPHY_AfeCtrl_pwdn_dac_SHIFT    1
#define LPPHY_AfeCtrl_pwdn_dac_MASK     (0x1 << LPPHY_AfeCtrl_pwdn_dac_SHIFT)
#define LPPHY_AfeCtrl_pwdn_bg_SHIFT     2
#define LPPHY_AfeCtrl_pwdn_bg_MASK      (0x1 << LPPHY_AfeCtrl_pwdn_bg_SHIFT)
#define LPPHY_AfeCtrl_pwdn_rssi_SHIFT   3
#define LPPHY_AfeCtrl_pwdn_rssi_MASK    (0x1 << LPPHY_AfeCtrl_pwdn_rssi_SHIFT)
#define LPPHY_AfeCtrl_bg_ctrl_SHIFT     8
#define LPPHY_AfeCtrl_bg_ctrl_MASK      (0xff << LPPHY_AfeCtrl_bg_ctrl_SHIFT)

/* Bits in LPPHY_AfeCtrlOvr */
#define LPPHY_AfeCtrlOvr_pwdn_adc_ovr_SHIFT     0
#define LPPHY_AfeCtrlOvr_pwdn_adc_ovr_MASK      (0x1 << LPPHY_AfeCtrlOvr_pwdn_adc_ovr_SHIFT)
#define LPPHY_AfeCtrlOvr_pwdn_dac_ovr_SHIFT     1
#define LPPHY_AfeCtrlOvr_pwdn_dac_ovr_MASK      (0x1 << LPPHY_AfeCtrlOvr_pwdn_dac_ovr_SHIFT)
#define LPPHY_AfeCtrlOvr_pwdn_rssi_ovr_SHIFT    2
#define LPPHY_AfeCtrlOvr_pwdn_rssi_ovr_MASK     (0x1 << LPPHY_AfeCtrlOvr_pwdn_rssi_ovr_SHIFT)
#define LPPHY_AfeCtrlOvr_rssi_muxsel_ovr_SHIFT  3
#define LPPHY_AfeCtrlOvr_rssi_muxsel_ovr_MASK   (0x1 << LPPHY_AfeCtrlOvr_rssi_muxsel_ovr_SHIFT)
#define LPPHY_AfeCtrlOvr_dac_clk_disable_ovr_SHIFT      4
#define LPPHY_AfeCtrlOvr_dac_clk_disable_ovr_MASK       (0x1 << LPPHY_AfeCtrlOvr_dac_clk_disable_ovr_SHIFT)
#define LPPHY_AfeCtrlOvr_pwdn_bg_ovr_SHIFT      5
#define LPPHY_AfeCtrlOvr_pwdn_bg_ovr_MASK       (0x1 << LPPHY_AfeCtrlOvr_pwdn_bg_ovr_SHIFT)
#define LPPHY_AfeCtrlOvr_dacattctrl_ovr_SHIFT   6
#define LPPHY_AfeCtrlOvr_dacattctrl_ovr_MASK    (0x1 << LPPHY_AfeCtrlOvr_dacattctrl_ovr_SHIFT)

/* Bits in LPPHY_AfeCtrlOvrVal */
#define LPPHY_AfeCtrlOvrVal_pwdn_adc_ovr_val_SHIFT      0
#define LPPHY_AfeCtrlOvrVal_pwdn_adc_ovr_val_MASK       (0x1 << LPPHY_AfeCtrlOvrVal_pwdn_adc_ovr_val_SHIFT)
#define LPPHY_AfeCtrlOvrVal_pwdn_dac_ovr_val_SHIFT      1
#define LPPHY_AfeCtrlOvrVal_pwdn_dac_ovr_val_MASK       (0x1 << LPPHY_AfeCtrlOvrVal_pwdn_dac_ovr_val_SHIFT)
#define LPPHY_AfeCtrlOvrVal_pwdn_rssi_ovr_val_SHIFT     2
#define LPPHY_AfeCtrlOvrVal_pwdn_rssi_ovr_val_MASK      (0x1 << LPPHY_AfeCtrlOvrVal_pwdn_rssi_ovr_val_SHIFT)
#define LPPHY_AfeCtrlOvrVal_rssi_muxsel_ovr_val_SHIFT   3
#define LPPHY_AfeCtrlOvrVal_rssi_muxsel_ovr_val_MASK    (0x7 << LPPHY_AfeCtrlOvrVal_rssi_muxsel_ovr_val_SHIFT)
#define LPPHY_AfeCtrlOvrVal_dac_clk_disable_ovr_val_SHIFT       6
#define LPPHY_AfeCtrlOvrVal_dac_clk_disable_ovr_val_MASK        (0x1 << LPPHY_AfeCtrlOvrVal_dac_clk_disable_ovr_val_SHIFT)
#define LPPHY_AfeCtrlOvrVal_pwdn_bg_ovr_val_SHIFT       7
#define LPPHY_AfeCtrlOvrVal_pwdn_bg_ovr_val_MASK        (0x1 << LPPHY_AfeCtrlOvrVal_pwdn_bg_ovr_val_SHIFT)

/* Bits in LPPHY_AfeRSSICtrl0 */
#define LPPHY_AfeRSSICtrl0_rssi_ctrl0_SHIFT     0
#define LPPHY_AfeRSSICtrl0_rssi_ctrl0_MASK      (0xffff << LPPHY_AfeRSSICtrl0_rssi_ctrl0_SHIFT)

/* Bits in LPPHY_AfeRSSICtrl1 */
#define LPPHY_AfeRSSICtrl1_rssi_ctrl1_SHIFT     0
#define LPPHY_AfeRSSICtrl1_rssi_ctrl1_MASK      (0x3fff << LPPHY_AfeRSSICtrl1_rssi_ctrl1_SHIFT)

/* Bits in LPPHY_AfeRSSISel */
#define LPPHY_AfeRSSISel_rssi_sel_SHIFT 0
#define LPPHY_AfeRSSISel_rssi_sel_MASK  (0x7 << LPPHY_AfeRSSISel_rssi_sel_SHIFT)

/* Bits in LPPHY_RadarThresh */
#define LPPHY_RadarThresh_radar_detect_thresh0_SHIFT    0
#define LPPHY_RadarThresh_radar_detect_thresh0_MASK     (0xff << LPPHY_RadarThresh_radar_detect_thresh0_SHIFT)
#define LPPHY_RadarThresh_radar_detect_thresh1_SHIFT    8
#define LPPHY_RadarThresh_radar_detect_thresh1_MASK     (0xff << LPPHY_RadarThresh_radar_detect_thresh1_SHIFT)

/* Bits in LPPHY_RadarblankInterval */
#define LPPHY_RadarblankInterval_radar_detect_blank_interval_SHIFT      0
#define LPPHY_RadarblankInterval_radar_detect_blank_interval_MASK       (0xfff << LPPHY_RadarblankInterval_radar_detect_blank_interval_SHIFT)

/* Bits in LPPHY_RadarminfmInterval */
#define LPPHY_RadarminfmInterval_radar_detect_min_fm_interval_SHIFT     0
#define LPPHY_RadarminfmInterval_radar_detect_min_fm_interval_MASK      (0xfff << LPPHY_RadarminfmInterval_radar_detect_min_fm_interval_SHIFT)

/* Bits in LPPHY_Radargaintimeout */
#define LPPHY_Radargaintimeout_radar_gain_latch_timeout_SHIFT   0
#define LPPHY_Radargaintimeout_radar_gain_latch_timeout_MASK    (0xfff << LPPHY_Radargaintimeout_radar_gain_latch_timeout_SHIFT)

/* Bits in LPPHY_Radarpulsetimeout */
#define LPPHY_Radarpulsetimeout_radar_pulse_gap_timeout_SHIFT   0
#define LPPHY_Radarpulsetimeout_radar_pulse_gap_timeout_MASK    (0xfff << LPPHY_Radarpulsetimeout_radar_pulse_gap_timeout_SHIFT)

/* Bits in LPPHY_RadardetectFMCtrl */
#define LPPHY_RadardetectFMCtrl_radar_detect_fm_latch_SHIFT     0
#define LPPHY_RadardetectFMCtrl_radar_detect_fm_latch_MASK      (0x3ff << LPPHY_RadardetectFMCtrl_radar_detect_fm_latch_SHIFT)
#define LPPHY_RadardetectFMCtrl_radar_detect_fm_input_shift_offset_SHIFT        10
#define LPPHY_RadardetectFMCtrl_radar_detect_fm_input_shift_offset_MASK (0x7 << LPPHY_RadardetectFMCtrl_radar_detect_fm_input_shift_offset_SHIFT)

/* Bits in LPPHY_RadardetectEn */
#define LPPHY_RadardetectEn_radar_detect_enable_SHIFT   0
#define LPPHY_RadardetectEn_radar_detect_enable_MASK    (0x1 << LPPHY_RadardetectEn_radar_detect_enable_SHIFT)
#define LPPHY_RadardetectEn_radar_detect_fmmode_SHIFT   1
#define LPPHY_RadardetectEn_radar_detect_fmmode_MASK    (0x1 << LPPHY_RadardetectEn_radar_detect_fmmode_SHIFT)
#define LPPHY_RadardetectEn_radar_detect_crs_crs0_blank_enable_SHIFT    2
#define LPPHY_RadardetectEn_radar_detect_crs_crs0_blank_enable_MASK     (0x1 << LPPHY_RadardetectEn_radar_detect_crs_crs0_blank_enable_SHIFT)
#define LPPHY_RadardetectEn_radar_detect_crs_str0_blank_enable_SHIFT    3
#define LPPHY_RadardetectEn_radar_detect_crs_str0_blank_enable_MASK     (0x1 << LPPHY_RadardetectEn_radar_detect_crs_str0_blank_enable_SHIFT)
#define LPPHY_RadardetectEn_radar_detect_crs_str1_blank_enable_SHIFT    4
#define LPPHY_RadardetectEn_radar_detect_crs_str1_blank_enable_MASK     (0x1 << LPPHY_RadardetectEn_radar_detect_crs_str1_blank_enable_SHIFT)
#define LPPHY_RadardetectEn_radar_detect_crs_readsym_blank_enable_SHIFT 5
#define LPPHY_RadardetectEn_radar_detect_crs_readsym_blank_enable_MASK  (0x1 << LPPHY_RadardetectEn_radar_detect_crs_readsym_blank_enable_SHIFT)
#define LPPHY_RadardetectEn_radar_detect_crs_reset_blank_enable_SHIFT   6
#define LPPHY_RadardetectEn_radar_detect_crs_reset_blank_enable_MASK    (0x1 << LPPHY_RadardetectEn_radar_detect_crs_reset_blank_enable_SHIFT)
#define LPPHY_RadardetectEn_radar_detect_max_pwr_delta_SHIFT    8
#define LPPHY_RadardetectEn_radar_detect_max_pwr_delta_MASK     (0x1f << LPPHY_RadardetectEn_radar_detect_max_pwr_delta_SHIFT)

/* Bits in LPPHY_RadarRdDataReg */
#define LPPHY_RadarRdDataReg_radar_rd_data_SHIFT        0
#define LPPHY_RadarRdDataReg_radar_rd_data_MASK (0xffff << LPPHY_RadarRdDataReg_radar_rd_data_SHIFT)

/* Bits in LPPHY_lpphyCtrl */
#define LPPHY_lpphyCtrl_adc40Mhz_SHIFT  1
#define LPPHY_lpphyCtrl_adc40Mhz_MASK   (0x1 << LPPHY_lpphyCtrl_adc40Mhz_SHIFT)
#define LPPHY_lpphyCtrl_dc_filt_shift_SHIFT     2
#define LPPHY_lpphyCtrl_dc_filt_shift_MASK      (0x3 << LPPHY_lpphyCtrl_dc_filt_shift_SHIFT)
#define LPPHY_lpphyCtrl_fltrpulsestretchEn_SHIFT        4
#define LPPHY_lpphyCtrl_fltrpulsestretchEn_MASK (0x1 << LPPHY_lpphyCtrl_fltrpulsestretchEn_SHIFT)
#define LPPHY_lpphyCtrl_afe_ddfs_en_SHIFT       5
#define LPPHY_lpphyCtrl_afe_ddfs_en_MASK        (0x1 << LPPHY_lpphyCtrl_afe_ddfs_en_SHIFT)
#define LPPHY_lpphyCtrl_rx_filt_bypass_SHIFT    6
#define LPPHY_lpphyCtrl_rx_filt_bypass_MASK     (0x1 << LPPHY_lpphyCtrl_rx_filt_bypass_SHIFT)
#define LPPHY_lpphyCtrl_txfiltSelect_SHIFT      8
#define LPPHY_lpphyCtrl_txfiltSelect_MASK       (0x3 << LPPHY_lpphyCtrl_txfiltSelect_SHIFT)
#define LPPHY_lpphyCtrl_rssifiltEn_SHIFT        12
#define LPPHY_lpphyCtrl_rssifiltEn_MASK (0x1 << LPPHY_lpphyCtrl_rssifiltEn_SHIFT)
#define LPPHY_lpphyCtrl_rssiFormatConvEn_SHIFT  13
#define LPPHY_lpphyCtrl_rssiFormatConvEn_MASK   (0x1 << LPPHY_lpphyCtrl_rssiFormatConvEn_SHIFT)
#define LPPHY_lpphyCtrl_resetCCA_SHIFT  14
#define LPPHY_lpphyCtrl_resetCCA_MASK   (0x1 << LPPHY_lpphyCtrl_resetCCA_SHIFT)
#define LPPHY_lpphyCtrl_muxGmode_SHIFT  15
#define LPPHY_lpphyCtrl_muxGmode_MASK   (0x1 << LPPHY_lpphyCtrl_muxGmode_SHIFT)

/* Bits in LPPHY_classifierCtrl */
#define LPPHY_classifierCtrl_classifierSel0_SHIFT       0
#define LPPHY_classifierCtrl_classifierSel0_MASK        (0x1 << LPPHY_classifierCtrl_classifierSel0_SHIFT)
#define LPPHY_classifierCtrl_classifierSel1_SHIFT       1
#define LPPHY_classifierCtrl_classifierSel1_MASK        (0x1 << LPPHY_classifierCtrl_classifierSel1_SHIFT)
#define LPPHY_classifierCtrl_MaxrxStatusCnt_SHIFT       2
#define LPPHY_classifierCtrl_MaxrxStatusCnt_MASK        (0x3f << LPPHY_classifierCtrl_MaxrxStatusCnt_SHIFT)
#define LPPHY_classifierCtrl_cck2ofdmstateflipen_SHIFT  8
#define LPPHY_classifierCtrl_cck2ofdmstateflipen_MASK   (0x1 << LPPHY_classifierCtrl_cck2ofdmstateflipen_SHIFT)

/* Bits in LPPHY_resetCtrl */
#define LPPHY_resetCtrl_pktfsmSoftReset_SHIFT   0
#define LPPHY_resetCtrl_pktfsmSoftReset_MASK    (0x1 << LPPHY_resetCtrl_pktfsmSoftReset_SHIFT)
#define LPPHY_resetCtrl_txfrontendSoftReset_SHIFT       1
#define LPPHY_resetCtrl_txfrontendSoftReset_MASK        (0x1 << LPPHY_resetCtrl_txfrontendSoftReset_SHIFT)
#define LPPHY_resetCtrl_rxfrontendSoftReset_SHIFT       2
#define LPPHY_resetCtrl_rxfrontendSoftReset_MASK        (0x1 << LPPHY_resetCtrl_rxfrontendSoftReset_SHIFT)
#define LPPHY_resetCtrl_rfseqSoftReset_SHIFT    3
#define LPPHY_resetCtrl_rfseqSoftReset_MASK     (0x1 << LPPHY_resetCtrl_rfseqSoftReset_SHIFT)
#define LPPHY_resetCtrl_txpwrCtrlSoftReset_SHIFT        4
#define LPPHY_resetCtrl_txpwrCtrlSoftReset_MASK (0x1 << LPPHY_resetCtrl_txpwrCtrlSoftReset_SHIFT)
#define LPPHY_resetCtrl_radarCtrlSoftReset_SHIFT        5
#define LPPHY_resetCtrl_radarCtrlSoftReset_MASK (0x1 << LPPHY_resetCtrl_radarCtrlSoftReset_SHIFT)

/* Bits in LPPHY_ClkEnCtrl */
#define LPPHY_ClkEnCtrl_forcecckrxClkOn_SHIFT   0
#define LPPHY_ClkEnCtrl_forcecckrxClkOn_MASK    (0x1 << LPPHY_ClkEnCtrl_forcecckrxClkOn_SHIFT)
#define LPPHY_ClkEnCtrl_forceccktxClkOn_SHIFT   1
#define LPPHY_ClkEnCtrl_forceccktxClkOn_MASK    (0x1 << LPPHY_ClkEnCtrl_forceccktxClkOn_SHIFT)
#define LPPHY_ClkEnCtrl_forcetxfrontendclk88On_SHIFT    2
#define LPPHY_ClkEnCtrl_forcetxfrontendclk88On_MASK     (0x1 << LPPHY_ClkEnCtrl_forcetxfrontendclk88On_SHIFT)
#define LPPHY_ClkEnCtrl_forcetxfrontendclk80On_SHIFT    3
#define LPPHY_ClkEnCtrl_forcetxfrontendclk80On_MASK     (0x1 << LPPHY_ClkEnCtrl_forcetxfrontendclk80On_SHIFT)
#define LPPHY_ClkEnCtrl_forcerxfrontendclk80On_SHIFT    4
#define LPPHY_ClkEnCtrl_forcerxfrontendclk80On_MASK     (0x1 << LPPHY_ClkEnCtrl_forcerxfrontendclk80On_SHIFT)
#define LPPHY_ClkEnCtrl_forceradarclkOn_SHIFT   5
#define LPPHY_ClkEnCtrl_forceradarclkOn_MASK    (0x1 << LPPHY_ClkEnCtrl_forceradarclkOn_SHIFT)
#define LPPHY_ClkEnCtrl_forcerxfiltclkOn_SHIFT  6
#define LPPHY_ClkEnCtrl_forcerxfiltclkOn_MASK   (0x1 << LPPHY_ClkEnCtrl_forcerxfiltclkOn_SHIFT)
#define LPPHY_ClkEnCtrl_forceradarfifoclkOn_SHIFT       7
#define LPPHY_ClkEnCtrl_forceradarfifoclkOn_MASK        (0x1 << LPPHY_ClkEnCtrl_forceradarfifoclkOn_SHIFT)
#define LPPHY_ClkEnCtrl_forcerxradioctrlclkOn_SHIFT     8
#define LPPHY_ClkEnCtrl_forcerxradioctrlclkOn_MASK      (0x1 << LPPHY_ClkEnCtrl_forcerxradioctrlclkOn_SHIFT)
#define LPPHY_ClkEnCtrl_forcecrsgaintblclkOn_SHIFT      9
#define LPPHY_ClkEnCtrl_forcecrsgaintblclkOn_MASK       (0x1 << LPPHY_ClkEnCtrl_forcecrsgaintblclkOn_SHIFT)
#define LPPHY_ClkEnCtrl_forceaphyrxclkOn_SHIFT  10
#define LPPHY_ClkEnCtrl_forceaphyrxclkOn_MASK   (0x1 << LPPHY_ClkEnCtrl_forceaphyrxclkOn_SHIFT)
#define LPPHY_ClkEnCtrl_forceaphytxclkOn_SHIFT  11
#define LPPHY_ClkEnCtrl_forceaphytxclkOn_MASK   (0x1 << LPPHY_ClkEnCtrl_forceaphytxclkOn_SHIFT)
#define LPPHY_ClkEnCtrl_forceaphytxrxclkOn_SHIFT        12
#define LPPHY_ClkEnCtrl_forceaphytxrxclkOn_MASK (0x1 << LPPHY_ClkEnCtrl_forceaphytxrxclkOn_SHIFT)
#define LPPHY_ClkEnCtrl_forceaphycordicclkOn_SHIFT      13
#define LPPHY_ClkEnCtrl_forceaphycordicclkOn_MASK       (0x1 << LPPHY_ClkEnCtrl_forceaphycordicclkOn_SHIFT)
#define LPPHY_ClkEnCtrl_forceaphyrtpclkOn_SHIFT 14
#define LPPHY_ClkEnCtrl_forceaphyrtpclkOn_MASK  (0x1 << LPPHY_ClkEnCtrl_forceaphyrtpclkOn_SHIFT)
#define LPPHY_ClkEnCtrl_forceaphyrxfeclkOn_SHIFT        15
#define LPPHY_ClkEnCtrl_forceaphyrxfeclkOn_MASK (0x1 << LPPHY_ClkEnCtrl_forceaphyrxfeclkOn_SHIFT)

/* Bits in LPPHY_RFOverride0 */
#define LPPHY_RFOverride0_trsw_rx_pu_ovr_SHIFT  0
#define LPPHY_RFOverride0_trsw_rx_pu_ovr_MASK   (0x1 << LPPHY_RFOverride0_trsw_rx_pu_ovr_SHIFT)
#define LPPHY_RFOverride0_trsw_tx_pu_ovr_SHIFT  1
#define LPPHY_RFOverride0_trsw_tx_pu_ovr_MASK   (0x1 << LPPHY_RFOverride0_trsw_tx_pu_ovr_SHIFT)
#define LPPHY_RFOverride0_ant_selp_ovr_SHIFT    2
#define LPPHY_RFOverride0_ant_selp_ovr_MASK     (0x1 << LPPHY_RFOverride0_ant_selp_ovr_SHIFT)
#define LPPHY_RFOverride0_gmode_tx_pu_ovr_SHIFT 3
#define LPPHY_RFOverride0_gmode_tx_pu_ovr_MASK  (0x1 << LPPHY_RFOverride0_gmode_tx_pu_ovr_SHIFT)
#define LPPHY_RFOverride0_gmode_rx_pu_ovr_SHIFT 4
#define LPPHY_RFOverride0_gmode_rx_pu_ovr_MASK  (0x1 << LPPHY_RFOverride0_gmode_rx_pu_ovr_SHIFT)
#define LPPHY_RFOverride0_amode_tx_pu_ovr_SHIFT 5
#define LPPHY_RFOverride0_amode_tx_pu_ovr_MASK  (0x1 << LPPHY_RFOverride0_amode_tx_pu_ovr_SHIFT)
#define LPPHY_RFOverride0_amode_rx_pu_ovr_SHIFT 6
#define LPPHY_RFOverride0_amode_rx_pu_ovr_MASK  (0x1 << LPPHY_RFOverride0_amode_rx_pu_ovr_SHIFT)
#define LPPHY_RFOverride0_lpf_bw_ovr_SHIFT      7
#define LPPHY_RFOverride0_lpf_bw_ovr_MASK       (0x1 << LPPHY_RFOverride0_lpf_bw_ovr_SHIFT)
#define LPPHY_RFOverride0_rfpll_pu_ovr_SHIFT    8
#define LPPHY_RFOverride0_rfpll_pu_ovr_MASK     (0x1 << LPPHY_RFOverride0_rfpll_pu_ovr_SHIFT)
#define LPPHY_RFOverride0_wrssi_pu_ovr_SHIFT    9
#define LPPHY_RFOverride0_wrssi_pu_ovr_MASK     (0x1 << LPPHY_RFOverride0_wrssi_pu_ovr_SHIFT)
#define LPPHY_RFOverride0_nrssi_pu_ovr_SHIFT    10
#define LPPHY_RFOverride0_nrssi_pu_ovr_MASK     (0x1 << LPPHY_RFOverride0_nrssi_pu_ovr_SHIFT)
#define LPPHY_RFOverride0_internalrfrxpu_ovr_SHIFT      11
#define LPPHY_RFOverride0_internalrfrxpu_ovr_MASK       (0x1 << LPPHY_RFOverride0_internalrfrxpu_ovr_SHIFT)
#define LPPHY_RFOverride0_internalrftxpu_ovr_SHIFT      12
#define LPPHY_RFOverride0_internalrftxpu_ovr_MASK       (0x1 << LPPHY_RFOverride0_internalrftxpu_ovr_SHIFT)

/* Bits in LPPHY_RFOverrideVal0 */
#define LPPHY_RFOverrideVal0_trsw_rx_pu_ovr_val_SHIFT   0
#define LPPHY_RFOverrideVal0_trsw_rx_pu_ovr_val_MASK    (0x1 << LPPHY_RFOverrideVal0_trsw_rx_pu_ovr_val_SHIFT)
#define LPPHY_RFOverrideVal0_trsw_tx_pu_ovr_val_SHIFT   1
#define LPPHY_RFOverrideVal0_trsw_tx_pu_ovr_val_MASK    (0x1 << LPPHY_RFOverrideVal0_trsw_tx_pu_ovr_val_SHIFT)
#define LPPHY_RFOverrideVal0_ant_selp_ovr_val_SHIFT     2
#define LPPHY_RFOverrideVal0_ant_selp_ovr_val_MASK      (0x1 << LPPHY_RFOverrideVal0_ant_selp_ovr_val_SHIFT)
#define LPPHY_RFOverrideVal0_gmode_tx_pu_ovr_val_SHIFT  3
#define LPPHY_RFOverrideVal0_gmode_tx_pu_ovr_val_MASK   (0x1 << LPPHY_RFOverrideVal0_gmode_tx_pu_ovr_val_SHIFT)
#define LPPHY_RFOverrideVal0_gmode_rx_pu_ovr_val_SHIFT  4
#define LPPHY_RFOverrideVal0_gmode_rx_pu_ovr_val_MASK   (0x1 << LPPHY_RFOverrideVal0_gmode_rx_pu_ovr_val_SHIFT)
#define LPPHY_RFOverrideVal0_amode_tx_pu_ovr_val_SHIFT  5
#define LPPHY_RFOverrideVal0_amode_tx_pu_ovr_val_MASK   (0x1 << LPPHY_RFOverrideVal0_amode_tx_pu_ovr_val_SHIFT)
#define LPPHY_RFOverrideVal0_amode_rx_pu_ovr_val_SHIFT  6
#define LPPHY_RFOverrideVal0_amode_rx_pu_ovr_val_MASK   (0x1 << LPPHY_RFOverrideVal0_amode_rx_pu_ovr_val_SHIFT)
#define LPPHY_RFOverrideVal0_lpf_bw_ovr_val_SHIFT       7
#define LPPHY_RFOverrideVal0_lpf_bw_ovr_val_MASK        (0x1 << LPPHY_RFOverrideVal0_lpf_bw_ovr_val_SHIFT)
#define LPPHY_RFOverrideVal0_rfpll_pu_ovr_val_SHIFT     8
#define LPPHY_RFOverrideVal0_rfpll_pu_ovr_val_MASK      (0x1 << LPPHY_RFOverrideVal0_rfpll_pu_ovr_val_SHIFT)
#define LPPHY_RFOverrideVal0_wrssi_pu_ovr_val_SHIFT     9
#define LPPHY_RFOverrideVal0_wrssi_pu_ovr_val_MASK      (0x1 << LPPHY_RFOverrideVal0_wrssi_pu_ovr_val_SHIFT)
#define LPPHY_RFOverrideVal0_nrssi_pu_ovr_val_SHIFT     10
#define LPPHY_RFOverrideVal0_nrssi_pu_ovr_val_MASK      (0x1 << LPPHY_RFOverrideVal0_nrssi_pu_ovr_val_SHIFT)
#define LPPHY_RFOverrideVal0_internalrfrxpu_ovr_val_SHIFT       11
#define LPPHY_RFOverrideVal0_internalrfrxpu_ovr_val_MASK        (0x1 << LPPHY_RFOverrideVal0_internalrfrxpu_ovr_val_SHIFT)
#define LPPHY_RFOverrideVal0_internalrftxpu_ovr_val_SHIFT       12
#define LPPHY_RFOverrideVal0_internalrftxpu_ovr_val_MASK        (0x1 << LPPHY_RFOverrideVal0_internalrftxpu_ovr_val_SHIFT)
#define LPPHY_RFOverrideVal0_rfpll_pu_xor_SHIFT 13
#define LPPHY_RFOverrideVal0_rfpll_pu_xor_MASK  (0x1 << LPPHY_RFOverrideVal0_rfpll_pu_xor_SHIFT)

/* Bits in LPPHY_TRLookup1 */
#define LPPHY_TRLookup1_TRLut0_SHIFT    0
#define LPPHY_TRLookup1_TRLut0_MASK     (0x3f << LPPHY_TRLookup1_TRLut0_SHIFT)
#define LPPHY_TRLookup1_TRLut1_SHIFT    8
#define LPPHY_TRLookup1_TRLut1_MASK     (0x3f << LPPHY_TRLookup1_TRLut1_SHIFT)

/* Bits in LPPHY_TRLookup2 */
#define LPPHY_TRLookup2_TRLut2_SHIFT    0
#define LPPHY_TRLookup2_TRLut2_MASK     (0x3f << LPPHY_TRLookup2_TRLut2_SHIFT)
#define LPPHY_TRLookup2_TRLut3_SHIFT    8
#define LPPHY_TRLookup2_TRLut3_MASK     (0x3f << LPPHY_TRLookup2_TRLut3_SHIFT)

/* Bits in LPPHY_RssiSelLookup1 */
#define LPPHY_RssiSelLookup1_RssiSelLut0_SHIFT  0
#define LPPHY_RssiSelLookup1_RssiSelLut0_MASK   (0x7 << LPPHY_RssiSelLookup1_RssiSelLut0_SHIFT)
#define LPPHY_RssiSelLookup1_RssiSelLut1_SHIFT  3
#define LPPHY_RssiSelLookup1_RssiSelLut1_MASK   (0x7 << LPPHY_RssiSelLookup1_RssiSelLut1_SHIFT)
#define LPPHY_RssiSelLookup1_RssiSelLut2_SHIFT  6
#define LPPHY_RssiSelLookup1_RssiSelLut2_MASK   (0x7 << LPPHY_RssiSelLookup1_RssiSelLut2_SHIFT)
#define LPPHY_RssiSelLookup1_RssiSelLut3_SHIFT  9
#define LPPHY_RssiSelLookup1_RssiSelLut3_MASK   (0x7 << LPPHY_RssiSelLookup1_RssiSelLut3_SHIFT)

/* Bits in LPPHY_iqloCalCmd */
#define LPPHY_iqloCalCmd_iqloCalCmd_SHIFT       15
#define LPPHY_iqloCalCmd_iqloCalCmd_MASK        (0x1 << LPPHY_iqloCalCmd_iqloCalCmd_SHIFT)
#define LPPHY_iqloCalCmd_iqloCalDFTCmd_SHIFT    14
#define LPPHY_iqloCalCmd_iqloCalDFTCmd_MASK     (0x1 << LPPHY_iqloCalCmd_iqloCalDFTCmd_SHIFT)
#define LPPHY_iqloCalCmd_core2cal_SHIFT 12
#define LPPHY_iqloCalCmd_core2cal_MASK  (0x3 << LPPHY_iqloCalCmd_core2cal_SHIFT)
#define LPPHY_iqloCalCmd_cal_type_SHIFT 8
#define LPPHY_iqloCalCmd_cal_type_MASK  (0xf << LPPHY_iqloCalCmd_cal_type_SHIFT)
#define LPPHY_iqloCalCmd_stepsize_start_log2_SHIFT      4
#define LPPHY_iqloCalCmd_stepsize_start_log2_MASK       (0xf << LPPHY_iqloCalCmd_stepsize_start_log2_SHIFT)
#define LPPHY_iqloCalCmd_num_of_level_SHIFT     0
#define LPPHY_iqloCalCmd_num_of_level_MASK      (0xf << LPPHY_iqloCalCmd_num_of_level_SHIFT)

/* Bits in LPPHY_iqloCalCmdNnum */
#define LPPHY_iqloCalCmdNnum_N_settle_search_log2_SHIFT 12
#define LPPHY_iqloCalCmdNnum_N_settle_search_log2_MASK  (0xf << LPPHY_iqloCalCmdNnum_N_settle_search_log2_SHIFT)
#define LPPHY_iqloCalCmdNnum_N_meas_search_log2_SHIFT   8
#define LPPHY_iqloCalCmdNnum_N_meas_search_log2_MASK    (0xf << LPPHY_iqloCalCmdNnum_N_meas_search_log2_SHIFT)
#define LPPHY_iqloCalCmdNnum_N_settle_gctl_log2_SHIFT   4
#define LPPHY_iqloCalCmdNnum_N_settle_gctl_log2_MASK    (0xf << LPPHY_iqloCalCmdNnum_N_settle_gctl_log2_SHIFT)
#define LPPHY_iqloCalCmdNnum_N_meas_gctl_log2_SHIFT     0
#define LPPHY_iqloCalCmdNnum_N_meas_gctl_log2_MASK      (0xf << LPPHY_iqloCalCmdNnum_N_meas_gctl_log2_SHIFT)

/* Bits in LPPHY_iqloCalCmdGctl */
#define LPPHY_iqloCalCmdGctl_iqlo_cal_en_SHIFT  15
#define LPPHY_iqloCalCmdGctl_iqlo_cal_en_MASK   (0x1 << LPPHY_iqloCalCmdGctl_iqlo_cal_en_SHIFT)
#define LPPHY_iqloCalCmdGctl_index_gctl_start_SHIFT     8
#define LPPHY_iqloCalCmdGctl_index_gctl_start_MASK      (0x1f << LPPHY_iqloCalCmdGctl_index_gctl_start_SHIFT)
#define LPPHY_iqloCalCmdGctl_gctl_threshold_d2_SHIFT    4
#define LPPHY_iqloCalCmdGctl_gctl_threshold_d2_MASK     (0xf << LPPHY_iqloCalCmdGctl_gctl_threshold_d2_SHIFT)
#define LPPHY_iqloCalCmdGctl_gctl_LADlen_d2_SHIFT       0
#define LPPHY_iqloCalCmdGctl_gctl_LADlen_d2_MASK        (0xf << LPPHY_iqloCalCmdGctl_gctl_LADlen_d2_SHIFT)

/* Bits in LPPHY_macintDbgReg */
#define LPPHY_macintDbgReg_dbgtx_selstate_SHIFT 0
#define LPPHY_macintDbgReg_dbgtx_selstate_MASK  (0x3 << LPPHY_macintDbgReg_dbgtx_selstate_SHIFT)
#define LPPHY_macintDbgReg_dbgrx_selstate_SHIFT 2
#define LPPHY_macintDbgReg_dbgrx_selstate_MASK  (0x3 << LPPHY_macintDbgReg_dbgrx_selstate_SHIFT)
#define LPPHY_macintDbgReg_dbgclassifier_state_SHIFT    4
#define LPPHY_macintDbgReg_dbgclassifier_state_MASK     (0x7 << LPPHY_macintDbgReg_dbgclassifier_state_SHIFT)

/* Bits in LPPHY_TableAddress */
#define LPPHY_TableAddress_Table_SHIFT  10
#define LPPHY_TableAddress_Table_MASK   (0x3f << LPPHY_TableAddress_Table_SHIFT)
#define LPPHY_TableAddress_Offset_SHIFT 0
#define LPPHY_TableAddress_Offset_MASK  (0x3ff << LPPHY_TableAddress_Offset_SHIFT)

/* Bits in LPPHY_TabledataLo */
#define LPPHY_TabledataLo_TabledataLo_SHIFT     0
#define LPPHY_TabledataLo_TabledataLo_MASK      (0xffff << LPPHY_TabledataLo_TabledataLo_SHIFT)

/* Bits in LPPHY_TabledataHi */
#define LPPHY_TabledataHi_TableDataHi_SHIFT     0
#define LPPHY_TabledataHi_TableDataHi_MASK      (0xffff << LPPHY_TabledataHi_TableDataHi_SHIFT)

/* Bits in LPPHY_phyCrsEnableAddress */
#define LPPHY_phyCrsEnableAddress_phyCrsEn_SHIFT        0
#define LPPHY_phyCrsEnableAddress_phyCrsEn_MASK (0xffff << LPPHY_phyCrsEnableAddress_phyCrsEn_SHIFT)

/* Bits in LPPHY_IdletimeCtrl */
#define LPPHY_IdletimeCtrl_idleTimeUseCrsEd_SHIFT       0
#define LPPHY_IdletimeCtrl_idleTimeUseCrsEd_MASK        (0x1 << LPPHY_IdletimeCtrl_idleTimeUseCrsEd_SHIFT)
#define LPPHY_IdletimeCtrl_idleTimeUseCrsSigDet_SHIFT   1
#define LPPHY_IdletimeCtrl_idleTimeUseCrsSigDet_MASK    (0x1 << LPPHY_IdletimeCtrl_idleTimeUseCrsSigDet_SHIFT)
#define LPPHY_IdletimeCtrl_idleTimeUseCrsTx_SHIFT       2
#define LPPHY_IdletimeCtrl_idleTimeUseCrsTx_MASK        (0x1 << LPPHY_IdletimeCtrl_idleTimeUseCrsTx_SHIFT)
#define LPPHY_IdletimeCtrl_clearIdleTimeCounters_SHIFT  3
#define LPPHY_IdletimeCtrl_clearIdleTimeCounters_MASK   (0x1 << LPPHY_IdletimeCtrl_clearIdleTimeCounters_SHIFT)
#define LPPHY_IdletimeCtrl_enableIdleTimeCounters_SHIFT 4
#define LPPHY_IdletimeCtrl_enableIdleTimeCounters_MASK  (0x1 << LPPHY_IdletimeCtrl_enableIdleTimeCounters_SHIFT)

/* Bits in LPPHY_IdletimeCrsOnLo */
#define LPPHY_IdletimeCrsOnLo_idleTimeCrsOnLoCount_SHIFT        0
#define LPPHY_IdletimeCrsOnLo_idleTimeCrsOnLoCount_MASK (0xffff << LPPHY_IdletimeCrsOnLo_idleTimeCrsOnLoCount_SHIFT)

/* Bits in LPPHY_IdletimeCrsOnHi */
#define LPPHY_IdletimeCrsOnHi_idleTimeCrsOnHiCount_SHIFT        0
#define LPPHY_IdletimeCrsOnHi_idleTimeCrsOnHiCount_MASK (0xffff << LPPHY_IdletimeCrsOnHi_idleTimeCrsOnHiCount_SHIFT)

/* Bits in LPPHY_IdletimeMeasTimeLo */
#define LPPHY_IdletimeMeasTimeLo_idleTimeMeasTimeLoCount_SHIFT  0
#define LPPHY_IdletimeMeasTimeLo_idleTimeMeasTimeLoCount_MASK   (0xffff << LPPHY_IdletimeMeasTimeLo_idleTimeMeasTimeLoCount_SHIFT)

/* Bits in LPPHY_IdletimeMeasTimeHi */
#define LPPHY_IdletimeMeasTimeHi_idleTimeMeasTimeHiCount_SHIFT  0
#define LPPHY_IdletimeMeasTimeHi_idleTimeMeasTimeHiCount_MASK   (0xffff << LPPHY_IdletimeMeasTimeHi_idleTimeMeasTimeHiCount_SHIFT)

/* Bits in LPPHY_ResetlenOfdmTxAddr */
#define LPPHY_ResetlenOfdmTxAddr_ofdmtx_resetLenValue_SHIFT     0
#define LPPHY_ResetlenOfdmTxAddr_ofdmtx_resetLenValue_MASK      (0xffff << LPPHY_ResetlenOfdmTxAddr_ofdmtx_resetLenValue_SHIFT)

/* Bits in LPPHY_ResetlenOfdmRxAddr */
#define LPPHY_ResetlenOfdmRxAddr_ofdmrx_resetLenValue_SHIFT     0
#define LPPHY_ResetlenOfdmRxAddr_ofdmrx_resetLenValue_MASK      (0xffff << LPPHY_ResetlenOfdmRxAddr_ofdmrx_resetLenValue_SHIFT)

/* Bits in LPPHY_reg_crs_enable */
#define LPPHY_reg_crs_enable_reg_crs_enable_SHIFT       15
#define LPPHY_reg_crs_enable_reg_crs_enable_MASK        (0x1 << LPPHY_reg_crs_enable_reg_crs_enable_SHIFT)

/* Bits in LPPHY_PlcpTmtStr0CtrMin */
#define LPPHY_PlcpTmtStr0CtrMin_Str0CtrMinValue_SHIFT   0
#define LPPHY_PlcpTmtStr0CtrMin_Str0CtrMinValue_MASK    (0xff << LPPHY_PlcpTmtStr0CtrMin_Str0CtrMinValue_SHIFT)
#define LPPHY_PlcpTmtStr0CtrMin_plcptmtValue_SHIFT      8
#define LPPHY_PlcpTmtStr0CtrMin_plcptmtValue_MASK       (0x1f << LPPHY_PlcpTmtStr0CtrMin_plcptmtValue_SHIFT)

/* Bits in LPPHY_PktfsmResetLenValue */
#define LPPHY_PktfsmResetLenValue_resetLenValue_SHIFT   0
#define LPPHY_PktfsmResetLenValue_resetLenValue_MASK    (0xffff << LPPHY_PktfsmResetLenValue_resetLenValue_SHIFT)

/* Bits in LPPHY_readsym2resetCtrl */
#define LPPHY_readsym2resetCtrl_readsym2resetwaitlen_SHIFT      8
#define LPPHY_readsym2resetCtrl_readsym2resetwaitlen_MASK       (0xff << LPPHY_readsym2resetCtrl_readsym2resetwaitlen_SHIFT)

/* Bits in LPPHY_Dcfilterdelay1 */
#define LPPHY_Dcfilterdelay1_passbadframes_SHIFT        0
#define LPPHY_Dcfilterdelay1_passbadframes_MASK (0x1 << LPPHY_Dcfilterdelay1_passbadframes_SHIFT)
#define LPPHY_Dcfilterdelay1_forcedsymtimrecen_SHIFT    1
#define LPPHY_Dcfilterdelay1_forcedsymtimrecen_MASK     (0x1 << LPPHY_Dcfilterdelay1_forcedsymtimrecen_SHIFT)
#define LPPHY_Dcfilterdelay1_dcfltrdelayofdm_SHIFT      8
#define LPPHY_Dcfilterdelay1_dcfltrdelayofdm_MASK       (0xff << LPPHY_Dcfilterdelay1_dcfltrdelayofdm_SHIFT)

/* Bits in LPPHY_packetrxActivetimeout */
#define LPPHY_packetrxActivetimeout_pktrxActivetimeout_SHIFT    0
#define LPPHY_packetrxActivetimeout_pktrxActivetimeout_MASK     (0xffff << LPPHY_packetrxActivetimeout_pktrxActivetimeout_SHIFT)

/* Bits in LPPHY_ed_timeoutValue */
#define LPPHY_ed_timeoutValue_edtimeout_SHIFT   0
#define LPPHY_ed_timeoutValue_edtimeout_MASK    (0xffff << LPPHY_ed_timeoutValue_edtimeout_SHIFT)

/* Bits in LPPHY_holdcrsOnValue */
#define LPPHY_holdcrsOnValue_holdcrsonlen_SHIFT 0
#define LPPHY_holdcrsOnValue_holdcrsonlen_MASK  (0xffff << LPPHY_holdcrsOnValue_holdcrsonlen_SHIFT)

/* Bits in LPPHY_ofdmtx_phycrsDelayValue */
#define LPPHY_ofdmtx_phycrsDelayValue_ofdmtx_phycrsDelayValue_SHIFT     0
#define LPPHY_ofdmtx_phycrsDelayValue_ofdmtx_phycrsDelayValue_MASK      (0xffff << LPPHY_ofdmtx_phycrsDelayValue_ofdmtx_phycrsDelayValue_SHIFT)

/* Bits in LPPHY_ccktx_phycrsDelayValue */
#define LPPHY_ccktx_phycrsDelayValue_ccktx_phycrsDelayValue_SHIFT       0
#define LPPHY_ccktx_phycrsDelayValue_ccktx_phycrsDelayValue_MASK        (0xffff << LPPHY_ccktx_phycrsDelayValue_ccktx_phycrsDelayValue_SHIFT)

/* Bits in LPPHY_EdonconfirmTimerValue */
#define LPPHY_EdonconfirmTimerValue_edonconfirmtimer_SHIFT      0
#define LPPHY_EdonconfirmTimerValue_edonconfirmtimer_MASK       (0xff << LPPHY_EdonconfirmTimerValue_edonconfirmtimer_SHIFT)
#define LPPHY_EdonconfirmTimerValue_edonblankingtimer_SHIFT     8
#define LPPHY_EdonconfirmTimerValue_edonblankingtimer_MASK      (0xff << LPPHY_EdonconfirmTimerValue_edonblankingtimer_SHIFT)

/* Bits in LPPHY_EdoffconfirmTimerValue */
#define LPPHY_EdoffconfirmTimerValue_edoffconfirmtimer_SHIFT    0
#define LPPHY_EdoffconfirmTimerValue_edoffconfirmtimer_MASK     (0xff << LPPHY_EdoffconfirmTimerValue_edoffconfirmtimer_SHIFT)

/* Bits in LPPHY_phycrsoffTimerValue */
#define LPPHY_phycrsoffTimerValue_phycrsofftimer_SHIFT  0
#define LPPHY_phycrsoffTimerValue_phycrsofftimer_MASK   (0xffff << LPPHY_phycrsoffTimerValue_phycrsofftimer_SHIFT)

/* Bits in LPPHY_adcCompCtrl */
#define LPPHY_adcCompCtrl_adccompCtrl_SHIFT     0
#define LPPHY_adcCompCtrl_adccompCtrl_MASK      (0x1 << LPPHY_adcCompCtrl_adccompCtrl_SHIFT)
#define LPPHY_adcCompCtrl_flipiq_adcout_SHIFT   1
#define LPPHY_adcCompCtrl_flipiq_adcout_MASK    (0x1 << LPPHY_adcCompCtrl_flipiq_adcout_SHIFT)
#define LPPHY_adcCompCtrl_flipiq_adccompout_SHIFT       2
#define LPPHY_adcCompCtrl_flipiq_adccompout_MASK        (0x1 << LPPHY_adcCompCtrl_flipiq_adccompout_SHIFT)
#define LPPHY_adcCompCtrl_flipiq_dacin_SHIFT    3
#define LPPHY_adcCompCtrl_flipiq_dacin_MASK     (0x1 << LPPHY_adcCompCtrl_flipiq_dacin_SHIFT)
#define LPPHY_adcCompCtrl_flipiq_adcswap_SHIFT  4
#define LPPHY_adcCompCtrl_flipiq_adcswap_MASK   (0x1 << LPPHY_adcCompCtrl_flipiq_adcswap_SHIFT)

/* Bits in LPPHY_log2RBPSKAddress */
#define LPPHY_log2RBPSKAddress_log2RBPSK_SHIFT  0
#define LPPHY_log2RBPSKAddress_log2RBPSK_MASK   (0xff << LPPHY_log2RBPSKAddress_log2RBPSK_SHIFT)

/* Bits in LPPHY_log2RQPSKAddress */
#define LPPHY_log2RQPSKAddress_log2RQPSK_SHIFT  0
#define LPPHY_log2RQPSKAddress_log2RQPSK_MASK   (0xff << LPPHY_log2RQPSKAddress_log2RQPSK_SHIFT)

/* Bits in LPPHY_log2R16QAMAddress */
#define LPPHY_log2R16QAMAddress_log2R16QAM_SHIFT        0
#define LPPHY_log2R16QAMAddress_log2R16QAM_MASK (0xff << LPPHY_log2R16QAMAddress_log2R16QAM_SHIFT)

/* Bits in LPPHY_log2R64QAMAddress */
#define LPPHY_log2R64QAMAddress_log2R64QAM_SHIFT        0
#define LPPHY_log2R64QAMAddress_log2R64QAM_MASK (0xff << LPPHY_log2R64QAMAddress_log2R64QAM_SHIFT)

/* Bits in LPPHY_offsetBPSKAddress */
#define LPPHY_offsetBPSKAddress_offsetBPSK_SHIFT        0
#define LPPHY_offsetBPSKAddress_offsetBPSK_MASK (0x3f << LPPHY_offsetBPSKAddress_offsetBPSK_SHIFT)

/* Bits in LPPHY_offsetQPSKAddress */
#define LPPHY_offsetQPSKAddress_offsetQPSK_SHIFT        0
#define LPPHY_offsetQPSKAddress_offsetQPSK_MASK (0x3f << LPPHY_offsetQPSKAddress_offsetQPSK_SHIFT)

/* Bits in LPPHY_offset16QAMAddress */
#define LPPHY_offset16QAMAddress_offset16QAM_SHIFT      0
#define LPPHY_offset16QAMAddress_offset16QAM_MASK       (0x3f << LPPHY_offset16QAMAddress_offset16QAM_SHIFT)

/* Bits in LPPHY_offset64QAMAddress */
#define LPPHY_offset64QAMAddress_offset64QAM_SHIFT      0
#define LPPHY_offset64QAMAddress_offset64QAM_MASK       (0x3f << LPPHY_offset64QAMAddress_offset64QAM_SHIFT)

/* Bits in LPPHY_Alpha1 */
#define LPPHY_Alpha1_alpha1Value_SHIFT  0
#define LPPHY_Alpha1_alpha1Value_MASK   (0x3ff << LPPHY_Alpha1_alpha1Value_SHIFT)

/* Bits in LPPHY_Alpha2 */
#define LPPHY_Alpha2_alpha2Value_SHIFT  0
#define LPPHY_Alpha2_alpha2Value_MASK   (0x3ff << LPPHY_Alpha2_alpha2Value_SHIFT)

/* Bits in LPPHY_Beta1 */
#define LPPHY_Beta1_Beta1Value_SHIFT    0
#define LPPHY_Beta1_Beta1Value_MASK     (0x3ff << LPPHY_Beta1_Beta1Value_SHIFT)

/* Bits in LPPHY_Beta2 */
#define LPPHY_Beta2_Beta2Value_SHIFT    0
#define LPPHY_Beta2_Beta2Value_MASK     (0x3ff << LPPHY_Beta2_Beta2Value_SHIFT)

/* Bits in LPPHY_LoopNumAddr */
#define LPPHY_LoopNumAddr_LoopNumValue_SHIFT    0
#define LPPHY_LoopNumAddr_LoopNumValue_MASK     (0xff << LPPHY_LoopNumAddr_LoopNumValue_SHIFT)

/* Bits in LPPHY_StrCollmaxSampAddress */
#define LPPHY_StrCollmaxSampAddress_maxSampCoarse2_SHIFT        0
#define LPPHY_StrCollmaxSampAddress_maxSampCoarse2_MASK (0xff << LPPHY_StrCollmaxSampAddress_maxSampCoarse2_SHIFT)
#define LPPHY_StrCollmaxSampAddress_strnCollDelay_SHIFT 8
#define LPPHY_StrCollmaxSampAddress_strnCollDelay_MASK  (0xff << LPPHY_StrCollmaxSampAddress_strnCollDelay_SHIFT)

/* Bits in LPPHY_MaxSampCoarseFineAddress */
#define LPPHY_MaxSampCoarseFineAddress_maxSampCoarse_SHIFT      0
#define LPPHY_MaxSampCoarseFineAddress_maxSampCoarse_MASK       (0xff << LPPHY_MaxSampCoarseFineAddress_maxSampCoarse_SHIFT)
#define LPPHY_MaxSampCoarseFineAddress_maxSampleFine_SHIFT      8
#define LPPHY_MaxSampCoarseFineAddress_maxSampleFine_MASK       (0xff << LPPHY_MaxSampCoarseFineAddress_maxSampleFine_SHIFT)

/* Bits in LPPHY_MaxSampCoarseStr0CtrAddress */
#define LPPHY_MaxSampCoarseStr0CtrAddress_maxSampCoarse3_SHIFT  0
#define LPPHY_MaxSampCoarseStr0CtrAddress_maxSampCoarse3_MASK   (0xff << LPPHY_MaxSampCoarseStr0CtrAddress_maxSampCoarse3_SHIFT)

/* Bits in LPPHY_IQEnableWaitTimeAddress */
#define LPPHY_IQEnableWaitTimeAddress_waittimevalue_SHIFT       0
#define LPPHY_IQEnableWaitTimeAddress_waittimevalue_MASK        (0xff << LPPHY_IQEnableWaitTimeAddress_waittimevalue_SHIFT)
#define LPPHY_IQEnableWaitTimeAddress_iqmode_SHIFT      8
#define LPPHY_IQEnableWaitTimeAddress_iqmode_MASK       (0x1 << LPPHY_IQEnableWaitTimeAddress_iqmode_SHIFT)
#define LPPHY_IQEnableWaitTimeAddress_iqstart_SHIFT     9
#define LPPHY_IQEnableWaitTimeAddress_iqstart_MASK      (0x1 << LPPHY_IQEnableWaitTimeAddress_iqstart_SHIFT)

/* Bits in LPPHY_IQNumSampsAddress */
#define LPPHY_IQNumSampsAddress_numSamps_SHIFT  0
#define LPPHY_IQNumSampsAddress_numSamps_MASK   (0xffff << LPPHY_IQNumSampsAddress_numSamps_SHIFT)

/* Bits in LPPHY_IQAccHiAddress */
#define LPPHY_IQAccHiAddress_IQAcc1_SHIFT       0
#define LPPHY_IQAccHiAddress_IQAcc1_MASK        (0xffff << LPPHY_IQAccHiAddress_IQAcc1_SHIFT)

/* Bits in LPPHY_IQAccLoAddress */
#define LPPHY_IQAccLoAddress_IQAcc0_SHIFT       0
#define LPPHY_IQAccLoAddress_IQAcc0_MASK        (0xffff << LPPHY_IQAccLoAddress_IQAcc0_SHIFT)

/* Bits in LPPHY_IQIPWRAccHiAddress */
#define LPPHY_IQIPWRAccHiAddress_IpwrAcc1_SHIFT 0
#define LPPHY_IQIPWRAccHiAddress_IpwrAcc1_MASK  (0xffff << LPPHY_IQIPWRAccHiAddress_IpwrAcc1_SHIFT)

/* Bits in LPPHY_IQIPWRAccLoAddress */
#define LPPHY_IQIPWRAccLoAddress_IpwrAcc0_SHIFT 0
#define LPPHY_IQIPWRAccLoAddress_IpwrAcc0_MASK  (0xffff << LPPHY_IQIPWRAccLoAddress_IpwrAcc0_SHIFT)

/* Bits in LPPHY_IQQPWRAccHiAddress */
#define LPPHY_IQQPWRAccHiAddress_QpwrAcc1_SHIFT 0
#define LPPHY_IQQPWRAccHiAddress_QpwrAcc1_MASK  (0xffff << LPPHY_IQQPWRAccHiAddress_QpwrAcc1_SHIFT)

/* Bits in LPPHY_IQQPWRAccLoAddress */
#define LPPHY_IQQPWRAccLoAddress_QpwrAcc0_SHIFT 0
#define LPPHY_IQQPWRAccLoAddress_QpwrAcc0_MASK  (0xffff << LPPHY_IQQPWRAccLoAddress_QpwrAcc0_SHIFT)

/* Bits in LPPHY_MaxNumsteps */
#define LPPHY_MaxNumsteps_maxNumSteps_SHIFT     0
#define LPPHY_MaxNumsteps_maxNumSteps_MASK      (0xff << LPPHY_MaxNumsteps_maxNumSteps_SHIFT)
#define LPPHY_MaxNumsteps_ticks_per_sample_SHIFT        8
#define LPPHY_MaxNumsteps_ticks_per_sample_MASK (0xff << LPPHY_MaxNumsteps_ticks_per_sample_SHIFT)

/* Bits in LPPHY_RotorPhaseAddr */
#define LPPHY_RotorPhaseAddr_rotorphase_SHIFT   0
#define LPPHY_RotorPhaseAddr_rotorphase_MASK    (0xff << LPPHY_RotorPhaseAddr_rotorphase_SHIFT)

/* Bits in LPPHY_AdvancedRetardRotorAddr */
#define LPPHY_AdvancedRetardRotorAddr_advretardrotorphase_SHIFT 0
#define LPPHY_AdvancedRetardRotorAddr_advretardrotorphase_MASK  (0xffff << LPPHY_AdvancedRetardRotorAddr_advretardrotorphase_SHIFT)

/* Bits in LPPHY_rssiAdcdelayCtrlAddr */
#define LPPHY_rssiAdcdelayCtrlAddr_maxrssidlytime_SHIFT 0
#define LPPHY_rssiAdcdelayCtrlAddr_maxrssidlytime_MASK  (0xf << LPPHY_rssiAdcdelayCtrlAddr_maxrssidlytime_SHIFT)
#define LPPHY_rssiAdcdelayCtrlAddr_maxtssidlytime_SHIFT 4
#define LPPHY_rssiAdcdelayCtrlAddr_maxtssidlytime_MASK  (0xf << LPPHY_rssiAdcdelayCtrlAddr_maxtssidlytime_SHIFT)
#define LPPHY_rssiAdcdelayCtrlAddr_maxtempsensedlytime_SHIFT    8
#define LPPHY_rssiAdcdelayCtrlAddr_maxtempsensedlytime_MASK     (0xf << LPPHY_rssiAdcdelayCtrlAddr_maxtempsensedlytime_SHIFT)
#define LPPHY_rssiAdcdelayCtrlAddr_maxtxfrmdlytime_SHIFT        12
#define LPPHY_rssiAdcdelayCtrlAddr_maxtxfrmdlytime_MASK (0xf << LPPHY_rssiAdcdelayCtrlAddr_maxtxfrmdlytime_SHIFT)

/* Bits in LPPHY_tssiStatusAddr */
#define LPPHY_tssiStatusAddr_tssiVal_reg_SHIFT  0
#define LPPHY_tssiStatusAddr_tssiVal_reg_MASK   (0xff << LPPHY_tssiStatusAddr_tssiVal_reg_SHIFT)
#define LPPHY_tssiStatusAddr_tssiBias_reg_SHIFT 8
#define LPPHY_tssiStatusAddr_tssiBias_reg_MASK  (0xff << LPPHY_tssiStatusAddr_tssiBias_reg_SHIFT)

/* Bits in LPPHY_tempsenseStatusAddr */
#define LPPHY_tempsenseStatusAddr_tempsense_reg_SHIFT   0
#define LPPHY_tempsenseStatusAddr_tempsense_reg_MASK    (0xff << LPPHY_tempsenseStatusAddr_tempsense_reg_SHIFT)
#define LPPHY_tempsenseStatusAddr_tempsenseValid_SHIFT  8
#define LPPHY_tempsenseStatusAddr_tempsenseValid_MASK   (0x1 << LPPHY_tempsenseStatusAddr_tempsenseValid_SHIFT)

/* Bits in LPPHY_tempsenseCtrlAddr */
#define LPPHY_tempsenseCtrlAddr_tempsenseCtrl_SHIFT     0
#define LPPHY_tempsenseCtrlAddr_tempsenseCtrl_MASK      (0x1 << LPPHY_tempsenseCtrlAddr_tempsenseCtrl_SHIFT)
#define LPPHY_tempsenseCtrlAddr_tssien_SHIFT    1
#define LPPHY_tempsenseCtrlAddr_tssien_MASK     (0x1 << LPPHY_tempsenseCtrlAddr_tssien_SHIFT)
#define LPPHY_tempsenseCtrlAddr_idle_tssi_SHIFT 8
#define LPPHY_tempsenseCtrlAddr_idle_tssi_MASK  (0xff << LPPHY_tempsenseCtrlAddr_idle_tssi_SHIFT)

/* Bits in LPPHY_wrssistatusAddr */
#define LPPHY_wrssistatusAddr_wrssi_i_SHIFT     0
#define LPPHY_wrssistatusAddr_wrssi_i_MASK      (0xff << LPPHY_wrssistatusAddr_wrssi_i_SHIFT)
#define LPPHY_wrssistatusAddr_wrssi_q_SHIFT     8
#define LPPHY_wrssistatusAddr_wrssi_q_MASK      (0xff << LPPHY_wrssistatusAddr_wrssi_q_SHIFT)

/* Bits in LPPHY_mufactoraddr */
#define LPPHY_mufactoraddr_mufactor_SHIFT       0
#define LPPHY_mufactoraddr_mufactor_MASK        (0x7f << LPPHY_mufactoraddr_mufactor_SHIFT)

/* Bits in LPPHY_scramstateAddr */
#define LPPHY_scramstateAddr_initstateValue_SHIFT       0
#define LPPHY_scramstateAddr_initstateValue_MASK        (0x7f << LPPHY_scramstateAddr_initstateValue_SHIFT)
#define LPPHY_scramstateAddr_scramctrlmode_SHIFT        7
#define LPPHY_scramstateAddr_scramctrlmode_MASK (0x1 << LPPHY_scramstateAddr_scramctrlmode_SHIFT)

/* Bits in LPPHY_txholdoffaddr */
#define LPPHY_txholdoffaddr_txholdoffvalue_SHIFT        0
#define LPPHY_txholdoffaddr_txholdoffvalue_MASK (0xff << LPPHY_txholdoffaddr_txholdoffvalue_SHIFT)

/* Bits in LPPHY_pktgainvalAddr */
#define LPPHY_pktgainvalAddr_pktgainValue_SHIFT 0
#define LPPHY_pktgainvalAddr_pktgainValue_MASK  (0xff << LPPHY_pktgainvalAddr_pktgainValue_SHIFT)
#define LPPHY_pktgainvalAddr_pscontrolStatus_SHIFT      8
#define LPPHY_pktgainvalAddr_pscontrolStatus_MASK       (0x1 << LPPHY_pktgainvalAddr_pscontrolStatus_SHIFT)
#define LPPHY_pktgainvalAddr_psAnglecontrolStatus_SHIFT 9
#define LPPHY_pktgainvalAddr_psAnglecontrolStatus_MASK  (0xf << LPPHY_pktgainvalAddr_psAnglecontrolStatus_SHIFT)

/* Bits in LPPHY_CoarseestimAddr */
#define LPPHY_CoarseestimAddr_coarseestimValue_SHIFT    0
#define LPPHY_CoarseestimAddr_coarseestimValue_MASK     (0x1fff << LPPHY_CoarseestimAddr_coarseestimValue_SHIFT)

/* Bits in LPPHY_stateTransitionAddr */
#define LPPHY_stateTransitionAddr_statetransitionstatus_SHIFT   0
#define LPPHY_stateTransitionAddr_statetransitionstatus_MASK    (0x7ff << LPPHY_stateTransitionAddr_statetransitionstatus_SHIFT)

/* Bits in LPPHY_trnoffsetAddr */
#define LPPHY_trnoffsetAddr_trnoffsetValue_SHIFT        0
#define LPPHY_trnoffsetAddr_trnoffsetValue_MASK (0x1f << LPPHY_trnoffsetAddr_trnoffsetValue_SHIFT)
#define LPPHY_trnoffsetAddr_gainIdxStatus_SHIFT 5
#define LPPHY_trnoffsetAddr_gainIdxStatus_MASK  (0x3f << LPPHY_trnoffsetAddr_gainIdxStatus_SHIFT)

/* Bits in LPPHY_NumRotorAddr */
#define LPPHY_NumRotorAddr_numARsteps_SHIFT     0
#define LPPHY_NumRotorAddr_numARsteps_MASK      (0xf << LPPHY_NumRotorAddr_numARsteps_SHIFT)
#define LPPHY_NumRotorAddr_Numrotorsteps_SHIFT  4
#define LPPHY_NumRotorAddr_Numrotorsteps_MASK   (0xff << LPPHY_NumRotorAddr_Numrotorsteps_SHIFT)

/* Bits in LPPHY_ViterbiOffsetAddr */
#define LPPHY_ViterbiOffsetAddr_metricOffset_SHIFT      0
#define LPPHY_ViterbiOffsetAddr_metricOffset_MASK       (0xf << LPPHY_ViterbiOffsetAddr_metricOffset_SHIFT)
#define LPPHY_ViterbiOffsetAddr_encode_signal_field_SHIFT       4
#define LPPHY_ViterbiOffsetAddr_encode_signal_field_MASK        (0x1 << LPPHY_ViterbiOffsetAddr_encode_signal_field_SHIFT)
#define LPPHY_ViterbiOffsetAddr_chanavg_24_SHIFT        5
#define LPPHY_ViterbiOffsetAddr_chanavg_24_MASK (0x1 << LPPHY_ViterbiOffsetAddr_chanavg_24_SHIFT)
#define LPPHY_ViterbiOffsetAddr_chanavg_36_SHIFT        6
#define LPPHY_ViterbiOffsetAddr_chanavg_36_MASK (0x1 << LPPHY_ViterbiOffsetAddr_chanavg_36_SHIFT)
#define LPPHY_ViterbiOffsetAddr_chanavg_48_SHIFT        7
#define LPPHY_ViterbiOffsetAddr_chanavg_48_MASK (0x1 << LPPHY_ViterbiOffsetAddr_chanavg_48_SHIFT)
#define LPPHY_ViterbiOffsetAddr_chanavg_54_SHIFT        8
#define LPPHY_ViterbiOffsetAddr_chanavg_54_MASK (0x1 << LPPHY_ViterbiOffsetAddr_chanavg_54_SHIFT)

/* Bits in LPPHY_SamplecollectwaitAddr */
#define LPPHY_SamplecollectwaitAddr_sampCollwait_SHIFT  0
#define LPPHY_SamplecollectwaitAddr_sampCollwait_MASK   (0xfff << LPPHY_SamplecollectwaitAddr_sampCollwait_SHIFT)

/* Bits in LPPHY_AphyControlAddr */
#define LPPHY_AphyControlAddr_phyloopbackEn_SHIFT       0
#define LPPHY_AphyControlAddr_phyloopbackEn_MASK        (0x1 << LPPHY_AphyControlAddr_phyloopbackEn_SHIFT)
#define LPPHY_AphyControlAddr_passThrough_SHIFT 1
#define LPPHY_AphyControlAddr_passThrough_MASK  (0x3 << LPPHY_AphyControlAddr_passThrough_SHIFT)
#define LPPHY_AphyControlAddr_sampcolltriggerEn_SHIFT   3
#define LPPHY_AphyControlAddr_sampcolltriggerEn_MASK    (0x1 << LPPHY_AphyControlAddr_sampcolltriggerEn_SHIFT)

/* Bits in LPPHY_NumPassThroughAddr */
#define LPPHY_NumPassThroughAddr_numpassThroughSamples_SHIFT    0
#define LPPHY_NumPassThroughAddr_numpassThroughSamples_MASK     (0xfff << LPPHY_NumPassThroughAddr_numpassThroughSamples_SHIFT)

/* Bits in LPPHY_RxCompcoeff */
#define LPPHY_RxCompcoeff_c1_SHIFT      0
#define LPPHY_RxCompcoeff_c1_MASK       (0xff << LPPHY_RxCompcoeff_c1_SHIFT)
#define LPPHY_RxCompcoeff_c0_SHIFT      8
#define LPPHY_RxCompcoeff_c0_MASK       (0xff << LPPHY_RxCompcoeff_c0_SHIFT)

/* Bits in LPPHY_cpaRotateValue */
#define LPPHY_cpaRotateValue_cpaRotateValueQ_SHIFT      0
#define LPPHY_cpaRotateValue_cpaRotateValueQ_MASK       (0x3f << LPPHY_cpaRotateValue_cpaRotateValueQ_SHIFT)
#define LPPHY_cpaRotateValue_cpaRotateValueI_SHIFT      6
#define LPPHY_cpaRotateValue_cpaRotateValueI_MASK       (0x3f << LPPHY_cpaRotateValue_cpaRotateValueI_SHIFT)

/* Bits in LPPHY_SampleplayCnt */
#define LPPHY_SampleplayCnt_sampPlayCount_SHIFT 0
#define LPPHY_SampleplayCnt_sampPlayCount_MASK  (0xfff << LPPHY_SampleplayCnt_sampPlayCount_SHIFT)

/* Bits in LPPHY_SampplayBufControl */
#define LPPHY_SampplayBufControl_sampPlaydepth_SHIFT    0
#define LPPHY_SampplayBufControl_sampPlaydepth_MASK     (0x3f << LPPHY_SampplayBufControl_sampPlaydepth_SHIFT)
#define LPPHY_SampplayBufControl_sampPlayWait_SHIFT     6
#define LPPHY_SampplayBufControl_sampPlayWait_MASK      (0x3ff << LPPHY_SampplayBufControl_sampPlayWait_SHIFT)

/* Bits in LPPHY_fourwireControl */
#define LPPHY_fourwireControl_tckfreq20or40_SHIFT       0
#define LPPHY_fourwireControl_tckfreq20or40_MASK        (0x1 << LPPHY_fourwireControl_tckfreq20or40_SHIFT)
#define LPPHY_fourwireControl_radioReset_SHIFT  1
#define LPPHY_fourwireControl_radioReset_MASK   (0x1 << LPPHY_fourwireControl_radioReset_SHIFT)

/* Bits in LPPHY_cpaTailCountValue */
#define LPPHY_cpaTailCountValue_tailCountValue_SHIFT    0
#define LPPHY_cpaTailCountValue_tailCountValue_MASK     (0x3f << LPPHY_cpaTailCountValue_tailCountValue_SHIFT)

/* Bits in LPPHY_TxPwrCtrlCmd */
#define LPPHY_TxPwrCtrlCmd_txPwrCtrl_en_SHIFT   15
#define LPPHY_TxPwrCtrlCmd_txPwrCtrl_en_MASK    (0x1 << LPPHY_TxPwrCtrlCmd_txPwrCtrl_en_SHIFT)
#define LPPHY_TxPwrCtrlCmd_hwtxPwrCtrl_en_SHIFT 14
#define LPPHY_TxPwrCtrlCmd_hwtxPwrCtrl_en_MASK  (0x1 << LPPHY_TxPwrCtrlCmd_hwtxPwrCtrl_en_SHIFT)
#define LPPHY_TxPwrCtrlCmd_use_txPwrCtrlCoefs_SHIFT     13
#define LPPHY_TxPwrCtrlCmd_use_txPwrCtrlCoefs_MASK      (0x1 << LPPHY_TxPwrCtrlCmd_use_txPwrCtrlCoefs_SHIFT)
#define LPPHY_TxPwrCtrlCmd_pwrIndex_init_SHIFT  0
#define LPPHY_TxPwrCtrlCmd_pwrIndex_init_MASK   (0x7f << LPPHY_TxPwrCtrlCmd_pwrIndex_init_SHIFT)

/* Bits in LPPHY_TxPwrCtrlNnum */
#define LPPHY_TxPwrCtrlNnum_Ntssi_intg_log2_SHIFT       12
#define LPPHY_TxPwrCtrlNnum_Ntssi_intg_log2_MASK        (0x7 << LPPHY_TxPwrCtrlNnum_Ntssi_intg_log2_SHIFT)
#define LPPHY_TxPwrCtrlNnum_Npt_intg_log2_SHIFT 8
#define LPPHY_TxPwrCtrlNnum_Npt_intg_log2_MASK  (0x7 << LPPHY_TxPwrCtrlNnum_Npt_intg_log2_SHIFT)
#define LPPHY_TxPwrCtrlNnum_Ntssi_delay_SHIFT   0
#define LPPHY_TxPwrCtrlNnum_Ntssi_delay_MASK    (0xff << LPPHY_TxPwrCtrlNnum_Ntssi_delay_SHIFT)

/* Bits in LPPHY_TxPwrCtrlIdleTssi */
#define LPPHY_TxPwrCtrlIdleTssi_rawTssiOffsetBinFormat_SHIFT    15
#define LPPHY_TxPwrCtrlIdleTssi_rawTssiOffsetBinFormat_MASK     (0x1 << LPPHY_TxPwrCtrlIdleTssi_rawTssiOffsetBinFormat_SHIFT)
#define LPPHY_TxPwrCtrlIdleTssi_idleTssi1_SHIFT 8
#define LPPHY_TxPwrCtrlIdleTssi_idleTssi1_MASK  (0x3f << LPPHY_TxPwrCtrlIdleTssi_idleTssi1_SHIFT)
#define LPPHY_TxPwrCtrlIdleTssi_idleTssi0_SHIFT 0
#define LPPHY_TxPwrCtrlIdleTssi_idleTssi0_MASK  (0x3f << LPPHY_TxPwrCtrlIdleTssi_idleTssi0_SHIFT)

/* Bits in LPPHY_TxPwrCtrlTargetPwr */
#define LPPHY_TxPwrCtrlTargetPwr_targetPwr1_SHIFT       8
#define LPPHY_TxPwrCtrlTargetPwr_targetPwr1_MASK        (0xff << LPPHY_TxPwrCtrlTargetPwr_targetPwr1_SHIFT)
#define LPPHY_TxPwrCtrlTargetPwr_targetPwr0_SHIFT       0
#define LPPHY_TxPwrCtrlTargetPwr_targetPwr0_MASK        (0xff << LPPHY_TxPwrCtrlTargetPwr_targetPwr0_SHIFT)

/* Bits in LPPHY_TxPwrCtrlDeltaPwrLimit */
#define LPPHY_TxPwrCtrlDeltaPwrLimit_cckPwrOffset_SHIFT 8
#define LPPHY_TxPwrCtrlDeltaPwrLimit_cckPwrOffset_MASK  (0xff << LPPHY_TxPwrCtrlDeltaPwrLimit_cckPwrOffset_SHIFT)
#define LPPHY_TxPwrCtrlDeltaPwrLimit_DeltaPwrLimit_SHIFT        0
#define LPPHY_TxPwrCtrlDeltaPwrLimit_DeltaPwrLimit_MASK (0xff << LPPHY_TxPwrCtrlDeltaPwrLimit_DeltaPwrLimit_SHIFT)

/* Bits in LPPHY_TxPwrCtrlBaseIndex */
#define LPPHY_TxPwrCtrlBaseIndex_loadBaseIndex_SHIFT    15
#define LPPHY_TxPwrCtrlBaseIndex_loadBaseIndex_MASK     (0x1 << LPPHY_TxPwrCtrlBaseIndex_loadBaseIndex_SHIFT)
#define LPPHY_TxPwrCtrlBaseIndex_uC_baseIndex1_SHIFT    8
#define LPPHY_TxPwrCtrlBaseIndex_uC_baseIndex1_MASK     (0x7f << LPPHY_TxPwrCtrlBaseIndex_uC_baseIndex1_SHIFT)
#define LPPHY_TxPwrCtrlBaseIndex_uC_baseIndex0_SHIFT    0
#define LPPHY_TxPwrCtrlBaseIndex_uC_baseIndex0_MASK     (0x7f << LPPHY_TxPwrCtrlBaseIndex_uC_baseIndex0_SHIFT)

/* Bits in LPPHY_TxPwrCtrlPwrIndex */
#define LPPHY_TxPwrCtrlPwrIndex_loadPwrIndex_SHIFT      15
#define LPPHY_TxPwrCtrlPwrIndex_loadPwrIndex_MASK       (0x1 << LPPHY_TxPwrCtrlPwrIndex_loadPwrIndex_SHIFT)
#define LPPHY_TxPwrCtrlPwrIndex_uC_pwrIndex1_SHIFT      8
#define LPPHY_TxPwrCtrlPwrIndex_uC_pwrIndex1_MASK       (0x7f << LPPHY_TxPwrCtrlPwrIndex_uC_pwrIndex1_SHIFT)
#define LPPHY_TxPwrCtrlPwrIndex_uC_pwrIndex0_SHIFT      0
#define LPPHY_TxPwrCtrlPwrIndex_uC_pwrIndex0_MASK       (0x7f << LPPHY_TxPwrCtrlPwrIndex_uC_pwrIndex0_SHIFT)

/* Bits in LPPHY_TxPwrCtrlStatus */
#define LPPHY_TxPwrCtrlStatus_estPwrValid_SHIFT 15
#define LPPHY_TxPwrCtrlStatus_estPwrValid_MASK  (0x1 << LPPHY_TxPwrCtrlStatus_estPwrValid_SHIFT)
#define LPPHY_TxPwrCtrlStatus_baseIndex_SHIFT   8
#define LPPHY_TxPwrCtrlStatus_baseIndex_MASK    (0x7f << LPPHY_TxPwrCtrlStatus_baseIndex_SHIFT)
#define LPPHY_TxPwrCtrlStatus_estPwr_SHIFT      0
#define LPPHY_TxPwrCtrlStatus_estPwr_MASK       (0xff << LPPHY_TxPwrCtrlStatus_estPwr_SHIFT)

/* Bits in LPPHY_lprfsignallut */
#define LPPHY_lprfsignallut_gmode_tx_pu_lut_SHIFT       0
#define LPPHY_lprfsignallut_gmode_tx_pu_lut_MASK        (0x3 << LPPHY_lprfsignallut_gmode_tx_pu_lut_SHIFT)
#define LPPHY_lprfsignallut_gmode_rx_pu_lut_SHIFT       2
#define LPPHY_lprfsignallut_gmode_rx_pu_lut_MASK        (0x3 << LPPHY_lprfsignallut_gmode_rx_pu_lut_SHIFT)
#define LPPHY_lprfsignallut_amode_tx_pu_lut_SHIFT       4
#define LPPHY_lprfsignallut_amode_tx_pu_lut_MASK        (0x3 << LPPHY_lprfsignallut_amode_tx_pu_lut_SHIFT)
#define LPPHY_lprfsignallut_amode_rx_pu_lut_SHIFT       6
#define LPPHY_lprfsignallut_amode_rx_pu_lut_MASK        (0x3 << LPPHY_lprfsignallut_amode_rx_pu_lut_SHIFT)
#define LPPHY_lprfsignallut_lpf_bw_lut_SHIFT    8
#define LPPHY_lprfsignallut_lpf_bw_lut_MASK     (0x3 << LPPHY_lprfsignallut_lpf_bw_lut_SHIFT)
#define LPPHY_lprfsignallut_internalrftxpu_lut_SHIFT    10
#define LPPHY_lprfsignallut_internalrftxpu_lut_MASK     (0x3 << LPPHY_lprfsignallut_internalrftxpu_lut_SHIFT)
#define LPPHY_lprfsignallut_internalrfrxpu_lut_SHIFT    12
#define LPPHY_lprfsignallut_internalrfrxpu_lut_MASK     (0x3 << LPPHY_lprfsignallut_internalrfrxpu_lut_SHIFT)

/* Bits in LPPHY_RxRadioControlFltrState */
#define LPPHY_RxRadioControlFltrState_rx_flt_high_start_state_SHIFT     0
#define LPPHY_RxRadioControlFltrState_rx_flt_high_start_state_MASK      (0xf << LPPHY_RxRadioControlFltrState_rx_flt_high_start_state_SHIFT)
#define LPPHY_RxRadioControlFltrState_rx_flt_high_hold_state_SHIFT      4
#define LPPHY_RxRadioControlFltrState_rx_flt_high_hold_state_MASK       (0xf << LPPHY_RxRadioControlFltrState_rx_flt_high_hold_state_SHIFT)
#define LPPHY_RxRadioControlFltrState_rx_flt_low_start_state_SHIFT      8
#define LPPHY_RxRadioControlFltrState_rx_flt_low_start_state_MASK       (0xf << LPPHY_RxRadioControlFltrState_rx_flt_low_start_state_SHIFT)
#define LPPHY_RxRadioControlFltrState_rx_flt_pga_start_state_SHIFT      12
#define LPPHY_RxRadioControlFltrState_rx_flt_pga_start_state_MASK       (0xf << LPPHY_RxRadioControlFltrState_rx_flt_pga_start_state_SHIFT)

/* Bits in LPPHY_RxRadioControl */
#define LPPHY_RxRadioControl_fine_gain_SHIFT    0
#define LPPHY_RxRadioControl_fine_gain_MASK     (0x1 << LPPHY_RxRadioControl_fine_gain_SHIFT)
#define LPPHY_RxRadioControl_board_switch_arch_SHIFT    1
#define LPPHY_RxRadioControl_board_switch_arch_MASK     (0x3 << LPPHY_RxRadioControl_board_switch_arch_SHIFT)
#define LPPHY_RxRadioControl_board_main_lna_SHIFT       3
#define LPPHY_RxRadioControl_board_main_lna_MASK        (0x1 << LPPHY_RxRadioControl_board_main_lna_SHIFT)
#define LPPHY_RxRadioControl_ps_train_suppress_other_lna_SHIFT  4
#define LPPHY_RxRadioControl_ps_train_suppress_other_lna_MASK   (0x1 << LPPHY_RxRadioControl_ps_train_suppress_other_lna_SHIFT)
#define LPPHY_RxRadioControl_ps_train_hold_fltr_ctrl_SHIFT      5
#define LPPHY_RxRadioControl_ps_train_hold_fltr_ctrl_MASK       (0x1 << LPPHY_RxRadioControl_ps_train_hold_fltr_ctrl_SHIFT)
#define LPPHY_RxRadioControl_ps_fine_gain_SHIFT 6
#define LPPHY_RxRadioControl_ps_fine_gain_MASK  (0x1 << LPPHY_RxRadioControl_ps_fine_gain_SHIFT)
#define LPPHY_RxRadioControl_dsss_stop_SHIFT    8
#define LPPHY_RxRadioControl_dsss_stop_MASK     (0xf << LPPHY_RxRadioControl_dsss_stop_SHIFT)
#define LPPHY_RxRadioControl_ofdm_stop_SHIFT    12
#define LPPHY_RxRadioControl_ofdm_stop_MASK     (0xf << LPPHY_RxRadioControl_ofdm_stop_SHIFT)

/* Bits in LPPHY_nrssistatusAddr */
#define LPPHY_nrssistatusAddr_nrssi_i_SHIFT     0
#define LPPHY_nrssistatusAddr_nrssi_i_MASK      (0xff << LPPHY_nrssistatusAddr_nrssi_i_SHIFT)
#define LPPHY_nrssistatusAddr_nrssi_q_SHIFT     8
#define LPPHY_nrssistatusAddr_nrssi_q_MASK      (0xff << LPPHY_nrssistatusAddr_nrssi_q_SHIFT)

/* Bits in LPPHY_rfoverride2 */
#define LPPHY_rfoverride2_hpf1_ctrl_ovr_SHIFT   0
#define LPPHY_rfoverride2_hpf1_ctrl_ovr_MASK    (0x1 << LPPHY_rfoverride2_hpf1_ctrl_ovr_SHIFT)
#define LPPHY_rfoverride2_hpf2_ctrl_ovr_SHIFT   1
#define LPPHY_rfoverride2_hpf2_ctrl_ovr_MASK    (0x1 << LPPHY_rfoverride2_hpf2_ctrl_ovr_SHIFT)
#define LPPHY_rfoverride2_lpf_lq_ovr_SHIFT      2
#define LPPHY_rfoverride2_lpf_lq_ovr_MASK       (0x1 << LPPHY_rfoverride2_lpf_lq_ovr_SHIFT)
#define LPPHY_rfoverride2_lna1_pu_ovr_SHIFT     3
#define LPPHY_rfoverride2_lna1_pu_ovr_MASK      (0x1 << LPPHY_rfoverride2_lna1_pu_ovr_SHIFT)
#define LPPHY_rfoverride2_lna2_pu_ovr_SHIFT     4
#define LPPHY_rfoverride2_lna2_pu_ovr_MASK      (0x1 << LPPHY_rfoverride2_lna2_pu_ovr_SHIFT)
#define LPPHY_rfoverride2_ps_ctrl_ovr_SHIFT     5
#define LPPHY_rfoverride2_ps_ctrl_ovr_MASK      (0x1 << LPPHY_rfoverride2_ps_ctrl_ovr_SHIFT)
#define LPPHY_rfoverride2_gmode_ext_lna_gain_ovr_SHIFT  6
#define LPPHY_rfoverride2_gmode_ext_lna_gain_ovr_MASK   (0x1 << LPPHY_rfoverride2_gmode_ext_lna_gain_ovr_SHIFT)
#define LPPHY_rfoverride2_amode_ext_lna_gain_ovr_SHIFT  7
#define LPPHY_rfoverride2_amode_ext_lna_gain_ovr_MASK   (0x1 << LPPHY_rfoverride2_amode_ext_lna_gain_ovr_SHIFT)
#define LPPHY_rfoverride2_txgainctrl_ovr_SHIFT  8
#define LPPHY_rfoverride2_txgainctrl_ovr_MASK   (0x1 << LPPHY_rfoverride2_txgainctrl_ovr_SHIFT)
#define LPPHY_rfoverride2_rxgainctrl_ovr_SHIFT  9
#define LPPHY_rfoverride2_rxgainctrl_ovr_MASK   (0x1 << LPPHY_rfoverride2_rxgainctrl_ovr_SHIFT)

/* Bits in LPPHY_rfoverride2val */
#define LPPHY_rfoverride2val_hpf1_ctrl_ovr_val_SHIFT    0
#define LPPHY_rfoverride2val_hpf1_ctrl_ovr_val_MASK     (0x7 << LPPHY_rfoverride2val_hpf1_ctrl_ovr_val_SHIFT)
#define LPPHY_rfoverride2val_hpf2_ctrl_ovr_val_SHIFT    3
#define LPPHY_rfoverride2val_hpf2_ctrl_ovr_val_MASK     (0x7 << LPPHY_rfoverride2val_hpf2_ctrl_ovr_val_SHIFT)
#define LPPHY_rfoverride2val_lpf_lq_ovr_val_SHIFT       6
#define LPPHY_rfoverride2val_lpf_lq_ovr_val_MASK        (0x3 << LPPHY_rfoverride2val_lpf_lq_ovr_val_SHIFT)
#define LPPHY_rfoverride2val_lna1_pu_ovr_val_SHIFT      8
#define LPPHY_rfoverride2val_lna1_pu_ovr_val_MASK       (0x1 << LPPHY_rfoverride2val_lna1_pu_ovr_val_SHIFT)
#define LPPHY_rfoverride2val_lna2_pu_ovr_val_SHIFT      9
#define LPPHY_rfoverride2val_lna2_pu_ovr_val_MASK       (0x1 << LPPHY_rfoverride2val_lna2_pu_ovr_val_SHIFT)
#define LPPHY_rfoverride2val_gmode_ext_lna_gain_ovr_val_SHIFT   10
#define LPPHY_rfoverride2val_gmode_ext_lna_gain_ovr_val_MASK    (0x1 << LPPHY_rfoverride2val_gmode_ext_lna_gain_ovr_val_SHIFT)
#define LPPHY_rfoverride2val_amode_ext_lna_gain_ovr_val_SHIFT   11
#define LPPHY_rfoverride2val_amode_ext_lna_gain_ovr_val_MASK    (0x1 << LPPHY_rfoverride2val_amode_ext_lna_gain_ovr_val_SHIFT)

/* Bits in LPPHY_psctrlovrval0 */
#define LPPHY_psctrlovrval0_ps_ctrl_ovr_val0_SHIFT      0
#define LPPHY_psctrlovrval0_ps_ctrl_ovr_val0_MASK       (0xffff << LPPHY_psctrlovrval0_ps_ctrl_ovr_val0_SHIFT)

/* Bits in LPPHY_psctrlovrval1 */
#define LPPHY_psctrlovrval1_ps_ctrl_ovr_val1_SHIFT      0
#define LPPHY_psctrlovrval1_ps_ctrl_ovr_val1_MASK       (0xffff << LPPHY_psctrlovrval1_ps_ctrl_ovr_val1_SHIFT)

/* Bits in LPPHY_psctrlovrval2 */
#define LPPHY_psctrlovrval2_ps_ctrl_ovr_val2_SHIFT      0
#define LPPHY_psctrlovrval2_ps_ctrl_ovr_val2_MASK       (0x3f << LPPHY_psctrlovrval2_ps_ctrl_ovr_val2_SHIFT)

/* Bits in LPPHY_txgainctrlovrval */
#define LPPHY_txgainctrlovrval_txgainctrl_ovr_val_SHIFT 0
#define LPPHY_txgainctrlovrval_txgainctrl_ovr_val_MASK  (0x7ff << LPPHY_txgainctrlovrval_txgainctrl_ovr_val_SHIFT)

/* Bits in LPPHY_rxgainctrlovrval */
#define LPPHY_rxgainctrlovrval_rxgainctrl_ovr_val_SHIFT 0
#define LPPHY_rxgainctrlovrval_rxgainctrl_ovr_val_MASK  (0xffff << LPPHY_rxgainctrlovrval_rxgainctrl_ovr_val_SHIFT)

/* Bits in LPPHY_afe_ddfs */
#define LPPHY_afe_ddfs_squareWaveEn_SHIFT       0
#define LPPHY_afe_ddfs_squareWaveEn_MASK        (0x1 << LPPHY_afe_ddfs_squareWaveEn_SHIFT)
#define LPPHY_afe_ddfs_playoutEn_SHIFT  1
#define LPPHY_afe_ddfs_playoutEn_MASK   (0x1 << LPPHY_afe_ddfs_playoutEn_SHIFT)
#define LPPHY_afe_ddfs_twoToneEn_SHIFT  2
#define LPPHY_afe_ddfs_twoToneEn_MASK   (0x1 << LPPHY_afe_ddfs_twoToneEn_SHIFT)
#define LPPHY_afe_ddfs_chanIEn_SHIFT    3
#define LPPHY_afe_ddfs_chanIEn_MASK     (0x1 << LPPHY_afe_ddfs_chanIEn_SHIFT)
#define LPPHY_afe_ddfs_chanQEn_SHIFT    4
#define LPPHY_afe_ddfs_chanQEn_MASK     (0x1 << LPPHY_afe_ddfs_chanQEn_SHIFT)
#define LPPHY_afe_ddfs_scaleIndex_SHIFT 5
#define LPPHY_afe_ddfs_scaleIndex_MASK  (0x3 << LPPHY_afe_ddfs_scaleIndex_SHIFT)

/* Bits in LPPHY_afe_ddfs_pointer_init */
#define LPPHY_afe_ddfs_pointer_init_lutPointer1Init_SHIFT       0
#define LPPHY_afe_ddfs_pointer_init_lutPointer1Init_MASK        (0x7f << LPPHY_afe_ddfs_pointer_init_lutPointer1Init_SHIFT)
#define LPPHY_afe_ddfs_pointer_init_lutPointer2Init_SHIFT       8
#define LPPHY_afe_ddfs_pointer_init_lutPointer2Init_MASK        (0x7f << LPPHY_afe_ddfs_pointer_init_lutPointer2Init_SHIFT)

/* Bits in LPPHY_afe_ddfs_incr_init */
#define LPPHY_afe_ddfs_incr_init_lutIncr1Init_SHIFT     0
#define LPPHY_afe_ddfs_incr_init_lutIncr1Init_MASK      (0x7f << LPPHY_afe_ddfs_incr_init_lutIncr1Init_SHIFT)
#define LPPHY_afe_ddfs_incr_init_lutIncr2Init_SHIFT     8
#define LPPHY_afe_ddfs_incr_init_lutIncr2Init_MASK      (0x7f << LPPHY_afe_ddfs_incr_init_lutIncr2Init_SHIFT)

/* Bits in LPPHY_mrcNoiseReduction */
#define LPPHY_mrcNoiseReduction_mrcnoiseReduction_SHIFT 0
#define LPPHY_mrcNoiseReduction_mrcnoiseReduction_MASK  (0xff << LPPHY_mrcNoiseReduction_mrcnoiseReduction_SHIFT)

/* Bits in LPPHY_TRLookup3 */
#define LPPHY_TRLookup3_TRLut4_SHIFT    0
#define LPPHY_TRLookup3_TRLut4_MASK     (0x3f << LPPHY_TRLookup3_TRLut4_SHIFT)
#define LPPHY_TRLookup3_TRLut5_SHIFT    8
#define LPPHY_TRLookup3_TRLut5_MASK     (0x3f << LPPHY_TRLookup3_TRLut5_SHIFT)

/* Bits in LPPHY_TRLookup4 */
#define LPPHY_TRLookup4_TRLut6_SHIFT    0
#define LPPHY_TRLookup4_TRLut6_MASK     (0x3f << LPPHY_TRLookup4_TRLut6_SHIFT)
#define LPPHY_TRLookup4_TRLut7_SHIFT    8
#define LPPHY_TRLookup4_TRLut7_MASK     (0x3f << LPPHY_TRLookup4_TRLut7_SHIFT)

/* Bits in LPPHY_RadarFifoStatus */
#define LPPHY_RadarFifoStatus_radar_recordcnt_SHIFT     0
#define LPPHY_RadarFifoStatus_radar_recordcnt_MASK      (0x1ff << LPPHY_RadarFifoStatus_radar_recordcnt_SHIFT)
#define LPPHY_RadarFifoStatus_radar_fifo_overflow_SHIFT 9
#define LPPHY_RadarFifoStatus_radar_fifo_overflow_MASK  (0x1 << LPPHY_RadarFifoStatus_radar_fifo_overflow_SHIFT)

/* Bits in LPPHY_gpioOutEn */
#define LPPHY_gpioOutEn_gpioHiOutEn_SHIFT       0
#define LPPHY_gpioOutEn_gpioHiOutEn_MASK        (0xffff << LPPHY_gpioOutEn_gpioHiOutEn_SHIFT)

/* Bits in LPPHY_gpioSel */
#define LPPHY_gpioSel_gpioSel_SHIFT     0
#define LPPHY_gpioSel_gpioSel_MASK      (0xff << LPPHY_gpioSel_gpioSel_SHIFT)

/* Bits in LPPHY_gpioOut */
#define LPPHY_gpioOut_gpioOut_SHIFT     0
#define LPPHY_gpioOut_gpioOut_MASK      (0xffff << LPPHY_gpioOut_gpioOut_SHIFT)