2 * x86-64 code generator for TCC
4 * Copyright (c) 2008 Shinichiro Hamaji
6 * Based on i386-gen.c by Fabrice Bellard
8 * This library is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU Lesser General Public
10 * License as published by the Free Software Foundation; either
11 * version 2 of the License, or (at your option) any later version.
13 * This library is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * Lesser General Public License for more details.
18 * You should have received a copy of the GNU Lesser General Public
19 * License along with this library; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 #ifdef TARGET_DEFS_ONLY
25 /* number of available registers */
27 #define NB_ASM_REGS 16
28 #define CONFIG_TCC_ASM
30 /* a register can belong to several classes. The classes must be
31 sorted from more general to more precise (see gv2() code which does
32 assumptions on it). */
33 #define RC_INT 0x0001 /* generic integer register */
34 #define RC_FLOAT 0x0002 /* generic float register */
38 #define RC_ST0 0x0080 /* only for long double */
43 #define RC_XMM0 0x1000
44 #define RC_XMM1 0x2000
45 #define RC_XMM2 0x4000
46 #define RC_XMM3 0x8000
47 #define RC_XMM4 0x10000
48 #define RC_XMM5 0x20000
49 #define RC_XMM6 0x40000
50 #define RC_XMM7 0x80000
51 #define RC_IRET RC_RAX /* function return: integer register */
52 #define RC_LRET RC_RDX /* function return: second integer register */
53 #define RC_FRET RC_XMM0 /* function return: float register */
54 #define RC_QRET RC_XMM1 /* function return: second float register */
56 /* pretty names for the registers */
84 #define REX_BASE(reg) (((reg) >> 3) & 1)
85 #define REG_VALUE(reg) ((reg) & 7)
87 /* return registers for function */
88 #define REG_IRET TREG_RAX /* single word int return register */
89 #define REG_LRET TREG_RDX /* second word return register (for long long) */
90 #define REG_FRET TREG_XMM0 /* float return register */
91 #define REG_QRET TREG_XMM1 /* second float return register */
93 /* defined if function parameters must be evaluated in reverse order */
94 #define INVERT_FUNC_PARAMS
96 /* pointer size, in bytes */
99 /* long double size and alignment, in bytes */
100 #define LDOUBLE_SIZE 16
101 #define LDOUBLE_ALIGN 16
102 /* maximum alignment (for aligned attribute support) */
105 /******************************************************/
106 #else /* ! TARGET_DEFS_ONLY */
107 /******************************************************/
111 ST_DATA
const int reg_classes
[NB_REGS
] = {
112 /* eax */ RC_INT
| RC_RAX
,
113 /* ecx */ RC_INT
| RC_RCX
,
114 /* edx */ RC_INT
| RC_RDX
,
128 /* xmm0 */ RC_FLOAT
| RC_XMM0
,
129 /* xmm1 */ RC_FLOAT
| RC_XMM1
,
130 /* xmm2 */ RC_FLOAT
| RC_XMM2
,
131 /* xmm3 */ RC_FLOAT
| RC_XMM3
,
132 /* xmm4 */ RC_FLOAT
| RC_XMM4
,
133 /* xmm5 */ RC_FLOAT
| RC_XMM5
,
134 /* xmm6 an xmm7 are included so gv() can be used on them,
135 but they are not tagged with RC_FLOAT because they are
136 callee saved on Windows */
142 static unsigned long func_sub_sp_offset
;
143 static int func_ret_sub
;
145 /* XXX: make it faster ? */
146 ST_FUNC
void g(int c
)
152 if (ind1
> cur_text_section
->data_allocated
)
153 section_realloc(cur_text_section
, ind1
);
154 cur_text_section
->data
[ind
] = c
;
158 ST_FUNC
void o(unsigned int c
)
166 ST_FUNC
void gen_le16(int v
)
172 ST_FUNC
void gen_le32(int c
)
180 ST_FUNC
void gen_le64(int64_t c
)
192 static void orex(int ll
, int r
, int r2
, int b
)
194 if ((r
& VT_VALMASK
) >= VT_CONST
)
196 if ((r2
& VT_VALMASK
) >= VT_CONST
)
198 if (ll
|| REX_BASE(r
) || REX_BASE(r2
))
199 o(0x40 | REX_BASE(r
) | (REX_BASE(r2
) << 2) | (ll
<< 3));
203 /* output a symbol and patch all calls to it */
204 ST_FUNC
void gsym_addr(int t
, int a
)
207 unsigned char *ptr
= cur_text_section
->data
+ t
;
208 uint32_t n
= read32le(ptr
); /* next value */
209 write32le(ptr
, a
- t
- 4);
220 static int is64_type(int t
)
222 return ((t
& VT_BTYPE
) == VT_PTR
||
223 (t
& VT_BTYPE
) == VT_FUNC
||
224 (t
& VT_BTYPE
) == VT_LLONG
);
227 /* instruction + 4 bytes data. Return the address of the data */
228 static int oad(int c
, int s
)
239 /* generate jmp to a label */
240 #define gjmp2(instr,lbl) oad(instr,lbl)
242 ST_FUNC
void gen_addr32(int r
, Sym
*sym
, int c
)
245 greloca(cur_text_section
, sym
, ind
, R_X86_64_32S
, c
), c
=0;
249 /* output constant with relocation if 'r & VT_SYM' is true */
250 ST_FUNC
void gen_addr64(int r
, Sym
*sym
, int64_t c
)
253 greloca(cur_text_section
, sym
, ind
, R_X86_64_64
, c
), c
=0;
257 /* output constant with relocation if 'r & VT_SYM' is true */
258 ST_FUNC
void gen_addrpc32(int r
, Sym
*sym
, int c
)
261 greloca(cur_text_section
, sym
, ind
, R_X86_64_PC32
, c
-4), c
=4;
265 /* output got address with relocation */
266 static void gen_gotpcrel(int r
, Sym
*sym
, int c
)
269 tcc_error("internal error: no GOT on PE: %s %x %x | %02x %02x %02x\n",
270 get_tok_str(sym
->v
, NULL
), c
, r
,
271 cur_text_section
->data
[ind
-3],
272 cur_text_section
->data
[ind
-2],
273 cur_text_section
->data
[ind
-1]
276 greloca(cur_text_section
, sym
, ind
, R_X86_64_GOTPCREL
, -4);
279 /* we use add c, %xxx for displacement */
281 o(0xc0 + REG_VALUE(r
));
286 static void gen_modrm_impl(int op_reg
, int r
, Sym
*sym
, int c
, int is_got
)
288 op_reg
= REG_VALUE(op_reg
) << 3;
289 if ((r
& VT_VALMASK
) == VT_CONST
) {
290 /* constant memory reference */
292 /* Absolute memory reference */
293 o(0x04 | op_reg
); /* [sib] | destreg */
294 oad(0x25, c
); /* disp32 */
296 o(0x05 | op_reg
); /* (%rip)+disp32 | destreg */
298 gen_gotpcrel(r
, sym
, c
);
300 gen_addrpc32(r
, sym
, c
);
303 } else if ((r
& VT_VALMASK
) == VT_LOCAL
) {
304 /* currently, we use only ebp as base */
306 /* short reference */
310 oad(0x85 | op_reg
, c
);
312 } else if ((r
& VT_VALMASK
) >= TREG_MEM
) {
314 g(0x80 | op_reg
| REG_VALUE(r
));
317 g(0x00 | op_reg
| REG_VALUE(r
));
320 g(0x00 | op_reg
| REG_VALUE(r
));
324 /* generate a modrm reference. 'op_reg' contains the additional 3
326 static void gen_modrm(int op_reg
, int r
, Sym
*sym
, int c
)
328 gen_modrm_impl(op_reg
, r
, sym
, c
, 0);
331 /* generate a modrm reference. 'op_reg' contains the additional 3
333 static void gen_modrm64(int opcode
, int op_reg
, int r
, Sym
*sym
, int c
)
336 is_got
= (op_reg
& TREG_MEM
) && !(sym
->type
.t
& VT_STATIC
);
337 orex(1, r
, op_reg
, opcode
);
338 gen_modrm_impl(op_reg
, r
, sym
, c
, is_got
);
342 /* load 'r' from value 'sv' */
343 void load(int r
, SValue
*sv
)
345 int v
, t
, ft
, fc
, fr
;
350 sv
= pe_getimport(sv
, &v2
);
354 ft
= sv
->type
.t
& ~VT_DEFSIGN
;
356 if (fc
!= sv
->c
.i
&& (fr
& VT_SYM
))
357 tcc_error("64 bit addend in load");
359 ft
&= ~(VT_VOLATILE
| VT_CONSTANT
);
361 #ifndef TCC_TARGET_PE
362 /* we use indirect access via got */
363 if ((fr
& VT_VALMASK
) == VT_CONST
&& (fr
& VT_SYM
) &&
364 (fr
& VT_LVAL
) && !(sv
->sym
->type
.t
& VT_STATIC
)) {
365 /* use the result register as a temporal register */
366 int tr
= r
| TREG_MEM
;
368 /* we cannot use float registers as a temporal register */
369 tr
= get_reg(RC_INT
) | TREG_MEM
;
371 gen_modrm64(0x8b, tr
, fr
, sv
->sym
, 0);
373 /* load from the temporal register */
381 if (v
== VT_LLOCAL
) {
383 v1
.r
= VT_LOCAL
| VT_LVAL
;
386 if (!(reg_classes
[fr
] & (RC_INT
|RC_R11
)))
387 fr
= get_reg(RC_INT
);
391 /* If the addends doesn't fit into a 32bit signed
392 we must use a 64bit move. We've checked above
393 that this doesn't have a sym associated. */
394 v1
.type
.t
= VT_LLONG
;
398 if (!(reg_classes
[fr
] & (RC_INT
|RC_R11
)))
399 fr
= get_reg(RC_INT
);
404 /* Like GCC we can load from small enough properly sized
405 structs and unions as well.
406 XXX maybe move to generic operand handling, but should
407 occur only with asm, so tccasm.c might also be a better place */
408 if ((ft
& VT_BTYPE
) == VT_STRUCT
) {
410 switch (type_size(&sv
->type
, &align
)) {
411 case 1: ft
= VT_BYTE
; break;
412 case 2: ft
= VT_SHORT
; break;
413 case 4: ft
= VT_INT
; break;
414 case 8: ft
= VT_LLONG
; break;
416 tcc_error("invalid aggregate type for register load");
420 if ((ft
& VT_BTYPE
) == VT_FLOAT
) {
422 r
= REG_VALUE(r
); /* movd */
423 } else if ((ft
& VT_BTYPE
) == VT_DOUBLE
) {
424 b
= 0x7e0ff3; /* movq */
426 } else if ((ft
& VT_BTYPE
) == VT_LDOUBLE
) {
427 b
= 0xdb, r
= 5; /* fldt */
428 } else if ((ft
& VT_TYPE
) == VT_BYTE
|| (ft
& VT_TYPE
) == VT_BOOL
) {
429 b
= 0xbe0f; /* movsbl */
430 } else if ((ft
& VT_TYPE
) == (VT_BYTE
| VT_UNSIGNED
)) {
431 b
= 0xb60f; /* movzbl */
432 } else if ((ft
& VT_TYPE
) == VT_SHORT
) {
433 b
= 0xbf0f; /* movswl */
434 } else if ((ft
& VT_TYPE
) == (VT_SHORT
| VT_UNSIGNED
)) {
435 b
= 0xb70f; /* movzwl */
437 assert(((ft
& VT_BTYPE
) == VT_INT
)
438 || ((ft
& VT_BTYPE
) == VT_LLONG
)
439 || ((ft
& VT_BTYPE
) == VT_PTR
)
440 || ((ft
& VT_BTYPE
) == VT_FUNC
)
446 gen_modrm64(b
, r
, fr
, sv
->sym
, fc
);
449 gen_modrm(r
, fr
, sv
->sym
, fc
);
456 o(0x05 + REG_VALUE(r
) * 8); /* lea xx(%rip), r */
457 gen_addrpc32(fr
, sv
->sym
, fc
);
459 if (sv
->sym
->type
.t
& VT_STATIC
) {
461 o(0x05 + REG_VALUE(r
) * 8); /* lea xx(%rip), r */
462 gen_addrpc32(fr
, sv
->sym
, fc
);
465 o(0x05 + REG_VALUE(r
) * 8); /* mov xx(%rip), r */
466 gen_gotpcrel(r
, sv
->sym
, fc
);
469 } else if (is64_type(ft
)) {
470 orex(1,r
,0, 0xb8 + REG_VALUE(r
)); /* mov $xx, r */
473 orex(0,r
,0, 0xb8 + REG_VALUE(r
)); /* mov $xx, r */
476 } else if (v
== VT_LOCAL
) {
477 orex(1,0,r
,0x8d); /* lea xxx(%ebp), r */
478 gen_modrm(r
, VT_LOCAL
, sv
->sym
, fc
);
479 } else if (v
== VT_CMP
) {
481 if ((fc
& ~0x100) != TOK_NE
)
482 oad(0xb8 + REG_VALUE(r
), 0); /* mov $0, r */
484 oad(0xb8 + REG_VALUE(r
), 1); /* mov $1, r */
487 /* This was a float compare. If the parity bit is
488 set the result was unordered, meaning false for everything
489 except TOK_NE, and true for TOK_NE. */
491 o(0x037a + (REX_BASE(r
) << 8));
493 orex(0,r
,0, 0x0f); /* setxx %br */
495 o(0xc0 + REG_VALUE(r
));
496 } else if (v
== VT_JMP
|| v
== VT_JMPI
) {
499 oad(0xb8 + REG_VALUE(r
), t
); /* mov $1, r */
500 o(0x05eb + (REX_BASE(r
) << 8)); /* jmp after */
503 oad(0xb8 + REG_VALUE(r
), t
^ 1); /* mov $0, r */
505 if ((r
>= TREG_XMM0
) && (r
<= TREG_XMM7
)) {
507 /* gen_cvt_ftof(VT_DOUBLE); */
508 o(0xf0245cdd); /* fstpl -0x10(%rsp) */
509 /* movsd -0x10(%rsp),%xmmN */
511 o(0x44 + REG_VALUE(r
)*8); /* %xmmN */
514 assert((v
>= TREG_XMM0
) && (v
<= TREG_XMM7
));
515 if ((ft
& VT_BTYPE
) == VT_FLOAT
) {
518 assert((ft
& VT_BTYPE
) == VT_DOUBLE
);
521 o(0xc0 + REG_VALUE(v
) + REG_VALUE(r
)*8);
523 } else if (r
== TREG_ST0
) {
524 assert((v
>= TREG_XMM0
) && (v
<= TREG_XMM7
));
525 /* gen_cvt_ftof(VT_LDOUBLE); */
526 /* movsd %xmmN,-0x10(%rsp) */
528 o(0x44 + REG_VALUE(r
)*8); /* %xmmN */
530 o(0xf02444dd); /* fldl -0x10(%rsp) */
533 o(0xc0 + REG_VALUE(r
) + REG_VALUE(v
) * 8); /* mov v, r */
539 /* store register 'r' in lvalue 'v' */
540 void store(int r
, SValue
*v
)
544 /* store the REX prefix in this variable when PIC is enabled */
549 v
= pe_getimport(v
, &v2
);
552 fr
= v
->r
& VT_VALMASK
;
555 if (fc
!= v
->c
.i
&& (fr
& VT_SYM
))
556 tcc_error("64 bit addend in store");
557 ft
&= ~(VT_VOLATILE
| VT_CONSTANT
);
560 #ifndef TCC_TARGET_PE
561 /* we need to access the variable via got */
562 if (fr
== VT_CONST
&& (v
->r
& VT_SYM
)) {
563 /* mov xx(%rip), %r11 */
565 gen_gotpcrel(TREG_R11
, v
->sym
, v
->c
.i
);
566 pic
= is64_type(bt
) ? 0x49 : 0x41;
570 /* XXX: incorrect if float reg to reg */
571 if (bt
== VT_FLOAT
) {
574 o(0x7e0f); /* movd */
576 } else if (bt
== VT_DOUBLE
) {
579 o(0xd60f); /* movq */
581 } else if (bt
== VT_LDOUBLE
) {
582 o(0xc0d9); /* fld %st(0) */
590 if (bt
== VT_BYTE
|| bt
== VT_BOOL
)
592 else if (is64_type(bt
))
598 /* xxx r, (%r11) where xxx is mov, movq, fld, or etc */
603 if (fr
== VT_CONST
|| fr
== VT_LOCAL
|| (v
->r
& VT_LVAL
)) {
604 gen_modrm64(op64
, r
, v
->r
, v
->sym
, fc
);
605 } else if (fr
!= r
) {
606 /* XXX: don't we really come here? */
608 o(0xc0 + fr
+ r
* 8); /* mov r, fr */
611 if (fr
== VT_CONST
|| fr
== VT_LOCAL
|| (v
->r
& VT_LVAL
)) {
612 gen_modrm(r
, v
->r
, v
->sym
, fc
);
613 } else if (fr
!= r
) {
614 /* XXX: don't we really come here? */
616 o(0xc0 + fr
+ r
* 8); /* mov r, fr */
621 /* 'is_jmp' is '1' if it is a jump */
622 static void gcall_or_jmp(int is_jmp
)
625 if ((vtop
->r
& (VT_VALMASK
| VT_LVAL
)) == VT_CONST
&&
626 ((vtop
->r
& VT_SYM
) && (vtop
->c
.i
-4) == (int)(vtop
->c
.i
-4))) {
627 /* constant symbolic case -> simple relocation */
629 greloca(cur_text_section
, vtop
->sym
, ind
+ 1, R_X86_64_PC32
, (int)(vtop
->c
.i
-4));
631 greloca(cur_text_section
, vtop
->sym
, ind
+ 1, R_X86_64_PLT32
, (int)(vtop
->c
.i
-4));
633 oad(0xe8 + is_jmp
, 0); /* call/jmp im */
635 /* otherwise, indirect call */
639 o(0xff); /* call/jmp *r */
640 o(0xd0 + REG_VALUE(r
) + (is_jmp
<< 4));
644 #if defined(CONFIG_TCC_BCHECK)
645 #ifndef TCC_TARGET_PE
646 static addr_t func_bound_offset
;
647 static unsigned long func_bound_ind
;
650 static void gen_static_call(int v
)
652 Sym
*sym
= external_global_sym(v
, &func_old_type
, 0);
654 greloca(cur_text_section
, sym
, ind
-4, R_X86_64_PC32
, -4);
657 /* generate a bounded pointer addition */
658 ST_FUNC
void gen_bounded_ptr_add(void)
660 /* save all temporary registers */
663 /* prepare fast x86_64 function call */
665 o(0xc68948); // mov %rax,%rsi ## second arg in %rsi, this must be size
669 o(0xc78948); // mov %rax,%rdi ## first arg in %rdi, this must be ptr
672 /* do a fast function call */
673 gen_static_call(TOK___bound_ptr_add
);
675 /* returned pointer is in rax */
677 vtop
->r
= TREG_RAX
| VT_BOUNDED
;
680 /* relocation offset of the bounding function call point */
681 vtop
->c
.i
= (cur_text_section
->reloc
->data_offset
- sizeof(ElfW(Rela
)));
684 /* patch pointer addition in vtop so that pointer dereferencing is
686 ST_FUNC
void gen_bounded_ptr_deref(void)
694 /* XXX: put that code in generic part of tcc */
695 if (!is_float(vtop
->type
.t
)) {
696 if (vtop
->r
& VT_LVAL_BYTE
)
698 else if (vtop
->r
& VT_LVAL_SHORT
)
702 size
= type_size(&vtop
->type
, &align
);
704 case 1: func
= TOK___bound_ptr_indir1
; break;
705 case 2: func
= TOK___bound_ptr_indir2
; break;
706 case 4: func
= TOK___bound_ptr_indir4
; break;
707 case 8: func
= TOK___bound_ptr_indir8
; break;
708 case 12: func
= TOK___bound_ptr_indir12
; break;
709 case 16: func
= TOK___bound_ptr_indir16
; break;
711 tcc_error("unhandled size when dereferencing bounded pointer");
716 sym
= external_global_sym(func
, &func_old_type
, 0);
718 put_extern_sym(sym
, NULL
, 0, 0);
720 /* patch relocation */
721 /* XXX: find a better solution ? */
723 rel
= (ElfW(Rela
) *)(cur_text_section
->reloc
->data
+ vtop
->c
.i
);
724 rel
->r_info
= ELF64_R_INFO(sym
->c
, ELF64_R_TYPE(rel
->r_info
));
731 static const uint8_t arg_regs
[REGN
] = {
732 TREG_RCX
, TREG_RDX
, TREG_R8
, TREG_R9
735 /* Prepare arguments in R10 and R11 rather than RCX and RDX
736 because gv() will not ever use these */
737 static int arg_prepare_reg(int idx
) {
738 if (idx
== 0 || idx
== 1)
739 /* idx=0: r10, idx=1: r11 */
742 return arg_regs
[idx
];
745 static int func_scratch
, func_alloca
;
747 /* Generate function call. The function address is pushed first, then
748 all the parameters in call order. This functions pops all the
749 parameters and the function address. */
751 static void gen_offs_sp(int b
, int r
, int d
)
753 orex(1,0,r
& 0x100 ? 0 : r
, b
);
755 o(0x2444 | (REG_VALUE(r
) << 3));
758 o(0x2484 | (REG_VALUE(r
) << 3));
763 static int using_regs(int size
)
765 return !(size
> 8 || (size
& (size
- 1)));
768 /* Return the number of registers needed to return the struct, or 0 if
769 returning via struct pointer. */
770 ST_FUNC
int gfunc_sret(CType
*vt
, int variadic
, CType
*ret
, int *ret_align
, int *regsize
)
773 *ret_align
= 1; // Never have to re-align return values for x86-64
775 size
= type_size(vt
, &align
);
776 if (!using_regs(size
))
790 static int is_sse_float(int t
) {
793 return bt
== VT_DOUBLE
|| bt
== VT_FLOAT
;
796 static int gfunc_arg_size(CType
*type
) {
798 if (type
->t
& (VT_ARRAY
|VT_BITFIELD
))
800 return type_size(type
, &align
);
803 void gfunc_call(int nb_args
)
805 int size
, r
, args_size
, i
, d
, bt
, struct_size
;
808 args_size
= (nb_args
< REGN
? REGN
: nb_args
) * PTR_SIZE
;
811 /* for struct arguments, we need to call memcpy and the function
812 call breaks register passing arguments we are preparing.
813 So, we process arguments which will be passed by stack first. */
814 struct_size
= args_size
;
815 for(i
= 0; i
< nb_args
; i
++) {
820 bt
= (sv
->type
.t
& VT_BTYPE
);
821 size
= gfunc_arg_size(&sv
->type
);
823 if (using_regs(size
))
824 continue; /* arguments smaller than 8 bytes passed in registers or on stack */
826 if (bt
== VT_STRUCT
) {
827 /* align to stack align size */
828 size
= (size
+ 15) & ~15;
829 /* generate structure store */
831 gen_offs_sp(0x8d, r
, struct_size
);
834 /* generate memcpy call */
835 vset(&sv
->type
, r
| VT_LVAL
, 0);
839 } else if (bt
== VT_LDOUBLE
) {
841 gen_offs_sp(0xdb, 0x107, struct_size
);
846 if (func_scratch
< struct_size
)
847 func_scratch
= struct_size
;
850 struct_size
= args_size
;
852 for(i
= 0; i
< nb_args
; i
++) {
854 bt
= (vtop
->type
.t
& VT_BTYPE
);
856 size
= gfunc_arg_size(&vtop
->type
);
857 if (!using_regs(size
)) {
858 /* align to stack align size */
859 size
= (size
+ 15) & ~15;
862 gen_offs_sp(0x8d, d
, struct_size
);
863 gen_offs_sp(0x89, d
, arg
*8);
865 d
= arg_prepare_reg(arg
);
866 gen_offs_sp(0x8d, d
, struct_size
);
870 if (is_sse_float(vtop
->type
.t
)) {
871 if (tcc_state
->nosse
)
872 tcc_error("SSE disabled");
875 /* movq %xmm0, j*8(%rsp) */
876 gen_offs_sp(0xd60f66, 0x100, arg
*8);
878 /* Load directly to xmmN register */
880 d
= arg_prepare_reg(arg
);
881 /* mov %xmmN, %rxx */
884 o(0xc0 + arg
*8 + REG_VALUE(d
));
887 if (bt
== VT_STRUCT
) {
888 vtop
->type
.ref
= NULL
;
889 vtop
->type
.t
= size
> 4 ? VT_LLONG
: size
> 2 ? VT_INT
890 : size
> 1 ? VT_SHORT
: VT_BYTE
;
895 gen_offs_sp(0x89, r
, arg
*8);
897 d
= arg_prepare_reg(arg
);
898 orex(1,d
,r
,0x89); /* mov */
899 o(0xc0 + REG_VALUE(r
) * 8 + REG_VALUE(d
));
907 /* Copy R10 and R11 into RCX and RDX, respectively */
909 o(0xd1894c); /* mov %r10, %rcx */
911 o(0xda894c); /* mov %r11, %rdx */
917 if ((vtop
->r
& VT_SYM
) && vtop
->sym
->v
== TOK_alloca
) {
918 /* need to add the "func_scratch" area after alloca */
919 o(0x0548), gen_le32(func_alloca
), func_alloca
= ind
- 4;
922 /* other compilers don't clear the upper bits when returning char/short */
923 bt
= vtop
->type
.ref
->type
.t
& (VT_BTYPE
| VT_UNSIGNED
);
924 if (bt
== (VT_BYTE
| VT_UNSIGNED
))
925 o(0xc0b60f); /* movzbl %al, %eax */
926 else if (bt
== VT_BYTE
)
927 o(0xc0be0f); /* movsbl %al, %eax */
928 else if (bt
== VT_SHORT
)
930 else if (bt
== (VT_SHORT
| VT_UNSIGNED
))
931 o(0xc0b70f); /* movzbl %al, %eax */
932 #if 0 /* handled in gen_cast() */
933 else if (bt
== VT_INT
)
934 o(0x9848); /* cltq */
935 else if (bt
== (VT_INT
| VT_UNSIGNED
))
936 o(0xc089); /* mov %eax,%eax */
942 #define FUNC_PROLOG_SIZE 11
944 /* generate function prolog of type 't' */
945 void gfunc_prolog(CType
*func_type
)
947 int addr
, reg_param_index
, bt
, size
;
957 ind
+= FUNC_PROLOG_SIZE
;
958 func_sub_sp_offset
= ind
;
961 sym
= func_type
->ref
;
963 /* if the function returns a structure, then add an
964 implicit pointer parameter */
966 func_var
= (sym
->f
.func_type
== FUNC_ELLIPSIS
);
967 size
= gfunc_arg_size(&func_vt
);
968 if (!using_regs(size
)) {
969 gen_modrm64(0x89, arg_regs
[reg_param_index
], VT_LOCAL
, NULL
, addr
);
975 /* define parameters */
976 while ((sym
= sym
->next
) != NULL
) {
978 bt
= type
->t
& VT_BTYPE
;
979 size
= gfunc_arg_size(type
);
980 if (!using_regs(size
)) {
981 if (reg_param_index
< REGN
) {
982 gen_modrm64(0x89, arg_regs
[reg_param_index
], VT_LOCAL
, NULL
, addr
);
984 sym_push(sym
->v
& ~SYM_FIELD
, type
,
985 VT_LLOCAL
| lvalue_type(type
->t
), addr
);
987 if (reg_param_index
< REGN
) {
988 /* save arguments passed by register */
989 if ((bt
== VT_FLOAT
) || (bt
== VT_DOUBLE
)) {
990 if (tcc_state
->nosse
)
991 tcc_error("SSE disabled");
992 o(0xd60f66); /* movq */
993 gen_modrm(reg_param_index
, VT_LOCAL
, NULL
, addr
);
995 gen_modrm64(0x89, arg_regs
[reg_param_index
], VT_LOCAL
, NULL
, addr
);
998 sym_push(sym
->v
& ~SYM_FIELD
, type
,
999 VT_LOCAL
| lvalue_type(type
->t
), addr
);
1005 while (reg_param_index
< REGN
) {
1006 if (func_type
->ref
->f
.func_type
== FUNC_ELLIPSIS
) {
1007 gen_modrm64(0x89, arg_regs
[reg_param_index
], VT_LOCAL
, NULL
, addr
);
1014 /* generate function epilog */
1015 void gfunc_epilog(void)
1019 o(0xc9); /* leave */
1020 if (func_ret_sub
== 0) {
1023 o(0xc2); /* ret n */
1025 g(func_ret_sub
>> 8);
1029 ind
= func_sub_sp_offset
- FUNC_PROLOG_SIZE
;
1030 /* align local size to word & save local variables */
1031 func_scratch
= (func_scratch
+ 15) & -16;
1032 v
= (func_scratch
+ -loc
+ 15) & -16;
1035 Sym
*sym
= external_global_sym(TOK___chkstk
, &func_old_type
, 0);
1036 oad(0xb8, v
); /* mov stacksize, %eax */
1037 oad(0xe8, 0); /* call __chkstk, (does the stackframe too) */
1038 greloca(cur_text_section
, sym
, ind
-4, R_X86_64_PC32
, -4);
1039 o(0x90); /* fill for FUNC_PROLOG_SIZE = 11 bytes */
1041 o(0xe5894855); /* push %rbp, mov %rsp, %rbp */
1042 o(0xec8148); /* sub rsp, stacksize */
1046 /* add the "func_scratch" area after each alloca seen */
1047 while (func_alloca
) {
1048 unsigned char *ptr
= cur_text_section
->data
+ func_alloca
;
1049 func_alloca
= read32le(ptr
);
1050 write32le(ptr
, func_scratch
);
1053 cur_text_section
->data_offset
= saved_ind
;
1054 pe_add_unwind_data(ind
, saved_ind
, v
);
1055 ind
= cur_text_section
->data_offset
;
1060 static void gadd_sp(int val
)
1062 if (val
== (char)val
) {
1066 oad(0xc48148, val
); /* add $xxx, %rsp */
1070 typedef enum X86_64_Mode
{
1073 x86_64_mode_integer
,
1078 static X86_64_Mode
classify_x86_64_merge(X86_64_Mode a
, X86_64_Mode b
)
1082 else if (a
== x86_64_mode_none
)
1084 else if (b
== x86_64_mode_none
)
1086 else if ((a
== x86_64_mode_memory
) || (b
== x86_64_mode_memory
))
1087 return x86_64_mode_memory
;
1088 else if ((a
== x86_64_mode_integer
) || (b
== x86_64_mode_integer
))
1089 return x86_64_mode_integer
;
1090 else if ((a
== x86_64_mode_x87
) || (b
== x86_64_mode_x87
))
1091 return x86_64_mode_memory
;
1093 return x86_64_mode_sse
;
1096 static X86_64_Mode
classify_x86_64_inner(CType
*ty
)
1101 switch (ty
->t
& VT_BTYPE
) {
1102 case VT_VOID
: return x86_64_mode_none
;
1111 return x86_64_mode_integer
;
1114 case VT_DOUBLE
: return x86_64_mode_sse
;
1116 case VT_LDOUBLE
: return x86_64_mode_x87
;
1121 mode
= x86_64_mode_none
;
1122 for (f
= f
->next
; f
; f
= f
->next
)
1123 mode
= classify_x86_64_merge(mode
, classify_x86_64_inner(&f
->type
));
1131 static X86_64_Mode
classify_x86_64_arg(CType
*ty
, CType
*ret
, int *psize
, int *palign
, int *reg_count
)
1134 int size
, align
, ret_t
= 0;
1136 if (ty
->t
& (VT_BITFIELD
|VT_ARRAY
)) {
1141 mode
= x86_64_mode_integer
;
1143 size
= type_size(ty
, &align
);
1144 *psize
= (size
+ 7) & ~7;
1145 *palign
= (align
+ 7) & ~7;
1148 mode
= x86_64_mode_memory
;
1150 mode
= classify_x86_64_inner(ty
);
1152 case x86_64_mode_integer
:
1158 ret_t
= (size
> 4) ? VT_LLONG
: VT_INT
;
1162 case x86_64_mode_x87
:
1167 case x86_64_mode_sse
:
1173 ret_t
= (size
> 4) ? VT_DOUBLE
: VT_FLOAT
;
1176 default: break; /* nothing to be done for x86_64_mode_memory and x86_64_mode_none*/
1189 ST_FUNC
int classify_x86_64_va_arg(CType
*ty
)
1191 /* This definition must be synced with stdarg.h */
1192 enum __va_arg_type
{
1193 __va_gen_reg
, __va_float_reg
, __va_stack
1195 int size
, align
, reg_count
;
1196 X86_64_Mode mode
= classify_x86_64_arg(ty
, NULL
, &size
, &align
, ®_count
);
1198 default: return __va_stack
;
1199 case x86_64_mode_integer
: return __va_gen_reg
;
1200 case x86_64_mode_sse
: return __va_float_reg
;
1204 /* Return the number of registers needed to return the struct, or 0 if
1205 returning via struct pointer. */
1206 ST_FUNC
int gfunc_sret(CType
*vt
, int variadic
, CType
*ret
, int *ret_align
, int *regsize
)
1208 int size
, align
, reg_count
;
1209 *ret_align
= 1; // Never have to re-align return values for x86-64
1211 return (classify_x86_64_arg(vt
, ret
, &size
, &align
, ®_count
) != x86_64_mode_memory
);
1215 static const uint8_t arg_regs
[REGN
] = {
1216 TREG_RDI
, TREG_RSI
, TREG_RDX
, TREG_RCX
, TREG_R8
, TREG_R9
1219 static int arg_prepare_reg(int idx
) {
1220 if (idx
== 2 || idx
== 3)
1221 /* idx=2: r10, idx=3: r11 */
1224 return arg_regs
[idx
];
1227 /* Generate function call. The function address is pushed first, then
1228 all the parameters in call order. This functions pops all the
1229 parameters and the function address. */
1230 void gfunc_call(int nb_args
)
1234 int size
, align
, r
, args_size
, stack_adjust
, i
, reg_count
;
1235 int nb_reg_args
= 0;
1236 int nb_sse_args
= 0;
1237 int sse_reg
, gen_reg
;
1238 char _onstack
[nb_args
], *onstack
= _onstack
;
1240 /* calculate the number of integer/float register arguments, remember
1241 arguments to be passed via stack (in onstack[]), and also remember
1242 if we have to align the stack pointer to 16 (onstack[i] == 2). Needs
1243 to be done in a left-to-right pass over arguments. */
1245 for(i
= nb_args
- 1; i
>= 0; i
--) {
1246 mode
= classify_x86_64_arg(&vtop
[-i
].type
, NULL
, &size
, &align
, ®_count
);
1247 if (mode
== x86_64_mode_sse
&& nb_sse_args
+ reg_count
<= 8) {
1248 nb_sse_args
+= reg_count
;
1250 } else if (mode
== x86_64_mode_integer
&& nb_reg_args
+ reg_count
<= REGN
) {
1251 nb_reg_args
+= reg_count
;
1253 } else if (mode
== x86_64_mode_none
) {
1256 if (align
== 16 && (stack_adjust
&= 15)) {
1261 stack_adjust
+= size
;
1265 if (nb_sse_args
&& tcc_state
->nosse
)
1266 tcc_error("SSE disabled but floating point arguments passed");
1268 /* fetch cpu flag before generating any code */
1269 if (vtop
>= vstack
&& (vtop
->r
& VT_VALMASK
) == VT_CMP
)
1272 /* for struct arguments, we need to call memcpy and the function
1273 call breaks register passing arguments we are preparing.
1274 So, we process arguments which will be passed by stack first. */
1275 gen_reg
= nb_reg_args
;
1276 sse_reg
= nb_sse_args
;
1279 for (i
= 0; i
< nb_args
;) {
1280 mode
= classify_x86_64_arg(&vtop
[-i
].type
, NULL
, &size
, &align
, ®_count
);
1285 /* Possibly adjust stack to align SSE boundary. We're processing
1286 args from right to left while allocating happens left to right
1287 (stack grows down), so the adjustment needs to happen _after_
1288 an argument that requires it. */
1290 o(0x50); /* push %rax; aka sub $8,%rsp */
1294 if (onstack
[i
] == 2)
1299 switch (vtop
->type
.t
& VT_BTYPE
) {
1301 /* allocate the necessary size on stack */
1303 oad(0xec81, size
); /* sub $xxx, %rsp */
1304 /* generate structure store */
1305 r
= get_reg(RC_INT
);
1306 orex(1, r
, 0, 0x89); /* mov %rsp, r */
1307 o(0xe0 + REG_VALUE(r
));
1308 vset(&vtop
->type
, r
| VT_LVAL
, 0);
1315 oad(0xec8148, size
); /* sub $xxx, %rsp */
1316 o(0x7cdb); /* fstpt 0(%rsp) */
1323 assert(mode
== x86_64_mode_sse
);
1325 o(0x50); /* push $rax */
1326 /* movq %xmmN, (%rsp) */
1328 o(0x04 + REG_VALUE(r
)*8);
1333 assert(mode
== x86_64_mode_integer
);
1335 /* XXX: implicit cast ? */
1337 orex(0,r
,0,0x50 + REG_VALUE(r
)); /* push r */
1347 /* XXX This should be superfluous. */
1348 save_regs(0); /* save used temporary registers */
1350 /* then, we prepare register passing arguments.
1351 Note that we cannot set RDX and RCX in this loop because gv()
1352 may break these temporary registers. Let's use R10 and R11
1354 assert(gen_reg
<= REGN
);
1355 assert(sse_reg
<= 8);
1356 for(i
= 0; i
< nb_args
; i
++) {
1357 mode
= classify_x86_64_arg(&vtop
->type
, &type
, &size
, &align
, ®_count
);
1358 /* Alter stack entry type so that gv() knows how to treat it */
1360 if (mode
== x86_64_mode_sse
) {
1361 if (reg_count
== 2) {
1363 gv(RC_FRET
); /* Use pair load into xmm0 & xmm1 */
1364 if (sse_reg
) { /* avoid redundant movaps %xmm0, %xmm0 */
1365 /* movaps %xmm0, %xmmN */
1367 o(0xc0 + (sse_reg
<< 3));
1368 /* movaps %xmm1, %xmmN */
1370 o(0xc1 + ((sse_reg
+1) << 3));
1373 assert(reg_count
== 1);
1375 /* Load directly to register */
1376 gv(RC_XMM0
<< sse_reg
);
1378 } else if (mode
== x86_64_mode_integer
) {
1380 /* XXX: implicit cast ? */
1382 gen_reg
-= reg_count
;
1384 d
= arg_prepare_reg(gen_reg
);
1385 orex(1,d
,r
,0x89); /* mov */
1386 o(0xc0 + REG_VALUE(r
) * 8 + REG_VALUE(d
));
1387 if (reg_count
== 2) {
1388 d
= arg_prepare_reg(gen_reg
+1);
1389 orex(1,d
,vtop
->r2
,0x89); /* mov */
1390 o(0xc0 + REG_VALUE(vtop
->r2
) * 8 + REG_VALUE(d
));
1395 assert(gen_reg
== 0);
1396 assert(sse_reg
== 0);
1398 /* We shouldn't have many operands on the stack anymore, but the
1399 call address itself is still there, and it might be in %eax
1400 (or edx/ecx) currently, which the below writes would clobber.
1401 So evict all remaining operands here. */
1404 /* Copy R10 and R11 into RDX and RCX, respectively */
1405 if (nb_reg_args
> 2) {
1406 o(0xd2894c); /* mov %r10, %rdx */
1407 if (nb_reg_args
> 3) {
1408 o(0xd9894c); /* mov %r11, %rcx */
1412 if (vtop
->type
.ref
->f
.func_type
!= FUNC_NEW
) /* implies FUNC_OLD or FUNC_ELLIPSIS */
1413 oad(0xb8, nb_sse_args
< 8 ? nb_sse_args
: 8); /* mov nb_sse_args, %eax */
1421 #define FUNC_PROLOG_SIZE 11
1423 static void push_arg_reg(int i
) {
1425 gen_modrm64(0x89, arg_regs
[i
], VT_LOCAL
, NULL
, loc
);
1428 /* generate function prolog of type 't' */
1429 void gfunc_prolog(CType
*func_type
)
1432 int i
, addr
, align
, size
, reg_count
;
1433 int param_addr
= 0, reg_param_index
, sse_param_index
;
1437 sym
= func_type
->ref
;
1438 addr
= PTR_SIZE
* 2;
1440 ind
+= FUNC_PROLOG_SIZE
;
1441 func_sub_sp_offset
= ind
;
1444 if (sym
->f
.func_type
== FUNC_ELLIPSIS
) {
1445 int seen_reg_num
, seen_sse_num
, seen_stack_size
;
1446 seen_reg_num
= seen_sse_num
= 0;
1447 /* frame pointer and return address */
1448 seen_stack_size
= PTR_SIZE
* 2;
1449 /* count the number of seen parameters */
1450 sym
= func_type
->ref
;
1451 while ((sym
= sym
->next
) != NULL
) {
1453 mode
= classify_x86_64_arg(type
, NULL
, &size
, &align
, ®_count
);
1457 seen_stack_size
= ((seen_stack_size
+ align
- 1) & -align
) + size
;
1460 case x86_64_mode_integer
:
1461 if (seen_reg_num
+ reg_count
> REGN
)
1463 seen_reg_num
+= reg_count
;
1466 case x86_64_mode_sse
:
1467 if (seen_sse_num
+ reg_count
> 8)
1469 seen_sse_num
+= reg_count
;
1475 /* movl $0x????????, -0x10(%rbp) */
1477 gen_le32(seen_reg_num
* 8);
1478 /* movl $0x????????, -0xc(%rbp) */
1480 gen_le32(seen_sse_num
* 16 + 48);
1481 /* movl $0x????????, -0x8(%rbp) */
1483 gen_le32(seen_stack_size
);
1485 /* save all register passing arguments */
1486 for (i
= 0; i
< 8; i
++) {
1488 if (!tcc_state
->nosse
) {
1489 o(0xd60f66); /* movq */
1490 gen_modrm(7 - i
, VT_LOCAL
, NULL
, loc
);
1492 /* movq $0, loc+8(%rbp) */
1497 for (i
= 0; i
< REGN
; i
++) {
1498 push_arg_reg(REGN
-1-i
);
1502 sym
= func_type
->ref
;
1503 reg_param_index
= 0;
1504 sse_param_index
= 0;
1506 /* if the function returns a structure, then add an
1507 implicit pointer parameter */
1508 func_vt
= sym
->type
;
1509 mode
= classify_x86_64_arg(&func_vt
, NULL
, &size
, &align
, ®_count
);
1510 if (mode
== x86_64_mode_memory
) {
1511 push_arg_reg(reg_param_index
);
1515 /* define parameters */
1516 while ((sym
= sym
->next
) != NULL
) {
1518 mode
= classify_x86_64_arg(type
, NULL
, &size
, &align
, ®_count
);
1520 case x86_64_mode_sse
:
1521 if (tcc_state
->nosse
)
1522 tcc_error("SSE disabled but floating point arguments used");
1523 if (sse_param_index
+ reg_count
<= 8) {
1524 /* save arguments passed by register */
1525 loc
-= reg_count
* 8;
1527 for (i
= 0; i
< reg_count
; ++i
) {
1528 o(0xd60f66); /* movq */
1529 gen_modrm(sse_param_index
, VT_LOCAL
, NULL
, param_addr
+ i
*8);
1533 addr
= (addr
+ align
- 1) & -align
;
1539 case x86_64_mode_memory
:
1540 case x86_64_mode_x87
:
1541 addr
= (addr
+ align
- 1) & -align
;
1546 case x86_64_mode_integer
: {
1547 if (reg_param_index
+ reg_count
<= REGN
) {
1548 /* save arguments passed by register */
1549 loc
-= reg_count
* 8;
1551 for (i
= 0; i
< reg_count
; ++i
) {
1552 gen_modrm64(0x89, arg_regs
[reg_param_index
], VT_LOCAL
, NULL
, param_addr
+ i
*8);
1556 addr
= (addr
+ align
- 1) & -align
;
1562 default: break; /* nothing to be done for x86_64_mode_none */
1564 sym_push(sym
->v
& ~SYM_FIELD
, type
,
1565 VT_LOCAL
| lvalue_type(type
->t
), param_addr
);
1568 #ifdef CONFIG_TCC_BCHECK
1569 /* leave some room for bound checking code */
1570 if (tcc_state
->do_bounds_check
) {
1571 func_bound_offset
= lbounds_section
->data_offset
;
1572 func_bound_ind
= ind
;
1573 oad(0xb8, 0); /* lbound section pointer */
1574 o(0xc78948); /* mov %rax,%rdi ## first arg in %rdi, this must be ptr */
1575 oad(0xb8, 0); /* call to function */
1580 /* generate function epilog */
1581 void gfunc_epilog(void)
1585 #ifdef CONFIG_TCC_BCHECK
1586 if (tcc_state
->do_bounds_check
1587 && func_bound_offset
!= lbounds_section
->data_offset
)
1593 /* add end of table info */
1594 bounds_ptr
= section_ptr_add(lbounds_section
, sizeof(addr_t
));
1597 /* generate bound local allocation */
1598 sym_data
= get_sym_ref(&char_pointer_type
, lbounds_section
,
1599 func_bound_offset
, lbounds_section
->data_offset
);
1601 ind
= func_bound_ind
;
1602 greloca(cur_text_section
, sym_data
, ind
+ 1, R_X86_64_64
, 0);
1604 gen_static_call(TOK___bound_local_new
);
1607 /* generate bound check local freeing */
1608 o(0x5250); /* save returned value, if any */
1609 greloca(cur_text_section
, sym_data
, ind
+ 1, R_X86_64_64
, 0);
1610 oad(0xb8, 0); /* mov xxx, %rax */
1611 o(0xc78948); /* mov %rax,%rdi # first arg in %rdi, this must be ptr */
1612 gen_static_call(TOK___bound_local_delete
);
1613 o(0x585a); /* restore returned value, if any */
1616 o(0xc9); /* leave */
1617 if (func_ret_sub
== 0) {
1620 o(0xc2); /* ret n */
1622 g(func_ret_sub
>> 8);
1624 /* align local size to word & save local variables */
1625 v
= (-loc
+ 15) & -16;
1627 ind
= func_sub_sp_offset
- FUNC_PROLOG_SIZE
;
1628 o(0xe5894855); /* push %rbp, mov %rsp, %rbp */
1629 o(0xec8148); /* sub rsp, stacksize */
1636 ST_FUNC
void gen_fill_nops(int bytes
)
1642 /* generate a jump to a label */
1645 return gjmp2(0xe9, t
);
1648 /* generate a jump to a fixed address */
1649 void gjmp_addr(int a
)
1657 oad(0xe9, a
- ind
- 5);
1661 ST_FUNC
void gtst_addr(int inv
, int a
)
1663 int v
= vtop
->r
& VT_VALMASK
;
1665 inv
^= (vtop
--)->c
.i
;
1672 oad(inv
- 16, a
- 4);
1674 } else if ((v
& ~1) == VT_JMP
) {
1675 if ((v
& 1) != inv
) {
1687 /* generate a test. set 'inv' to invert test. Stack entry is popped */
1688 ST_FUNC
int gtst(int inv
, int t
)
1690 int v
= vtop
->r
& VT_VALMASK
;
1692 if (nocode_wanted
) {
1694 } else if (v
== VT_CMP
) {
1695 /* fast case : can jump directly since flags are set */
1696 if (vtop
->c
.i
& 0x100)
1698 /* This was a float compare. If the parity flag is set
1699 the result was unordered. For anything except != this
1700 means false and we don't jump (anding both conditions).
1701 For != this means true (oring both).
1702 Take care about inverting the test. We need to jump
1703 to our target if the result was unordered and test wasn't NE,
1704 otherwise if unordered we don't want to jump. */
1705 vtop
->c
.i
&= ~0x100;
1706 if (inv
== (vtop
->c
.i
== TOK_NE
))
1707 o(0x067a); /* jp +6 */
1711 t
= gjmp2(0x8a, t
); /* jp t */
1715 t
= gjmp2((vtop
->c
.i
- 16) ^ inv
, t
);
1716 } else if (v
== VT_JMP
|| v
== VT_JMPI
) {
1717 /* && or || optimization */
1718 if ((v
& 1) == inv
) {
1719 /* insert vtop->c jump list in t */
1720 uint32_t n1
, n
= vtop
->c
.i
;
1722 while ((n1
= read32le(cur_text_section
->data
+ n
)))
1724 write32le(cur_text_section
->data
+ n
, t
);
1736 /* generate an integer binary operation */
1737 void gen_opi(int op
)
1742 ll
= is64_type(vtop
[-1].type
.t
);
1743 uu
= (vtop
[-1].type
.t
& VT_UNSIGNED
) != 0;
1744 cc
= (vtop
->r
& (VT_VALMASK
| VT_LVAL
| VT_SYM
)) == VT_CONST
;
1748 case TOK_ADDC1
: /* add with carry generation */
1751 if (cc
&& (!ll
|| (int)vtop
->c
.i
== vtop
->c
.i
)) {
1758 /* XXX: generate inc and dec for smaller code ? */
1759 orex(ll
, r
, 0, 0x83);
1760 o(0xc0 | (opc
<< 3) | REG_VALUE(r
));
1763 orex(ll
, r
, 0, 0x81);
1764 oad(0xc0 | (opc
<< 3) | REG_VALUE(r
), c
);
1767 gv2(RC_INT
, RC_INT
);
1770 orex(ll
, r
, fr
, (opc
<< 3) | 0x01);
1771 o(0xc0 + REG_VALUE(r
) + REG_VALUE(fr
) * 8);
1774 if (op
>= TOK_ULT
&& op
<= TOK_GT
) {
1780 case TOK_SUBC1
: /* sub with carry generation */
1783 case TOK_ADDC2
: /* add with carry use */
1786 case TOK_SUBC2
: /* sub with carry use */
1799 gv2(RC_INT
, RC_INT
);
1802 orex(ll
, fr
, r
, 0xaf0f); /* imul fr, r */
1803 o(0xc0 + REG_VALUE(fr
) + REG_VALUE(r
) * 8);
1815 opc
= 0xc0 | (opc
<< 3);
1821 orex(ll
, r
, 0, 0xc1); /* shl/shr/sar $xxx, r */
1822 o(opc
| REG_VALUE(r
));
1823 g(vtop
->c
.i
& (ll
? 63 : 31));
1825 /* we generate the shift in ecx */
1826 gv2(RC_INT
, RC_RCX
);
1828 orex(ll
, r
, 0, 0xd3); /* shl/shr/sar %cl, r */
1829 o(opc
| REG_VALUE(r
));
1842 /* first operand must be in eax */
1843 /* XXX: need better constraint for second operand */
1844 gv2(RC_RAX
, RC_RCX
);
1849 orex(ll
, 0, 0, uu
? 0xd231 : 0x99); /* xor %edx,%edx : cqto */
1850 orex(ll
, fr
, 0, 0xf7); /* div fr, %eax */
1851 o((uu
? 0xf0 : 0xf8) + REG_VALUE(fr
));
1852 if (op
== '%' || op
== TOK_UMOD
)
1864 void gen_opl(int op
)
1869 /* generate a floating point operation 'v = t1 op t2' instruction. The
1870 two operands are guaranteed to have the same floating point type */
1871 /* XXX: need to use ST1 too */
1872 void gen_opf(int op
)
1874 int a
, ft
, fc
, swapped
, r
;
1876 (vtop
->type
.t
& VT_BTYPE
) == VT_LDOUBLE
? RC_ST0
: RC_FLOAT
;
1878 /* convert constants to memory references */
1879 if ((vtop
[-1].r
& (VT_VALMASK
| VT_LVAL
)) == VT_CONST
) {
1884 if ((vtop
[0].r
& (VT_VALMASK
| VT_LVAL
)) == VT_CONST
)
1887 /* must put at least one value in the floating point register */
1888 if ((vtop
[-1].r
& VT_LVAL
) &&
1889 (vtop
[0].r
& VT_LVAL
)) {
1895 /* swap the stack if needed so that t1 is the register and t2 is
1896 the memory reference */
1897 if (vtop
[-1].r
& VT_LVAL
) {
1901 if ((vtop
->type
.t
& VT_BTYPE
) == VT_LDOUBLE
) {
1902 if (op
>= TOK_ULT
&& op
<= TOK_GT
) {
1903 /* load on stack second operand */
1904 load(TREG_ST0
, vtop
);
1905 save_reg(TREG_RAX
); /* eax is used by FP comparison code */
1906 if (op
== TOK_GE
|| op
== TOK_GT
)
1908 else if (op
== TOK_EQ
|| op
== TOK_NE
)
1911 o(0xc9d9); /* fxch %st(1) */
1912 if (op
== TOK_EQ
|| op
== TOK_NE
)
1913 o(0xe9da); /* fucompp */
1915 o(0xd9de); /* fcompp */
1916 o(0xe0df); /* fnstsw %ax */
1918 o(0x45e480); /* and $0x45, %ah */
1919 o(0x40fC80); /* cmp $0x40, %ah */
1920 } else if (op
== TOK_NE
) {
1921 o(0x45e480); /* and $0x45, %ah */
1922 o(0x40f480); /* xor $0x40, %ah */
1924 } else if (op
== TOK_GE
|| op
== TOK_LE
) {
1925 o(0x05c4f6); /* test $0x05, %ah */
1928 o(0x45c4f6); /* test $0x45, %ah */
1935 /* no memory reference possible for long double operations */
1936 load(TREG_ST0
, vtop
);
1960 o(0xde); /* fxxxp %st, %st(1) */
1965 if (op
>= TOK_ULT
&& op
<= TOK_GT
) {
1966 /* if saved lvalue, then we must reload it */
1969 if ((r
& VT_VALMASK
) == VT_LLOCAL
) {
1971 r
= get_reg(RC_INT
);
1973 v1
.r
= VT_LOCAL
| VT_LVAL
;
1979 if (op
== TOK_EQ
|| op
== TOK_NE
) {
1982 if (op
== TOK_LE
|| op
== TOK_LT
)
1984 if (op
== TOK_LE
|| op
== TOK_GE
) {
1985 op
= 0x93; /* setae */
1987 op
= 0x97; /* seta */
1995 assert(!(vtop
[-1].r
& VT_LVAL
));
1997 if ((vtop
->type
.t
& VT_BTYPE
) == VT_DOUBLE
)
1999 if (op
== TOK_EQ
|| op
== TOK_NE
)
2000 o(0x2e0f); /* ucomisd */
2002 o(0x2f0f); /* comisd */
2004 if (vtop
->r
& VT_LVAL
) {
2005 gen_modrm(vtop
[-1].r
, r
, vtop
->sym
, fc
);
2007 o(0xc0 + REG_VALUE(vtop
[0].r
) + REG_VALUE(vtop
[-1].r
)*8);
2012 vtop
->c
.i
= op
| 0x100;
2014 assert((vtop
->type
.t
& VT_BTYPE
) != VT_LDOUBLE
);
2032 assert((ft
& VT_BTYPE
) != VT_LDOUBLE
);
2035 /* if saved lvalue, then we must reload it */
2036 if ((vtop
->r
& VT_VALMASK
) == VT_LLOCAL
) {
2038 r
= get_reg(RC_INT
);
2040 v1
.r
= VT_LOCAL
| VT_LVAL
;
2046 assert(!(vtop
[-1].r
& VT_LVAL
));
2048 assert(vtop
->r
& VT_LVAL
);
2053 if ((ft
& VT_BTYPE
) == VT_DOUBLE
) {
2061 if (vtop
->r
& VT_LVAL
) {
2062 gen_modrm(vtop
[-1].r
, r
, vtop
->sym
, fc
);
2064 o(0xc0 + REG_VALUE(vtop
[0].r
) + REG_VALUE(vtop
[-1].r
)*8);
2072 /* convert integers to fp 't' type. Must handle 'int', 'unsigned int'
2073 and 'long long' cases. */
2074 void gen_cvt_itof(int t
)
2076 if ((t
& VT_BTYPE
) == VT_LDOUBLE
) {
2079 if ((vtop
->type
.t
& VT_BTYPE
) == VT_LLONG
) {
2080 /* signed long long to float/double/long double (unsigned case
2081 is handled generically) */
2082 o(0x50 + (vtop
->r
& VT_VALMASK
)); /* push r */
2083 o(0x242cdf); /* fildll (%rsp) */
2084 o(0x08c48348); /* add $8, %rsp */
2085 } else if ((vtop
->type
.t
& (VT_BTYPE
| VT_UNSIGNED
)) ==
2086 (VT_INT
| VT_UNSIGNED
)) {
2087 /* unsigned int to float/double/long double */
2088 o(0x6a); /* push $0 */
2090 o(0x50 + (vtop
->r
& VT_VALMASK
)); /* push r */
2091 o(0x242cdf); /* fildll (%rsp) */
2092 o(0x10c48348); /* add $16, %rsp */
2094 /* int to float/double/long double */
2095 o(0x50 + (vtop
->r
& VT_VALMASK
)); /* push r */
2096 o(0x2404db); /* fildl (%rsp) */
2097 o(0x08c48348); /* add $8, %rsp */
2101 int r
= get_reg(RC_FLOAT
);
2103 o(0xf2 + ((t
& VT_BTYPE
) == VT_FLOAT
?1:0));
2104 if ((vtop
->type
.t
& (VT_BTYPE
| VT_UNSIGNED
)) ==
2105 (VT_INT
| VT_UNSIGNED
) ||
2106 (vtop
->type
.t
& VT_BTYPE
) == VT_LLONG
) {
2110 o(0xc0 + (vtop
->r
& VT_VALMASK
) + REG_VALUE(r
)*8); /* cvtsi2sd */
2115 /* convert from one floating point type to another */
2116 void gen_cvt_ftof(int t
)
2124 if (bt
== VT_FLOAT
) {
2126 if (tbt
== VT_DOUBLE
) {
2127 o(0x140f); /* unpcklps */
2128 o(0xc0 + REG_VALUE(vtop
->r
)*9);
2129 o(0x5a0f); /* cvtps2pd */
2130 o(0xc0 + REG_VALUE(vtop
->r
)*9);
2131 } else if (tbt
== VT_LDOUBLE
) {
2133 /* movss %xmm0,-0x10(%rsp) */
2135 o(0x44 + REG_VALUE(vtop
->r
)*8);
2137 o(0xf02444d9); /* flds -0x10(%rsp) */
2140 } else if (bt
== VT_DOUBLE
) {
2142 if (tbt
== VT_FLOAT
) {
2143 o(0x140f66); /* unpcklpd */
2144 o(0xc0 + REG_VALUE(vtop
->r
)*9);
2145 o(0x5a0f66); /* cvtpd2ps */
2146 o(0xc0 + REG_VALUE(vtop
->r
)*9);
2147 } else if (tbt
== VT_LDOUBLE
) {
2149 /* movsd %xmm0,-0x10(%rsp) */
2151 o(0x44 + REG_VALUE(vtop
->r
)*8);
2153 o(0xf02444dd); /* fldl -0x10(%rsp) */
2159 r
= get_reg(RC_FLOAT
);
2160 if (tbt
== VT_DOUBLE
) {
2161 o(0xf0245cdd); /* fstpl -0x10(%rsp) */
2162 /* movsd -0x10(%rsp),%xmm0 */
2164 o(0x44 + REG_VALUE(r
)*8);
2167 } else if (tbt
== VT_FLOAT
) {
2168 o(0xf0245cd9); /* fstps -0x10(%rsp) */
2169 /* movss -0x10(%rsp),%xmm0 */
2171 o(0x44 + REG_VALUE(r
)*8);
2178 /* convert fp to int 't' type */
2179 void gen_cvt_ftoi(int t
)
2181 int ft
, bt
, size
, r
;
2184 if (bt
== VT_LDOUBLE
) {
2185 gen_cvt_ftof(VT_DOUBLE
);
2195 r
= get_reg(RC_INT
);
2196 if (bt
== VT_FLOAT
) {
2198 } else if (bt
== VT_DOUBLE
) {
2203 orex(size
== 8, r
, 0, 0x2c0f); /* cvttss2si or cvttsd2si */
2204 o(0xc0 + REG_VALUE(vtop
->r
) + REG_VALUE(r
)*8);
2208 /* computed goto support */
2215 /* Save the stack pointer onto the stack and return the location of its address */
2216 ST_FUNC
void gen_vla_sp_save(int addr
) {
2217 /* mov %rsp,addr(%rbp)*/
2218 gen_modrm64(0x89, TREG_RSP
, VT_LOCAL
, NULL
, addr
);
2221 /* Restore the SP from a location on the stack */
2222 ST_FUNC
void gen_vla_sp_restore(int addr
) {
2223 gen_modrm64(0x8b, TREG_RSP
, VT_LOCAL
, NULL
, addr
);
2226 #ifdef TCC_TARGET_PE
2227 /* Save result of gen_vla_alloc onto the stack */
2228 ST_FUNC
void gen_vla_result(int addr
) {
2229 /* mov %rax,addr(%rbp)*/
2230 gen_modrm64(0x89, TREG_RAX
, VT_LOCAL
, NULL
, addr
);
2234 /* Subtract from the stack pointer, and push the resulting value onto the stack */
2235 ST_FUNC
void gen_vla_alloc(CType
*type
, int align
) {
2236 #ifdef TCC_TARGET_PE
2237 /* alloca does more than just adjust %rsp on Windows */
2238 vpush_global_sym(&func_old_type
, TOK_alloca
);
2239 vswap(); /* Move alloca ref past allocation size */
2243 r
= gv(RC_INT
); /* allocation size */
2246 o(0xe0 | REG_VALUE(r
));
2247 /* We align to 16 bytes rather than align */
2255 /* end of x86-64 code generator */
2256 /*************************************************************/
2257 #endif /* ! TARGET_DEFS_ONLY */
2258 /******************************************************/