2 * x86-64 code generator for TCC
4 * Copyright (c) 2008 Shinichiro Hamaji
6 * Based on i386-gen.c by Fabrice Bellard
8 * This library is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU Lesser General Public
10 * License as published by the Free Software Foundation; either
11 * version 2 of the License, or (at your option) any later version.
13 * This library is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * Lesser General Public License for more details.
18 * You should have received a copy of the GNU Lesser General Public
19 * License along with this library; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 #ifdef TARGET_DEFS_ONLY
25 /* number of available registers */
29 /* a register can belong to several classes. The classes must be
30 sorted from more general to more precise (see gv2() code which does
31 assumptions on it). */
32 #define RC_INT 0x0001 /* generic integer register */
33 #define RC_FLOAT 0x0002 /* generic float register */
37 #define RC_ST0 0x0080 /* only for long double */
42 #define RC_XMM0 0x1000
43 #define RC_XMM1 0x2000
44 #define RC_XMM2 0x4000
45 #define RC_XMM3 0x8000
46 #define RC_XMM4 0x10000
47 #define RC_XMM5 0x20000
48 #define RC_XMM6 0x40000
49 #define RC_XMM7 0x80000
50 #define RC_IRET RC_RAX /* function return: integer register */
51 #define RC_LRET RC_RDX /* function return: second integer register */
52 #define RC_FRET RC_XMM0 /* function return: float register */
53 #define RC_QRET RC_XMM1 /* function return: second float register */
55 /* pretty names for the registers */
83 #define REX_BASE(reg) (((reg) >> 3) & 1)
84 #define REG_VALUE(reg) ((reg) & 7)
86 /* return registers for function */
87 #define REG_IRET TREG_RAX /* single word int return register */
88 #define REG_LRET TREG_RDX /* second word return register (for long long) */
89 #define REG_FRET TREG_XMM0 /* float return register */
90 #define REG_QRET TREG_XMM1 /* second float return register */
92 /* defined if function parameters must be evaluated in reverse order */
93 #define INVERT_FUNC_PARAMS
95 /* pointer size, in bytes */
98 /* long double size and alignment, in bytes */
99 #define LDOUBLE_SIZE 16
100 #define LDOUBLE_ALIGN 16
101 /* maximum alignment (for aligned attribute support) */
104 /******************************************************/
107 #define EM_TCC_TARGET EM_X86_64
109 /* relocation type for 32 bit data relocation */
110 #define R_DATA_32 R_X86_64_32
111 #define R_DATA_PTR R_X86_64_64
112 #define R_JMP_SLOT R_X86_64_JUMP_SLOT
113 #define R_COPY R_X86_64_COPY
115 #define ELF_START_ADDR 0x400000
116 #define ELF_PAGE_SIZE 0x200000
118 /******************************************************/
119 #else /* ! TARGET_DEFS_ONLY */
120 /******************************************************/
124 ST_DATA
const int reg_classes
[NB_REGS
] = {
125 /* eax */ RC_INT
| RC_RAX
,
126 /* ecx */ RC_INT
| RC_RCX
,
127 /* edx */ RC_INT
| RC_RDX
,
141 /* xmm0 */ RC_FLOAT
| RC_XMM0
,
142 /* xmm1 */ RC_FLOAT
| RC_XMM1
,
143 /* xmm2 */ RC_FLOAT
| RC_XMM2
,
144 /* xmm3 */ RC_FLOAT
| RC_XMM3
,
145 /* xmm4 */ RC_FLOAT
| RC_XMM4
,
146 /* xmm5 */ RC_FLOAT
| RC_XMM5
,
147 /* xmm6 an xmm7 are included so gv() can be used on them,
148 but they are not tagged with RC_FLOAT because they are
149 callee saved on Windows */
155 static unsigned long func_sub_sp_offset
;
156 static int func_ret_sub
;
158 /* XXX: make it faster ? */
163 if (ind1
> cur_text_section
->data_allocated
)
164 section_realloc(cur_text_section
, ind1
);
165 cur_text_section
->data
[ind
] = c
;
169 void o(unsigned int c
)
191 void gen_le64(int64_t c
)
203 void orex(int ll
, int r
, int r2
, int b
)
205 if ((r
& VT_VALMASK
) >= VT_CONST
)
207 if ((r2
& VT_VALMASK
) >= VT_CONST
)
209 if (ll
|| REX_BASE(r
) || REX_BASE(r2
))
210 o(0x40 | REX_BASE(r
) | (REX_BASE(r2
) << 2) | (ll
<< 3));
214 /* output a symbol and patch all calls to it */
215 void gsym_addr(int t
, int a
)
219 ptr
= (int *)(cur_text_section
->data
+ t
);
220 n
= *ptr
; /* next value */
231 /* psym is used to put an instruction with a data field which is a
232 reference to a symbol. It is in fact the same as oad ! */
235 static int is64_type(int t
)
237 return ((t
& VT_BTYPE
) == VT_PTR
||
238 (t
& VT_BTYPE
) == VT_FUNC
||
239 (t
& VT_BTYPE
) == VT_LLONG
);
242 /* instruction + 4 bytes data. Return the address of the data */
243 ST_FUNC
int oad(int c
, int s
)
249 if (ind1
> cur_text_section
->data_allocated
)
250 section_realloc(cur_text_section
, ind1
);
251 *(int *)(cur_text_section
->data
+ ind
) = s
;
257 ST_FUNC
void gen_addr32(int r
, Sym
*sym
, int c
)
260 greloc(cur_text_section
, sym
, ind
, R_X86_64_32
);
264 /* output constant with relocation if 'r & VT_SYM' is true */
265 ST_FUNC
void gen_addr64(int r
, Sym
*sym
, int64_t c
)
268 greloc(cur_text_section
, sym
, ind
, R_X86_64_64
);
272 /* output constant with relocation if 'r & VT_SYM' is true */
273 ST_FUNC
void gen_addrpc32(int r
, Sym
*sym
, int c
)
276 greloc(cur_text_section
, sym
, ind
, R_X86_64_PC32
);
280 /* output got address with relocation */
281 static void gen_gotpcrel(int r
, Sym
*sym
, int c
)
283 #ifndef TCC_TARGET_PE
286 greloc(cur_text_section
, sym
, ind
, R_X86_64_GOTPCREL
);
287 sr
= cur_text_section
->reloc
;
288 rel
= (ElfW(Rela
) *)(sr
->data
+ sr
->data_offset
- sizeof(ElfW(Rela
)));
291 tcc_error("internal error: no GOT on PE: %s %x %x | %02x %02x %02x\n",
292 get_tok_str(sym
->v
, NULL
), c
, r
,
293 cur_text_section
->data
[ind
-3],
294 cur_text_section
->data
[ind
-2],
295 cur_text_section
->data
[ind
-1]
297 greloc(cur_text_section
, sym
, ind
, R_X86_64_PC32
);
301 /* we use add c, %xxx for displacement */
303 o(0xc0 + REG_VALUE(r
));
308 static void gen_modrm_impl(int op_reg
, int r
, Sym
*sym
, int c
, int is_got
)
310 op_reg
= REG_VALUE(op_reg
) << 3;
311 if ((r
& VT_VALMASK
) == VT_CONST
) {
312 /* constant memory reference */
315 gen_gotpcrel(r
, sym
, c
);
317 gen_addrpc32(r
, sym
, c
);
319 } else if ((r
& VT_VALMASK
) == VT_LOCAL
) {
320 /* currently, we use only ebp as base */
322 /* short reference */
326 oad(0x85 | op_reg
, c
);
328 } else if ((r
& VT_VALMASK
) >= TREG_MEM
) {
330 g(0x80 | op_reg
| REG_VALUE(r
));
333 g(0x00 | op_reg
| REG_VALUE(r
));
336 g(0x00 | op_reg
| REG_VALUE(r
));
340 /* generate a modrm reference. 'op_reg' contains the addtionnal 3
342 static void gen_modrm(int op_reg
, int r
, Sym
*sym
, int c
)
344 gen_modrm_impl(op_reg
, r
, sym
, c
, 0);
347 /* generate a modrm reference. 'op_reg' contains the addtionnal 3
349 static void gen_modrm64(int opcode
, int op_reg
, int r
, Sym
*sym
, int c
)
352 is_got
= (op_reg
& TREG_MEM
) && !(sym
->type
.t
& VT_STATIC
);
353 orex(1, r
, op_reg
, opcode
);
354 gen_modrm_impl(op_reg
, r
, sym
, c
, is_got
);
358 /* load 'r' from value 'sv' */
359 void load(int r
, SValue
*sv
)
361 int v
, t
, ft
, fc
, fr
;
366 sv
= pe_getimport(sv
, &v2
);
370 ft
= sv
->type
.t
& ~VT_DEFSIGN
;
373 #ifndef TCC_TARGET_PE
374 /* we use indirect access via got */
375 if ((fr
& VT_VALMASK
) == VT_CONST
&& (fr
& VT_SYM
) &&
376 (fr
& VT_LVAL
) && !(sv
->sym
->type
.t
& VT_STATIC
)) {
377 /* use the result register as a temporal register */
378 int tr
= r
| TREG_MEM
;
380 /* we cannot use float registers as a temporal register */
381 tr
= get_reg(RC_INT
) | TREG_MEM
;
383 gen_modrm64(0x8b, tr
, fr
, sv
->sym
, 0);
385 /* load from the temporal register */
393 if (v
== VT_LLOCAL
) {
395 v1
.r
= VT_LOCAL
| VT_LVAL
;
398 if (!(reg_classes
[fr
] & RC_INT
))
399 fr
= get_reg(RC_INT
);
403 if ((ft
& VT_BTYPE
) == VT_FLOAT
) {
405 r
= REG_VALUE(r
); /* movd */
406 } else if ((ft
& VT_BTYPE
) == VT_DOUBLE
) {
407 b
= 0x7e0ff3; /* movq */
409 } else if ((ft
& VT_BTYPE
) == VT_LDOUBLE
) {
410 b
= 0xdb, r
= 5; /* fldt */
411 } else if ((ft
& VT_TYPE
) == VT_BYTE
|| (ft
& VT_TYPE
) == VT_BOOL
) {
412 b
= 0xbe0f; /* movsbl */
413 } else if ((ft
& VT_TYPE
) == (VT_BYTE
| VT_UNSIGNED
)) {
414 b
= 0xb60f; /* movzbl */
415 } else if ((ft
& VT_TYPE
) == VT_SHORT
) {
416 b
= 0xbf0f; /* movswl */
417 } else if ((ft
& VT_TYPE
) == (VT_SHORT
| VT_UNSIGNED
)) {
418 b
= 0xb70f; /* movzwl */
420 assert(((ft
& VT_BTYPE
) == VT_INT
) || ((ft
& VT_BTYPE
) == VT_LLONG
)
421 || ((ft
& VT_BTYPE
) == VT_PTR
) || ((ft
& VT_BTYPE
) == VT_ENUM
)
422 || ((ft
& VT_BTYPE
) == VT_FUNC
));
427 gen_modrm64(b
, r
, fr
, sv
->sym
, fc
);
430 gen_modrm(r
, fr
, sv
->sym
, fc
);
437 o(0x05 + REG_VALUE(r
) * 8); /* lea xx(%rip), r */
438 gen_addrpc32(fr
, sv
->sym
, fc
);
440 if (sv
->sym
->type
.t
& VT_STATIC
) {
442 o(0x05 + REG_VALUE(r
) * 8); /* lea xx(%rip), r */
443 gen_addrpc32(fr
, sv
->sym
, fc
);
446 o(0x05 + REG_VALUE(r
) * 8); /* mov xx(%rip), r */
447 gen_gotpcrel(r
, sv
->sym
, fc
);
450 } else if (is64_type(ft
)) {
451 orex(1,r
,0, 0xb8 + REG_VALUE(r
)); /* mov $xx, r */
454 orex(0,r
,0, 0xb8 + REG_VALUE(r
)); /* mov $xx, r */
457 } else if (v
== VT_LOCAL
) {
458 orex(1,0,r
,0x8d); /* lea xxx(%ebp), r */
459 gen_modrm(r
, VT_LOCAL
, sv
->sym
, fc
);
460 } else if (v
== VT_CMP
) {
462 if ((fc
& ~0x100) != TOK_NE
)
463 oad(0xb8 + REG_VALUE(r
), 0); /* mov $0, r */
465 oad(0xb8 + REG_VALUE(r
), 1); /* mov $1, r */
468 /* This was a float compare. If the parity bit is
469 set the result was unordered, meaning false for everything
470 except TOK_NE, and true for TOK_NE. */
472 o(0x037a + (REX_BASE(r
) << 8));
474 orex(0,r
,0, 0x0f); /* setxx %br */
476 o(0xc0 + REG_VALUE(r
));
477 } else if (v
== VT_JMP
|| v
== VT_JMPI
) {
480 oad(0xb8 + REG_VALUE(r
), t
); /* mov $1, r */
481 o(0x05eb + (REX_BASE(r
) << 8)); /* jmp after */
484 oad(0xb8 + REG_VALUE(r
), t
^ 1); /* mov $0, r */
486 if ((r
>= TREG_XMM0
) && (r
<= TREG_XMM7
)) {
488 /* gen_cvt_ftof(VT_DOUBLE); */
489 o(0xf0245cdd); /* fstpl -0x10(%rsp) */
490 /* movsd -0x10(%rsp),%xmmN */
492 o(0x44 + REG_VALUE(r
)*8); /* %xmmN */
495 assert((v
>= TREG_XMM0
) && (v
<= TREG_XMM7
));
496 if ((ft
& VT_BTYPE
) == VT_FLOAT
) {
499 assert((ft
& VT_BTYPE
) == VT_DOUBLE
);
502 o(0xc0 + REG_VALUE(v
) + REG_VALUE(r
)*8);
504 } else if (r
== TREG_ST0
) {
505 assert((v
>= TREG_XMM0
) && (v
<= TREG_XMM7
));
506 /* gen_cvt_ftof(VT_LDOUBLE); */
507 /* movsd %xmmN,-0x10(%rsp) */
509 o(0x44 + REG_VALUE(r
)*8); /* %xmmN */
511 o(0xf02444dd); /* fldl -0x10(%rsp) */
514 o(0xc0 + REG_VALUE(r
) + REG_VALUE(v
) * 8); /* mov v, r */
520 /* store register 'r' in lvalue 'v' */
521 void store(int r
, SValue
*v
)
525 /* store the REX prefix in this variable when PIC is enabled */
530 v
= pe_getimport(v
, &v2
);
535 fr
= v
->r
& VT_VALMASK
;
538 #ifndef TCC_TARGET_PE
539 /* we need to access the variable via got */
540 if (fr
== VT_CONST
&& (v
->r
& VT_SYM
)) {
541 /* mov xx(%rip), %r11 */
543 gen_gotpcrel(TREG_R11
, v
->sym
, v
->c
.ul
);
544 pic
= is64_type(bt
) ? 0x49 : 0x41;
548 /* XXX: incorrect if float reg to reg */
549 if (bt
== VT_FLOAT
) {
552 o(0x7e0f); /* movd */
554 } else if (bt
== VT_DOUBLE
) {
557 o(0xd60f); /* movq */
559 } else if (bt
== VT_LDOUBLE
) {
560 o(0xc0d9); /* fld %st(0) */
568 if (bt
== VT_BYTE
|| bt
== VT_BOOL
)
570 else if (is64_type(bt
))
576 /* xxx r, (%r11) where xxx is mov, movq, fld, or etc */
581 if (fr
== VT_CONST
|| fr
== VT_LOCAL
|| (v
->r
& VT_LVAL
)) {
582 gen_modrm64(op64
, r
, v
->r
, v
->sym
, fc
);
583 } else if (fr
!= r
) {
584 /* XXX: don't we really come here? */
586 o(0xc0 + fr
+ r
* 8); /* mov r, fr */
589 if (fr
== VT_CONST
|| fr
== VT_LOCAL
|| (v
->r
& VT_LVAL
)) {
590 gen_modrm(r
, v
->r
, v
->sym
, fc
);
591 } else if (fr
!= r
) {
592 /* XXX: don't we really come here? */
594 o(0xc0 + fr
+ r
* 8); /* mov r, fr */
599 /* 'is_jmp' is '1' if it is a jump */
600 static void gcall_or_jmp(int is_jmp
)
603 if ((vtop
->r
& (VT_VALMASK
| VT_LVAL
)) == VT_CONST
) {
605 if (vtop
->r
& VT_SYM
) {
606 /* relocation case */
608 greloc(cur_text_section
, vtop
->sym
, ind
+ 1, R_X86_64_PC32
);
610 greloc(cur_text_section
, vtop
->sym
, ind
+ 1, R_X86_64_PLT32
);
613 /* put an empty PC32 relocation */
614 put_elf_reloc(symtab_section
, cur_text_section
,
615 ind
+ 1, R_X86_64_PC32
, 0);
617 oad(0xe8 + is_jmp
, vtop
->c
.ul
- 4); /* call/jmp im */
619 /* otherwise, indirect call */
623 o(0xff); /* call/jmp *r */
624 o(0xd0 + REG_VALUE(r
) + (is_jmp
<< 4));
628 #if defined(CONFIG_TCC_BCHECK)
629 #ifndef TCC_TARGET_PE
630 static addr_t func_bound_offset
;
631 static unsigned long func_bound_ind
;
634 static void gen_static_call(int v
)
636 Sym
*sym
= external_global_sym(v
, &func_old_type
, 0);
638 greloc(cur_text_section
, sym
, ind
-4, R_X86_64_PC32
);
641 /* generate a bounded pointer addition */
642 ST_FUNC
void gen_bounded_ptr_add(void)
644 /* save all temporary registers */
647 /* prepare fast x86_64 function call */
649 o(0xc68948); // mov %rax,%rsi ## second arg in %rsi, this must be size
653 o(0xc78948); // mov %rax,%rdi ## first arg in %rdi, this must be ptr
656 /* do a fast function call */
657 gen_static_call(TOK___bound_ptr_add
);
659 /* returned pointer is in rax */
661 vtop
->r
= TREG_RAX
| VT_BOUNDED
;
664 /* relocation offset of the bounding function call point */
665 vtop
->c
.ull
= (cur_text_section
->reloc
->data_offset
- sizeof(ElfW(Rela
)));
668 /* patch pointer addition in vtop so that pointer dereferencing is
670 ST_FUNC
void gen_bounded_ptr_deref(void)
678 /* XXX: put that code in generic part of tcc */
679 if (!is_float(vtop
->type
.t
)) {
680 if (vtop
->r
& VT_LVAL_BYTE
)
682 else if (vtop
->r
& VT_LVAL_SHORT
)
686 size
= type_size(&vtop
->type
, &align
);
688 case 1: func
= TOK___bound_ptr_indir1
; break;
689 case 2: func
= TOK___bound_ptr_indir2
; break;
690 case 4: func
= TOK___bound_ptr_indir4
; break;
691 case 8: func
= TOK___bound_ptr_indir8
; break;
692 case 12: func
= TOK___bound_ptr_indir12
; break;
693 case 16: func
= TOK___bound_ptr_indir16
; break;
695 tcc_error("unhandled size when dereferencing bounded pointer");
700 sym
= external_global_sym(func
, &func_old_type
, 0);
702 put_extern_sym(sym
, NULL
, 0, 0);
704 /* patch relocation */
705 /* XXX: find a better solution ? */
707 rel
= (ElfW(Rela
) *)(cur_text_section
->reloc
->data
+ vtop
->c
.ull
);
708 rel
->r_info
= ELF64_R_INFO(sym
->c
, ELF64_R_TYPE(rel
->r_info
));
715 static const uint8_t arg_regs
[REGN
] = {
716 TREG_RCX
, TREG_RDX
, TREG_R8
, TREG_R9
719 /* Prepare arguments in R10 and R11 rather than RCX and RDX
720 because gv() will not ever use these */
721 static int arg_prepare_reg(int idx
) {
722 if (idx
== 0 || idx
== 1)
723 /* idx=0: r10, idx=1: r11 */
726 return arg_regs
[idx
];
729 static int func_scratch
;
731 /* Generate function call. The function address is pushed first, then
732 all the parameters in call order. This functions pops all the
733 parameters and the function address. */
735 void gen_offs_sp(int b
, int r
, int d
)
737 orex(1,0,r
& 0x100 ? 0 : r
, b
);
739 o(0x2444 | (REG_VALUE(r
) << 3));
742 o(0x2484 | (REG_VALUE(r
) << 3));
747 /* Return the number of registers needed to return the struct, or 0 if
748 returning via struct pointer. */
749 ST_FUNC
int gfunc_sret(CType
*vt
, int variadic
, CType
*ret
, int *ret_align
, int *regsize
)
753 *ret_align
= 1; // Never have to re-align return values for x86-64
754 size
= type_size(vt
, &align
);
758 } else if (size
> 4) {
761 } else if (size
> 2) {
764 } else if (size
> 1) {
773 static int is_sse_float(int t
) {
776 return bt
== VT_DOUBLE
|| bt
== VT_FLOAT
;
779 int gfunc_arg_size(CType
*type
) {
781 if (type
->t
& (VT_ARRAY
|VT_BITFIELD
))
783 return type_size(type
, &align
);
786 void gfunc_call(int nb_args
)
788 int size
, r
, args_size
, i
, d
, bt
, struct_size
;
791 args_size
= (nb_args
< REGN
? REGN
: nb_args
) * PTR_SIZE
;
794 /* for struct arguments, we need to call memcpy and the function
795 call breaks register passing arguments we are preparing.
796 So, we process arguments which will be passed by stack first. */
797 struct_size
= args_size
;
798 for(i
= 0; i
< nb_args
; i
++) {
803 bt
= (sv
->type
.t
& VT_BTYPE
);
804 size
= gfunc_arg_size(&sv
->type
);
807 continue; /* arguments smaller than 8 bytes passed in registers or on stack */
809 if (bt
== VT_STRUCT
) {
810 /* align to stack align size */
811 size
= (size
+ 15) & ~15;
812 /* generate structure store */
814 gen_offs_sp(0x8d, r
, struct_size
);
817 /* generate memcpy call */
818 vset(&sv
->type
, r
| VT_LVAL
, 0);
822 } else if (bt
== VT_LDOUBLE
) {
824 gen_offs_sp(0xdb, 0x107, struct_size
);
829 if (func_scratch
< struct_size
)
830 func_scratch
= struct_size
;
833 struct_size
= args_size
;
835 for(i
= 0; i
< nb_args
; i
++) {
837 bt
= (vtop
->type
.t
& VT_BTYPE
);
839 size
= gfunc_arg_size(&vtop
->type
);
841 /* align to stack align size */
842 size
= (size
+ 15) & ~15;
845 gen_offs_sp(0x8d, d
, struct_size
);
846 gen_offs_sp(0x89, d
, arg
*8);
848 d
= arg_prepare_reg(arg
);
849 gen_offs_sp(0x8d, d
, struct_size
);
853 if (is_sse_float(vtop
->type
.t
)) {
854 gv(RC_XMM0
); /* only use one float register */
856 /* movq %xmm0, j*8(%rsp) */
857 gen_offs_sp(0xd60f66, 0x100, arg
*8);
859 /* movaps %xmm0, %xmmN */
861 o(0xc0 + (arg
<< 3));
862 d
= arg_prepare_reg(arg
);
863 /* mov %xmm0, %rxx */
866 o(0xc0 + REG_VALUE(d
));
869 if (bt
== VT_STRUCT
) {
870 vtop
->type
.ref
= NULL
;
871 vtop
->type
.t
= size
> 4 ? VT_LLONG
: size
> 2 ? VT_INT
872 : size
> 1 ? VT_SHORT
: VT_BYTE
;
877 gen_offs_sp(0x89, r
, arg
*8);
879 d
= arg_prepare_reg(arg
);
880 orex(1,d
,r
,0x89); /* mov */
881 o(0xc0 + REG_VALUE(r
) * 8 + REG_VALUE(d
));
889 /* Copy R10 and R11 into RCX and RDX, respectively */
891 o(0xd1894c); /* mov %r10, %rcx */
893 o(0xda894c); /* mov %r11, %rdx */
902 #define FUNC_PROLOG_SIZE 11
904 /* generate function prolog of type 't' */
905 void gfunc_prolog(CType
*func_type
)
907 int addr
, reg_param_index
, bt
, size
;
916 ind
+= FUNC_PROLOG_SIZE
;
917 func_sub_sp_offset
= ind
;
920 sym
= func_type
->ref
;
922 /* if the function returns a structure, then add an
923 implicit pointer parameter */
925 func_var
= (sym
->c
== FUNC_ELLIPSIS
);
926 size
= gfunc_arg_size(&func_vt
);
928 gen_modrm64(0x89, arg_regs
[reg_param_index
], VT_LOCAL
, NULL
, addr
);
934 /* define parameters */
935 while ((sym
= sym
->next
) != NULL
) {
937 bt
= type
->t
& VT_BTYPE
;
938 size
= gfunc_arg_size(type
);
940 if (reg_param_index
< REGN
) {
941 gen_modrm64(0x89, arg_regs
[reg_param_index
], VT_LOCAL
, NULL
, addr
);
943 sym_push(sym
->v
& ~SYM_FIELD
, type
, VT_LOCAL
| VT_LVAL
| VT_REF
, addr
);
945 if (reg_param_index
< REGN
) {
946 /* save arguments passed by register */
947 if ((bt
== VT_FLOAT
) || (bt
== VT_DOUBLE
)) {
948 o(0xd60f66); /* movq */
949 gen_modrm(reg_param_index
, VT_LOCAL
, NULL
, addr
);
951 gen_modrm64(0x89, arg_regs
[reg_param_index
], VT_LOCAL
, NULL
, addr
);
954 sym_push(sym
->v
& ~SYM_FIELD
, type
, VT_LOCAL
| VT_LVAL
, addr
);
960 while (reg_param_index
< REGN
) {
961 if (func_type
->ref
->c
== FUNC_ELLIPSIS
) {
962 gen_modrm64(0x89, arg_regs
[reg_param_index
], VT_LOCAL
, NULL
, addr
);
969 /* generate function epilog */
970 void gfunc_epilog(void)
975 if (func_ret_sub
== 0) {
980 g(func_ret_sub
>> 8);
984 ind
= func_sub_sp_offset
- FUNC_PROLOG_SIZE
;
985 /* align local size to word & save local variables */
986 v
= (func_scratch
+ -loc
+ 15) & -16;
989 Sym
*sym
= external_global_sym(TOK___chkstk
, &func_old_type
, 0);
990 oad(0xb8, v
); /* mov stacksize, %eax */
991 oad(0xe8, -4); /* call __chkstk, (does the stackframe too) */
992 greloc(cur_text_section
, sym
, ind
-4, R_X86_64_PC32
);
993 o(0x90); /* fill for FUNC_PROLOG_SIZE = 11 bytes */
995 o(0xe5894855); /* push %rbp, mov %rsp, %rbp */
996 o(0xec8148); /* sub rsp, stacksize */
1000 cur_text_section
->data_offset
= saved_ind
;
1001 pe_add_unwind_data(ind
, saved_ind
, v
);
1002 ind
= cur_text_section
->data_offset
;
1007 static void gadd_sp(int val
)
1009 if (val
== (char)val
) {
1013 oad(0xc48148, val
); /* add $xxx, %rsp */
1017 typedef enum X86_64_Mode
{
1020 x86_64_mode_integer
,
1025 static X86_64_Mode
classify_x86_64_merge(X86_64_Mode a
, X86_64_Mode b
)
1029 else if (a
== x86_64_mode_none
)
1031 else if (b
== x86_64_mode_none
)
1033 else if ((a
== x86_64_mode_memory
) || (b
== x86_64_mode_memory
))
1034 return x86_64_mode_memory
;
1035 else if ((a
== x86_64_mode_integer
) || (b
== x86_64_mode_integer
))
1036 return x86_64_mode_integer
;
1037 else if ((a
== x86_64_mode_x87
) || (b
== x86_64_mode_x87
))
1038 return x86_64_mode_memory
;
1040 return x86_64_mode_sse
;
1043 static X86_64_Mode
classify_x86_64_inner(CType
*ty
)
1048 switch (ty
->t
& VT_BTYPE
) {
1049 case VT_VOID
: return x86_64_mode_none
;
1058 case VT_ENUM
: return x86_64_mode_integer
;
1061 case VT_DOUBLE
: return x86_64_mode_sse
;
1063 case VT_LDOUBLE
: return x86_64_mode_x87
;
1069 if (f
->next
&& (f
->c
== f
->next
->c
))
1070 return x86_64_mode_memory
;
1072 mode
= x86_64_mode_none
;
1073 for (; f
; f
= f
->next
)
1074 mode
= classify_x86_64_merge(mode
, classify_x86_64_inner(&f
->type
));
1082 static X86_64_Mode
classify_x86_64_arg(CType
*ty
, CType
*ret
, int *psize
, int *palign
, int *reg_count
)
1085 int size
, align
, ret_t
= 0;
1087 if (ty
->t
& (VT_BITFIELD
|VT_ARRAY
)) {
1092 mode
= x86_64_mode_integer
;
1094 size
= type_size(ty
, &align
);
1095 *psize
= (size
+ 7) & ~7;
1096 *palign
= (align
+ 7) & ~7;
1099 mode
= x86_64_mode_memory
;
1101 mode
= classify_x86_64_inner(ty
);
1103 case x86_64_mode_integer
:
1109 ret_t
= (size
> 4) ? VT_LLONG
: VT_INT
;
1113 case x86_64_mode_x87
:
1118 case x86_64_mode_sse
:
1124 ret_t
= (size
> 4) ? VT_DOUBLE
: VT_FLOAT
;
1127 default: break; /* nothing to be done for x86_64_mode_memory and x86_64_mode_none*/
1140 ST_FUNC
int classify_x86_64_va_arg(CType
*ty
)
1142 /* This definition must be synced with stdarg.h */
1143 enum __va_arg_type
{
1144 __va_gen_reg
, __va_float_reg
, __va_stack
1146 int size
, align
, reg_count
;
1147 X86_64_Mode mode
= classify_x86_64_arg(ty
, NULL
, &size
, &align
, ®_count
);
1149 default: return __va_stack
;
1150 case x86_64_mode_integer
: return __va_gen_reg
;
1151 case x86_64_mode_sse
: return __va_float_reg
;
1155 /* Return the number of registers needed to return the struct, or 0 if
1156 returning via struct pointer. */
1157 ST_FUNC
int gfunc_sret(CType
*vt
, int variadic
, CType
*ret
, int *ret_align
, int *regsize
)
1159 int size
, align
, reg_count
;
1160 *ret_align
= 1; // Never have to re-align return values for x86-64
1162 return (classify_x86_64_arg(vt
, ret
, &size
, &align
, ®_count
) != x86_64_mode_memory
);
1166 static const uint8_t arg_regs
[REGN
] = {
1167 TREG_RDI
, TREG_RSI
, TREG_RDX
, TREG_RCX
, TREG_R8
, TREG_R9
1170 static int arg_prepare_reg(int idx
) {
1171 if (idx
== 2 || idx
== 3)
1172 /* idx=2: r10, idx=3: r11 */
1175 return arg_regs
[idx
];
1178 /* Generate function call. The function address is pushed first, then
1179 all the parameters in call order. This functions pops all the
1180 parameters and the function address. */
1181 void gfunc_call(int nb_args
)
1185 int size
, align
, r
, args_size
, stack_adjust
, run_start
, run_end
, i
, reg_count
;
1186 int nb_reg_args
= 0;
1187 int nb_sse_args
= 0;
1188 int sse_reg
, gen_reg
;
1190 /* calculate the number of integer/float register arguments */
1191 for(i
= 0; i
< nb_args
; i
++) {
1192 mode
= classify_x86_64_arg(&vtop
[-i
].type
, NULL
, &size
, &align
, ®_count
);
1193 if (mode
== x86_64_mode_sse
)
1194 nb_sse_args
+= reg_count
;
1195 else if (mode
== x86_64_mode_integer
)
1196 nb_reg_args
+= reg_count
;
1199 /* arguments are collected in runs. Each run is a collection of 8-byte aligned arguments
1200 and ended by a 16-byte aligned argument. This is because, from the point of view of
1201 the callee, argument alignment is computed from the bottom up. */
1202 /* for struct arguments, we need to call memcpy and the function
1203 call breaks register passing arguments we are preparing.
1204 So, we process arguments which will be passed by stack first. */
1205 gen_reg
= nb_reg_args
;
1206 sse_reg
= nb_sse_args
;
1209 while (run_start
!= nb_args
) {
1210 int run_gen_reg
= gen_reg
, run_sse_reg
= sse_reg
;
1214 for(i
= run_start
; (i
< nb_args
) && (run_end
== nb_args
); i
++) {
1215 mode
= classify_x86_64_arg(&vtop
[-i
].type
, NULL
, &size
, &align
, ®_count
);
1217 case x86_64_mode_memory
:
1218 case x86_64_mode_x87
:
1223 stack_adjust
+= size
;
1226 case x86_64_mode_sse
:
1227 sse_reg
-= reg_count
;
1228 if (sse_reg
+ reg_count
> 8) goto stack_arg
;
1231 case x86_64_mode_integer
:
1232 gen_reg
-= reg_count
;
1233 if (gen_reg
+ reg_count
> REGN
) goto stack_arg
;
1235 default: break; /* nothing to be done for x86_64_mode_none */
1239 gen_reg
= run_gen_reg
;
1240 sse_reg
= run_sse_reg
;
1242 /* adjust stack to align SSE boundary */
1243 if (stack_adjust
&= 15) {
1244 /* fetch cpu flag before the following sub will change the value */
1245 if (vtop
>= vstack
&& (vtop
->r
& VT_VALMASK
) == VT_CMP
)
1248 stack_adjust
= 16 - stack_adjust
;
1250 oad(0xec81, stack_adjust
); /* sub $xxx, %rsp */
1251 args_size
+= stack_adjust
;
1254 for(i
= run_start
; i
< run_end
;) {
1255 /* Swap argument to top, it will possibly be changed here,
1256 and might use more temps. At the end of the loop we keep
1257 in on the stack and swap it back to its original position
1258 if it is a register. */
1259 SValue tmp
= vtop
[0];
1263 mode
= classify_x86_64_arg(&vtop
->type
, NULL
, &size
, &align
, ®_count
);
1266 switch (vtop
->type
.t
& VT_BTYPE
) {
1268 if (mode
== x86_64_mode_sse
) {
1270 sse_reg
-= reg_count
;
1273 } else if (mode
== x86_64_mode_integer
) {
1275 gen_reg
-= reg_count
;
1281 /* allocate the necessary size on stack */
1283 oad(0xec81, size
); /* sub $xxx, %rsp */
1284 /* generate structure store */
1285 r
= get_reg(RC_INT
);
1286 orex(1, r
, 0, 0x89); /* mov %rsp, r */
1287 o(0xe0 + REG_VALUE(r
));
1288 vset(&vtop
->type
, r
| VT_LVAL
, 0);
1301 assert(mode
== x86_64_mode_sse
);
1305 o(0x50); /* push $rax */
1306 /* movq %xmmN, (%rsp) */
1308 o(0x04 + REG_VALUE(r
)*8);
1317 assert(mode
== x86_64_mode_integer
);
1319 /* XXX: implicit cast ? */
1320 if (gen_reg
> REGN
) {
1323 orex(0,r
,0,0x50 + REG_VALUE(r
)); /* push r */
1331 /* And swap the argument back to it's original position. */
1338 assert((vtop
->type
.t
== tmp
.type
.t
) && (vtop
->r
== tmp
.r
));
1347 /* handle 16 byte aligned arguments at end of run */
1348 run_start
= i
= run_end
;
1349 while (i
< nb_args
) {
1350 /* Rotate argument to top since it will always be popped */
1351 mode
= classify_x86_64_arg(&vtop
[-i
].type
, NULL
, &size
, &align
, ®_count
);
1357 if ((vtop
->type
.t
& VT_BTYPE
) == VT_LDOUBLE
) {
1359 oad(0xec8148, size
); /* sub $xxx, %rsp */
1360 o(0x7cdb); /* fstpt 0(%rsp) */
1365 assert(mode
== x86_64_mode_memory
);
1367 /* allocate the necessary size on stack */
1369 oad(0xec81, size
); /* sub $xxx, %rsp */
1370 /* generate structure store */
1371 r
= get_reg(RC_INT
);
1372 orex(1, r
, 0, 0x89); /* mov %rsp, r */
1373 o(0xe0 + REG_VALUE(r
));
1374 vset(&vtop
->type
, r
| VT_LVAL
, 0);
1385 /* XXX This should be superfluous. */
1386 save_regs(0); /* save used temporary registers */
1388 /* then, we prepare register passing arguments.
1389 Note that we cannot set RDX and RCX in this loop because gv()
1390 may break these temporary registers. Let's use R10 and R11
1392 assert(gen_reg
<= REGN
);
1393 assert(sse_reg
<= 8);
1394 for(i
= 0; i
< nb_args
; i
++) {
1395 mode
= classify_x86_64_arg(&vtop
->type
, &type
, &size
, &align
, ®_count
);
1396 /* Alter stack entry type so that gv() knows how to treat it */
1398 if (mode
== x86_64_mode_sse
) {
1399 if (reg_count
== 2) {
1401 gv(RC_FRET
); /* Use pair load into xmm0 & xmm1 */
1402 if (sse_reg
) { /* avoid redundant movaps %xmm0, %xmm0 */
1403 /* movaps %xmm0, %xmmN */
1405 o(0xc0 + (sse_reg
<< 3));
1406 /* movaps %xmm1, %xmmN */
1408 o(0xc1 + ((sse_reg
+1) << 3));
1411 assert(reg_count
== 1);
1413 /* Load directly to register */
1414 gv(RC_XMM0
<< sse_reg
);
1416 } else if (mode
== x86_64_mode_integer
) {
1418 /* XXX: implicit cast ? */
1419 gen_reg
-= reg_count
;
1421 int d
= arg_prepare_reg(gen_reg
);
1422 orex(1,d
,r
,0x89); /* mov */
1423 o(0xc0 + REG_VALUE(r
) * 8 + REG_VALUE(d
));
1424 if (reg_count
== 2) {
1425 d
= arg_prepare_reg(gen_reg
+1);
1426 orex(1,d
,vtop
->r2
,0x89); /* mov */
1427 o(0xc0 + REG_VALUE(vtop
->r2
) * 8 + REG_VALUE(d
));
1432 assert(gen_reg
== 0);
1433 assert(sse_reg
== 0);
1435 /* We shouldn't have many operands on the stack anymore, but the
1436 call address itself is still there, and it might be in %eax
1437 (or edx/ecx) currently, which the below writes would clobber.
1438 So evict all remaining operands here. */
1441 /* Copy R10 and R11 into RDX and RCX, respectively */
1442 if (nb_reg_args
> 2) {
1443 o(0xd2894c); /* mov %r10, %rdx */
1444 if (nb_reg_args
> 3) {
1445 o(0xd9894c); /* mov %r11, %rcx */
1449 oad(0xb8, nb_sse_args
< 8 ? nb_sse_args
: 8); /* mov nb_sse_args, %eax */
1457 #define FUNC_PROLOG_SIZE 11
1459 static void push_arg_reg(int i
) {
1461 gen_modrm64(0x89, arg_regs
[i
], VT_LOCAL
, NULL
, loc
);
1464 /* generate function prolog of type 't' */
1465 void gfunc_prolog(CType
*func_type
)
1468 int i
, addr
, align
, size
, reg_count
;
1469 int param_addr
= 0, reg_param_index
, sse_param_index
;
1473 sym
= func_type
->ref
;
1474 addr
= PTR_SIZE
* 2;
1476 ind
+= FUNC_PROLOG_SIZE
;
1477 func_sub_sp_offset
= ind
;
1480 if (func_type
->ref
->c
== FUNC_ELLIPSIS
) {
1481 int seen_reg_num
, seen_sse_num
, seen_stack_size
;
1482 seen_reg_num
= seen_sse_num
= 0;
1483 /* frame pointer and return address */
1484 seen_stack_size
= PTR_SIZE
* 2;
1485 /* count the number of seen parameters */
1486 sym
= func_type
->ref
;
1487 while ((sym
= sym
->next
) != NULL
) {
1489 mode
= classify_x86_64_arg(type
, NULL
, &size
, &align
, ®_count
);
1493 seen_stack_size
= ((seen_stack_size
+ align
- 1) & -align
) + size
;
1496 case x86_64_mode_integer
:
1497 if (seen_reg_num
+ reg_count
<= 8) {
1498 seen_reg_num
+= reg_count
;
1505 case x86_64_mode_sse
:
1506 if (seen_sse_num
+ reg_count
<= 8) {
1507 seen_sse_num
+= reg_count
;
1517 /* movl $0x????????, -0x10(%rbp) */
1519 gen_le32(seen_reg_num
* 8);
1520 /* movl $0x????????, -0xc(%rbp) */
1522 gen_le32(seen_sse_num
* 16 + 48);
1523 /* movl $0x????????, -0x8(%rbp) */
1525 gen_le32(seen_stack_size
);
1527 /* save all register passing arguments */
1528 for (i
= 0; i
< 8; i
++) {
1530 o(0xd60f66); /* movq */
1531 gen_modrm(7 - i
, VT_LOCAL
, NULL
, loc
);
1532 /* movq $0, loc+8(%rbp) */
1537 for (i
= 0; i
< REGN
; i
++) {
1538 push_arg_reg(REGN
-1-i
);
1542 sym
= func_type
->ref
;
1543 reg_param_index
= 0;
1544 sse_param_index
= 0;
1546 /* if the function returns a structure, then add an
1547 implicit pointer parameter */
1548 func_vt
= sym
->type
;
1549 mode
= classify_x86_64_arg(&func_vt
, NULL
, &size
, &align
, ®_count
);
1550 if (mode
== x86_64_mode_memory
) {
1551 push_arg_reg(reg_param_index
);
1555 /* define parameters */
1556 while ((sym
= sym
->next
) != NULL
) {
1558 mode
= classify_x86_64_arg(type
, NULL
, &size
, &align
, ®_count
);
1560 case x86_64_mode_sse
:
1561 if (sse_param_index
+ reg_count
<= 8) {
1562 /* save arguments passed by register */
1563 loc
-= reg_count
* 8;
1565 for (i
= 0; i
< reg_count
; ++i
) {
1566 o(0xd60f66); /* movq */
1567 gen_modrm(sse_param_index
, VT_LOCAL
, NULL
, param_addr
+ i
*8);
1571 addr
= (addr
+ align
- 1) & -align
;
1574 sse_param_index
+= reg_count
;
1578 case x86_64_mode_memory
:
1579 case x86_64_mode_x87
:
1580 addr
= (addr
+ align
- 1) & -align
;
1585 case x86_64_mode_integer
: {
1586 if (reg_param_index
+ reg_count
<= REGN
) {
1587 /* save arguments passed by register */
1588 loc
-= reg_count
* 8;
1590 for (i
= 0; i
< reg_count
; ++i
) {
1591 gen_modrm64(0x89, arg_regs
[reg_param_index
], VT_LOCAL
, NULL
, param_addr
+ i
*8);
1595 addr
= (addr
+ align
- 1) & -align
;
1598 reg_param_index
+= reg_count
;
1602 default: break; /* nothing to be done for x86_64_mode_none */
1604 sym_push(sym
->v
& ~SYM_FIELD
, type
,
1605 VT_LOCAL
| VT_LVAL
, param_addr
);
1608 #ifdef CONFIG_TCC_BCHECK
1609 /* leave some room for bound checking code */
1610 if (tcc_state
->do_bounds_check
) {
1611 func_bound_offset
= lbounds_section
->data_offset
;
1612 func_bound_ind
= ind
;
1613 oad(0xb8, 0); /* lbound section pointer */
1614 o(0xc78948); /* mov %rax,%rdi ## first arg in %rdi, this must be ptr */
1615 oad(0xb8, 0); /* call to function */
1620 /* generate function epilog */
1621 void gfunc_epilog(void)
1625 #ifdef CONFIG_TCC_BCHECK
1626 if (tcc_state
->do_bounds_check
1627 && func_bound_offset
!= lbounds_section
->data_offset
)
1633 /* add end of table info */
1634 bounds_ptr
= section_ptr_add(lbounds_section
, sizeof(addr_t
));
1637 /* generate bound local allocation */
1638 sym_data
= get_sym_ref(&char_pointer_type
, lbounds_section
,
1639 func_bound_offset
, lbounds_section
->data_offset
);
1641 ind
= func_bound_ind
;
1642 greloc(cur_text_section
, sym_data
, ind
+ 1, R_386_32
);
1644 gen_static_call(TOK___bound_local_new
);
1647 /* generate bound check local freeing */
1648 o(0x5250); /* save returned value, if any */
1649 greloc(cur_text_section
, sym_data
, ind
+ 1, R_386_32
);
1650 oad(0xb8, 0); /* mov xxx, %rax */
1651 o(0xc78948); /* mov %rax,%rdi ## first arg in %rdi, this must be ptr */
1652 gen_static_call(TOK___bound_local_delete
);
1653 o(0x585a); /* restore returned value, if any */
1656 o(0xc9); /* leave */
1657 if (func_ret_sub
== 0) {
1660 o(0xc2); /* ret n */
1662 g(func_ret_sub
>> 8);
1664 /* align local size to word & save local variables */
1665 v
= (-loc
+ 15) & -16;
1667 ind
= func_sub_sp_offset
- FUNC_PROLOG_SIZE
;
1668 o(0xe5894855); /* push %rbp, mov %rsp, %rbp */
1669 o(0xec8148); /* sub rsp, stacksize */
1676 /* generate a jump to a label */
1679 return psym(0xe9, t
);
1682 /* generate a jump to a fixed address */
1683 void gjmp_addr(int a
)
1691 oad(0xe9, a
- ind
- 5);
1695 /* generate a test. set 'inv' to invert test. Stack entry is popped */
1696 int gtst(int inv
, int t
)
1700 v
= vtop
->r
& VT_VALMASK
;
1702 /* fast case : can jump directly since flags are set */
1703 if (vtop
->c
.i
& 0x100)
1705 /* This was a float compare. If the parity flag is set
1706 the result was unordered. For anything except != this
1707 means false and we don't jump (anding both conditions).
1708 For != this means true (oring both).
1709 Take care about inverting the test. We need to jump
1710 to our target if the result was unordered and test wasn't NE,
1711 otherwise if unordered we don't want to jump. */
1712 vtop
->c
.i
&= ~0x100;
1713 if (!inv
== (vtop
->c
.i
!= TOK_NE
))
1714 o(0x067a); /* jp +6 */
1718 t
= psym(0x8a, t
); /* jp t */
1722 t
= psym((vtop
->c
.i
- 16) ^ inv
, t
);
1723 } else if (v
== VT_JMP
|| v
== VT_JMPI
) {
1724 /* && or || optimization */
1725 if ((v
& 1) == inv
) {
1726 /* insert vtop->c jump list in t */
1729 p
= (int *)(cur_text_section
->data
+ *p
);
1741 /* generate an integer binary operation */
1742 void gen_opi(int op
)
1747 ll
= is64_type(vtop
[-1].type
.t
);
1748 uu
= (vtop
[-1].type
.t
& VT_UNSIGNED
) != 0;
1749 cc
= (vtop
->r
& (VT_VALMASK
| VT_LVAL
| VT_SYM
)) == VT_CONST
;
1753 case TOK_ADDC1
: /* add with carry generation */
1756 if (cc
&& (!ll
|| (int)vtop
->c
.ll
== vtop
->c
.ll
)) {
1763 /* XXX: generate inc and dec for smaller code ? */
1764 orex(ll
, r
, 0, 0x83);
1765 o(0xc0 | (opc
<< 3) | REG_VALUE(r
));
1768 orex(ll
, r
, 0, 0x81);
1769 oad(0xc0 | (opc
<< 3) | REG_VALUE(r
), c
);
1772 gv2(RC_INT
, RC_INT
);
1775 orex(ll
, r
, fr
, (opc
<< 3) | 0x01);
1776 o(0xc0 + REG_VALUE(r
) + REG_VALUE(fr
) * 8);
1779 if (op
>= TOK_ULT
&& op
<= TOK_GT
) {
1785 case TOK_SUBC1
: /* sub with carry generation */
1788 case TOK_ADDC2
: /* add with carry use */
1791 case TOK_SUBC2
: /* sub with carry use */
1804 gv2(RC_INT
, RC_INT
);
1807 orex(ll
, fr
, r
, 0xaf0f); /* imul fr, r */
1808 o(0xc0 + REG_VALUE(fr
) + REG_VALUE(r
) * 8);
1820 opc
= 0xc0 | (opc
<< 3);
1826 orex(ll
, r
, 0, 0xc1); /* shl/shr/sar $xxx, r */
1827 o(opc
| REG_VALUE(r
));
1828 g(vtop
->c
.i
& (ll
? 63 : 31));
1830 /* we generate the shift in ecx */
1831 gv2(RC_INT
, RC_RCX
);
1833 orex(ll
, r
, 0, 0xd3); /* shl/shr/sar %cl, r */
1834 o(opc
| REG_VALUE(r
));
1847 /* first operand must be in eax */
1848 /* XXX: need better constraint for second operand */
1849 gv2(RC_RAX
, RC_RCX
);
1854 orex(ll
, 0, 0, uu
? 0xd231 : 0x99); /* xor %edx,%edx : cqto */
1855 orex(ll
, fr
, 0, 0xf7); /* div fr, %eax */
1856 o((uu
? 0xf0 : 0xf8) + REG_VALUE(fr
));
1857 if (op
== '%' || op
== TOK_UMOD
)
1869 void gen_opl(int op
)
1874 /* generate a floating point operation 'v = t1 op t2' instruction. The
1875 two operands are guaranted to have the same floating point type */
1876 /* XXX: need to use ST1 too */
1877 void gen_opf(int op
)
1879 int a
, ft
, fc
, swapped
, r
;
1881 (vtop
->type
.t
& VT_BTYPE
) == VT_LDOUBLE
? RC_ST0
: RC_FLOAT
;
1883 /* convert constants to memory references */
1884 if ((vtop
[-1].r
& (VT_VALMASK
| VT_LVAL
)) == VT_CONST
) {
1889 if ((vtop
[0].r
& (VT_VALMASK
| VT_LVAL
)) == VT_CONST
)
1892 /* must put at least one value in the floating point register */
1893 if ((vtop
[-1].r
& VT_LVAL
) &&
1894 (vtop
[0].r
& VT_LVAL
)) {
1900 /* swap the stack if needed so that t1 is the register and t2 is
1901 the memory reference */
1902 if (vtop
[-1].r
& VT_LVAL
) {
1906 if ((vtop
->type
.t
& VT_BTYPE
) == VT_LDOUBLE
) {
1907 if (op
>= TOK_ULT
&& op
<= TOK_GT
) {
1908 /* load on stack second operand */
1909 load(TREG_ST0
, vtop
);
1910 save_reg(TREG_RAX
); /* eax is used by FP comparison code */
1911 if (op
== TOK_GE
|| op
== TOK_GT
)
1913 else if (op
== TOK_EQ
|| op
== TOK_NE
)
1916 o(0xc9d9); /* fxch %st(1) */
1917 if (op
== TOK_EQ
|| op
== TOK_NE
)
1918 o(0xe9da); /* fucompp */
1920 o(0xd9de); /* fcompp */
1921 o(0xe0df); /* fnstsw %ax */
1923 o(0x45e480); /* and $0x45, %ah */
1924 o(0x40fC80); /* cmp $0x40, %ah */
1925 } else if (op
== TOK_NE
) {
1926 o(0x45e480); /* and $0x45, %ah */
1927 o(0x40f480); /* xor $0x40, %ah */
1929 } else if (op
== TOK_GE
|| op
== TOK_LE
) {
1930 o(0x05c4f6); /* test $0x05, %ah */
1933 o(0x45c4f6); /* test $0x45, %ah */
1940 /* no memory reference possible for long double operations */
1941 load(TREG_ST0
, vtop
);
1965 o(0xde); /* fxxxp %st, %st(1) */
1970 if (op
>= TOK_ULT
&& op
<= TOK_GT
) {
1971 /* if saved lvalue, then we must reload it */
1974 if ((r
& VT_VALMASK
) == VT_LLOCAL
) {
1976 r
= get_reg(RC_INT
);
1978 v1
.r
= VT_LOCAL
| VT_LVAL
;
1984 if (op
== TOK_EQ
|| op
== TOK_NE
) {
1987 if (op
== TOK_LE
|| op
== TOK_LT
)
1989 if (op
== TOK_LE
|| op
== TOK_GE
) {
1990 op
= 0x93; /* setae */
1992 op
= 0x97; /* seta */
2000 assert(!(vtop
[-1].r
& VT_LVAL
));
2002 if ((vtop
->type
.t
& VT_BTYPE
) == VT_DOUBLE
)
2004 if (op
== TOK_EQ
|| op
== TOK_NE
)
2005 o(0x2e0f); /* ucomisd */
2007 o(0x2f0f); /* comisd */
2009 if (vtop
->r
& VT_LVAL
) {
2010 gen_modrm(vtop
[-1].r
, r
, vtop
->sym
, fc
);
2012 o(0xc0 + REG_VALUE(vtop
[0].r
) + REG_VALUE(vtop
[-1].r
)*8);
2017 vtop
->c
.i
= op
| 0x100;
2019 assert((vtop
->type
.t
& VT_BTYPE
) != VT_LDOUBLE
);
2037 assert((ft
& VT_BTYPE
) != VT_LDOUBLE
);
2040 /* if saved lvalue, then we must reload it */
2041 if ((vtop
->r
& VT_VALMASK
) == VT_LLOCAL
) {
2043 r
= get_reg(RC_INT
);
2045 v1
.r
= VT_LOCAL
| VT_LVAL
;
2051 assert(!(vtop
[-1].r
& VT_LVAL
));
2053 assert(vtop
->r
& VT_LVAL
);
2058 if ((ft
& VT_BTYPE
) == VT_DOUBLE
) {
2066 if (vtop
->r
& VT_LVAL
) {
2067 gen_modrm(vtop
[-1].r
, r
, vtop
->sym
, fc
);
2069 o(0xc0 + REG_VALUE(vtop
[0].r
) + REG_VALUE(vtop
[-1].r
)*8);
2077 /* convert integers to fp 't' type. Must handle 'int', 'unsigned int'
2078 and 'long long' cases. */
2079 void gen_cvt_itof(int t
)
2081 if ((t
& VT_BTYPE
) == VT_LDOUBLE
) {
2084 if ((vtop
->type
.t
& VT_BTYPE
) == VT_LLONG
) {
2085 /* signed long long to float/double/long double (unsigned case
2086 is handled generically) */
2087 o(0x50 + (vtop
->r
& VT_VALMASK
)); /* push r */
2088 o(0x242cdf); /* fildll (%rsp) */
2089 o(0x08c48348); /* add $8, %rsp */
2090 } else if ((vtop
->type
.t
& (VT_BTYPE
| VT_UNSIGNED
)) ==
2091 (VT_INT
| VT_UNSIGNED
)) {
2092 /* unsigned int to float/double/long double */
2093 o(0x6a); /* push $0 */
2095 o(0x50 + (vtop
->r
& VT_VALMASK
)); /* push r */
2096 o(0x242cdf); /* fildll (%rsp) */
2097 o(0x10c48348); /* add $16, %rsp */
2099 /* int to float/double/long double */
2100 o(0x50 + (vtop
->r
& VT_VALMASK
)); /* push r */
2101 o(0x2404db); /* fildl (%rsp) */
2102 o(0x08c48348); /* add $8, %rsp */
2106 int r
= get_reg(RC_FLOAT
);
2108 o(0xf2 + ((t
& VT_BTYPE
) == VT_FLOAT
?1:0));
2109 if ((vtop
->type
.t
& (VT_BTYPE
| VT_UNSIGNED
)) ==
2110 (VT_INT
| VT_UNSIGNED
) ||
2111 (vtop
->type
.t
& VT_BTYPE
) == VT_LLONG
) {
2115 o(0xc0 + (vtop
->r
& VT_VALMASK
) + REG_VALUE(r
)*8); /* cvtsi2sd */
2120 /* convert from one floating point type to another */
2121 void gen_cvt_ftof(int t
)
2129 if (bt
== VT_FLOAT
) {
2131 if (tbt
== VT_DOUBLE
) {
2132 o(0x140f); /* unpcklps */
2133 o(0xc0 + REG_VALUE(vtop
->r
)*9);
2134 o(0x5a0f); /* cvtps2pd */
2135 o(0xc0 + REG_VALUE(vtop
->r
)*9);
2136 } else if (tbt
== VT_LDOUBLE
) {
2138 /* movss %xmm0,-0x10(%rsp) */
2140 o(0x44 + REG_VALUE(vtop
->r
)*8);
2142 o(0xf02444d9); /* flds -0x10(%rsp) */
2145 } else if (bt
== VT_DOUBLE
) {
2147 if (tbt
== VT_FLOAT
) {
2148 o(0x140f66); /* unpcklpd */
2149 o(0xc0 + REG_VALUE(vtop
->r
)*9);
2150 o(0x5a0f66); /* cvtpd2ps */
2151 o(0xc0 + REG_VALUE(vtop
->r
)*9);
2152 } else if (tbt
== VT_LDOUBLE
) {
2154 /* movsd %xmm0,-0x10(%rsp) */
2156 o(0x44 + REG_VALUE(vtop
->r
)*8);
2158 o(0xf02444dd); /* fldl -0x10(%rsp) */
2164 r
= get_reg(RC_FLOAT
);
2165 if (tbt
== VT_DOUBLE
) {
2166 o(0xf0245cdd); /* fstpl -0x10(%rsp) */
2167 /* movsd -0x10(%rsp),%xmm0 */
2169 o(0x44 + REG_VALUE(r
)*8);
2172 } else if (tbt
== VT_FLOAT
) {
2173 o(0xf0245cd9); /* fstps -0x10(%rsp) */
2174 /* movss -0x10(%rsp),%xmm0 */
2176 o(0x44 + REG_VALUE(r
)*8);
2183 /* convert fp to int 't' type */
2184 void gen_cvt_ftoi(int t
)
2186 int ft
, bt
, size
, r
;
2189 if (bt
== VT_LDOUBLE
) {
2190 gen_cvt_ftof(VT_DOUBLE
);
2200 r
= get_reg(RC_INT
);
2201 if (bt
== VT_FLOAT
) {
2203 } else if (bt
== VT_DOUBLE
) {
2208 orex(size
== 8, r
, 0, 0x2c0f); /* cvttss2si or cvttsd2si */
2209 o(0xc0 + REG_VALUE(vtop
->r
) + REG_VALUE(r
)*8);
2213 /* computed goto support */
2220 /* Save the stack pointer onto the stack and return the location of its address */
2221 ST_FUNC
void gen_vla_sp_save(int addr
) {
2222 /* mov %rsp,addr(%rbp)*/
2223 gen_modrm64(0x89, TREG_RSP
, VT_LOCAL
, NULL
, addr
);
2226 /* Restore the SP from a location on the stack */
2227 ST_FUNC
void gen_vla_sp_restore(int addr
) {
2228 gen_modrm64(0x8b, TREG_RSP
, VT_LOCAL
, NULL
, addr
);
2231 /* Subtract from the stack pointer, and push the resulting value onto the stack */
2232 ST_FUNC
void gen_vla_alloc(CType
*type
, int align
) {
2233 #ifdef TCC_TARGET_PE
2234 /* alloca does more than just adjust %rsp on Windows */
2235 vpush_global_sym(&func_old_type
, TOK_alloca
);
2236 vswap(); /* Move alloca ref past allocation size */
2238 vset(type
, REG_IRET
, 0);
2241 r
= gv(RC_INT
); /* allocation size */
2244 o(0xe0 | REG_VALUE(r
));
2245 /* We align to 16 bytes rather than align */
2250 o(0xe0 | REG_VALUE(r
));
2257 /* end of x86-64 code generator */
2258 /*************************************************************/
2259 #endif /* ! TARGET_DEFS_ONLY */
2260 /******************************************************/