2 * A64 code generator for TCC
4 * Copyright (c) 2014-2015 Edmund Grimley Evans
6 * Copying and distribution of this file, with or without modification,
7 * are permitted in any medium without royalty provided the copyright
8 * notice and this notice are preserved. This file is offered as-is,
9 * without any warranty.
12 #ifdef TARGET_DEFS_ONLY
14 // Number of registers available to allocator:
15 #define NB_REGS 28 // x0-x18, x30, v0-v7
17 #define TREG_R(x) (x) // x = 0..18
19 #define TREG_F(x) (x + 20) // x = 0..7
21 // Register classes sorted from more general to more precise:
22 #define RC_INT (1 << 0)
23 #define RC_FLOAT (1 << 1)
24 #define RC_R(x) (1 << (2 + (x))) // x = 0..18
25 #define RC_R30 (1 << 21)
26 #define RC_F(x) (1 << (22 + (x))) // x = 0..7
28 #define RC_IRET (RC_R(0)) // int return register class
29 #define RC_FRET (RC_F(0)) // float return register class
31 #define REG_IRET (TREG_R(0)) // int return register number
32 #define REG_FRET (TREG_F(0)) // float return register number
36 #define LDOUBLE_SIZE 16
37 #define LDOUBLE_ALIGN 16
41 #define CHAR_IS_UNSIGNED
43 /* define if return values need to be extended explicitely
44 at caller side (for interfacing with non-TCC compilers) */
46 /******************************************************/
47 #else /* ! TARGET_DEFS_ONLY */
48 /******************************************************/
53 ST_DATA
const int reg_classes
[NB_REGS
] = {
73 RC_R30
, // not in RC_INT as we make special use of x30
84 #if defined(CONFIG_TCC_BCHECK)
85 static addr_t func_bound_offset
;
86 static unsigned long func_bound_ind
;
87 ST_DATA
int func_bound_add_epilog
;
90 #define IS_FREG(x) ((x) >= TREG_F(0))
92 static uint32_t intr(int r
)
94 assert(TREG_R(0) <= r
&& r
<= TREG_R30
);
95 return r
< TREG_R30
? r
: 30;
98 static uint32_t fltr(int r
)
100 assert(TREG_F(0) <= r
&& r
<= TREG_F(7));
101 return r
- TREG_F(0);
104 // Add an instruction to text section:
105 ST_FUNC
void o(unsigned int c
)
110 if (ind1
> cur_text_section
->data_allocated
)
111 section_realloc(cur_text_section
, ind1
);
112 write32le(cur_text_section
->data
+ ind
, c
);
116 static int arm64_encode_bimm64(uint64_t x
)
126 if (x
>> 2 == (x
& (((uint64_t)1 << (64 - 2)) - 1)))
127 rep
= 2, x
&= ((uint64_t)1 << 2) - 1;
128 else if (x
>> 4 == (x
& (((uint64_t)1 << (64 - 4)) - 1)))
129 rep
= 4, x
&= ((uint64_t)1 << 4) - 1;
130 else if (x
>> 8 == (x
& (((uint64_t)1 << (64 - 8)) - 1)))
131 rep
= 8, x
&= ((uint64_t)1 << 8) - 1;
132 else if (x
>> 16 == (x
& (((uint64_t)1 << (64 - 16)) - 1)))
133 rep
= 16, x
&= ((uint64_t)1 << 16) - 1;
134 else if (x
>> 32 == (x
& (((uint64_t)1 << (64 - 32)) - 1)))
135 rep
= 32, x
&= ((uint64_t)1 << 32) - 1;
140 if (!(x
& (((uint64_t)1 << 32) - 1))) x
>>= 32, pos
+= 32;
141 if (!(x
& (((uint64_t)1 << 16) - 1))) x
>>= 16, pos
+= 16;
142 if (!(x
& (((uint64_t)1 << 8) - 1))) x
>>= 8, pos
+= 8;
143 if (!(x
& (((uint64_t)1 << 4) - 1))) x
>>= 4, pos
+= 4;
144 if (!(x
& (((uint64_t)1 << 2) - 1))) x
>>= 2, pos
+= 2;
145 if (!(x
& (((uint64_t)1 << 1) - 1))) x
>>= 1, pos
+= 1;
148 if (!(~x
& (((uint64_t)1 << 32) - 1))) x
>>= 32, len
+= 32;
149 if (!(~x
& (((uint64_t)1 << 16) - 1))) x
>>= 16, len
+= 16;
150 if (!(~x
& (((uint64_t)1 << 8) - 1))) x
>>= 8, len
+= 8;
151 if (!(~x
& (((uint64_t)1 << 4) - 1))) x
>>= 4, len
+= 4;
152 if (!(~x
& (((uint64_t)1 << 2) - 1))) x
>>= 2, len
+= 2;
153 if (!(~x
& (((uint64_t)1 << 1) - 1))) x
>>= 1, len
+= 1;
158 pos
= (pos
+ len
) & (rep
- 1);
161 return ((0x1000 & rep
<< 6) | (((rep
- 1) ^ 31) << 1 & 63) |
162 ((rep
- pos
) & (rep
- 1)) << 6 | (len
- 1));
165 static uint32_t arm64_movi(int r
, uint64_t x
)
170 return 0x52800000 | r
| x
<< 5; // movz w(r),#(x)
171 if (!(x
& ~(m
<< 16)))
172 return 0x52a00000 | r
| x
>> 11; // movz w(r),#(x >> 16),lsl #16
173 if (!(x
& ~(m
<< 32)))
174 return 0xd2c00000 | r
| x
>> 27; // movz x(r),#(x >> 32),lsl #32
175 if (!(x
& ~(m
<< 48)))
176 return 0xd2e00000 | r
| x
>> 43; // movz x(r),#(x >> 48),lsl #48
177 if ((x
& ~m
) == m
<< 16)
178 return (0x12800000 | r
|
179 (~x
<< 5 & 0x1fffe0)); // movn w(r),#(~x)
180 if ((x
& ~(m
<< 16)) == m
)
181 return (0x12a00000 | r
|
182 (~x
>> 11 & 0x1fffe0)); // movn w(r),#(~x >> 16),lsl #16
184 return (0x92800000 | r
|
185 (~x
<< 5 & 0x1fffe0)); // movn x(r),#(~x)
187 return (0x92a00000 | r
|
188 (~x
>> 11 & 0x1fffe0)); // movn x(r),#(~x >> 16),lsl #16
190 return (0x92c00000 | r
|
191 (~x
>> 27 & 0x1fffe0)); // movn x(r),#(~x >> 32),lsl #32
193 return (0x92e00000 | r
|
194 (~x
>> 43 & 0x1fffe0)); // movn x(r),#(~x >> 32),lsl #32
195 if (!(x
>> 32) && (e
= arm64_encode_bimm64(x
| x
<< 32)) >= 0)
196 return 0x320003e0 | r
| (uint32_t)e
<< 10; // movi w(r),#(x)
197 if ((e
= arm64_encode_bimm64(x
)) >= 0)
198 return 0xb20003e0 | r
| (uint32_t)e
<< 10; // movi x(r),#(x)
202 static void arm64_movimm(int r
, uint64_t x
)
205 if ((i
= arm64_movi(r
, x
)))
206 o(i
); // a single MOV
208 // MOVZ/MOVN and 1-3 MOVKs
210 uint32_t mov1
= 0xd2800000; // movz
212 for (i
= 0; i
< 64; i
+= 16) {
213 z
+= !(x
>> i
& 0xffff);
214 m
+= !(~x
>> i
& 0xffff);
218 mov1
= 0x92800000; // movn
220 for (i
= 0; i
< 64; i
+= 16)
221 if (x1
>> i
& 0xffff) {
222 o(mov1
| r
| (x1
>> i
& 0xffff) << 5 | i
<< 17);
223 // movz/movn x(r),#(*),lsl #(i)
226 for (i
+= 16; i
< 64; i
+= 16)
227 if (x1
>> i
& 0xffff)
228 o(0xf2800000 | r
| (x
>> i
& 0xffff) << 5 | i
<< 17);
229 // movk x(r),#(*),lsl #(i)
233 // Patch all branches in list pointed to by t to branch to a:
234 ST_FUNC
void gsym_addr(int t_
, int a_
)
239 unsigned char *ptr
= cur_text_section
->data
+ t
;
240 uint32_t next
= read32le(ptr
);
241 if (a
- t
+ 0x8000000 >= 0x10000000)
242 tcc_error("branch out of range");
243 write32le(ptr
, (a
- t
== 4 ? 0xd503201f : // nop
244 0x14000000 | ((a
- t
) >> 2 & 0x3ffffff))); // b
249 static int arm64_type_size(int t
)
252 * case values are in increasing order (from 1 to 11).
253 * which 'may' help compiler optimizers. See tcc.h
255 switch (t
& VT_BTYPE
) {
256 case VT_BYTE
: return 0;
257 case VT_SHORT
: return 1;
258 case VT_INT
: return 2;
259 case VT_LLONG
: return 3;
260 case VT_PTR
: return 3;
261 case VT_FUNC
: return 3;
262 case VT_STRUCT
: return 3;
263 case VT_FLOAT
: return 2;
264 case VT_DOUBLE
: return 3;
265 case VT_LDOUBLE
: return 4;
266 case VT_BOOL
: return 0;
272 static void arm64_spoff(int reg
, uint64_t off
)
274 uint32_t sub
= off
>> 63;
278 o(0x910003e0 | sub
<< 30 | reg
| off
<< 10);
279 // (add|sub) x(reg),sp,#(off)
281 arm64_movimm(30, off
); // use x30 for offset
282 o(0x8b3e63e0 | sub
<< 30 | reg
); // (add|sub) x(reg),sp,x30
286 static void arm64_ldrx(int sg
, int sz_
, int dst
, int bas
, uint64_t off
)
291 if (!(off
& ~((uint32_t)0xfff << sz
)))
292 o(0x39400000 | dst
| bas
<< 5 | off
<< (10 - sz
) |
293 (uint32_t)!!sg
<< 23 | sz
<< 30); // ldr(*) x(dst),[x(bas),#(off)]
294 else if (off
< 256 || -off
<= 256)
295 o(0x38400000 | dst
| bas
<< 5 | (off
& 511) << 12 |
296 (uint32_t)!!sg
<< 23 | sz
<< 30); // ldur(*) x(dst),[x(bas),#(off)]
298 arm64_movimm(30, off
); // use x30 for offset
299 o(0x38206800 | dst
| bas
<< 5 | (uint32_t)30 << 16 |
300 (uint32_t)(!!sg
+ 1) << 22 | sz
<< 30); // ldr(*) x(dst),[x(bas),x30]
304 static void arm64_ldrv(int sz_
, int dst
, int bas
, uint64_t off
)
307 if (!(off
& ~((uint32_t)0xfff << sz
)))
308 o(0x3d400000 | dst
| bas
<< 5 | off
<< (10 - sz
) |
309 (sz
& 4) << 21 | (sz
& 3) << 30); // ldr (s|d|q)(dst),[x(bas),#(off)]
310 else if (off
< 256 || -off
<= 256)
311 o(0x3c400000 | dst
| bas
<< 5 | (off
& 511) << 12 |
312 (sz
& 4) << 21 | (sz
& 3) << 30); // ldur (s|d|q)(dst),[x(bas),#(off)]
314 arm64_movimm(30, off
); // use x30 for offset
315 o(0x3c606800 | dst
| bas
<< 5 | (uint32_t)30 << 16 |
316 sz
<< 30 | (sz
& 4) << 21); // ldr (s|d|q)(dst),[x(bas),x30]
320 static void arm64_ldrs(int reg_
, int size
)
323 // Use x30 for intermediate value in some cases.
325 default: assert(0); break;
327 /* Can happen with zero size structs */
330 arm64_ldrx(0, 0, reg
, reg
, 0);
333 arm64_ldrx(0, 1, reg
, reg
, 0);
336 arm64_ldrx(0, 1, 30, reg
, 0);
337 arm64_ldrx(0, 0, reg
, reg
, 2);
338 o(0x2a0043c0 | reg
| reg
<< 16); // orr x(reg),x30,x(reg),lsl #16
341 arm64_ldrx(0, 2, reg
, reg
, 0);
344 arm64_ldrx(0, 2, 30, reg
, 0);
345 arm64_ldrx(0, 0, reg
, reg
, 4);
346 o(0xaa0083c0 | reg
| reg
<< 16); // orr x(reg),x30,x(reg),lsl #32
349 arm64_ldrx(0, 2, 30, reg
, 0);
350 arm64_ldrx(0, 1, reg
, reg
, 4);
351 o(0xaa0083c0 | reg
| reg
<< 16); // orr x(reg),x30,x(reg),lsl #32
354 arm64_ldrx(0, 2, 30, reg
, 0);
355 arm64_ldrx(0, 2, reg
, reg
, 3);
356 o(0x53087c00 | reg
| reg
<< 5); // lsr w(reg), w(reg), #8
357 o(0xaa0083c0 | reg
| reg
<< 16); // orr x(reg),x30,x(reg),lsl #32
360 arm64_ldrx(0, 3, reg
, reg
, 0);
363 arm64_ldrx(0, 0, reg
+ 1, reg
, 8);
364 arm64_ldrx(0, 3, reg
, reg
, 0);
367 arm64_ldrx(0, 1, reg
+ 1, reg
, 8);
368 arm64_ldrx(0, 3, reg
, reg
, 0);
371 arm64_ldrx(0, 2, reg
+ 1, reg
, 7);
372 o(0x53087c00 | (reg
+1) | (reg
+1) << 5); // lsr w(reg+1), w(reg+1), #8
373 arm64_ldrx(0, 3, reg
, reg
, 0);
376 arm64_ldrx(0, 2, reg
+ 1, reg
, 8);
377 arm64_ldrx(0, 3, reg
, reg
, 0);
380 arm64_ldrx(0, 3, reg
+ 1, reg
, 5);
381 o(0xd358fc00 | (reg
+1) | (reg
+1) << 5); // lsr x(reg+1), x(reg+1), #24
382 arm64_ldrx(0, 3, reg
, reg
, 0);
385 arm64_ldrx(0, 3, reg
+ 1, reg
, 6);
386 o(0xd350fc00 | (reg
+1) | (reg
+1) << 5); // lsr x(reg+1), x(reg+1), #16
387 arm64_ldrx(0, 3, reg
, reg
, 0);
390 arm64_ldrx(0, 3, reg
+ 1, reg
, 7);
391 o(0xd348fc00 | (reg
+1) | (reg
+1) << 5); // lsr x(reg+1), x(reg+1), #8
392 arm64_ldrx(0, 3, reg
, reg
, 0);
395 o(0xa9400000 | reg
| (reg
+1) << 10 | reg
<< 5);
396 // ldp x(reg),x(reg+1),[x(reg)]
401 static void arm64_strx(int sz_
, int dst
, int bas
, uint64_t off
)
404 if (!(off
& ~((uint32_t)0xfff << sz
)))
405 o(0x39000000 | dst
| bas
<< 5 | off
<< (10 - sz
) | sz
<< 30);
406 // str(*) x(dst),[x(bas],#(off)]
407 else if (off
< 256 || -off
<= 256)
408 o(0x38000000 | dst
| bas
<< 5 | (off
& 511) << 12 | sz
<< 30);
409 // stur(*) x(dst),[x(bas],#(off)]
411 arm64_movimm(30, off
); // use x30 for offset
412 o(0x38206800 | dst
| bas
<< 5 | (uint32_t)30 << 16 | sz
<< 30);
413 // str(*) x(dst),[x(bas),x30]
417 static void arm64_strv(int sz_
, int dst
, int bas
, uint64_t off
)
420 if (!(off
& ~((uint32_t)0xfff << sz
)))
421 o(0x3d000000 | dst
| bas
<< 5 | off
<< (10 - sz
) |
422 (sz
& 4) << 21 | (sz
& 3) << 30); // str (s|d|q)(dst),[x(bas),#(off)]
423 else if (off
< 256 || -off
<= 256)
424 o(0x3c000000 | dst
| bas
<< 5 | (off
& 511) << 12 |
425 (sz
& 4) << 21 | (sz
& 3) << 30); // stur (s|d|q)(dst),[x(bas),#(off)]
427 arm64_movimm(30, off
); // use x30 for offset
428 o(0x3c206800 | dst
| bas
<< 5 | (uint32_t)30 << 16 |
429 sz
<< 30 | (sz
& 4) << 21); // str (s|d|q)(dst),[x(bas),x30]
433 static void arm64_sym(int r
, Sym
*sym
, unsigned long addend
)
435 o(0x10000060 | r
); // adr xr,pc+12
436 o(0xf9400000 | r
| (r
<< 5)); // ldr xr,[xr]
437 o(0x14000003); // b + 8
438 greloca(cur_text_section
, sym
, ind
, R_AARCH64_ABS64
, addend
);
443 static void arm64_load_cmp(int r
, SValue
*sv
);
445 ST_FUNC
void load(int r
, SValue
*sv
)
447 int svtt
= sv
->type
.t
;
448 int svr
= sv
->r
& ~VT_BOUNDED
;
449 int svrv
= svr
& VT_VALMASK
;
450 uint64_t svcul
= (uint32_t)sv
->c
.i
;
451 svcul
= svcul
>> 31 & 1 ? svcul
- ((uint64_t)1 << 32) : svcul
;
453 if (svr
== (VT_LOCAL
| VT_LVAL
)) {
455 arm64_ldrv(arm64_type_size(svtt
), fltr(r
), 29, svcul
);
457 arm64_ldrx(!(svtt
& VT_UNSIGNED
), arm64_type_size(svtt
),
462 if (svr
== (VT_CONST
| VT_LVAL
)) {
463 arm64_sym(30, sv
->sym
, sv
->c
.i
); // use x30 for address
465 arm64_ldrv(arm64_type_size(svtt
), fltr(r
), 30, 0);
467 arm64_ldrx(!(svtt
& VT_UNSIGNED
), arm64_type_size(svtt
),
472 if ((svr
& ~VT_VALMASK
) == VT_LVAL
&& svrv
< VT_CONST
) {
473 if ((svtt
& VT_BTYPE
) != VT_VOID
) {
475 arm64_ldrv(arm64_type_size(svtt
), fltr(r
), intr(svrv
), 0);
477 arm64_ldrx(!(svtt
& VT_UNSIGNED
), arm64_type_size(svtt
),
478 intr(r
), intr(svrv
), 0);
483 if (svr
== (VT_CONST
| VT_LVAL
| VT_SYM
)) {
484 arm64_sym(30, sv
->sym
, svcul
); // use x30 for address
486 arm64_ldrv(arm64_type_size(svtt
), fltr(r
), 30, 0);
488 arm64_ldrx(!(svtt
& VT_UNSIGNED
), arm64_type_size(svtt
),
493 if (svr
== (VT_CONST
| VT_SYM
)) {
494 arm64_sym(intr(r
), sv
->sym
, svcul
);
498 if (svr
== VT_CONST
) {
499 if ((svtt
& VT_BTYPE
) != VT_VOID
)
500 arm64_movimm(intr(r
), arm64_type_size(svtt
) == 3 ?
501 sv
->c
.i
: (uint32_t)svcul
);
505 if (svr
< VT_CONST
) {
506 if (IS_FREG(r
) && IS_FREG(svr
))
507 if (svtt
== VT_LDOUBLE
)
508 o(0x4ea01c00 | fltr(r
) | fltr(svr
) << 5);
509 // mov v(r).16b,v(svr).16b
511 o(0x1e604000 | fltr(r
) | fltr(svr
) << 5); // fmov d(r),d(svr)
512 else if (!IS_FREG(r
) && !IS_FREG(svr
))
513 o(0xaa0003e0 | intr(r
) | intr(svr
) << 16); // mov x(r),x(svr)
519 if (svr
== VT_LOCAL
) {
521 o(0xd10003a0 | intr(r
) | -svcul
<< 10); // sub x(r),x29,#...
523 arm64_movimm(30, -svcul
); // use x30 for offset
524 o(0xcb0003a0 | intr(r
) | (uint32_t)30 << 16); // sub x(r),x29,x30
529 if (svr
== VT_JMP
|| svr
== VT_JMPI
) {
530 int t
= (svr
== VT_JMPI
);
531 arm64_movimm(intr(r
), t
);
532 o(0x14000002); // b .+8
534 arm64_movimm(intr(r
), t
^ 1);
538 if (svr
== (VT_LLOCAL
| VT_LVAL
)) {
539 arm64_ldrx(0, 3, 30, 29, svcul
); // use x30 for offset
541 arm64_ldrv(arm64_type_size(svtt
), fltr(r
), 30, 0);
543 arm64_ldrx(!(svtt
& VT_UNSIGNED
), arm64_type_size(svtt
),
549 arm64_load_cmp(r
, sv
);
553 printf("load(%x, (%x, %x, %llx))\n", r
, svtt
, sv
->r
, (long long)svcul
);
557 ST_FUNC
void store(int r
, SValue
*sv
)
559 int svtt
= sv
->type
.t
;
560 int svr
= sv
->r
& ~VT_BOUNDED
;
561 int svrv
= svr
& VT_VALMASK
;
562 uint64_t svcul
= (uint32_t)sv
->c
.i
;
563 svcul
= svcul
>> 31 & 1 ? svcul
- ((uint64_t)1 << 32) : svcul
;
565 if (svr
== (VT_LOCAL
| VT_LVAL
)) {
567 arm64_strv(arm64_type_size(svtt
), fltr(r
), 29, svcul
);
569 arm64_strx(arm64_type_size(svtt
), intr(r
), 29, svcul
);
573 if (svr
== (VT_CONST
| VT_LVAL
)) {
574 arm64_sym(30, sv
->sym
, sv
->c
.i
); // use x30 for address
576 arm64_strv(arm64_type_size(svtt
), fltr(r
), 30, 0);
578 arm64_strx(arm64_type_size(svtt
), intr(r
), 30, 0);
582 if ((svr
& ~VT_VALMASK
) == VT_LVAL
&& svrv
< VT_CONST
) {
584 arm64_strv(arm64_type_size(svtt
), fltr(r
), intr(svrv
), 0);
586 arm64_strx(arm64_type_size(svtt
), intr(r
), intr(svrv
), 0);
590 if (svr
== (VT_CONST
| VT_LVAL
| VT_SYM
)) {
591 arm64_sym(30, sv
->sym
, svcul
); // use x30 for address
593 arm64_strv(arm64_type_size(svtt
), fltr(r
), 30, 0);
595 arm64_strx(arm64_type_size(svtt
), intr(r
), 30, 0);
599 printf("store(%x, (%x, %x, %llx))\n", r
, svtt
, sv
->r
, (long long)svcul
);
603 static void arm64_gen_bl_or_b(int b
)
605 if ((vtop
->r
& (VT_VALMASK
| VT_LVAL
)) == VT_CONST
&& (vtop
->r
& VT_SYM
)) {
606 greloca(cur_text_section
, vtop
->sym
, ind
,
607 b
? R_AARCH64_JUMP26
: R_AARCH64_CALL26
, 0);
608 o(0x14000000 | (uint32_t)!b
<< 31); // b/bl .
611 #ifdef CONFIG_TCC_BCHECK
612 vtop
->r
&= ~VT_MUSTBOUND
;
614 o(0xd61f0000 | (uint32_t)!b
<< 21 | intr(gv(RC_R30
)) << 5); // br/blr
618 #if defined(CONFIG_TCC_BCHECK)
620 static void gen_bounds_call(int v
)
622 Sym
*sym
= external_global_sym(v
, &func_old_type
);
624 greloca(cur_text_section
, sym
, ind
, R_AARCH64_CALL26
, 0);
628 /* generate a bounded pointer addition */
629 ST_FUNC
void gen_bounded_ptr_add(void)
631 vpush_global_sym(&func_old_type
, TOK___bound_ptr_add
);
635 /* returned pointer is in REG_IRET */
636 vtop
->r
= REG_IRET
| VT_BOUNDED
;
639 /* relocation offset of the bounding function call point */
640 vtop
->c
.i
= (cur_text_section
->reloc
->data_offset
- sizeof(ElfW(Rela
)));
643 /* patch pointer addition in vtop so that pointer dereferencing is
645 ST_FUNC
void gen_bounded_ptr_deref(void)
655 size
= type_size(&vtop
->type
, &align
);
657 case 1: func
= TOK___bound_ptr_indir1
; break;
658 case 2: func
= TOK___bound_ptr_indir2
; break;
659 case 4: func
= TOK___bound_ptr_indir4
; break;
660 case 8: func
= TOK___bound_ptr_indir8
; break;
661 case 12: func
= TOK___bound_ptr_indir12
; break;
662 case 16: func
= TOK___bound_ptr_indir16
; break;
664 /* may happen with struct member access */
666 //tcc_error("unhandled size when dereferencing bounded pointer");
670 sym
= external_global_sym(func
, &func_old_type
);
672 put_extern_sym(sym
, NULL
, 0, 0);
673 /* patch relocation */
674 /* XXX: find a better solution ? */
675 rel
= (ElfW(Rela
) *)(cur_text_section
->reloc
->data
+ vtop
->c
.i
);
676 rel
->r_info
= ELF64_R_INFO(sym
->c
, ELF64_R_TYPE(rel
->r_info
));
679 static void gen_bounds_prolog(void)
681 /* leave some room for bound checking code */
682 func_bound_offset
= lbounds_section
->data_offset
;
683 func_bound_ind
= ind
;
684 func_bound_add_epilog
= 0;
685 o(0xd503201f); /* nop -> mov x0, lbound section pointer */
690 o(0xd503201f); /* nop -> call __bound_local_new */
693 static void gen_bounds_epilog(void)
698 int offset_modified
= func_bound_offset
!= lbounds_section
->data_offset
;
700 if (!offset_modified
&& !func_bound_add_epilog
)
703 /* add end of table info */
704 bounds_ptr
= section_ptr_add(lbounds_section
, sizeof(addr_t
));
707 sym_data
= get_sym_ref(&char_pointer_type
, lbounds_section
,
708 func_bound_offset
, lbounds_section
->data_offset
);
710 /* generate bound local allocation */
711 if (offset_modified
) {
713 ind
= func_bound_ind
;
714 o(0x10000060 | 0); // adr x0,pc+12
715 o(0xf9400000 | 0 | (0 << 5)); // ldr x0,[x0]
716 o(0x14000003); // b + 8
717 greloca(cur_text_section
, sym_data
, ind
, R_AARCH64_ABS64
, 0);
720 gen_bounds_call(TOK___bound_local_new
);
724 /* generate bound check local freeing */
725 o(0xf81f0fe0); /* str x0, [sp, #-16]! */
726 o(0x3c9f0fe0); /* str q0, [sp, #-16]! */
727 o(0x10000060 | 0); // adr x0,pc+12
728 o(0xf9400000 | 0 | (0 << 5)); // ldr x0,[x0]
729 o(0x14000003); // b + 8
730 greloca(cur_text_section
, sym_data
, ind
, R_AARCH64_ABS64
, 0);
733 gen_bounds_call(TOK___bound_local_delete
);
734 o(0x3cc107e0); /* ldr q0, [sp], #16 */
735 o(0xf84107e0); /* ldr x0, [sp], #16 */
739 static int arm64_hfa_aux(CType
*type
, int *fsize
, int num
)
741 if (is_float(type
->t
)) {
742 int a
, n
= type_size(type
, &a
);
743 if (num
>= 4 || (*fsize
&& *fsize
!= n
))
748 else if ((type
->t
& VT_BTYPE
) == VT_STRUCT
) {
749 int is_struct
= 0; // rather than union
751 for (field
= type
->ref
->next
; field
; field
= field
->next
)
758 for (field
= type
->ref
->next
; field
; field
= field
->next
) {
759 if (field
->c
!= (num
- num0
) * *fsize
)
761 num
= arm64_hfa_aux(&field
->type
, fsize
, num
);
765 if (type
->ref
->c
!= (num
- num0
) * *fsize
)
771 for (field
= type
->ref
->next
; field
; field
= field
->next
) {
772 int num1
= arm64_hfa_aux(&field
->type
, fsize
, num0
);
775 num
= num1
< num
? num
: num1
;
777 if (type
->ref
->c
!= (num
- num0
) * *fsize
)
782 else if ((type
->t
& VT_ARRAY
) && ((type
->t
& VT_BTYPE
) != VT_PTR
)) {
786 num1
= arm64_hfa_aux(&type
->ref
->type
, fsize
, num
);
787 if (num1
== -1 || (num1
!= num
&& type
->ref
->c
> 4))
789 num1
= num
+ type
->ref
->c
* (num1
- num
);
797 static int arm64_hfa(CType
*type
, unsigned *fsize
)
799 if ((type
->t
& VT_BTYPE
) == VT_STRUCT
||
800 ((type
->t
& VT_ARRAY
) && ((type
->t
& VT_BTYPE
) != VT_PTR
))) {
802 int n
= arm64_hfa_aux(type
, &sz
, 0);
803 if (0 < n
&& n
<= 4) {
812 static unsigned long arm64_pcs_aux(int n
, CType
**type
, unsigned long *a
)
814 int nx
= 0; // next integer register
815 int nv
= 0; // next vector register
816 unsigned long ns
= 32; // next stack offset
819 for (i
= 0; i
< n
; i
++) {
820 int hfa
= arm64_hfa(type
[i
], 0);
823 if ((type
[i
]->t
& VT_ARRAY
) ||
824 (type
[i
]->t
& VT_BTYPE
) == VT_FUNC
)
827 size
= type_size(type
[i
], &align
);
832 else if (size
> 16) {
833 // B.3: replace with pointer
835 a
[i
] = nx
++ << 1 | 1;
843 else if ((type
[i
]->t
& VT_BTYPE
) == VT_STRUCT
)
845 size
= (size
+ 7) & ~7;
848 if (is_float(type
[i
]->t
) && nv
< 8) {
849 a
[i
] = 16 + (nv
++ << 1);
854 if (hfa
&& nv
+ hfa
<= 8) {
855 a
[i
] = 16 + (nv
<< 1);
863 size
= (size
+ 7) & ~7;
867 if (hfa
|| (type
[i
]->t
& VT_BTYPE
) == VT_LDOUBLE
) {
869 ns
= (ns
+ align
- 1) & -align
;
873 if ((type
[i
]->t
& VT_BTYPE
) == VT_FLOAT
)
877 if (hfa
|| is_float(type
[i
]->t
)) {
884 if ((type
[i
]->t
& VT_BTYPE
) != VT_STRUCT
&& size
<= 8 && nx
< 8) {
894 if ((type
[i
]->t
& VT_BTYPE
) != VT_STRUCT
&& size
== 16 && nx
< 7) {
901 if ((type
[i
]->t
& VT_BTYPE
) == VT_STRUCT
&& size
<= (8 - nx
) * 8) {
903 nx
+= (size
+ 7) >> 3;
912 ns
= (ns
+ align
- 1) & -align
;
915 if ((type
[i
]->t
& VT_BTYPE
) == VT_STRUCT
) {
933 static unsigned long arm64_pcs(int n
, CType
**type
, unsigned long *a
)
938 if ((type
[0]->t
& VT_BTYPE
) == VT_VOID
)
941 arm64_pcs_aux(1, type
, a
);
942 assert(a
[0] == 0 || a
[0] == 1 || a
[0] == 16);
946 stack
= arm64_pcs_aux(n
, type
+ 1, a
+ 1);
950 for (i
= 0; i
<= n
; i
++) {
952 printf("arm64_pcs return: ");
954 printf("arm64_pcs arg %d: ", i
);
955 if (a
[i
] == (unsigned long)-1)
957 else if (a
[i
] == 1 && !i
)
958 printf("X8 pointer\n");
960 printf("X%lu%s\n", a
[i
] / 2, a
[i
] & 1 ? " pointer" : "");
962 printf("V%lu\n", a
[i
] / 2 - 8);
964 printf("stack %lu%s\n",
965 (a
[i
] - 32) & ~1, a
[i
] & 1 ? " pointer" : "");
972 ST_FUNC
void gfunc_call(int nb_args
)
976 unsigned long *a
, *a1
;
980 #ifdef CONFIG_TCC_BCHECK
981 if (tcc_state
->do_bounds_check
)
982 gbound_args(nb_args
);
985 return_type
= &vtop
[-nb_args
].type
.ref
->type
;
986 if ((return_type
->t
& VT_BTYPE
) == VT_STRUCT
)
989 t
= tcc_malloc((nb_args
+ 1) * sizeof(*t
));
990 a
= tcc_malloc((nb_args
+ 1) * sizeof(*a
));
991 a1
= tcc_malloc((nb_args
+ 1) * sizeof(*a1
));
994 for (i
= 0; i
< nb_args
; i
++)
995 t
[nb_args
- i
] = &vtop
[-i
].type
;
997 stack
= arm64_pcs(nb_args
, t
, a
);
999 // Allocate space for structs replaced by pointer:
1000 for (i
= nb_args
; i
; i
--)
1002 SValue
*arg
= &vtop
[i
- nb_args
];
1003 int align
, size
= type_size(&arg
->type
, &align
);
1004 assert((arg
->type
.t
& VT_BTYPE
) == VT_STRUCT
);
1005 stack
= (stack
+ align
- 1) & -align
;
1010 stack
= (stack
+ 15) >> 4 << 4;
1012 if (stack
>= 0x1000000) // 16Mb
1013 tcc_error("stack size too big %lu", stack
);
1015 o(0xd10003ff | (stack
& 0xfff) << 10); // sub sp,sp,#(n)
1017 o(0xd14003ff | (stack
>> 12) << 10);
1019 // First pass: set all values on stack
1020 for (i
= nb_args
; i
; i
--) {
1021 vpushv(vtop
- nb_args
+ i
);
1024 // struct replaced by pointer
1025 int r
= get_reg(RC_INT
);
1026 arm64_spoff(intr(r
), a1
[i
]);
1027 vset(&vtop
->type
, r
| VT_LVAL
, 0);
1032 r
= get_reg(RC_INT
);
1033 arm64_spoff(intr(r
), a1
[i
]);
1034 arm64_strx(3, intr(r
), 31, (a
[i
] - 32) >> 1 << 1);
1037 else if (a
[i
] >= 32) {
1039 if ((vtop
->type
.t
& VT_BTYPE
) == VT_STRUCT
) {
1040 int r
= get_reg(RC_INT
);
1041 arm64_spoff(intr(r
), a
[i
] - 32);
1042 vset(&vtop
->type
, r
| VT_LVAL
, 0);
1046 else if (is_float(vtop
->type
.t
)) {
1048 arm64_strv(arm64_type_size(vtop
[0].type
.t
),
1049 fltr(vtop
[0].r
), 31, a
[i
] - 32);
1053 arm64_strx(arm64_type_size(vtop
[0].type
.t
),
1054 intr(vtop
[0].r
), 31, a
[i
] - 32);
1061 // Second pass: assign values to registers
1062 for (i
= nb_args
; i
; i
--, vtop
--) {
1063 if (a
[i
] < 16 && !(a
[i
] & 1)) {
1064 // value in general-purpose registers
1065 if ((vtop
->type
.t
& VT_BTYPE
) == VT_STRUCT
) {
1066 int align
, size
= type_size(&vtop
->type
, &align
);
1067 vtop
->type
.t
= VT_PTR
;
1070 arm64_ldrs(a
[i
] / 2, size
);
1076 // struct replaced by pointer in register
1077 arm64_spoff(a
[i
] / 2, a1
[i
]);
1078 else if (a
[i
] < 32) {
1079 // value in floating-point registers
1080 if ((vtop
->type
.t
& VT_BTYPE
) == VT_STRUCT
) {
1081 uint32_t j
, sz
, n
= arm64_hfa(&vtop
->type
, &sz
);
1082 vtop
->type
.t
= VT_PTR
;
1085 for (j
= 0; j
< n
; j
++)
1087 (sz
& 16) << 19 | -(sz
& 8) << 27 | (sz
& 4) << 29 |
1088 (a
[i
] / 2 - 8 + j
) |
1089 j
<< 10); // ldr ([sdq])(*),[x30,#(j * sz)]
1092 gv(RC_F(a
[i
] / 2 - 8));
1096 if ((return_type
->t
& VT_BTYPE
) == VT_STRUCT
) {
1098 // indirect return: set x8 and discard the stack value
1103 // return in registers: keep the address for after the call
1108 arm64_gen_bl_or_b(0);
1111 o(0x910003ff | (stack
& 0xfff) << 10); // add sp,sp,#(n)
1113 o(0x914003ff | (stack
>> 12) << 10);
1116 int rt
= return_type
->t
;
1117 int bt
= rt
& VT_BTYPE
;
1118 if (bt
== VT_STRUCT
&& !(a
[0] & 1)) {
1119 // A struct was returned in registers, so write it out:
1123 int align
, size
= type_size(return_type
, &align
);
1126 o(0xa9000500); // stp x0,x1,[x8]
1128 arm64_strx(size
> 4 ? 3 : size
> 2 ? 2 : size
> 1, 0, 8, 0);
1131 else if (a
[0] == 16) {
1132 uint32_t j
, sz
, n
= arm64_hfa(return_type
, &sz
);
1133 for (j
= 0; j
< n
; j
++)
1135 (sz
& 16) << 19 | -(sz
& 8) << 27 | (sz
& 4) << 29 |
1136 (a
[i
] / 2 - 8 + j
) |
1137 j
<< 10); // str ([sdq])(*),[x8,#(j * sz)]
1147 static unsigned long arm64_func_va_list_stack
;
1148 static int arm64_func_va_list_gr_offs
;
1149 static int arm64_func_va_list_vr_offs
;
1150 static int arm64_func_sub_sp_offset
;
1152 ST_FUNC
void gfunc_prolog(Sym
*func_sym
)
1154 CType
*func_type
= &func_sym
->type
;
1161 func_vc
= 144; // offset of where x8 is stored
1163 for (sym
= func_type
->ref
; sym
; sym
= sym
->next
)
1165 t
= n
? tcc_malloc(n
* sizeof(*t
)) : NULL
;
1166 a
= n
? tcc_malloc(n
* sizeof(*a
)) : NULL
;
1168 for (sym
= func_type
->ref
; sym
; sym
= sym
->next
)
1169 t
[i
++] = &sym
->type
;
1171 arm64_func_va_list_stack
= arm64_pcs(n
- 1, t
, a
);
1173 o(0xa9b27bfd); // stp x29,x30,[sp,#-224]!
1174 o(0xad0087e0); // stp q0,q1,[sp,#16]
1175 o(0xad018fe2); // stp q2,q3,[sp,#48]
1176 o(0xad0297e4); // stp q4,q5,[sp,#80]
1177 o(0xad039fe6); // stp q6,q7,[sp,#112]
1178 o(0xa90923e8); // stp x8,x8,[sp,#144]
1179 o(0xa90a07e0); // stp x0,x1,[sp,#160]
1180 o(0xa90b0fe2); // stp x2,x3,[sp,#176]
1181 o(0xa90c17e4); // stp x4,x5,[sp,#192]
1182 o(0xa90d1fe6); // stp x6,x7,[sp,#208]
1184 arm64_func_va_list_gr_offs
= -64;
1185 arm64_func_va_list_vr_offs
= -128;
1187 for (i
= 1, sym
= func_type
->ref
->next
; sym
; i
++, sym
= sym
->next
) {
1188 int off
= (a
[i
] < 16 ? 160 + a
[i
] / 2 * 8 :
1189 a
[i
] < 32 ? 16 + (a
[i
] - 16) / 2 * 16 :
1190 224 + ((a
[i
] - 32) >> 1 << 1));
1191 sym_push(sym
->v
& ~SYM_FIELD
, &sym
->type
,
1192 (a
[i
] & 1 ? VT_LLOCAL
: VT_LOCAL
) | VT_LVAL
,
1196 int align
, size
= type_size(&sym
->type
, &align
);
1197 arm64_func_va_list_gr_offs
= (a
[i
] / 2 - 7 +
1198 (!(a
[i
] & 1) && size
> 8)) * 8;
1200 else if (a
[i
] < 32) {
1201 uint32_t hfa
= arm64_hfa(&sym
->type
, 0);
1202 arm64_func_va_list_vr_offs
= (a
[i
] / 2 - 16 +
1203 (hfa
? hfa
: 1)) * 16;
1206 // HFAs of float and double need to be written differently:
1207 if (16 <= a
[i
] && a
[i
] < 32 && (sym
->type
.t
& VT_BTYPE
) == VT_STRUCT
) {
1208 uint32_t j
, sz
, k
= arm64_hfa(&sym
->type
, &sz
);
1210 for (j
= 0; j
< k
; j
++) {
1211 o(0x3d0003e0 | -(sz
& 8) << 27 | (sz
& 4) << 29 |
1212 ((a
[i
] - 16) / 2 + j
) | (off
/ sz
+ j
) << 10);
1213 // str ([sdq])(*),[sp,#(j * sz)]
1221 o(0x910003fd); // mov x29,sp
1222 arm64_func_sub_sp_offset
= ind
;
1223 // In gfunc_epilog these will be replaced with code to decrement SP:
1224 o(0xd503201f); // nop
1225 o(0xd503201f); // nop
1227 #ifdef CONFIG_TCC_BCHECK
1228 if (tcc_state
->do_bounds_check
)
1229 gen_bounds_prolog();
1233 ST_FUNC
void gen_va_start(void)
1236 --vtop
; // we don't need the "arg"
1238 r
= intr(gv(RC_INT
));
1240 if (arm64_func_va_list_stack
) {
1241 //xx could use add (immediate) here
1242 arm64_movimm(30, arm64_func_va_list_stack
+ 224);
1243 o(0x8b1e03be); // add x30,x29,x30
1246 o(0x910383be); // add x30,x29,#224
1247 o(0xf900001e | r
<< 5); // str x30,[x(r)]
1249 if (arm64_func_va_list_gr_offs
) {
1250 if (arm64_func_va_list_stack
)
1251 o(0x910383be); // add x30,x29,#224
1252 o(0xf900041e | r
<< 5); // str x30,[x(r),#8]
1255 if (arm64_func_va_list_vr_offs
) {
1256 o(0x910243be); // add x30,x29,#144
1257 o(0xf900081e | r
<< 5); // str x30,[x(r),#16]
1260 arm64_movimm(30, arm64_func_va_list_gr_offs
);
1261 o(0xb900181e | r
<< 5); // str w30,[x(r),#24]
1263 arm64_movimm(30, arm64_func_va_list_vr_offs
);
1264 o(0xb9001c1e | r
<< 5); // str w30,[x(r),#28]
1269 ST_FUNC
void gen_va_arg(CType
*t
)
1271 int align
, size
= type_size(t
, &align
);
1272 unsigned fsize
, hfa
= arm64_hfa(t
, &fsize
);
1275 if (is_float(t
->t
)) {
1281 r0
= intr(gv(RC_INT
));
1282 r1
= get_reg(RC_INT
);
1283 vtop
[0].r
= r1
| VT_LVAL
;
1287 uint32_t n
= size
> 16 ? 8 : (size
+ 7) & -8;
1288 o(0xb940181e | r0
<< 5); // ldr w30,[x(r0),#24] // __gr_offs
1290 assert(0); // this path untested but needed for __uint128_t
1291 o(0x11003fde); // add w30,w30,#15
1292 o(0x121c6fde); // and w30,w30,#-16
1294 o(0x310003c0 | r1
| n
<< 10); // adds w(r1),w30,#(n)
1295 o(0x540000ad); // b.le .+20
1296 o(0xf9400000 | r1
| r0
<< 5); // ldr x(r1),[x(r0)] // __stack
1297 o(0x9100001e | r1
<< 5 | n
<< 10); // add x30,x(r1),#(n)
1298 o(0xf900001e | r0
<< 5); // str x30,[x(r0)] // __stack
1299 o(0x14000004); // b .+16
1300 o(0xb9001800 | r1
| r0
<< 5); // str w(r1),[x(r0),#24] // __gr_offs
1301 o(0xf9400400 | r1
| r0
<< 5); // ldr x(r1),[x(r0),#8] // __gr_top
1302 o(0x8b3ec000 | r1
| r1
<< 5); // add x(r1),x(r1),w30,sxtw
1304 o(0xf9400000 | r1
| r1
<< 5); // ldr x(r1),[x(r1)]
1307 uint32_t rsz
= hfa
<< 4;
1308 uint32_t ssz
= (size
+ 7) & -(uint32_t)8;
1310 o(0xb9401c1e | r0
<< 5); // ldr w30,[x(r0),#28] // __vr_offs
1311 o(0x310003c0 | r1
| rsz
<< 10); // adds w(r1),w30,#(rsz)
1312 b1
= ind
; o(0x5400000d); // b.le lab1
1313 o(0xf9400000 | r1
| r0
<< 5); // ldr x(r1),[x(r0)] // __stack
1315 o(0x91003c00 | r1
| r1
<< 5); // add x(r1),x(r1),#15
1316 o(0x927cec00 | r1
| r1
<< 5); // and x(r1),x(r1),#-16
1318 o(0x9100001e | r1
<< 5 | ssz
<< 10); // add x30,x(r1),#(ssz)
1319 o(0xf900001e | r0
<< 5); // str x30,[x(r0)] // __stack
1320 b2
= ind
; o(0x14000000); // b lab2
1322 write32le(cur_text_section
->data
+ b1
, 0x5400000d | (ind
- b1
) << 3);
1323 o(0xb9001c00 | r1
| r0
<< 5); // str w(r1),[x(r0),#28] // __vr_offs
1324 o(0xf9400800 | r1
| r0
<< 5); // ldr x(r1),[x(r0),#16] // __vr_top
1325 if (hfa
== 1 || fsize
== 16)
1326 o(0x8b3ec000 | r1
| r1
<< 5); // add x(r1),x(r1),w30,sxtw
1328 // We need to change the layout of this HFA.
1329 // Get some space on the stack using global variable "loc":
1330 loc
= (loc
- size
) & -(uint32_t)align
;
1331 o(0x8b3ec000 | 30 | r1
<< 5); // add x30,x(r1),w30,sxtw
1332 arm64_movimm(r1
, loc
);
1333 o(0x8b0003a0 | r1
| r1
<< 16); // add x(r1),x29,x(r1)
1334 o(0x4c402bdc | (uint32_t)fsize
<< 7 |
1335 (uint32_t)(hfa
== 2) << 15 |
1336 (uint32_t)(hfa
== 3) << 14); // ld1 {v28.(4s|2d),...},[x30]
1337 o(0x0d00801c | r1
<< 5 | (fsize
== 8) << 10 |
1338 (uint32_t)(hfa
!= 2) << 13 |
1339 (uint32_t)(hfa
!= 3) << 21); // st(hfa) {v28.(s|d),...}[0],[x(r1)]
1342 write32le(cur_text_section
->data
+ b2
, 0x14000000 | (ind
- b2
) >> 2);
1346 ST_FUNC
int gfunc_sret(CType
*vt
, int variadic
, CType
*ret
,
1347 int *align
, int *regsize
)
1352 ST_FUNC
void gfunc_return(CType
*func_type
)
1354 CType
*t
= func_type
;
1357 arm64_pcs(0, &t
, &a
);
1362 if ((func_type
->t
& VT_BTYPE
) == VT_STRUCT
) {
1363 int align
, size
= type_size(func_type
, &align
);
1366 arm64_ldrs(0, size
);
1372 CType type
= *func_type
;
1374 vset(&type
, VT_LOCAL
| VT_LVAL
, func_vc
);
1381 if ((func_type
->t
& VT_BTYPE
) == VT_STRUCT
) {
1382 uint32_t j
, sz
, n
= arm64_hfa(&vtop
->type
, &sz
);
1385 for (j
= 0; j
< n
; j
++)
1387 (sz
& 16) << 19 | -(sz
& 8) << 27 | (sz
& 4) << 29 |
1388 j
| j
<< 10); // ldr ([sdq])(*),[x0,#(j * sz)]
1399 ST_FUNC
void gfunc_epilog(void)
1401 #ifdef CONFIG_TCC_BCHECK
1402 if (tcc_state
->do_bounds_check
)
1403 gen_bounds_epilog();
1407 // Insert instructions to subtract size of stack frame from SP.
1408 unsigned char *ptr
= cur_text_section
->data
+ arm64_func_sub_sp_offset
;
1409 uint64_t diff
= (-loc
+ 15) & ~15;
1410 if (!(diff
>> 24)) {
1411 if (diff
& 0xfff) // sub sp,sp,#(diff & 0xfff)
1412 write32le(ptr
, 0xd10003ff | (diff
& 0xfff) << 10);
1413 if (diff
>> 12) // sub sp,sp,#(diff >> 12),lsl #12
1414 write32le(ptr
+ 4, 0xd14003ff | (diff
>> 12) << 10);
1417 // In this case we may subtract more than necessary,
1418 // but always less than 17/16 of what we were aiming for.
1421 while (diff
>> 20) {
1422 diff
= (diff
+ 0xffff) >> 16;
1425 while (diff
>> 16) {
1426 diff
= (diff
+ 1) >> 1;
1429 write32le(ptr
, 0xd2800010 | diff
<< 5 | i
<< 21);
1430 // mov x16,#(diff),lsl #(16 * i)
1431 write32le(ptr
+ 4, 0xcb3063ff | j
<< 10);
1432 // sub sp,sp,x16,lsl #(j)
1435 o(0x910003bf); // mov sp,x29
1436 o(0xa8ce7bfd); // ldp x29,x30,[sp],#224
1438 o(0xd65f03c0); // ret
1441 ST_FUNC
void gen_fill_nops(int bytes
)
1444 tcc_error("alignment of code section not multiple of 4");
1446 o(0xd503201f); // nop
1451 // Generate forward branch to label:
1452 ST_FUNC
int gjmp(int t
)
1461 // Generate branch to known address:
1462 ST_FUNC
void gjmp_addr(int a
)
1464 assert(a
- ind
+ 0x8000000 < 0x10000000);
1465 o(0x14000000 | ((a
- ind
) >> 2 & 0x3ffffff));
1468 ST_FUNC
int gjmp_append(int n
, int t
)
1471 /* insert vtop->c jump list in t */
1473 uint32_t n1
= n
, n2
;
1474 while ((n2
= read32le(p
= cur_text_section
->data
+ n1
)))
1482 void arm64_vset_VT_CMP(int op
)
1484 if (op
>= TOK_ULT
&& op
<= TOK_GT
) {
1485 vtop
->cmp_r
= vtop
->r
;
1490 static void arm64_gen_opil(int op
, uint32_t l
);
1492 static void arm64_load_cmp(int r
, SValue
*sv
)
1497 arm64_gen_opil('^', 0);
1505 ST_FUNC
int gjmp_cond(int op
, int t
)
1507 int bt
= vtop
->type
.t
& VT_BTYPE
;
1510 vtop
->r
= vtop
->cmp_r
;
1512 if (bt
== VT_LDOUBLE
) {
1513 uint32_t a
, b
, f
= fltr(gv(RC_FLOAT
));
1514 a
= get_reg(RC_INT
);
1517 b
= get_reg(RC_INT
);
1520 o(0x4e083c00 | a
| f
<< 5); // mov x(a),v(f).d[0]
1521 o(0x4e183c00 | b
| f
<< 5); // mov x(b),v(f).d[1]
1522 o(0xaa000400 | a
| a
<< 5 | b
<< 16); // orr x(a),x(a),x(b),lsl #1
1523 o(0xb4000040 | a
| !!inv
<< 24); // cbz/cbnz x(a),.+8
1526 else if (bt
== VT_FLOAT
|| bt
== VT_DOUBLE
) {
1527 uint32_t a
= fltr(gv(RC_FLOAT
));
1528 o(0x1e202008 | a
<< 5 | (bt
!= VT_FLOAT
) << 22); // fcmp
1529 o(0x54000040 | !!inv
); // b.eq/b.ne .+8
1532 uint32_t ll
= (bt
== VT_PTR
|| bt
== VT_LLONG
);
1533 uint32_t a
= intr(gv(RC_INT
));
1534 o(0x34000040 | a
| !!inv
<< 24 | ll
<< 31); // cbz/cbnz wA,.+8
1539 static int arm64_iconst(uint64_t *val
, SValue
*sv
)
1541 if ((sv
->r
& (VT_VALMASK
| VT_LVAL
| VT_SYM
)) != VT_CONST
)
1545 int bt
= t
& VT_BTYPE
;
1546 *val
= ((bt
== VT_LLONG
|| bt
== VT_PTR
) ? sv
->c
.i
:
1548 (t
& VT_UNSIGNED
? 0 : -(sv
->c
.i
& 0x80000000)));
1553 static int arm64_gen_opic(int op
, uint32_t l
, int rev
, uint64_t val
,
1554 uint32_t x
, uint32_t a
)
1556 if (op
== '-' && !rev
) {
1560 val
= l
? val
: (uint32_t)val
;
1565 uint32_t s
= l
? val
>> 63 : val
>> 31;
1566 val
= s
? -val
: val
;
1567 val
= l
? val
: (uint32_t)val
;
1568 if (!(val
& ~(uint64_t)0xfff))
1569 o(0x11000000 | l
<< 31 | s
<< 30 | x
| a
<< 5 | val
<< 10);
1570 else if (!(val
& ~(uint64_t)0xfff000))
1571 o(0x11400000 | l
<< 31 | s
<< 30 | x
| a
<< 5 | val
>> 12 << 10);
1573 arm64_movimm(30, val
); // use x30
1574 o(0x0b1e0000 | l
<< 31 | s
<< 30 | x
| a
<< 5);
1581 o(0x4b0003e0 | l
<< 31 | x
| a
<< 16); // neg
1582 else if (val
== (l
? (uint64_t)-1 : (uint32_t)-1))
1583 o(0x2a2003e0 | l
<< 31 | x
| a
<< 16); // mvn
1585 arm64_movimm(30, val
); // use x30
1586 o(0x4b0003c0 | l
<< 31 | x
| a
<< 16); // sub
1591 if (val
== -1 || (val
== 0xffffffff && !l
)) {
1592 o(0x2a2003e0 | l
<< 31 | x
| a
<< 16); // mvn
1598 int e
= arm64_encode_bimm64(l
? val
: val
| val
<< 32);
1601 o((op
== '&' ? 0x12000000 :
1602 op
== '|' ? 0x32000000 : 0x52000000) |
1603 l
<< 31 | x
| a
<< 5 | (uint32_t)e
<< 10);
1610 uint32_t n
= 32 << l
;
1611 val
= val
& (n
- 1);
1615 // tcc_warning("shift count >= width of type");
1616 o(0x2a0003e0 | l
<< 31 | a
<< 16);
1619 else if (op
== TOK_SHL
)
1620 o(0x53000000 | l
<< 31 | l
<< 22 | x
| a
<< 5 |
1621 (n
- val
) << 16 | (n
- 1 - val
) << 10); // lsl
1623 o(0x13000000 | (op
== TOK_SHR
) << 30 | l
<< 31 | l
<< 22 |
1624 x
| a
<< 5 | val
<< 16 | (n
- 1) << 10); // lsr/asr
1632 static void arm64_gen_opil(int op
, uint32_t l
)
1636 // Special treatment for operations with a constant operand:
1641 if (arm64_iconst(0, &vtop
[0])) {
1645 if (arm64_iconst(&val
, &vtop
[-1])) {
1647 a
= intr(vtop
[0].r
);
1649 x
= get_reg(RC_INT
);
1651 if (arm64_gen_opic(op
, l
, rev
, val
, intr(x
), a
)) {
1662 gv2(RC_INT
, RC_INT
);
1663 assert(vtop
[-1].r
< VT_CONST
&& vtop
[0].r
< VT_CONST
);
1664 a
= intr(vtop
[-1].r
);
1665 b
= intr(vtop
[0].r
);
1667 x
= get_reg(RC_INT
);
1674 // Use x30 for quotient:
1675 o(0x1ac00c00 | l
<< 31 | 30 | a
<< 5 | b
<< 16); // sdiv
1676 o(0x1b008000 | l
<< 31 | x
| (uint32_t)30 << 5 |
1677 b
<< 16 | a
<< 10); // msub
1680 o(0x0a000000 | l
<< 31 | x
| a
<< 5 | b
<< 16); // and
1683 o(0x1b007c00 | l
<< 31 | x
| a
<< 5 | b
<< 16); // mul
1686 o(0x0b000000 | l
<< 31 | x
| a
<< 5 | b
<< 16); // add
1689 o(0x4b000000 | l
<< 31 | x
| a
<< 5 | b
<< 16); // sub
1692 o(0x1ac00c00 | l
<< 31 | x
| a
<< 5 | b
<< 16); // sdiv
1695 o(0x4a000000 | l
<< 31 | x
| a
<< 5 | b
<< 16); // eor
1698 o(0x2a000000 | l
<< 31 | x
| a
<< 5 | b
<< 16); // orr
1701 o(0x6b00001f | l
<< 31 | a
<< 5 | b
<< 16); // cmp
1702 o(0x1a9f17e0 | x
); // cset wA,eq
1705 o(0x6b00001f | l
<< 31 | a
<< 5 | b
<< 16); // cmp
1706 o(0x1a9fb7e0 | x
); // cset wA,ge
1709 o(0x6b00001f | l
<< 31 | a
<< 5 | b
<< 16); // cmp
1710 o(0x1a9fd7e0 | x
); // cset wA,gt
1713 o(0x6b00001f | l
<< 31 | a
<< 5 | b
<< 16); // cmp
1714 o(0x1a9fc7e0 | x
); // cset wA,le
1717 o(0x6b00001f | l
<< 31 | a
<< 5 | b
<< 16); // cmp
1718 o(0x1a9fa7e0 | x
); // cset wA,lt
1721 o(0x6b00001f | l
<< 31 | a
<< 5 | b
<< 16); // cmp
1722 o(0x1a9f07e0 | x
); // cset wA,ne
1725 o(0x1ac02800 | l
<< 31 | x
| a
<< 5 | b
<< 16); // asr
1728 o(0x1ac02000 | l
<< 31 | x
| a
<< 5 | b
<< 16); // lsl
1731 o(0x1ac02400 | l
<< 31 | x
| a
<< 5 | b
<< 16); // lsr
1735 o(0x1ac00800 | l
<< 31 | x
| a
<< 5 | b
<< 16); // udiv
1738 o(0x6b00001f | l
<< 31 | a
<< 5 | b
<< 16); // cmp
1739 o(0x1a9f37e0 | x
); // cset wA,cs
1742 o(0x6b00001f | l
<< 31 | a
<< 5 | b
<< 16); // cmp
1743 o(0x1a9f97e0 | x
); // cset wA,hi
1746 o(0x6b00001f | l
<< 31 | a
<< 5 | b
<< 16); // cmp
1747 o(0x1a9f27e0 | x
); // cset wA,cc
1750 o(0x6b00001f | l
<< 31 | a
<< 5 | b
<< 16); // cmp
1751 o(0x1a9f87e0 | x
); // cset wA,ls
1754 // Use x30 for quotient:
1755 o(0x1ac00800 | l
<< 31 | 30 | a
<< 5 | b
<< 16); // udiv
1756 o(0x1b008000 | l
<< 31 | x
| (uint32_t)30 << 5 |
1757 b
<< 16 | a
<< 10); // msub
1764 ST_FUNC
void gen_opi(int op
)
1766 arm64_gen_opil(op
, 0);
1767 arm64_vset_VT_CMP(op
);
1770 ST_FUNC
void gen_opl(int op
)
1772 arm64_gen_opil(op
, 1);
1773 arm64_vset_VT_CMP(op
);
1776 ST_FUNC
void gen_opf(int op
)
1778 uint32_t x
, a
, b
, dbl
;
1780 if (vtop
[0].type
.t
== VT_LDOUBLE
) {
1781 CType type
= vtop
[0].type
;
1785 case '*': func
= TOK___multf3
; break;
1786 case '+': func
= TOK___addtf3
; break;
1787 case '-': func
= TOK___subtf3
; break;
1788 case '/': func
= TOK___divtf3
; break;
1789 case TOK_EQ
: func
= TOK___eqtf2
; cond
= 1; break;
1790 case TOK_NE
: func
= TOK___netf2
; cond
= 0; break;
1791 case TOK_LT
: func
= TOK___lttf2
; cond
= 10; break;
1792 case TOK_GE
: func
= TOK___getf2
; cond
= 11; break;
1793 case TOK_LE
: func
= TOK___letf2
; cond
= 12; break;
1794 case TOK_GT
: func
= TOK___gttf2
; cond
= 13; break;
1795 default: assert(0); break;
1797 vpush_global_sym(&func_old_type
, func
);
1801 vtop
->r
= cond
< 0 ? REG_FRET
: REG_IRET
;
1805 o(0x7100001f); // cmp w0,#0
1806 o(0x1a9f07e0 | (uint32_t)cond
<< 12); // cset w0,(cond)
1811 dbl
= vtop
[0].type
.t
!= VT_FLOAT
;
1812 gv2(RC_FLOAT
, RC_FLOAT
);
1813 assert(vtop
[-1].r
< VT_CONST
&& vtop
[0].r
< VT_CONST
);
1814 a
= fltr(vtop
[-1].r
);
1815 b
= fltr(vtop
[0].r
);
1818 case TOK_EQ
: case TOK_NE
:
1819 case TOK_LT
: case TOK_GE
: case TOK_LE
: case TOK_GT
:
1820 x
= get_reg(RC_INT
);
1826 x
= get_reg(RC_FLOAT
);
1835 o(0x1e200800 | dbl
<< 22 | x
| a
<< 5 | b
<< 16); // fmul
1838 o(0x1e202800 | dbl
<< 22 | x
| a
<< 5 | b
<< 16); // fadd
1841 o(0x1e203800 | dbl
<< 22 | x
| a
<< 5 | b
<< 16); // fsub
1844 o(0x1e201800 | dbl
<< 22 | x
| a
<< 5 | b
<< 16); // fdiv
1847 o(0x1e202000 | dbl
<< 22 | a
<< 5 | b
<< 16); // fcmp
1848 o(0x1a9f17e0 | x
); // cset w(x),eq
1851 o(0x1e202000 | dbl
<< 22 | a
<< 5 | b
<< 16); // fcmp
1852 o(0x1a9fb7e0 | x
); // cset w(x),ge
1855 o(0x1e202000 | dbl
<< 22 | a
<< 5 | b
<< 16); // fcmp
1856 o(0x1a9fd7e0 | x
); // cset w(x),gt
1859 o(0x1e202000 | dbl
<< 22 | a
<< 5 | b
<< 16); // fcmp
1860 o(0x1a9f87e0 | x
); // cset w(x),ls
1863 o(0x1e202000 | dbl
<< 22 | a
<< 5 | b
<< 16); // fcmp
1864 o(0x1a9f57e0 | x
); // cset w(x),mi
1867 o(0x1e202000 | dbl
<< 22 | a
<< 5 | b
<< 16); // fcmp
1868 o(0x1a9f07e0 | x
); // cset w(x),ne
1873 arm64_vset_VT_CMP(op
);
1876 // Generate sign extension from 32 to 64 bits:
1877 ST_FUNC
void gen_cvt_sxtw(void)
1879 uint32_t r
= intr(gv(RC_INT
));
1880 o(0x93407c00 | r
| r
<< 5); // sxtw x(r),w(r)
1883 /* char/short to int conversion */
1884 ST_FUNC
void gen_cvt_csti(int t
)
1886 int r
= intr(gv(RC_INT
));
1888 | ((t
& VT_BTYPE
) == VT_SHORT
) << 13
1889 | (uint32_t)!!(t
& VT_UNSIGNED
) << 30
1890 | r
| r
<< 5); // [su]xt[bh] w(r),w(r)
1893 ST_FUNC
void gen_cvt_itof(int t
)
1895 if (t
== VT_LDOUBLE
) {
1896 int f
= vtop
->type
.t
;
1897 int func
= (f
& VT_BTYPE
) == VT_LLONG
?
1898 (f
& VT_UNSIGNED
? TOK___floatunditf
: TOK___floatditf
) :
1899 (f
& VT_UNSIGNED
? TOK___floatunsitf
: TOK___floatsitf
);
1900 vpush_global_sym(&func_old_type
, func
);
1909 int d
, n
= intr(gv(RC_INT
));
1910 int s
= !(vtop
->type
.t
& VT_UNSIGNED
);
1911 uint32_t l
= ((vtop
->type
.t
& VT_BTYPE
) == VT_LLONG
);
1913 d
= get_reg(RC_FLOAT
);
1916 o(0x1e220000 | (uint32_t)!s
<< 16 |
1917 (uint32_t)(t
!= VT_FLOAT
) << 22 | fltr(d
) |
1918 l
<< 31 | n
<< 5); // [us]cvtf [sd](d),[wx](n)
1922 ST_FUNC
void gen_cvt_ftoi(int t
)
1924 if ((vtop
->type
.t
& VT_BTYPE
) == VT_LDOUBLE
) {
1925 int func
= (t
& VT_BTYPE
) == VT_LLONG
?
1926 (t
& VT_UNSIGNED
? TOK___fixunstfdi
: TOK___fixtfdi
) :
1927 (t
& VT_UNSIGNED
? TOK___fixunstfsi
: TOK___fixtfsi
);
1928 vpush_global_sym(&func_old_type
, func
);
1937 int d
, n
= fltr(gv(RC_FLOAT
));
1938 uint32_t l
= ((vtop
->type
.t
& VT_BTYPE
) != VT_FLOAT
);
1940 d
= get_reg(RC_INT
);
1944 (uint32_t)!!(t
& VT_UNSIGNED
) << 16 |
1945 (uint32_t)((t
& VT_BTYPE
) == VT_LLONG
) << 31 | intr(d
) |
1946 l
<< 22 | n
<< 5); // fcvtz[su] [wx](d),[sd](n)
1950 ST_FUNC
void gen_cvt_ftof(int t
)
1952 int f
= vtop
[0].type
.t
& VT_BTYPE
;
1953 assert(t
== VT_FLOAT
|| t
== VT_DOUBLE
|| t
== VT_LDOUBLE
);
1954 assert(f
== VT_FLOAT
|| f
== VT_DOUBLE
|| f
== VT_LDOUBLE
);
1958 if (t
== VT_LDOUBLE
|| f
== VT_LDOUBLE
) {
1959 int func
= (t
== VT_LDOUBLE
) ?
1960 (f
== VT_FLOAT
? TOK___extendsftf2
: TOK___extenddftf2
) :
1961 (t
== VT_FLOAT
? TOK___trunctfsf2
: TOK___trunctfdf2
);
1962 vpush_global_sym(&func_old_type
, func
);
1972 assert(vtop
[0].r
< VT_CONST
);
1973 a
= fltr(vtop
[0].r
);
1975 x
= get_reg(RC_FLOAT
);
1981 o(0x1e22c000 | x
| a
<< 5); // fcvt d(x),s(a)
1983 o(0x1e624000 | x
| a
<< 5); // fcvt s(x),d(a)
1987 ST_FUNC
void ggoto(void)
1989 arm64_gen_bl_or_b(1);
1993 ST_FUNC
void gen_clear_cache(void)
1995 uint32_t beg
, end
, dsz
, isz
, p
, lab1
, b1
;
1996 gv2(RC_INT
, RC_INT
);
1998 vtop
->r
= get_reg(RC_INT
);
2000 vtop
->r
= get_reg(RC_INT
);
2002 vtop
->r
= get_reg(RC_INT
);
2003 beg
= intr(vtop
[-4].r
); // x0
2004 end
= intr(vtop
[-3].r
); // x1
2005 dsz
= intr(vtop
[-2].r
); // x2
2006 isz
= intr(vtop
[-1].r
); // x3
2007 p
= intr(vtop
[0].r
); // x4
2010 o(0xd53b0020 | isz
); // mrs x(isz),ctr_el0
2011 o(0x52800080 | p
); // mov w(p),#4
2012 o(0x53104c00 | dsz
| isz
<< 5); // ubfx w(dsz),w(isz),#16,#4
2013 o(0x1ac02000 | dsz
| p
<< 5 | dsz
<< 16); // lsl w(dsz),w(p),w(dsz)
2014 o(0x12000c00 | isz
| isz
<< 5); // and w(isz),w(isz),#15
2015 o(0x1ac02000 | isz
| p
<< 5 | isz
<< 16); // lsl w(isz),w(p),w(isz)
2016 o(0x51000400 | p
| dsz
<< 5); // sub w(p),w(dsz),#1
2017 o(0x8a240004 | p
| beg
<< 5 | p
<< 16); // bic x(p),x(beg),x(p)
2018 b1
= ind
; o(0x14000000); // b
2020 o(0xd50b7b20 | p
); // dc cvau,x(p)
2021 o(0x8b000000 | p
| p
<< 5 | dsz
<< 16); // add x(p),x(p),x(dsz)
2022 write32le(cur_text_section
->data
+ b1
, 0x14000000 | (ind
- b1
) >> 2);
2023 o(0xeb00001f | p
<< 5 | end
<< 16); // cmp x(p),x(end)
2024 o(0x54ffffa3 | ((lab1
- ind
) << 3 & 0xffffe0)); // b.cc lab1
2025 o(0xd5033b9f); // dsb ish
2026 o(0x51000400 | p
| isz
<< 5); // sub w(p),w(isz),#1
2027 o(0x8a240004 | p
| beg
<< 5 | p
<< 16); // bic x(p),x(beg),x(p)
2028 b1
= ind
; o(0x14000000); // b
2030 o(0xd50b7520 | p
); // ic ivau,x(p)
2031 o(0x8b000000 | p
| p
<< 5 | isz
<< 16); // add x(p),x(p),x(isz)
2032 write32le(cur_text_section
->data
+ b1
, 0x14000000 | (ind
- b1
) >> 2);
2033 o(0xeb00001f | p
<< 5 | end
<< 16); // cmp x(p),x(end)
2034 o(0x54ffffa3 | ((lab1
- ind
) << 3 & 0xffffe0)); // b.cc lab1
2035 o(0xd5033b9f); // dsb ish
2036 o(0xd5033fdf); // isb
2039 ST_FUNC
void gen_vla_sp_save(int addr
) {
2040 uint32_t r
= intr(get_reg(RC_INT
));
2041 o(0x910003e0 | r
); // mov x(r),sp
2042 arm64_strx(3, r
, 29, addr
);
2045 ST_FUNC
void gen_vla_sp_restore(int addr
) {
2046 // Use x30 because this function can be called when there
2047 // is a live return value in x0 but there is nothing on
2048 // the value stack to prevent get_reg from returning x0.
2050 arm64_ldrx(0, 3, r
, 29, addr
);
2051 o(0x9100001f | r
<< 5); // mov sp,x(r)
2054 ST_FUNC
void gen_vla_alloc(CType
*type
, int align
) {
2056 #if defined(CONFIG_TCC_BCHECK)
2057 if (tcc_state
->do_bounds_check
)
2060 r
= intr(gv(RC_INT
));
2061 o(0x91003c00 | r
| r
<< 5); // add x(r),x(r),#15
2062 o(0x927cec00 | r
| r
<< 5); // bic x(r),x(r),#15
2063 o(0xcb2063ff | r
<< 16); // sub sp,sp,x(r)
2065 #if defined(CONFIG_TCC_BCHECK)
2066 if (tcc_state
->do_bounds_check
) {
2068 vtop
->r
= TREG_R(0);
2069 o(0x910003e0 | vtop
->r
); // mov r0,sp
2071 vpush_global_sym(&func_old_type
, TOK___bound_new_region
);
2074 func_bound_add_epilog
= 1;
2079 /* end of A64 code generator */
2080 /*************************************************************/
2082 /*************************************************************/