2 * ARMv4 code generator for TCC
4 * Copyright (c) 2003 Daniel Glöckner
5 * Copyright (c) 2012 Thomas Preud'homme
7 * Based on i386-gen.c by Fabrice Bellard
9 * This library is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU Lesser General Public
11 * License as published by the Free Software Foundation; either
12 * version 2 of the License, or (at your option) any later version.
14 * This library is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * Lesser General Public License for more details.
19 * You should have received a copy of the GNU Lesser General Public
20 * License along with this library; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
24 #ifdef TARGET_DEFS_ONLY
26 #if defined(TCC_ARM_EABI) && !defined(TCC_ARM_VFP)
27 #error "Currently TinyCC only supports float computation with VFP instructions"
30 /* number of available registers */
37 #ifndef TCC_ARM_VERSION
38 # define TCC_ARM_VERSION 5
41 /* a register can belong to several classes. The classes must be
42 sorted from more general to more precise (see gv2() code which does
43 assumptions on it). */
44 #define RC_INT 0x0001 /* generic integer register */
45 #define RC_FLOAT 0x0002 /* generic float register */
61 #define RC_IRET RC_R0 /* function return: integer register */
62 #define RC_LRET RC_R1 /* function return: second integer register */
63 #define RC_FRET RC_F0 /* function return: float register */
65 /* pretty names for the registers */
85 #define T2CPR(t) (((t) & VT_BTYPE) != VT_FLOAT ? 0x100 : 0)
88 /* return registers for function */
89 #define REG_IRET TREG_R0 /* single word int return register */
90 #define REG_LRET TREG_R1 /* second word return register (for long long) */
91 #define REG_FRET TREG_F0 /* float return register */
94 #define TOK___divdi3 TOK___aeabi_ldivmod
95 #define TOK___moddi3 TOK___aeabi_ldivmod
96 #define TOK___udivdi3 TOK___aeabi_uldivmod
97 #define TOK___umoddi3 TOK___aeabi_uldivmod
100 /* defined if function parameters must be evaluated in reverse order */
101 #define INVERT_FUNC_PARAMS
103 /* defined if structures are passed as pointers. Otherwise structures
104 are directly pushed on stack. */
105 /* #define FUNC_STRUCT_PARAM_AS_PTR */
107 /* pointer size, in bytes */
110 /* long double size and alignment, in bytes */
112 #define LDOUBLE_SIZE 8
116 #define LDOUBLE_SIZE 8
120 #define LDOUBLE_ALIGN 8
122 #define LDOUBLE_ALIGN 4
125 /* maximum alignment (for aligned attribute support) */
128 #define CHAR_IS_UNSIGNED
130 /******************************************************/
133 #define EM_TCC_TARGET EM_ARM
135 /* relocation type for 32 bit data relocation */
136 #define R_DATA_32 R_ARM_ABS32
137 #define R_DATA_PTR R_ARM_ABS32
138 #define R_JMP_SLOT R_ARM_JUMP_SLOT
139 #define R_COPY R_ARM_COPY
141 #define ELF_START_ADDR 0x00008000
142 #define ELF_PAGE_SIZE 0x1000
149 /******************************************************/
150 #else /* ! TARGET_DEFS_ONLY */
151 /******************************************************/
154 enum float_abi float_abi
;
156 ST_DATA
const int reg_classes
[NB_REGS
] = {
157 /* r0 */ RC_INT
| RC_R0
,
158 /* r1 */ RC_INT
| RC_R1
,
159 /* r2 */ RC_INT
| RC_R2
,
160 /* r3 */ RC_INT
| RC_R3
,
161 /* r12 */ RC_INT
| RC_R12
,
162 /* f0 */ RC_FLOAT
| RC_F0
,
163 /* f1 */ RC_FLOAT
| RC_F1
,
164 /* f2 */ RC_FLOAT
| RC_F2
,
165 /* f3 */ RC_FLOAT
| RC_F3
,
167 /* d4/s8 */ RC_FLOAT
| RC_F4
,
168 /* d5/s10 */ RC_FLOAT
| RC_F5
,
169 /* d6/s12 */ RC_FLOAT
| RC_F6
,
170 /* d7/s14 */ RC_FLOAT
| RC_F7
,
174 static int func_sub_sp_offset
, last_itod_magic
;
177 #if defined(TCC_ARM_EABI) && defined(TCC_ARM_VFP)
178 static CType float_type
, double_type
, func_float_type
, func_double_type
;
179 ST_FUNC
void arm_init(struct TCCState
*s
)
181 float_type
.t
= VT_FLOAT
;
182 double_type
.t
= VT_DOUBLE
;
183 func_float_type
.t
= VT_FUNC
;
184 func_float_type
.ref
= sym_push(SYM_FIELD
, &float_type
, FUNC_CDECL
, FUNC_OLD
);
185 func_double_type
.t
= VT_FUNC
;
186 func_double_type
.ref
= sym_push(SYM_FIELD
, &double_type
, FUNC_CDECL
, FUNC_OLD
);
188 float_abi
= s
->float_abi
;
189 #ifndef TCC_ARM_HARDFLOAT
190 tcc_warning("soft float ABI currently not supported: default to softfp");
194 #define func_float_type func_old_type
195 #define func_double_type func_old_type
196 #define func_ldouble_type func_old_type
197 ST_FUNC
void arm_init(struct TCCState
*s
)
199 #if !defined (TCC_ARM_VFP)
200 tcc_warning("Support for FPA is deprecated and will be removed in next"
203 #if !defined (TCC_ARM_EABI)
204 tcc_warning("Support for OABI is deprecated and will be removed in next"
210 static int two2mask(int a
,int b
) {
211 return (reg_classes
[a
]|reg_classes
[b
])&~(RC_INT
|RC_FLOAT
);
214 static int regmask(int r
) {
215 return reg_classes
[r
]&~(RC_INT
|RC_FLOAT
);
218 /******************************************************/
221 char *default_elfinterp(struct TCCState
*s
)
223 if (s
->float_abi
== ARM_HARD_FLOAT
)
224 return "/lib/ld-linux-armhf.so.3";
226 return "/lib/ld-linux.so.3";
232 /* this is a good place to start adding big-endian support*/
236 if (!cur_text_section
)
237 tcc_error("compiler error! This happens f.ex. if the compiler\n"
238 "can't evaluate constant expressions outside of a function.");
239 if (ind1
> cur_text_section
->data_allocated
)
240 section_realloc(cur_text_section
, ind1
);
241 cur_text_section
->data
[ind
++] = i
&255;
243 cur_text_section
->data
[ind
++] = i
&255;
245 cur_text_section
->data
[ind
++] = i
&255;
247 cur_text_section
->data
[ind
++] = i
;
250 static uint32_t stuff_const(uint32_t op
, uint32_t c
)
253 uint32_t nc
= 0, negop
= 0;
263 case 0x1A00000: //mov
264 case 0x1E00000: //mvn
271 return (op
&0xF010F000)|((op
>>16)&0xF)|0x1E00000;
275 return (op
&0xF010F000)|((op
>>16)&0xF)|0x1A00000;
276 case 0x1C00000: //bic
281 case 0x1800000: //orr
283 return (op
&0xFFF0FFFF)|0x1E00000;
289 if(c
<256) /* catch undefined <<32 */
292 m
=(0xff>>i
)|(0xff<<(32-i
));
294 return op
|(i
<<7)|(c
<<i
)|(c
>>(32-i
));
304 void stuff_const_harder(uint32_t op
, uint32_t v
) {
310 uint32_t a
[16], nv
, no
, o2
, n2
;
313 o2
=(op
&0xfff0ffff)|((op
&0xf000)<<4);;
315 a
[i
]=(a
[i
-1]>>2)|(a
[i
-1]<<30);
317 for(j
=i
<4?i
+12:15;j
>=i
+4;j
--)
318 if((v
&(a
[i
]|a
[j
]))==v
) {
319 o(stuff_const(op
,v
&a
[i
]));
320 o(stuff_const(o2
,v
&a
[j
]));
327 for(j
=i
<4?i
+12:15;j
>=i
+4;j
--)
328 if((nv
&(a
[i
]|a
[j
]))==nv
) {
329 o(stuff_const(no
,nv
&a
[i
]));
330 o(stuff_const(n2
,nv
&a
[j
]));
335 for(k
=i
<4?i
+12:15;k
>=j
+4;k
--)
336 if((v
&(a
[i
]|a
[j
]|a
[k
]))==v
) {
337 o(stuff_const(op
,v
&a
[i
]));
338 o(stuff_const(o2
,v
&a
[j
]));
339 o(stuff_const(o2
,v
&a
[k
]));
346 for(k
=i
<4?i
+12:15;k
>=j
+4;k
--)
347 if((nv
&(a
[i
]|a
[j
]|a
[k
]))==nv
) {
348 o(stuff_const(no
,nv
&a
[i
]));
349 o(stuff_const(n2
,nv
&a
[j
]));
350 o(stuff_const(n2
,nv
&a
[k
]));
353 o(stuff_const(op
,v
&a
[0]));
354 o(stuff_const(o2
,v
&a
[4]));
355 o(stuff_const(o2
,v
&a
[8]));
356 o(stuff_const(o2
,v
&a
[12]));
360 ST_FUNC
uint32_t encbranch(int pos
, int addr
, int fail
)
364 if(addr
>=0x1000000 || addr
<-0x1000000) {
366 tcc_error("FIXME: function bigger than 32MB");
369 return 0x0A000000|(addr
&0xffffff);
372 int decbranch(int pos
)
375 x
=*(uint32_t *)(cur_text_section
->data
+ pos
);
382 /* output a symbol and patch all calls to it */
383 void gsym_addr(int t
, int a
)
388 x
=(uint32_t *)(cur_text_section
->data
+ t
);
391 *x
=0xE1A00000; // nop
394 *x
|= encbranch(lt
,a
,1);
405 static uint32_t vfpr(int r
)
407 if(r
<TREG_F0
|| r
>TREG_F7
)
408 tcc_error("compiler error! register %i is no vfp register",r
);
412 static uint32_t fpr(int r
)
414 if(r
<TREG_F0
|| r
>TREG_F3
)
415 tcc_error("compiler error! register %i is no fpa register",r
);
420 static uint32_t intr(int r
)
424 if((r
<0 || r
>4) && r
!=14)
425 tcc_error("compiler error! register %i is no int register",r
);
429 static void calcaddr(uint32_t *base
, int *off
, int *sgn
, int maxoff
, unsigned shift
)
431 if(*off
>maxoff
|| *off
&((1<<shift
)-1)) {
438 y
=stuff_const(x
,*off
&~maxoff
);
444 y
=stuff_const(x
,(*off
+maxoff
)&~maxoff
);
448 *off
=((*off
+maxoff
)&~maxoff
)-*off
;
451 stuff_const_harder(x
,*off
&~maxoff
);
456 static uint32_t mapcc(int cc
)
461 return 0x30000000; /* CC/LO */
463 return 0x20000000; /* CS/HS */
465 return 0x00000000; /* EQ */
467 return 0x10000000; /* NE */
469 return 0x90000000; /* LS */
471 return 0x80000000; /* HI */
473 return 0x40000000; /* MI */
475 return 0x50000000; /* PL */
477 return 0xB0000000; /* LT */
479 return 0xA0000000; /* GE */
481 return 0xD0000000; /* LE */
483 return 0xC0000000; /* GT */
485 tcc_error("unexpected condition code");
486 return 0xE0000000; /* AL */
489 static int negcc(int cc
)
518 tcc_error("unexpected condition code");
522 /* load 'r' from value 'sv' */
523 void load(int r
, SValue
*sv
)
525 int v
, ft
, fc
, fr
, sign
;
542 uint32_t base
= 0xB; // fp
545 v1
.r
= VT_LOCAL
| VT_LVAL
;
547 load(base
=14 /* lr */, &v1
);
550 } else if(v
== VT_CONST
) {
558 } else if(v
< VT_CONST
) {
565 calcaddr(&base
,&fc
,&sign
,1020,2);
567 op
=0xED100A00; /* flds */
570 if ((ft
& VT_BTYPE
) != VT_FLOAT
)
571 op
|=0x100; /* flds -> fldd */
572 o(op
|(vfpr(r
)<<12)|(fc
>>2)|(base
<<16));
577 #if LDOUBLE_SIZE == 8
578 if ((ft
& VT_BTYPE
) != VT_FLOAT
)
581 if ((ft
& VT_BTYPE
) == VT_DOUBLE
)
583 else if ((ft
& VT_BTYPE
) == VT_LDOUBLE
)
586 o(op
|(fpr(r
)<<12)|(fc
>>2)|(base
<<16));
588 } else if((ft
& (VT_BTYPE
|VT_UNSIGNED
)) == VT_BYTE
589 || (ft
& VT_BTYPE
) == VT_SHORT
) {
590 calcaddr(&base
,&fc
,&sign
,255,0);
592 if ((ft
& VT_BTYPE
) == VT_SHORT
)
594 if ((ft
& VT_UNSIGNED
) == 0)
598 o(op
|(intr(r
)<<12)|(base
<<16)|((fc
&0xf0)<<4)|(fc
&0xf));
600 calcaddr(&base
,&fc
,&sign
,4095,0);
604 if ((ft
& VT_BTYPE
) == VT_BYTE
|| (ft
& VT_BTYPE
) == VT_BOOL
)
606 o(op
|(intr(r
)<<12)|fc
|(base
<<16));
612 op
=stuff_const(0xE3A00000|(intr(r
)<<12),sv
->c
.ul
);
613 if (fr
& VT_SYM
|| !op
) {
614 o(0xE59F0000|(intr(r
)<<12));
617 greloc(cur_text_section
, sv
->sym
, ind
, R_ARM_ABS32
);
622 } else if (v
== VT_LOCAL
) {
623 op
=stuff_const(0xE28B0000|(intr(r
)<<12),sv
->c
.ul
);
624 if (fr
& VT_SYM
|| !op
) {
625 o(0xE59F0000|(intr(r
)<<12));
627 if(fr
& VT_SYM
) // needed ?
628 greloc(cur_text_section
, sv
->sym
, ind
, R_ARM_ABS32
);
630 o(0xE08B0000|(intr(r
)<<12)|intr(r
));
634 } else if(v
== VT_CMP
) {
635 o(mapcc(sv
->c
.ul
)|0x3A00001|(intr(r
)<<12));
636 o(mapcc(negcc(sv
->c
.ul
))|0x3A00000|(intr(r
)<<12));
638 } else if (v
== VT_JMP
|| v
== VT_JMPI
) {
641 o(0xE3A00000|(intr(r
)<<12)|t
);
644 o(0xE3A00000|(intr(r
)<<12)|(t
^1));
646 } else if (v
< VT_CONST
) {
649 o(0xEEB00A40|(vfpr(r
)<<12)|vfpr(v
)|T2CPR(ft
)); /* fcpyX */
651 o(0xEE008180|(fpr(r
)<<12)|fpr(v
));
654 o(0xE1A00000|(intr(r
)<<12)|intr(v
));
658 tcc_error("load unimplemented!");
661 /* store register 'r' in lvalue 'v' */
662 void store(int r
, SValue
*sv
)
665 int v
, ft
, fc
, fr
, sign
;
680 if (fr
& VT_LVAL
|| fr
== VT_LOCAL
) {
686 } else if(v
== VT_CONST
) {
697 calcaddr(&base
,&fc
,&sign
,1020,2);
699 op
=0xED000A00; /* fsts */
702 if ((ft
& VT_BTYPE
) != VT_FLOAT
)
703 op
|=0x100; /* fsts -> fstd */
704 o(op
|(vfpr(r
)<<12)|(fc
>>2)|(base
<<16));
709 #if LDOUBLE_SIZE == 8
710 if ((ft
& VT_BTYPE
) != VT_FLOAT
)
713 if ((ft
& VT_BTYPE
) == VT_DOUBLE
)
715 if ((ft
& VT_BTYPE
) == VT_LDOUBLE
)
718 o(op
|(fpr(r
)<<12)|(fc
>>2)|(base
<<16));
721 } else if((ft
& VT_BTYPE
) == VT_SHORT
) {
722 calcaddr(&base
,&fc
,&sign
,255,0);
726 o(op
|(intr(r
)<<12)|(base
<<16)|((fc
&0xf0)<<4)|(fc
&0xf));
728 calcaddr(&base
,&fc
,&sign
,4095,0);
732 if ((ft
& VT_BTYPE
) == VT_BYTE
|| (ft
& VT_BTYPE
) == VT_BOOL
)
734 o(op
|(intr(r
)<<12)|fc
|(base
<<16));
739 tcc_error("store unimplemented");
742 static void gadd_sp(int val
)
744 stuff_const_harder(0xE28DD000,val
);
747 /* 'is_jmp' is '1' if it is a jump */
748 static void gcall_or_jmp(int is_jmp
)
751 if ((vtop
->r
& (VT_VALMASK
| VT_LVAL
)) == VT_CONST
) {
754 x
=encbranch(ind
,ind
+vtop
->c
.ul
,0);
756 if (vtop
->r
& VT_SYM
) {
757 /* relocation case */
758 greloc(cur_text_section
, vtop
->sym
, ind
, R_ARM_PC24
);
760 put_elf_reloc(symtab_section
, cur_text_section
, ind
, R_ARM_PC24
, 0);
761 o(x
|(is_jmp
?0xE0000000:0xE1000000));
764 o(0xE28FE004); // add lr,pc,#4
765 o(0xE51FF004); // ldr pc,[pc,#-4]
766 if (vtop
->r
& VT_SYM
)
767 greloc(cur_text_section
, vtop
->sym
, ind
, R_ARM_ABS32
);
771 /* otherwise, indirect call */
774 o(0xE1A0E00F); // mov lr,pc
775 o(0xE1A0F000|intr(r
)); // mov pc,r
779 /* Return whether a structure is an homogeneous float aggregate or not.
780 The answer is true if all the elements of the structure are of the same
781 primitive float type and there is less than 4 elements.
783 type: the type corresponding to the structure to be tested */
784 static int is_hgen_float_aggr(CType
*type
)
786 if ((type
->t
& VT_BTYPE
) == VT_STRUCT
) {
788 int btype
, nb_fields
= 0;
790 ref
= type
->ref
->next
;
791 btype
= ref
->type
.t
& VT_BTYPE
;
792 if (btype
== VT_FLOAT
|| btype
== VT_DOUBLE
) {
793 for(; ref
&& btype
== (ref
->type
.t
& VT_BTYPE
); ref
= ref
->next
, nb_fields
++);
794 return !ref
&& nb_fields
<= 4;
801 signed char avail
[3]; /* 3 holes max with only float and double alignments */
802 int first_hole
; /* first available hole */
803 int last_hole
; /* last available hole (none if equal to first_hole) */
804 int first_free_reg
; /* next free register in the sequence, hole excluded */
807 #define AVAIL_REGS_INITIALIZER (struct avail_regs) { { 0, 0, 0}, 0, 0, 0 }
809 /* Find suitable registers for a VFP Co-Processor Register Candidate (VFP CPRC
810 param) according to the rules described in the procedure call standard for
811 the ARM architecture (AAPCS). If found, the registers are assigned to this
812 VFP CPRC parameter. Registers are allocated in sequence unless a hole exists
813 and the parameter is a single float.
815 avregs: opaque structure to keep track of available VFP co-processor regs
816 align: alignment contraints for the param, as returned by type_size()
817 size: size of the parameter, as returned by type_size() */
818 int assign_vfpreg(struct avail_regs
*avregs
, int align
, int size
)
822 if (avregs
->first_free_reg
== -1)
824 if (align
>> 3) { /* double alignment */
825 first_reg
= avregs
->first_free_reg
;
826 /* alignment contraint not respected so use next reg and record hole */
828 avregs
->avail
[avregs
->last_hole
++] = first_reg
++;
829 } else { /* no special alignment (float or array of float) */
830 /* if single float and a hole is available, assign the param to it */
831 if (size
== 4 && avregs
->first_hole
!= avregs
->last_hole
)
832 return avregs
->avail
[avregs
->first_hole
++];
834 first_reg
= avregs
->first_free_reg
;
836 if (first_reg
+ size
/ 4 <= 16) {
837 avregs
->first_free_reg
= first_reg
+ size
/ 4;
840 avregs
->first_free_reg
= -1;
844 /* Returns whether all params need to be passed in core registers or not.
845 This is the case for function part of the runtime ABI. */
846 int floats_in_core_regs(SValue
*sval
)
851 switch (sval
->sym
->v
) {
852 case TOK___floatundisf
:
853 case TOK___floatundidf
:
854 case TOK___fixunssfdi
:
855 case TOK___fixunsdfdi
:
857 case TOK___fixunsxfdi
:
859 case TOK___floatdisf
:
860 case TOK___floatdidf
:
870 /* Return the number of registers needed to return the struct, or 0 if
871 returning via struct pointer. */
872 ST_FUNC
int gfunc_sret(CType
*vt
, int variadic
, CType
*ret
, int *ret_align
) {
875 size
= type_size(vt
, &align
);
876 if (float_abi
== ARM_HARD_FLOAT
&& !variadic
&&
877 (is_float(vt
->t
) || is_hgen_float_aggr(vt
))) {
881 return (size
+ 7) >> 3;
882 } else if (size
<= 4) {
894 /* Parameters are classified according to how they are copied to their final
895 destination for the function call. Because the copying is performed class
896 after class according to the order in the union below, it is important that
897 some constraints about the order of the members of this union are respected:
898 - CORE_STRUCT_CLASS must come after STACK_CLASS;
899 - CORE_CLASS must come after STACK_CLASS, CORE_STRUCT_CLASS and
901 - VFP_STRUCT_CLASS must come after VFP_CLASS.
902 See the comment for the main loop in copy_params() for the reason. */
913 int start
; /* first reg or addr used depending on the class */
914 int end
; /* last reg used or next free addr depending on the class */
915 SValue
*sval
; /* pointer to SValue on the value stack */
916 struct param_plan
*prev
; /* previous element in this class */
920 struct param_plan
*pplans
; /* array of all the param plans */
921 struct param_plan
*clsplans
[NB_CLASSES
]; /* per class lists of param plans */
924 #define add_param_plan(plan,pplan,class) \
926 pplan.prev = plan->clsplans[class]; \
927 plan->pplans[plan ## _nb] = pplan; \
928 plan->clsplans[class] = &plan->pplans[plan ## _nb++]; \
931 /* Assign parameters to registers and stack with alignment according to the
932 rules in the procedure call standard for the ARM architecture (AAPCS).
933 The overall assignment is recorded in an array of per parameter structures
934 called parameter plans. The parameter plans are also further organized in a
935 number of linked lists, one per class of parameter (see the comment for the
936 definition of union reg_class).
938 nb_args: number of parameters of the function for which a call is generated
939 float_abi: float ABI in use for this function call
940 plan: the structure where the overall assignment is recorded
941 todo: a bitmap that record which core registers hold a parameter
943 Returns the amount of stack space needed for parameter passing
945 Note: this function allocated an array in plan->pplans with tcc_malloc. It
946 is the responsibility of the caller to free this array once used (ie not
947 before copy_params). */
948 static int assign_regs(int nb_args
, int float_abi
, struct plan
*plan
, int *todo
)
951 int ncrn
/* next core register number */, nsaa
/* next stacked argument address*/;
953 struct param_plan pplan
;
954 struct avail_regs avregs
= AVAIL_REGS_INITIALIZER
;
958 plan
->pplans
= tcc_malloc(nb_args
* sizeof(*plan
->pplans
));
959 memset(plan
->clsplans
, 0, sizeof(plan
->clsplans
));
960 for(i
= nb_args
; i
-- ;) {
961 int j
, start_vfpreg
= 0;
962 CType type
= vtop
[-i
].type
;
964 size
= type_size(&type
, &align
);
965 size
= (size
+ 3) & ~3;
966 align
= (align
+ 3) & ~3;
967 switch(vtop
[-i
].type
.t
& VT_BTYPE
) {
972 if (float_abi
== ARM_HARD_FLOAT
) {
973 int is_hfa
= 0; /* Homogeneous float aggregate */
975 if (is_float(vtop
[-i
].type
.t
)
976 || (is_hfa
= is_hgen_float_aggr(&vtop
[-i
].type
))) {
979 start_vfpreg
= assign_vfpreg(&avregs
, align
, size
);
980 end_vfpreg
= start_vfpreg
+ ((size
- 1) >> 2);
981 if (start_vfpreg
>= 0) {
982 pplan
= (struct param_plan
) {start_vfpreg
, end_vfpreg
, &vtop
[-i
]};
984 add_param_plan(plan
, pplan
, VFP_STRUCT_CLASS
);
986 add_param_plan(plan
, pplan
, VFP_CLASS
);
992 ncrn
= (ncrn
+ (align
-1)/4) & ~((align
/4) - 1);
993 if (ncrn
+ size
/4 <= 4 || (ncrn
< 4 && start_vfpreg
!= -1)) {
994 /* The parameter is allocated both in core register and on stack. As
995 * such, it can be of either class: it would either be the last of
996 * CORE_STRUCT_CLASS or the first of STACK_CLASS. */
997 for (j
= ncrn
; j
< 4 && j
< ncrn
+ size
/ 4; j
++)
999 pplan
= (struct param_plan
) {ncrn
, j
, &vtop
[-i
]};
1000 add_param_plan(plan
, pplan
, CORE_STRUCT_CLASS
);
1003 nsaa
= (ncrn
- 4) * 4;
1011 int is_long
= (vtop
[-i
].type
.t
& VT_BTYPE
) == VT_LLONG
;
1014 ncrn
= (ncrn
+ 1) & -2;
1018 pplan
= (struct param_plan
) {ncrn
, ncrn
, &vtop
[-i
]};
1022 add_param_plan(plan
, pplan
, CORE_CLASS
);
1026 nsaa
= (nsaa
+ (align
- 1)) & ~(align
- 1);
1027 pplan
= (struct param_plan
) {nsaa
, nsaa
+ size
, &vtop
[-i
]};
1028 add_param_plan(plan
, pplan
, STACK_CLASS
);
1029 nsaa
+= size
; /* size already rounded up before */
1034 #undef add_param_plan
1036 /* Copy parameters to their final destination (core reg, VFP reg or stack) for
1039 nb_args: number of parameters the function take
1040 plan: the overall assignment plan for parameters
1041 todo: a bitmap indicating what core reg will hold a parameter
1043 Returns the number of SValue added by this function on the value stack */
1044 static int copy_params(int nb_args
, struct plan
*plan
, int todo
)
1046 int size
, align
, r
, i
, nb_extra_sval
= 0;
1047 struct param_plan
*pplan
;
1049 /* Several constraints require parameters to be copied in a specific order:
1050 - structures are copied to the stack before being loaded in a reg;
1051 - floats loaded to an odd numbered VFP reg are first copied to the
1052 preceding even numbered VFP reg and then moved to the next VFP reg.
1054 It is thus important that:
1055 - structures assigned to core regs must be copied after parameters
1056 assigned to the stack but before structures assigned to VFP regs because
1057 a structure can lie partly in core registers and partly on the stack;
1058 - parameters assigned to the stack and all structures be copied before
1059 parameters assigned to a core reg since copying a parameter to the stack
1060 require using a core reg;
1061 - parameters assigned to VFP regs be copied before structures assigned to
1062 VFP regs as the copy might use an even numbered VFP reg that already
1063 holds part of a structure. */
1064 for(i
= 0; i
< NB_CLASSES
; i
++) {
1065 for(pplan
= plan
->clsplans
[i
]; pplan
; pplan
= pplan
->prev
) {
1066 vpushv(pplan
->sval
);
1067 pplan
->sval
->r
= pplan
->sval
->r2
= VT_CONST
; /* disable entry */
1070 case CORE_STRUCT_CLASS
:
1071 case VFP_STRUCT_CLASS
:
1072 if ((pplan
->sval
->type
.t
& VT_BTYPE
) == VT_STRUCT
) {
1074 size
= type_size(&pplan
->sval
->type
, &align
);
1075 /* align to stack align size */
1076 size
= (size
+ 3) & ~3;
1077 if (i
== STACK_CLASS
&& pplan
->prev
)
1078 padding
= pplan
->start
- pplan
->prev
->end
;
1079 size
+= padding
; /* Add padding if any */
1080 /* allocate the necessary size on stack */
1082 /* generate structure store */
1083 r
= get_reg(RC_INT
);
1084 o(0xE28D0000|(intr(r
)<<12)|padding
); /* add r, sp, padding */
1085 vset(&vtop
->type
, r
| VT_LVAL
, 0);
1087 vstore(); /* memcpy to current sp + potential padding */
1089 /* Homogeneous float aggregate are loaded to VFP registers
1090 immediately since there is no way of loading data in multiple
1091 non consecutive VFP registers as what is done for other
1092 structures (see the use of todo). */
1093 if (i
== VFP_STRUCT_CLASS
) {
1094 int first
= pplan
->start
, nb
= pplan
->end
- first
+ 1;
1095 /* vpop.32 {pplan->start, ..., pplan->end} */
1096 o(0xECBD0A00|(first
&1)<<22|(first
>>1)<<12|nb
);
1097 /* No need to write the register used to a SValue since VFP regs
1098 cannot be used for gcall_or_jmp */
1101 if (is_float(pplan
->sval
->type
.t
)) {
1103 r
= vfpr(gv(RC_FLOAT
)) << 12;
1104 if ((pplan
->sval
->type
.t
& VT_BTYPE
) == VT_FLOAT
)
1108 r
|= 0x101; /* vpush.32 -> vpush.64 */
1110 o(0xED2D0A01 + r
); /* vpush */
1112 r
= fpr(gv(RC_FLOAT
)) << 12;
1113 if ((pplan
->sval
->type
.t
& VT_BTYPE
) == VT_FLOAT
)
1115 else if ((pplan
->sval
->type
.t
& VT_BTYPE
) == VT_DOUBLE
)
1118 size
= LDOUBLE_SIZE
;
1125 o(0xED2D0100|r
|(size
>>2)); /* some kind of vpush for FPA */
1128 /* simple type (currently always same size) */
1129 /* XXX: implicit cast ? */
1131 if ((pplan
->sval
->type
.t
& VT_BTYPE
) == VT_LLONG
) {
1135 o(0xE52D0004|(intr(r
)<<12)); /* push r */
1139 o(0xE52D0004|(intr(r
)<<12)); /* push r */
1141 if (i
== STACK_CLASS
&& pplan
->prev
)
1142 gadd_sp(pplan
->prev
->end
- pplan
->start
); /* Add padding if any */
1147 gv(regmask(TREG_F0
+ (pplan
->start
>> 1)));
1148 if (pplan
->start
& 1) { /* Must be in upper part of double register */
1149 o(0xEEF00A40|((pplan
->start
>>1)<<12)|(pplan
->start
>>1)); /* vmov.f32 s(n+1), sn */
1150 vtop
->r
= VT_CONST
; /* avoid being saved on stack by gv for next float */
1155 if ((pplan
->sval
->type
.t
& VT_BTYPE
) == VT_LLONG
) {
1157 gv(regmask(pplan
->end
));
1158 pplan
->sval
->r2
= vtop
->r
;
1161 gv(regmask(pplan
->start
));
1162 /* Mark register as used so that gcall_or_jmp use another one
1163 (regs >=4 are free as never used to pass parameters) */
1164 pplan
->sval
->r
= vtop
->r
;
1171 /* Manually free remaining registers since next parameters are loaded
1172 * manually, without the help of gv(int). */
1176 o(0xE8BD0000|todo
); /* pop {todo} */
1177 for(pplan
= plan
->clsplans
[CORE_STRUCT_CLASS
]; pplan
; pplan
= pplan
->prev
) {
1179 pplan
->sval
->r
= pplan
->start
;
1180 /* An SValue can only pin 2 registers at best (r and r2) but a structure
1181 can occupy more than 2 registers. Thus, we need to push on the value
1182 stack some fake parameter to have on SValue for each registers used
1183 by a structure (r2 is not used). */
1184 for (r
= pplan
->start
+ 1; r
<= pplan
->end
; r
++) {
1185 if (todo
& (1 << r
)) {
1193 return nb_extra_sval
;
1196 /* Generate function call. The function address is pushed first, then
1197 all the parameters in call order. This functions pops all the
1198 parameters and the function address. */
1199 void gfunc_call(int nb_args
)
1202 int variadic
, def_float_abi
= float_abi
;
1207 if (float_abi
== ARM_HARD_FLOAT
) {
1208 variadic
= (vtop
[-nb_args
].type
.ref
->c
== FUNC_ELLIPSIS
);
1209 if (variadic
|| floats_in_core_regs(&vtop
[-nb_args
]))
1210 float_abi
= ARM_SOFTFP_FLOAT
;
1213 /* cannot let cpu flags if other instruction are generated. Also avoid leaving
1214 VT_JMP anywhere except on the top of the stack because it would complicate
1215 the code generator. */
1216 r
= vtop
->r
& VT_VALMASK
;
1217 if (r
== VT_CMP
|| (r
& ~1) == VT_JMP
)
1220 args_size
= assign_regs(nb_args
, float_abi
, &plan
, &todo
);
1223 if (args_size
& 7) { /* Stack must be 8 byte aligned at fct call for EABI */
1224 args_size
= (args_size
+ 7) & ~7;
1225 o(0xE24DD004); /* sub sp, sp, #4 */
1229 nb_args
+= copy_params(nb_args
, &plan
, todo
);
1230 tcc_free(plan
.pplans
);
1232 /* Move fct SValue on top as required by gcall_or_jmp */
1236 gadd_sp(args_size
); /* pop all parameters passed on the stack */
1237 #if defined(TCC_ARM_EABI) && defined(TCC_ARM_VFP)
1238 if(float_abi
== ARM_SOFTFP_FLOAT
&& is_float(vtop
->type
.ref
->type
.t
)) {
1239 if((vtop
->type
.ref
->type
.t
& VT_BTYPE
) == VT_FLOAT
) {
1240 o(0xEE000A10); /*vmov s0, r0 */
1242 o(0xEE000B10); /* vmov.32 d0[0], r0 */
1243 o(0xEE201B10); /* vmov.32 d0[1], r1 */
1247 vtop
-= nb_args
+ 1; /* Pop all params and fct address from value stack */
1248 leaffunc
= 0; /* we are calling a function, so we aren't in a leaf function */
1249 float_abi
= def_float_abi
;
1252 /* generate function prolog of type 't' */
1253 void gfunc_prolog(CType
*func_type
)
1256 int n
, nf
, size
, align
, struct_ret
= 0;
1257 int addr
, pn
, sn
; /* pn=core, sn=stack */
1258 struct avail_regs avregs
= AVAIL_REGS_INITIALIZER
;
1261 sym
= func_type
->ref
;
1262 func_vt
= sym
->type
;
1263 func_var
= (func_type
->ref
->c
== FUNC_ELLIPSIS
);
1266 if ((func_vt
.t
& VT_BTYPE
) == VT_STRUCT
&&
1267 !gfunc_sret(&func_vt
, func_var
, &ret_type
, &align
))
1271 func_vc
= 12; /* Offset from fp of the place to store the result */
1273 for(sym2
= sym
->next
; sym2
&& (n
< 4 || nf
< 16); sym2
= sym2
->next
) {
1274 size
= type_size(&sym2
->type
, &align
);
1276 if (float_abi
== ARM_HARD_FLOAT
&& !func_var
&&
1277 (is_float(sym2
->type
.t
) || is_hgen_float_aggr(&sym2
->type
))) {
1278 int tmpnf
= assign_vfpreg(&avregs
, align
, size
);
1279 tmpnf
+= (size
+ 3) / 4;
1280 nf
= (tmpnf
> nf
) ? tmpnf
: nf
;
1284 n
+= (size
+ 3) / 4;
1286 o(0xE1A0C00D); /* mov ip,sp */
1295 o(0xE92D0000|((1<<n
)-1)); /* save r0-r4 on stack if needed */
1300 nf
=(nf
+1)&-2; /* nf => HARDFLOAT => EABI */
1301 o(0xED2D0A00|nf
); /* save s0-s15 on stack if needed */
1303 o(0xE92D5800); /* save fp, ip, lr */
1304 o(0xE1A0B00D); /* mov fp, sp */
1305 func_sub_sp_offset
= ind
;
1306 o(0xE1A00000); /* nop, leave space for stack adjustment in epilog */
1309 if (float_abi
== ARM_HARD_FLOAT
) {
1311 avregs
= AVAIL_REGS_INITIALIZER
;
1314 pn
= struct_ret
, sn
= 0;
1315 while ((sym
= sym
->next
)) {
1318 size
= type_size(type
, &align
);
1319 size
= (size
+ 3) >> 2;
1320 align
= (align
+ 3) & ~3;
1322 if (float_abi
== ARM_HARD_FLOAT
&& !func_var
&& (is_float(sym
->type
.t
)
1323 || is_hgen_float_aggr(&sym
->type
))) {
1324 int fpn
= assign_vfpreg(&avregs
, align
, size
<< 2);
1333 pn
= (pn
+ (align
-1)/4) & -(align
/4);
1335 addr
= (nf
+ pn
) * 4;
1342 sn
= (sn
+ (align
-1)/4) & -(align
/4);
1344 addr
= (n
+ nf
+ sn
) * 4;
1347 sym_push(sym
->v
& ~SYM_FIELD
, type
, VT_LOCAL
| lvalue_type(type
->t
),
1355 /* generate function epilog */
1356 void gfunc_epilog(void)
1360 /* Copy float return value to core register if base standard is used and
1361 float computation is made with VFP */
1362 #if defined(TCC_ARM_EABI) && defined(TCC_ARM_VFP)
1363 if ((float_abi
== ARM_SOFTFP_FLOAT
|| func_var
) && is_float(func_vt
.t
)) {
1364 if((func_vt
.t
& VT_BTYPE
) == VT_FLOAT
)
1365 o(0xEE100A10); /* fmrs r0, s0 */
1367 o(0xEE100B10); /* fmrdl r0, d0 */
1368 o(0xEE301B10); /* fmrdh r1, d0 */
1372 o(0xE89BA800); /* restore fp, sp, pc */
1373 diff
= (-loc
+ 3) & -4;
1376 diff
= ((diff
+ 11) & -8) - 4;
1379 x
=stuff_const(0xE24BD000, diff
); /* sub sp,fp,# */
1381 *(uint32_t *)(cur_text_section
->data
+ func_sub_sp_offset
) = x
;
1385 o(0xE59FC004); /* ldr ip,[pc+4] */
1386 o(0xE04BD00C); /* sub sp,fp,ip */
1387 o(0xE1A0F00E); /* mov pc,lr */
1389 *(uint32_t *)(cur_text_section
->data
+ func_sub_sp_offset
) = 0xE1000000|encbranch(func_sub_sp_offset
,addr
,1);
1394 /* generate a jump to a label */
1399 o(0xE0000000|encbranch(r
,t
,1));
1403 /* generate a jump to a fixed address */
1404 void gjmp_addr(int a
)
1409 /* generate a test. set 'inv' to invert test. Stack entry is popped */
1410 int gtst(int inv
, int t
)
1414 v
= vtop
->r
& VT_VALMASK
;
1417 op
=mapcc(inv
?negcc(vtop
->c
.i
):vtop
->c
.i
);
1418 op
|=encbranch(r
,t
,1);
1421 } else if (v
== VT_JMP
|| v
== VT_JMPI
) {
1422 if ((v
& 1) == inv
) {
1431 p
= decbranch(lp
=p
);
1433 x
= (uint32_t *)(cur_text_section
->data
+ lp
);
1435 *x
|= encbranch(lp
,t
,1);
1444 if (is_float(vtop
->type
.t
)) {
1447 o(0xEEB50A40|(vfpr(r
)<<12)|T2CPR(vtop
->type
.t
)); /* fcmpzX */
1448 o(0xEEF1FA10); /* fmstat */
1450 o(0xEE90F118|(fpr(r
)<<16));
1454 return gtst(inv
, t
);
1455 } else if ((vtop
->r
& (VT_VALMASK
| VT_LVAL
| VT_SYM
)) == VT_CONST
) {
1456 /* constant jmp optimization */
1457 if ((vtop
->c
.i
!= 0) != inv
)
1461 o(0xE3300000|(intr(v
)<<16));
1464 return gtst(inv
, t
);
1471 /* generate an integer binary operation */
1472 void gen_opi(int op
)
1475 uint32_t opc
= 0, r
, fr
;
1476 unsigned short retreg
= REG_IRET
;
1484 case TOK_ADDC1
: /* add with carry generation */
1492 case TOK_SUBC1
: /* sub with carry generation */
1496 case TOK_ADDC2
: /* add with carry use */
1500 case TOK_SUBC2
: /* sub with carry use */
1517 gv2(RC_INT
, RC_INT
);
1521 o(0xE0000090|(intr(r
)<<16)|(intr(r
)<<8)|intr(fr
));
1546 func
=TOK___aeabi_idivmod
;
1555 func
=TOK___aeabi_uidivmod
;
1563 gv2(RC_INT
, RC_INT
);
1564 r
=intr(vtop
[-1].r2
=get_reg(RC_INT
));
1566 vtop
[-1].r
=get_reg_ex(RC_INT
,regmask(c
));
1568 o(0xE0800090|(r
<<16)|(intr(vtop
->r
)<<12)|(intr(c
)<<8)|intr(vtop
[1].r
));
1577 if((vtop
[-1].r
& (VT_VALMASK
| VT_LVAL
| VT_SYM
)) == VT_CONST
) {
1578 if(opc
== 4 || opc
== 5 || opc
== 0xc) {
1580 opc
|=2; // sub -> rsb
1583 if ((vtop
->r
& VT_VALMASK
) == VT_CMP
||
1584 (vtop
->r
& (VT_VALMASK
& ~1)) == VT_JMP
)
1589 opc
=0xE0000000|(opc
<<20)|(c
<<16);
1590 if((vtop
->r
& (VT_VALMASK
| VT_LVAL
| VT_SYM
)) == VT_CONST
) {
1592 x
=stuff_const(opc
|0x2000000,vtop
->c
.i
);
1594 r
=intr(vtop
[-1].r
=get_reg_ex(RC_INT
,regmask(vtop
[-1].r
)));
1599 fr
=intr(gv(RC_INT
));
1600 r
=intr(vtop
[-1].r
=get_reg_ex(RC_INT
,two2mask(vtop
->r
,vtop
[-1].r
)));
1604 if (op
>= TOK_ULT
&& op
<= TOK_GT
) {
1610 opc
=0xE1A00000|(opc
<<5);
1611 if ((vtop
->r
& VT_VALMASK
) == VT_CMP
||
1612 (vtop
->r
& (VT_VALMASK
& ~1)) == VT_JMP
)
1618 if ((vtop
->r
& (VT_VALMASK
| VT_LVAL
| VT_SYM
)) == VT_CONST
) {
1619 fr
=intr(vtop
[-1].r
=get_reg_ex(RC_INT
,regmask(vtop
[-1].r
)));
1620 c
= vtop
->c
.i
& 0x1f;
1621 o(opc
|(c
<<7)|(fr
<<12));
1623 fr
=intr(gv(RC_INT
));
1624 c
=intr(vtop
[-1].r
=get_reg_ex(RC_INT
,two2mask(vtop
->r
,vtop
[-1].r
)));
1625 o(opc
|(c
<<12)|(fr
<<8)|0x10);
1630 vpush_global_sym(&func_old_type
, func
);
1637 tcc_error("gen_opi %i unimplemented!",op
);
1642 static int is_zero(int i
)
1644 if((vtop
[i
].r
& (VT_VALMASK
| VT_LVAL
| VT_SYM
)) != VT_CONST
)
1646 if (vtop
[i
].type
.t
== VT_FLOAT
)
1647 return (vtop
[i
].c
.f
== 0.f
);
1648 else if (vtop
[i
].type
.t
== VT_DOUBLE
)
1649 return (vtop
[i
].c
.d
== 0.0);
1650 return (vtop
[i
].c
.ld
== 0.l
);
1653 /* generate a floating point operation 'v = t1 op t2' instruction. The
1654 * two operands are guaranted to have the same floating point type */
1655 void gen_opf(int op
)
1659 x
=0xEE000A00|T2CPR(vtop
->type
.t
);
1677 x
|=0x810000; /* fsubX -> fnegX */
1690 if(op
< TOK_ULT
|| op
> TOK_GT
) {
1691 tcc_error("unknown fp op %x!",op
);
1697 case TOK_LT
: op
=TOK_GT
; break;
1698 case TOK_GE
: op
=TOK_ULE
; break;
1699 case TOK_LE
: op
=TOK_GE
; break;
1700 case TOK_GT
: op
=TOK_ULT
; break;
1703 x
|=0xB40040; /* fcmpX */
1704 if(op
!=TOK_EQ
&& op
!=TOK_NE
)
1705 x
|=0x80; /* fcmpX -> fcmpeX */
1708 o(x
|0x10000|(vfpr(gv(RC_FLOAT
))<<12)); /* fcmp(e)X -> fcmp(e)zX */
1710 x
|=vfpr(gv(RC_FLOAT
));
1712 o(x
|(vfpr(gv(RC_FLOAT
))<<12));
1715 o(0xEEF1FA10); /* fmstat */
1718 case TOK_LE
: op
=TOK_ULE
; break;
1719 case TOK_LT
: op
=TOK_ULT
; break;
1720 case TOK_UGE
: op
=TOK_GE
; break;
1721 case TOK_UGT
: op
=TOK_GT
; break;
1738 vtop
->r
=get_reg_ex(RC_FLOAT
,r
);
1741 o(x
|(vfpr(vtop
->r
)<<12));
1745 static uint32_t is_fconst()
1749 if((vtop
->r
& (VT_VALMASK
| VT_LVAL
| VT_SYM
)) != VT_CONST
)
1751 if (vtop
->type
.t
== VT_FLOAT
)
1753 else if (vtop
->type
.t
== VT_DOUBLE
)
1783 /* generate a floating point operation 'v = t1 op t2' instruction. The
1784 two operands are guaranted to have the same floating point type */
1785 void gen_opf(int op
)
1787 uint32_t x
, r
, r2
, c1
, c2
;
1788 //fputs("gen_opf\n",stderr);
1794 #if LDOUBLE_SIZE == 8
1795 if ((vtop
->type
.t
& VT_BTYPE
) != VT_FLOAT
)
1798 if ((vtop
->type
.t
& VT_BTYPE
) == VT_DOUBLE
)
1800 else if ((vtop
->type
.t
& VT_BTYPE
) == VT_LDOUBLE
)
1811 r
=fpr(gv(RC_FLOAT
));
1818 r2
=fpr(gv(RC_FLOAT
));
1827 r
=fpr(gv(RC_FLOAT
));
1829 } else if(c1
&& c1
<=0xf) {
1832 r
=fpr(gv(RC_FLOAT
));
1837 r
=fpr(gv(RC_FLOAT
));
1839 r2
=fpr(gv(RC_FLOAT
));
1848 r
=fpr(gv(RC_FLOAT
));
1853 r2
=fpr(gv(RC_FLOAT
));
1861 r
=fpr(gv(RC_FLOAT
));
1863 } else if(c1
&& c1
<=0xf) {
1866 r
=fpr(gv(RC_FLOAT
));
1871 r
=fpr(gv(RC_FLOAT
));
1873 r2
=fpr(gv(RC_FLOAT
));
1877 if(op
>= TOK_ULT
&& op
<= TOK_GT
) {
1878 x
|=0xd0f110; // cmfe
1879 /* bug (intention?) in Linux FPU emulator
1880 doesn't set carry if equal */
1886 tcc_error("unsigned comparison on floats?");
1892 op
=TOK_ULE
; /* correct in unordered case only if AC bit in FPSR set */
1896 x
&=~0x400000; // cmfe -> cmf
1918 r
=fpr(gv(RC_FLOAT
));
1925 r2
=fpr(gv(RC_FLOAT
));
1927 vtop
[-1].r
= VT_CMP
;
1930 tcc_error("unknown fp op %x!",op
);
1934 if(vtop
[-1].r
== VT_CMP
)
1940 vtop
[-1].r
=get_reg_ex(RC_FLOAT
,two2mask(vtop
[-1].r
,c1
));
1944 o(x
|(r
<<16)|(c1
<<12)|r2
);
1948 /* convert integers to fp 't' type. Must handle 'int', 'unsigned int'
1949 and 'long long' cases. */
1950 ST_FUNC
void gen_cvt_itof1(int t
)
1954 bt
=vtop
->type
.t
& VT_BTYPE
;
1955 if(bt
== VT_INT
|| bt
== VT_SHORT
|| bt
== VT_BYTE
) {
1961 r2
=vfpr(vtop
->r
=get_reg(RC_FLOAT
));
1962 o(0xEE000A10|(r
<<12)|(r2
<<16)); /* fmsr */
1964 if(!(vtop
->type
.t
& VT_UNSIGNED
))
1965 r2
|=0x80; /* fuitoX -> fsituX */
1966 o(0xEEB80A40|r2
|T2CPR(t
)); /* fYitoX*/
1968 r2
=fpr(vtop
->r
=get_reg(RC_FLOAT
));
1969 if((t
& VT_BTYPE
) != VT_FLOAT
)
1970 dsize
=0x80; /* flts -> fltd */
1971 o(0xEE000110|dsize
|(r2
<<16)|(r
<<12)); /* flts */
1972 if((vtop
->type
.t
& (VT_UNSIGNED
|VT_BTYPE
)) == (VT_UNSIGNED
|VT_INT
)) {
1974 o(0xE3500000|(r
<<12)); /* cmp */
1975 r
=fpr(get_reg(RC_FLOAT
));
1976 if(last_itod_magic
) {
1977 off
=ind
+8-last_itod_magic
;
1982 o(0xBD1F0100|(r
<<12)|off
); /* ldflts */
1984 o(0xEA000000); /* b */
1985 last_itod_magic
=ind
;
1986 o(0x4F800000); /* 4294967296.0f */
1988 o(0xBE000100|dsize
|(r2
<<16)|(r2
<<12)|r
); /* adflt */
1992 } else if(bt
== VT_LLONG
) {
1994 CType
*func_type
= 0;
1995 if((t
& VT_BTYPE
) == VT_FLOAT
) {
1996 func_type
= &func_float_type
;
1997 if(vtop
->type
.t
& VT_UNSIGNED
)
1998 func
=TOK___floatundisf
;
2000 func
=TOK___floatdisf
;
2001 #if LDOUBLE_SIZE != 8
2002 } else if((t
& VT_BTYPE
) == VT_LDOUBLE
) {
2003 func_type
= &func_ldouble_type
;
2004 if(vtop
->type
.t
& VT_UNSIGNED
)
2005 func
=TOK___floatundixf
;
2007 func
=TOK___floatdixf
;
2008 } else if((t
& VT_BTYPE
) == VT_DOUBLE
) {
2010 } else if((t
& VT_BTYPE
) == VT_DOUBLE
|| (t
& VT_BTYPE
) == VT_LDOUBLE
) {
2012 func_type
= &func_double_type
;
2013 if(vtop
->type
.t
& VT_UNSIGNED
)
2014 func
=TOK___floatundidf
;
2016 func
=TOK___floatdidf
;
2019 vpush_global_sym(func_type
, func
);
2027 tcc_error("unimplemented gen_cvt_itof %x!",vtop
->type
.t
);
2030 /* convert fp to int 't' type */
2031 void gen_cvt_ftoi(int t
)
2037 r2
=vtop
->type
.t
& VT_BTYPE
;
2040 r
=vfpr(gv(RC_FLOAT
));
2042 o(0xEEBC0AC0|(r
<<12)|r
|T2CPR(r2
)|u
); /* ftoXizY */
2043 r2
=intr(vtop
->r
=get_reg(RC_INT
));
2044 o(0xEE100A10|(r
<<16)|(r2
<<12));
2049 func
=TOK___fixunssfsi
;
2050 #if LDOUBLE_SIZE != 8
2051 else if(r2
== VT_LDOUBLE
)
2052 func
=TOK___fixunsxfsi
;
2053 else if(r2
== VT_DOUBLE
)
2055 else if(r2
== VT_LDOUBLE
|| r2
== VT_DOUBLE
)
2057 func
=TOK___fixunsdfsi
;
2059 r
=fpr(gv(RC_FLOAT
));
2060 r2
=intr(vtop
->r
=get_reg(RC_INT
));
2061 o(0xEE100170|(r2
<<12)|r
);
2065 } else if(t
== VT_LLONG
) { // unsigned handled in gen_cvt_ftoi1
2068 #if LDOUBLE_SIZE != 8
2069 else if(r2
== VT_LDOUBLE
)
2071 else if(r2
== VT_DOUBLE
)
2073 else if(r2
== VT_LDOUBLE
|| r2
== VT_DOUBLE
)
2078 vpush_global_sym(&func_old_type
, func
);
2083 vtop
->r2
= REG_LRET
;
2087 tcc_error("unimplemented gen_cvt_ftoi!");
2090 /* convert from one floating point type to another */
2091 void gen_cvt_ftof(int t
)
2094 if(((vtop
->type
.t
& VT_BTYPE
) == VT_FLOAT
) != ((t
& VT_BTYPE
) == VT_FLOAT
)) {
2095 uint32_t r
= vfpr(gv(RC_FLOAT
));
2096 o(0xEEB70AC0|(r
<<12)|r
|T2CPR(vtop
->type
.t
));
2099 /* all we have to do on i386 and FPA ARM is to put the float in a register */
2104 /* computed goto support */
2111 /* Save the stack pointer onto the stack and return the location of its address */
2112 ST_FUNC
void gen_vla_sp_save(int addr
) {
2113 tcc_error("variable length arrays unsupported for this target");
2116 /* Restore the SP from a location on the stack */
2117 ST_FUNC
void gen_vla_sp_restore(int addr
) {
2118 tcc_error("variable length arrays unsupported for this target");
2121 /* Subtract from the stack pointer, and push the resulting value onto the stack */
2122 ST_FUNC
void gen_vla_alloc(CType
*type
, int align
) {
2123 tcc_error("variable length arrays unsupported for this target");
2126 /* end of ARM code generator */
2127 /*************************************************************/
2129 /*************************************************************/