2 * ARMv4 code generator for TCC
4 * Copyright (c) 2003 Daniel Glöckner
5 * Copyright (c) 2012 Thomas Preud'homme
7 * Based on i386-gen.c by Fabrice Bellard
9 * This library is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU Lesser General Public
11 * License as published by the Free Software Foundation; either
12 * version 2 of the License, or (at your option) any later version.
14 * This library is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * Lesser General Public License for more details.
19 * You should have received a copy of the GNU Lesser General Public
20 * License along with this library; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
24 #ifdef TARGET_DEFS_ONLY
27 #ifndef TCC_ARM_VFP /* Avoid useless warning */
32 /* number of available registers */
39 #ifndef TCC_ARM_VERSION
40 # define TCC_ARM_VERSION 5
43 /* a register can belong to several classes. The classes must be
44 sorted from more general to more precise (see gv2() code which does
45 assumptions on it). */
46 #define RC_INT 0x0001 /* generic integer register */
47 #define RC_FLOAT 0x0002 /* generic float register */
63 #define RC_IRET RC_R0 /* function return: integer register */
64 #define RC_LRET RC_R1 /* function return: second integer register */
65 #define RC_FRET RC_F0 /* function return: float register */
67 /* pretty names for the registers */
87 #define T2CPR(t) (((t) & VT_BTYPE) != VT_FLOAT ? 0x100 : 0)
90 /* return registers for function */
91 #define REG_IRET TREG_R0 /* single word int return register */
92 #define REG_LRET TREG_R1 /* second word return register (for long long) */
93 #define REG_FRET TREG_F0 /* float return register */
96 #define TOK___divdi3 TOK___aeabi_ldivmod
97 #define TOK___moddi3 TOK___aeabi_ldivmod
98 #define TOK___udivdi3 TOK___aeabi_uldivmod
99 #define TOK___umoddi3 TOK___aeabi_uldivmod
102 /* defined if function parameters must be evaluated in reverse order */
103 #define INVERT_FUNC_PARAMS
105 /* defined if structures are passed as pointers. Otherwise structures
106 are directly pushed on stack. */
107 /* #define FUNC_STRUCT_PARAM_AS_PTR */
109 /* pointer size, in bytes */
112 /* long double size and alignment, in bytes */
114 #define LDOUBLE_SIZE 8
118 #define LDOUBLE_SIZE 8
122 #define LDOUBLE_ALIGN 8
124 #define LDOUBLE_ALIGN 4
127 /* maximum alignment (for aligned attribute support) */
130 #define CHAR_IS_UNSIGNED
132 /******************************************************/
135 #define EM_TCC_TARGET EM_ARM
137 /* relocation type for 32 bit data relocation */
138 #define R_DATA_32 R_ARM_ABS32
139 #define R_DATA_PTR R_ARM_ABS32
140 #define R_JMP_SLOT R_ARM_JUMP_SLOT
141 #define R_COPY R_ARM_COPY
143 #define ELF_START_ADDR 0x00008000
144 #define ELF_PAGE_SIZE 0x1000
146 /******************************************************/
147 #else /* ! TARGET_DEFS_ONLY */
148 /******************************************************/
151 ST_DATA
const int reg_classes
[NB_REGS
] = {
152 /* r0 */ RC_INT
| RC_R0
,
153 /* r1 */ RC_INT
| RC_R1
,
154 /* r2 */ RC_INT
| RC_R2
,
155 /* r3 */ RC_INT
| RC_R3
,
156 /* r12 */ RC_INT
| RC_R12
,
157 /* f0 */ RC_FLOAT
| RC_F0
,
158 /* f1 */ RC_FLOAT
| RC_F1
,
159 /* f2 */ RC_FLOAT
| RC_F2
,
160 /* f3 */ RC_FLOAT
| RC_F3
,
162 /* d4/s8 */ RC_FLOAT
| RC_F4
,
163 /* d5/s10 */ RC_FLOAT
| RC_F5
,
164 /* d6/s12 */ RC_FLOAT
| RC_F6
,
165 /* d7/s14 */ RC_FLOAT
| RC_F7
,
169 static int func_sub_sp_offset
, last_itod_magic
;
172 #if defined(TCC_ARM_EABI) && defined(TCC_ARM_VFP)
173 static CType float_type
, double_type
, func_float_type
, func_double_type
;
174 ST_FUNC
void arm_init_types(void)
176 float_type
.t
= VT_FLOAT
;
177 double_type
.t
= VT_DOUBLE
;
178 func_float_type
.t
= VT_FUNC
;
179 func_float_type
.ref
= sym_push(SYM_FIELD
, &float_type
, FUNC_CDECL
, FUNC_OLD
);
180 func_double_type
.t
= VT_FUNC
;
181 func_double_type
.ref
= sym_push(SYM_FIELD
, &double_type
, FUNC_CDECL
, FUNC_OLD
);
184 #define func_float_type func_old_type
185 #define func_double_type func_old_type
186 #define func_ldouble_type func_old_type
187 ST_FUNC
void arm_init_types(void) {}
190 static int two2mask(int a
,int b
) {
191 return (reg_classes
[a
]|reg_classes
[b
])&~(RC_INT
|RC_FLOAT
);
194 static int regmask(int r
) {
195 return reg_classes
[r
]&~(RC_INT
|RC_FLOAT
);
198 /******************************************************/
202 /* this is a good place to start adding big-endian support*/
206 if (!cur_text_section
)
207 tcc_error("compiler error! This happens f.ex. if the compiler\n"
208 "can't evaluate constant expressions outside of a function.");
209 if (ind1
> cur_text_section
->data_allocated
)
210 section_realloc(cur_text_section
, ind1
);
211 cur_text_section
->data
[ind
++] = i
&255;
213 cur_text_section
->data
[ind
++] = i
&255;
215 cur_text_section
->data
[ind
++] = i
&255;
217 cur_text_section
->data
[ind
++] = i
;
220 static uint32_t stuff_const(uint32_t op
, uint32_t c
)
223 uint32_t nc
= 0, negop
= 0;
233 case 0x1A00000: //mov
234 case 0x1E00000: //mvn
241 return (op
&0xF010F000)|((op
>>16)&0xF)|0x1E00000;
245 return (op
&0xF010F000)|((op
>>16)&0xF)|0x1A00000;
246 case 0x1C00000: //bic
251 case 0x1800000: //orr
253 return (op
&0xFFF0FFFF)|0x1E00000;
259 if(c
<256) /* catch undefined <<32 */
262 m
=(0xff>>i
)|(0xff<<(32-i
));
264 return op
|(i
<<7)|(c
<<i
)|(c
>>(32-i
));
274 void stuff_const_harder(uint32_t op
, uint32_t v
) {
280 uint32_t a
[16], nv
, no
, o2
, n2
;
283 o2
=(op
&0xfff0ffff)|((op
&0xf000)<<4);;
285 a
[i
]=(a
[i
-1]>>2)|(a
[i
-1]<<30);
287 for(j
=i
<4?i
+12:15;j
>=i
+4;j
--)
288 if((v
&(a
[i
]|a
[j
]))==v
) {
289 o(stuff_const(op
,v
&a
[i
]));
290 o(stuff_const(o2
,v
&a
[j
]));
297 for(j
=i
<4?i
+12:15;j
>=i
+4;j
--)
298 if((nv
&(a
[i
]|a
[j
]))==nv
) {
299 o(stuff_const(no
,nv
&a
[i
]));
300 o(stuff_const(n2
,nv
&a
[j
]));
305 for(k
=i
<4?i
+12:15;k
>=j
+4;k
--)
306 if((v
&(a
[i
]|a
[j
]|a
[k
]))==v
) {
307 o(stuff_const(op
,v
&a
[i
]));
308 o(stuff_const(o2
,v
&a
[j
]));
309 o(stuff_const(o2
,v
&a
[k
]));
316 for(k
=i
<4?i
+12:15;k
>=j
+4;k
--)
317 if((nv
&(a
[i
]|a
[j
]|a
[k
]))==nv
) {
318 o(stuff_const(no
,nv
&a
[i
]));
319 o(stuff_const(n2
,nv
&a
[j
]));
320 o(stuff_const(n2
,nv
&a
[k
]));
323 o(stuff_const(op
,v
&a
[0]));
324 o(stuff_const(o2
,v
&a
[4]));
325 o(stuff_const(o2
,v
&a
[8]));
326 o(stuff_const(o2
,v
&a
[12]));
330 ST_FUNC
uint32_t encbranch(int pos
, int addr
, int fail
)
334 if(addr
>=0x1000000 || addr
<-0x1000000) {
336 tcc_error("FIXME: function bigger than 32MB");
339 return 0x0A000000|(addr
&0xffffff);
342 int decbranch(int pos
)
345 x
=*(uint32_t *)(cur_text_section
->data
+ pos
);
352 /* output a symbol and patch all calls to it */
353 void gsym_addr(int t
, int a
)
358 x
=(uint32_t *)(cur_text_section
->data
+ t
);
361 *x
=0xE1A00000; // nop
364 *x
|= encbranch(lt
,a
,1);
375 static uint32_t vfpr(int r
)
377 if(r
<TREG_F0
|| r
>TREG_F7
)
378 tcc_error("compiler error! register %i is no vfp register",r
);
382 static uint32_t fpr(int r
)
384 if(r
<TREG_F0
|| r
>TREG_F3
)
385 tcc_error("compiler error! register %i is no fpa register",r
);
390 static uint32_t intr(int r
)
394 if((r
<0 || r
>4) && r
!=14)
395 tcc_error("compiler error! register %i is no int register",r
);
399 static void calcaddr(uint32_t *base
, int *off
, int *sgn
, int maxoff
, unsigned shift
)
401 if(*off
>maxoff
|| *off
&((1<<shift
)-1)) {
408 y
=stuff_const(x
,*off
&~maxoff
);
414 y
=stuff_const(x
,(*off
+maxoff
)&~maxoff
);
418 *off
=((*off
+maxoff
)&~maxoff
)-*off
;
421 stuff_const_harder(x
,*off
&~maxoff
);
426 static uint32_t mapcc(int cc
)
431 return 0x30000000; /* CC/LO */
433 return 0x20000000; /* CS/HS */
435 return 0x00000000; /* EQ */
437 return 0x10000000; /* NE */
439 return 0x90000000; /* LS */
441 return 0x80000000; /* HI */
443 return 0x40000000; /* MI */
445 return 0x50000000; /* PL */
447 return 0xB0000000; /* LT */
449 return 0xA0000000; /* GE */
451 return 0xD0000000; /* LE */
453 return 0xC0000000; /* GT */
455 tcc_error("unexpected condition code");
456 return 0xE0000000; /* AL */
459 static int negcc(int cc
)
488 tcc_error("unexpected condition code");
492 /* load 'r' from value 'sv' */
493 void load(int r
, SValue
*sv
)
495 int v
, ft
, fc
, fr
, sign
;
512 uint32_t base
= 0xB; // fp
515 v1
.r
= VT_LOCAL
| VT_LVAL
;
517 load(base
=14 /* lr */, &v1
);
520 } else if(v
== VT_CONST
) {
528 } else if(v
< VT_CONST
) {
535 calcaddr(&base
,&fc
,&sign
,1020,2);
537 op
=0xED100A00; /* flds */
540 if ((ft
& VT_BTYPE
) != VT_FLOAT
)
541 op
|=0x100; /* flds -> fldd */
542 o(op
|(vfpr(r
)<<12)|(fc
>>2)|(base
<<16));
547 #if LDOUBLE_SIZE == 8
548 if ((ft
& VT_BTYPE
) != VT_FLOAT
)
551 if ((ft
& VT_BTYPE
) == VT_DOUBLE
)
553 else if ((ft
& VT_BTYPE
) == VT_LDOUBLE
)
556 o(op
|(fpr(r
)<<12)|(fc
>>2)|(base
<<16));
558 } else if((ft
& (VT_BTYPE
|VT_UNSIGNED
)) == VT_BYTE
559 || (ft
& VT_BTYPE
) == VT_SHORT
) {
560 calcaddr(&base
,&fc
,&sign
,255,0);
562 if ((ft
& VT_BTYPE
) == VT_SHORT
)
564 if ((ft
& VT_UNSIGNED
) == 0)
568 o(op
|(intr(r
)<<12)|(base
<<16)|((fc
&0xf0)<<4)|(fc
&0xf));
570 calcaddr(&base
,&fc
,&sign
,4095,0);
574 if ((ft
& VT_BTYPE
) == VT_BYTE
|| (ft
& VT_BTYPE
) == VT_BOOL
)
576 o(op
|(intr(r
)<<12)|fc
|(base
<<16));
582 op
=stuff_const(0xE3A00000|(intr(r
)<<12),sv
->c
.ul
);
583 if (fr
& VT_SYM
|| !op
) {
584 o(0xE59F0000|(intr(r
)<<12));
587 greloc(cur_text_section
, sv
->sym
, ind
, R_ARM_ABS32
);
592 } else if (v
== VT_LOCAL
) {
593 op
=stuff_const(0xE28B0000|(intr(r
)<<12),sv
->c
.ul
);
594 if (fr
& VT_SYM
|| !op
) {
595 o(0xE59F0000|(intr(r
)<<12));
597 if(fr
& VT_SYM
) // needed ?
598 greloc(cur_text_section
, sv
->sym
, ind
, R_ARM_ABS32
);
600 o(0xE08B0000|(intr(r
)<<12)|intr(r
));
604 } else if(v
== VT_CMP
) {
605 o(mapcc(sv
->c
.ul
)|0x3A00001|(intr(r
)<<12));
606 o(mapcc(negcc(sv
->c
.ul
))|0x3A00000|(intr(r
)<<12));
608 } else if (v
== VT_JMP
|| v
== VT_JMPI
) {
611 o(0xE3A00000|(intr(r
)<<12)|t
);
614 o(0xE3A00000|(intr(r
)<<12)|(t
^1));
616 } else if (v
< VT_CONST
) {
619 o(0xEEB00A40|(vfpr(r
)<<12)|vfpr(v
)|T2CPR(ft
)); /* fcpyX */
621 o(0xEE008180|(fpr(r
)<<12)|fpr(v
));
624 o(0xE1A00000|(intr(r
)<<12)|intr(v
));
628 tcc_error("load unimplemented!");
631 /* store register 'r' in lvalue 'v' */
632 void store(int r
, SValue
*sv
)
635 int v
, ft
, fc
, fr
, sign
;
650 if (fr
& VT_LVAL
|| fr
== VT_LOCAL
) {
656 } else if(v
== VT_CONST
) {
667 calcaddr(&base
,&fc
,&sign
,1020,2);
669 op
=0xED000A00; /* fsts */
672 if ((ft
& VT_BTYPE
) != VT_FLOAT
)
673 op
|=0x100; /* fsts -> fstd */
674 o(op
|(vfpr(r
)<<12)|(fc
>>2)|(base
<<16));
679 #if LDOUBLE_SIZE == 8
680 if ((ft
& VT_BTYPE
) != VT_FLOAT
)
683 if ((ft
& VT_BTYPE
) == VT_DOUBLE
)
685 if ((ft
& VT_BTYPE
) == VT_LDOUBLE
)
688 o(op
|(fpr(r
)<<12)|(fc
>>2)|(base
<<16));
691 } else if((ft
& VT_BTYPE
) == VT_SHORT
) {
692 calcaddr(&base
,&fc
,&sign
,255,0);
696 o(op
|(intr(r
)<<12)|(base
<<16)|((fc
&0xf0)<<4)|(fc
&0xf));
698 calcaddr(&base
,&fc
,&sign
,4095,0);
702 if ((ft
& VT_BTYPE
) == VT_BYTE
|| (ft
& VT_BTYPE
) == VT_BOOL
)
704 o(op
|(intr(r
)<<12)|fc
|(base
<<16));
709 tcc_error("store unimplemented");
712 static void gadd_sp(int val
)
714 stuff_const_harder(0xE28DD000,val
);
717 /* 'is_jmp' is '1' if it is a jump */
718 static void gcall_or_jmp(int is_jmp
)
721 if ((vtop
->r
& (VT_VALMASK
| VT_LVAL
)) == VT_CONST
) {
724 x
=encbranch(ind
,ind
+vtop
->c
.ul
,0);
726 if (vtop
->r
& VT_SYM
) {
727 /* relocation case */
728 greloc(cur_text_section
, vtop
->sym
, ind
, R_ARM_PC24
);
730 put_elf_reloc(symtab_section
, cur_text_section
, ind
, R_ARM_PC24
, 0);
731 o(x
|(is_jmp
?0xE0000000:0xE1000000));
734 o(0xE28FE004); // add lr,pc,#4
735 o(0xE51FF004); // ldr pc,[pc,#-4]
736 if (vtop
->r
& VT_SYM
)
737 greloc(cur_text_section
, vtop
->sym
, ind
, R_ARM_ABS32
);
741 /* otherwise, indirect call */
744 o(0xE1A0E00F); // mov lr,pc
745 o(0xE1A0F000|intr(r
)); // mov pc,r
749 /* Return whether a structure is an homogeneous float aggregate or not.
750 The answer is true if all the elements of the structure are of the same
751 primitive float type and there is less than 4 elements.
753 type: the type corresponding to the structure to be tested */
754 static int is_hgen_float_aggr(CType
*type
)
756 if ((type
->t
& VT_BTYPE
) == VT_STRUCT
) {
758 int btype
, nb_fields
= 0;
760 ref
= type
->ref
->next
;
761 btype
= ref
->type
.t
& VT_BTYPE
;
762 if (btype
== VT_FLOAT
|| btype
== VT_DOUBLE
) {
763 for(; ref
&& btype
== (ref
->type
.t
& VT_BTYPE
); ref
= ref
->next
, nb_fields
++);
764 return !ref
&& nb_fields
<= 4;
771 signed char avail
[3]; /* 3 holes max with only float and double alignments */
772 int first_hole
; /* first available hole */
773 int last_hole
; /* last available hole (none if equal to first_hole) */
774 int first_free_reg
; /* next free register in the sequence, hole excluded */
777 #define AVAIL_REGS_INITIALIZER (struct avail_regs) { { 0, 0, 0}, 0, 0, 0 }
779 /* Find suitable registers for a VFP Co-Processor Register Candidate (VFP CPRC
780 param) according to the rules described in the procedure call standard for
781 the ARM architecture (AAPCS). If found, the registers are assigned to this
782 VFP CPRC parameter. Registers are allocated in sequence unless a hole exists
783 and the parameter is a single float.
785 avregs: opaque structure to keep track of available VFP co-processor regs
786 align: alignment contraints for the param, as returned by type_size()
787 size: size of the parameter, as returned by type_size() */
788 int assign_vfpreg(struct avail_regs
*avregs
, int align
, int size
)
792 if (avregs
->first_free_reg
== -1)
794 if (align
>> 3) { /* double alignment */
795 first_reg
= avregs
->first_free_reg
;
796 /* alignment contraint not respected so use next reg and record hole */
798 avregs
->avail
[avregs
->last_hole
++] = first_reg
++;
799 } else { /* no special alignment (float or array of float) */
800 /* if single float and a hole is available, assign the param to it */
801 if (size
== 4 && avregs
->first_hole
!= avregs
->last_hole
)
802 return avregs
->avail
[avregs
->first_hole
++];
804 first_reg
= avregs
->first_free_reg
;
806 if (first_reg
+ size
/ 4 <= 16) {
807 avregs
->first_free_reg
= first_reg
+ size
/ 4;
810 avregs
->first_free_reg
= -1;
814 /* Returns whether all params need to be passed in core registers or not.
815 This is the case for function part of the runtime ABI. */
816 int floats_in_core_regs(SValue
*sval
)
821 switch (sval
->sym
->v
) {
822 case TOK___floatundisf
:
823 case TOK___floatundidf
:
824 case TOK___fixunssfdi
:
825 case TOK___fixunsdfdi
:
827 case TOK___fixunsxfdi
:
829 case TOK___floatdisf
:
830 case TOK___floatdidf
:
840 /* Return the number of registers needed to return the struct, or 0 if
841 returning via struct pointer. */
842 ST_FUNC
int gfunc_sret(CType
*vt
, CType
*ret
, int *ret_align
) {
845 size
= type_size(vt
, &align
);
846 #ifdef TCC_ARM_HARDFLOAT
847 if (is_float(vt
->t
) || is_hgen_float_aggr(vt
)) {
851 return (size
+ 7) >> 3;
867 /* Parameters are classified according to how they are copied to their final
868 destination for the function call. Because the copying is performed class
869 after class according to the order in the union below, it is important that
870 some constraints about the order of the members of this union are respected:
871 - CORE_STRUCT_CLASS must come after STACK_CLASS;
872 - CORE_CLASS must come after STACK_CLASS, CORE_STRUCT_CLASS and
874 - VFP_STRUCT_CLASS must come after VFP_CLASS.
875 See the comment for the main loop in copy_params() for the reason. */
886 int start
; /* first reg or addr used depending on the class */
887 int end
; /* last reg used or next free addr depending on the class */
888 SValue
*sval
; /* pointer to SValue on the value stack */
889 struct param_plan
*prev
; /* previous element in this class */
893 struct param_plan
*pplans
; /* array of all the param plans */
894 struct param_plan
*clsplans
[NB_CLASSES
]; /* per class lists of param plans */
897 #define add_param_plan(plan,pplan,class) \
899 pplan.prev = plan->clsplans[class]; \
900 plan->pplans[plan ## _nb] = pplan; \
901 plan->clsplans[class] = &plan->pplans[plan ## _nb++]; \
904 /* Assign parameters to registers and stack with alignment according to the
905 rules in the procedure call standard for the ARM architecture (AAPCS).
906 The overall assignment is recorded in an array of per parameter structures
907 called parameter plans. The parameter plans are also further organized in a
908 number of linked lists, one per class of parameter (see the comment for the
909 definition of union reg_class).
911 nb_args: number of parameters of the function for which a call is generated
912 corefloat: whether to pass float via core registers or not
913 plan: the structure where the overall assignment is recorded
914 todo: a bitmap that record which core registers hold a parameter
916 Returns the amount of stack space needed for parameter passing
918 Note: this function allocated an array in plan->pplans with tcc_malloc. It
919 is the responsability of the caller to free this array once used (ie not
920 before copy_params). */
921 static int assign_regs(int nb_args
, int corefloat
, struct plan
*plan
, int *todo
)
924 int ncrn
/* next core register number */, nsaa
/* next stacked argument address*/;
926 struct param_plan pplan
;
927 struct avail_regs avregs
= AVAIL_REGS_INITIALIZER
;
931 plan
->pplans
= tcc_malloc(nb_args
* sizeof(*plan
->pplans
));
932 memset(plan
->clsplans
, 0, sizeof(plan
->clsplans
));
933 for(i
= nb_args
; i
-- ;) {
934 int j
, start_vfpreg
= 0;
935 size
= type_size(&vtop
[-i
].type
, &align
);
936 switch(vtop
[-i
].type
.t
& VT_BTYPE
) {
942 int is_hfa
= 0; /* Homogeneous float aggregate */
944 if (is_float(vtop
[-i
].type
.t
)
945 || (is_hfa
= is_hgen_float_aggr(&vtop
[-i
].type
))) {
948 start_vfpreg
= assign_vfpreg(&avregs
, align
, size
);
949 end_vfpreg
= start_vfpreg
+ ((size
- 1) >> 2);
950 if (start_vfpreg
>= 0) {
951 pplan
= (struct param_plan
) {start_vfpreg
, end_vfpreg
, &vtop
[-i
]};
953 add_param_plan(plan
, pplan
, VFP_STRUCT_CLASS
);
955 add_param_plan(plan
, pplan
, VFP_CLASS
);
961 ncrn
= (ncrn
+ (align
-1)/4) & -(align
/4);
962 size
= (size
+ 3) & -4;
963 if (ncrn
+ size
/4 <= 4 || (ncrn
< 4 && start_vfpreg
!= -1)) {
964 /* The parameter is allocated both in core register and on stack. As
965 * such, it can be of either class: it would either be the last of
966 * CORE_STRUCT_CLASS or the first of STACK_CLASS. */
967 for (j
= ncrn
; j
< 4 && j
< ncrn
+ size
/ 4; j
++)
969 pplan
= (struct param_plan
) {ncrn
, j
, &vtop
[-i
]};
970 add_param_plan(plan
, pplan
, CORE_STRUCT_CLASS
);
973 nsaa
= (ncrn
- 4) * 4;
981 int is_long
= (vtop
[-i
].type
.t
& VT_BTYPE
) == VT_LLONG
;
984 ncrn
= (ncrn
+ 1) & -2;
988 pplan
= (struct param_plan
) {ncrn
, ncrn
, &vtop
[-i
]};
992 add_param_plan(plan
, pplan
, CORE_CLASS
);
996 nsaa
= (nsaa
+ (align
- 1)) & ~(align
- 1);
997 pplan
= (struct param_plan
) {nsaa
, nsaa
+ size
, &vtop
[-i
]};
998 add_param_plan(plan
, pplan
, STACK_CLASS
);
999 nsaa
+= size
; /* size already rounded up before */
1004 #undef add_param_plan
1006 /* Copy parameters to their final destination (core reg, VFP reg or stack) for
1009 nb_args: number of parameters the function take
1010 plan: the overall assignment plan for parameters
1011 todo: a bitmap indicating what core reg will hold a parameter
1013 Returns the number of SValue added by this function on the value stack */
1014 static int copy_params(int nb_args
, struct plan
*plan
, int todo
)
1016 int size
, align
, r
, i
, nb_extra_sval
= 0;
1017 struct param_plan
*pplan
;
1019 /* Several constraints require parameters to be copied in a specific order:
1020 - structures are copied to the stack before being loaded in a reg;
1021 - floats loaded to an odd numbered VFP reg are first copied to the
1022 preceding even numbered VFP reg and then moved to the next VFP reg.
1024 It is thus important that:
1025 - structures assigned to core regs must be copied after parameters
1026 assigned to the stack but before structures assigned to VFP regs because
1027 a structure can lie partly in core registers and partly on the stack;
1028 - parameters assigned to the stack and all structures be copied before
1029 parameters assigned to a core reg since copying a parameter to the stack
1030 require using a core reg;
1031 - parameters assigned to VFP regs be copied before structures assigned to
1032 VFP regs as the copy might use an even numbered VFP reg that already
1033 holds part of a structure. */
1034 for(i
= 0; i
< NB_CLASSES
; i
++) {
1035 for(pplan
= plan
->clsplans
[i
]; pplan
; pplan
= pplan
->prev
) {
1036 vpushv(pplan
->sval
);
1037 pplan
->sval
->r
= pplan
->sval
->r2
= VT_CONST
; /* disable entry */
1040 case CORE_STRUCT_CLASS
:
1041 case VFP_STRUCT_CLASS
:
1042 if ((pplan
->sval
->type
.t
& VT_BTYPE
) == VT_STRUCT
) {
1044 size
= type_size(&pplan
->sval
->type
, &align
);
1045 /* align to stack align size */
1046 size
= (size
+ 3) & ~3;
1047 if (i
== STACK_CLASS
&& pplan
->prev
)
1048 padding
= pplan
->start
- pplan
->prev
->end
;
1049 size
+= padding
; /* Add padding if any */
1050 /* allocate the necessary size on stack */
1052 /* generate structure store */
1053 r
= get_reg(RC_INT
);
1054 o(0xE28D0000|(intr(r
)<<12)|padding
); /* add r, sp, padding */
1055 vset(&vtop
->type
, r
| VT_LVAL
, 0);
1057 vstore(); /* memcpy to current sp + potential padding */
1059 /* Homogeneous float aggregate are loaded to VFP registers
1060 immediately since there is no way of loading data in multiple
1061 non consecutive VFP registers as what is done for other
1062 structures (see the use of todo). */
1063 if (i
== VFP_STRUCT_CLASS
) {
1064 int first
= pplan
->start
, nb
= pplan
->end
- first
+ 1;
1065 /* vpop.32 {pplan->start, ..., pplan->end} */
1066 o(0xECBD0A00|(first
&1)<<22|(first
>>1)<<12|nb
);
1067 /* No need to write the register used to a SValue since VFP regs
1068 cannot be used for gcall_or_jmp */
1071 if (is_float(pplan
->sval
->type
.t
)) {
1073 r
= vfpr(gv(RC_FLOAT
)) << 12;
1074 if ((pplan
->sval
->type
.t
& VT_BTYPE
) == VT_FLOAT
)
1078 r
|= 0x101; /* vpush.32 -> vpush.64 */
1080 o(0xED2D0A01 + r
); /* vpush */
1082 r
= fpr(gv(RC_FLOAT
)) << 12;
1083 if ((pplan
->sval
->type
.t
& VT_BTYPE
) == VT_FLOAT
)
1085 else if ((pplan
->sval
->type
.t
& VT_BTYPE
) == VT_DOUBLE
)
1088 size
= LDOUBLE_SIZE
;
1095 o(0xED2D0100|r
|(size
>>2)); /* some kind of vpush for FPA */
1098 /* simple type (currently always same size) */
1099 /* XXX: implicit cast ? */
1101 if ((pplan
->sval
->type
.t
& VT_BTYPE
) == VT_LLONG
) {
1105 o(0xE52D0004|(intr(r
)<<12)); /* push r */
1109 o(0xE52D0004|(intr(r
)<<12)); /* push r */
1111 if (i
== STACK_CLASS
&& pplan
->prev
)
1112 gadd_sp(pplan
->prev
->end
- pplan
->start
); /* Add padding if any */
1117 gv(regmask(TREG_F0
+ (pplan
->start
>> 1)));
1118 if (pplan
->start
& 1) { /* Must be in upper part of double register */
1119 o(0xEEF00A40|((pplan
->start
>>1)<<12)|(pplan
->start
>>1)); /* vmov.f32 s(n+1), sn */
1120 vtop
->r
= VT_CONST
; /* avoid being saved on stack by gv for next float */
1125 if ((pplan
->sval
->type
.t
& VT_BTYPE
) == VT_LLONG
) {
1127 gv(regmask(pplan
->end
));
1128 pplan
->sval
->r2
= vtop
->r
;
1131 gv(regmask(pplan
->start
));
1132 /* Mark register as used so that gcall_or_jmp use another one
1133 (regs >=4 are free as never used to pass parameters) */
1134 pplan
->sval
->r
= vtop
->r
;
1141 /* Manually free remaining registers since next parameters are loaded
1142 * manually, without the help of gv(int). */
1146 o(0xE8BD0000|todo
); /* pop {todo} */
1147 for(pplan
= plan
->clsplans
[CORE_STRUCT_CLASS
]; pplan
; pplan
= pplan
->prev
) {
1149 pplan
->sval
->r
= pplan
->start
;
1150 /* An SValue can only pin 2 registers at best (r and r2) but a structure
1151 can occupy more than 2 registers. Thus, we need to push on the value
1152 stack some fake parameter to have on SValue for each registers used
1153 by a structure (r2 is not used). */
1154 for (r
= pplan
->start
+ 1; r
<= pplan
->end
; r
++) {
1155 if (todo
& (1 << r
)) {
1163 return nb_extra_sval
;
1166 /* Generate function call. The function address is pushed first, then
1167 all the parameters in call order. This functions pops all the
1168 parameters and the function address. */
1169 void gfunc_call(int nb_args
)
1172 int variadic
, corefloat
= 1;
1176 #ifdef TCC_ARM_HARDFLOAT
1177 variadic
= (vtop
[-nb_args
].type
.ref
->c
== FUNC_ELLIPSIS
);
1178 corefloat
= variadic
|| floats_in_core_regs(&vtop
[-nb_args
]);
1180 /* cannot let cpu flags if other instruction are generated. Also avoid leaving
1181 VT_JMP anywhere except on the top of the stack because it would complicate
1182 the code generator. */
1183 r
= vtop
->r
& VT_VALMASK
;
1184 if (r
== VT_CMP
|| (r
& ~1) == VT_JMP
)
1187 args_size
= assign_regs(nb_args
, corefloat
, &plan
, &todo
);
1190 if (args_size
& 7) { /* Stack must be 8 byte aligned at fct call for EABI */
1191 args_size
= (args_size
+ 7) & ~7;
1192 o(0xE24DD004); /* sub sp, sp, #4 */
1196 nb_args
+= copy_params(nb_args
, &plan
, todo
);
1197 tcc_free(plan
.pplans
);
1199 /* Move fct SValue on top as required by gcall_or_jmp */
1203 gadd_sp(args_size
); /* pop all parameters passed on the stack */
1206 if(corefloat
&& is_float(vtop
->type
.ref
->type
.t
)) {
1207 if((vtop
->type
.ref
->type
.t
& VT_BTYPE
) == VT_FLOAT
) {
1208 o(0xEE000A10); /*vmov s0, r0 */
1210 o(0xEE000B10); /* vmov.32 d0[0], r0 */
1211 o(0xEE201B10); /* vmov.32 d0[1], r1 */
1216 vtop
-= nb_args
+ 1; /* Pop all params and fct address from value stack */
1217 leaffunc
= 0; /* we are calling a function, so we aren't in a leaf function */
1220 /* generate function prolog of type 't' */
1221 void gfunc_prolog(CType
*func_type
)
1224 int n
,nf
,size
,align
, variadic
, struct_ret
= 0;
1225 #ifdef TCC_ARM_HARDFLOAT
1226 struct avail_regs avregs
= AVAIL_REGS_INITIALIZER
;
1229 sym
= func_type
->ref
;
1230 func_vt
= sym
->type
;
1233 variadic
= (func_type
->ref
->c
== FUNC_ELLIPSIS
);
1234 if((func_vt
.t
& VT_BTYPE
) == VT_STRUCT
1235 #ifdef TCC_ARM_HARDFLOAT
1236 && (variadic
|| !is_hgen_float_aggr(&func_vt
))
1238 && type_size(&func_vt
,&align
) > 4)
1242 func_vc
= 12; /* Offset from fp of the place to store the result */
1244 for(sym2
=sym
->next
;sym2
&& (n
<4 || nf
<16);sym2
=sym2
->next
) {
1245 size
= type_size(&sym2
->type
, &align
);
1246 #ifdef TCC_ARM_HARDFLOAT
1247 if (!variadic
&& (is_float(sym2
->type
.t
)
1248 || is_hgen_float_aggr(&sym2
->type
))) {
1249 int tmpnf
= assign_vfpreg(&avregs
, align
, size
);
1250 tmpnf
+= (size
+ 3) / 4;
1251 nf
= (tmpnf
> nf
) ? tmpnf
: nf
;
1255 n
+= (size
+ 3) / 4;
1257 o(0xE1A0C00D); /* mov ip,sp */
1266 o(0xE92D0000|((1<<n
)-1)); /* save r0-r4 on stack if needed */
1271 nf
=(nf
+1)&-2; /* nf => HARDFLOAT => EABI */
1272 o(0xED2D0A00|nf
); /* save s0-s15 on stack if needed */
1274 o(0xE92D5800); /* save fp, ip, lr */
1275 o(0xE1A0B00D); /* mov fp, sp */
1276 func_sub_sp_offset
= ind
;
1277 o(0xE1A00000); /* nop, leave space for stack adjustment in epilogue */
1279 int addr
, pn
= struct_ret
, sn
= 0; /* pn=core, sn=stack */
1281 #ifdef TCC_ARM_HARDFLOAT
1283 avregs
= AVAIL_REGS_INITIALIZER
;
1285 while ((sym
= sym
->next
)) {
1288 size
= type_size(type
, &align
);
1289 size
= (size
+ 3) >> 2;
1290 align
= (align
+ 3) & ~3;
1291 #ifdef TCC_ARM_HARDFLOAT
1292 if (!variadic
&& (is_float(sym
->type
.t
)
1293 || is_hgen_float_aggr(&sym
->type
))) {
1294 int fpn
= assign_vfpreg(&avregs
, align
, size
<< 2);
1303 pn
= (pn
+ (align
-1)/4) & -(align
/4);
1305 addr
= (nf
+ pn
) * 4;
1310 #ifdef TCC_ARM_HARDFLOAT
1314 sn
= (sn
+ (align
-1)/4) & -(align
/4);
1316 addr
= (n
+ nf
+ sn
) * 4;
1319 sym_push(sym
->v
& ~SYM_FIELD
, type
, VT_LOCAL
| lvalue_type(type
->t
), addr
+12);
1327 /* generate function epilog */
1328 void gfunc_epilog(void)
1333 /* Useless but harmless copy of the float result into main register(s) in case
1334 of variadic function in the hardfloat variant */
1335 if(is_float(func_vt
.t
)) {
1336 if((func_vt
.t
& VT_BTYPE
) == VT_FLOAT
)
1337 o(0xEE100A10); /* fmrs r0, s0 */
1339 o(0xEE100B10); /* fmrdl r0, d0 */
1340 o(0xEE301B10); /* fmrdh r1, d0 */
1344 o(0xE89BA800); /* restore fp, sp, pc */
1345 diff
= (-loc
+ 3) & -4;
1348 diff
= ((diff
+ 11) & -8) - 4;
1351 x
=stuff_const(0xE24BD000, diff
); /* sub sp,fp,# */
1353 *(uint32_t *)(cur_text_section
->data
+ func_sub_sp_offset
) = x
;
1357 o(0xE59FC004); /* ldr ip,[pc+4] */
1358 o(0xE04BD00C); /* sub sp,fp,ip */
1359 o(0xE1A0F00E); /* mov pc,lr */
1361 *(uint32_t *)(cur_text_section
->data
+ func_sub_sp_offset
) = 0xE1000000|encbranch(func_sub_sp_offset
,addr
,1);
1366 /* generate a jump to a label */
1371 o(0xE0000000|encbranch(r
,t
,1));
1375 /* generate a jump to a fixed address */
1376 void gjmp_addr(int a
)
1381 /* generate a test. set 'inv' to invert test. Stack entry is popped */
1382 int gtst(int inv
, int t
)
1386 v
= vtop
->r
& VT_VALMASK
;
1389 op
=mapcc(inv
?negcc(vtop
->c
.i
):vtop
->c
.i
);
1390 op
|=encbranch(r
,t
,1);
1393 } else if (v
== VT_JMP
|| v
== VT_JMPI
) {
1394 if ((v
& 1) == inv
) {
1403 p
= decbranch(lp
=p
);
1405 x
= (uint32_t *)(cur_text_section
->data
+ lp
);
1407 *x
|= encbranch(lp
,t
,1);
1416 if (is_float(vtop
->type
.t
)) {
1419 o(0xEEB50A40|(vfpr(r
)<<12)|T2CPR(vtop
->type
.t
)); /* fcmpzX */
1420 o(0xEEF1FA10); /* fmstat */
1422 o(0xEE90F118|(fpr(r
)<<16));
1426 return gtst(inv
, t
);
1427 } else if ((vtop
->r
& (VT_VALMASK
| VT_LVAL
| VT_SYM
)) == VT_CONST
) {
1428 /* constant jmp optimization */
1429 if ((vtop
->c
.i
!= 0) != inv
)
1433 o(0xE3300000|(intr(v
)<<16));
1436 return gtst(inv
, t
);
1443 /* generate an integer binary operation */
1444 void gen_opi(int op
)
1447 uint32_t opc
= 0, r
, fr
;
1448 unsigned short retreg
= REG_IRET
;
1456 case TOK_ADDC1
: /* add with carry generation */
1464 case TOK_SUBC1
: /* sub with carry generation */
1468 case TOK_ADDC2
: /* add with carry use */
1472 case TOK_SUBC2
: /* sub with carry use */
1489 gv2(RC_INT
, RC_INT
);
1493 o(0xE0000090|(intr(r
)<<16)|(intr(r
)<<8)|intr(fr
));
1518 func
=TOK___aeabi_idivmod
;
1527 func
=TOK___aeabi_uidivmod
;
1535 gv2(RC_INT
, RC_INT
);
1536 r
=intr(vtop
[-1].r2
=get_reg(RC_INT
));
1538 vtop
[-1].r
=get_reg_ex(RC_INT
,regmask(c
));
1540 o(0xE0800090|(r
<<16)|(intr(vtop
->r
)<<12)|(intr(c
)<<8)|intr(vtop
[1].r
));
1549 if((vtop
[-1].r
& (VT_VALMASK
| VT_LVAL
| VT_SYM
)) == VT_CONST
) {
1550 if(opc
== 4 || opc
== 5 || opc
== 0xc) {
1552 opc
|=2; // sub -> rsb
1555 if ((vtop
->r
& VT_VALMASK
) == VT_CMP
||
1556 (vtop
->r
& (VT_VALMASK
& ~1)) == VT_JMP
)
1561 opc
=0xE0000000|(opc
<<20)|(c
<<16);
1562 if((vtop
->r
& (VT_VALMASK
| VT_LVAL
| VT_SYM
)) == VT_CONST
) {
1564 x
=stuff_const(opc
|0x2000000,vtop
->c
.i
);
1566 r
=intr(vtop
[-1].r
=get_reg_ex(RC_INT
,regmask(vtop
[-1].r
)));
1571 fr
=intr(gv(RC_INT
));
1572 r
=intr(vtop
[-1].r
=get_reg_ex(RC_INT
,two2mask(vtop
->r
,vtop
[-1].r
)));
1576 if (op
>= TOK_ULT
&& op
<= TOK_GT
) {
1582 opc
=0xE1A00000|(opc
<<5);
1583 if ((vtop
->r
& VT_VALMASK
) == VT_CMP
||
1584 (vtop
->r
& (VT_VALMASK
& ~1)) == VT_JMP
)
1590 if ((vtop
->r
& (VT_VALMASK
| VT_LVAL
| VT_SYM
)) == VT_CONST
) {
1591 fr
=intr(vtop
[-1].r
=get_reg_ex(RC_INT
,regmask(vtop
[-1].r
)));
1592 c
= vtop
->c
.i
& 0x1f;
1593 o(opc
|(c
<<7)|(fr
<<12));
1595 fr
=intr(gv(RC_INT
));
1596 c
=intr(vtop
[-1].r
=get_reg_ex(RC_INT
,two2mask(vtop
->r
,vtop
[-1].r
)));
1597 o(opc
|(c
<<12)|(fr
<<8)|0x10);
1602 vpush_global_sym(&func_old_type
, func
);
1609 tcc_error("gen_opi %i unimplemented!",op
);
1614 static int is_zero(int i
)
1616 if((vtop
[i
].r
& (VT_VALMASK
| VT_LVAL
| VT_SYM
)) != VT_CONST
)
1618 if (vtop
[i
].type
.t
== VT_FLOAT
)
1619 return (vtop
[i
].c
.f
== 0.f
);
1620 else if (vtop
[i
].type
.t
== VT_DOUBLE
)
1621 return (vtop
[i
].c
.d
== 0.0);
1622 return (vtop
[i
].c
.ld
== 0.l
);
1625 /* generate a floating point operation 'v = t1 op t2' instruction. The
1626 * two operands are guaranted to have the same floating point type */
1627 void gen_opf(int op
)
1631 x
=0xEE000A00|T2CPR(vtop
->type
.t
);
1649 x
|=0x810000; /* fsubX -> fnegX */
1662 if(op
< TOK_ULT
|| op
> TOK_GT
) {
1663 tcc_error("unknown fp op %x!",op
);
1669 case TOK_LT
: op
=TOK_GT
; break;
1670 case TOK_GE
: op
=TOK_ULE
; break;
1671 case TOK_LE
: op
=TOK_GE
; break;
1672 case TOK_GT
: op
=TOK_ULT
; break;
1675 x
|=0xB40040; /* fcmpX */
1676 if(op
!=TOK_EQ
&& op
!=TOK_NE
)
1677 x
|=0x80; /* fcmpX -> fcmpeX */
1680 o(x
|0x10000|(vfpr(gv(RC_FLOAT
))<<12)); /* fcmp(e)X -> fcmp(e)zX */
1682 x
|=vfpr(gv(RC_FLOAT
));
1684 o(x
|(vfpr(gv(RC_FLOAT
))<<12));
1687 o(0xEEF1FA10); /* fmstat */
1690 case TOK_LE
: op
=TOK_ULE
; break;
1691 case TOK_LT
: op
=TOK_ULT
; break;
1692 case TOK_UGE
: op
=TOK_GE
; break;
1693 case TOK_UGT
: op
=TOK_GT
; break;
1710 vtop
->r
=get_reg_ex(RC_FLOAT
,r
);
1713 o(x
|(vfpr(vtop
->r
)<<12));
1717 static uint32_t is_fconst()
1721 if((vtop
->r
& (VT_VALMASK
| VT_LVAL
| VT_SYM
)) != VT_CONST
)
1723 if (vtop
->type
.t
== VT_FLOAT
)
1725 else if (vtop
->type
.t
== VT_DOUBLE
)
1755 /* generate a floating point operation 'v = t1 op t2' instruction. The
1756 two operands are guaranted to have the same floating point type */
1757 void gen_opf(int op
)
1759 uint32_t x
, r
, r2
, c1
, c2
;
1760 //fputs("gen_opf\n",stderr);
1766 #if LDOUBLE_SIZE == 8
1767 if ((vtop
->type
.t
& VT_BTYPE
) != VT_FLOAT
)
1770 if ((vtop
->type
.t
& VT_BTYPE
) == VT_DOUBLE
)
1772 else if ((vtop
->type
.t
& VT_BTYPE
) == VT_LDOUBLE
)
1783 r
=fpr(gv(RC_FLOAT
));
1790 r2
=fpr(gv(RC_FLOAT
));
1799 r
=fpr(gv(RC_FLOAT
));
1801 } else if(c1
&& c1
<=0xf) {
1804 r
=fpr(gv(RC_FLOAT
));
1809 r
=fpr(gv(RC_FLOAT
));
1811 r2
=fpr(gv(RC_FLOAT
));
1820 r
=fpr(gv(RC_FLOAT
));
1825 r2
=fpr(gv(RC_FLOAT
));
1833 r
=fpr(gv(RC_FLOAT
));
1835 } else if(c1
&& c1
<=0xf) {
1838 r
=fpr(gv(RC_FLOAT
));
1843 r
=fpr(gv(RC_FLOAT
));
1845 r2
=fpr(gv(RC_FLOAT
));
1849 if(op
>= TOK_ULT
&& op
<= TOK_GT
) {
1850 x
|=0xd0f110; // cmfe
1851 /* bug (intention?) in Linux FPU emulator
1852 doesn't set carry if equal */
1858 tcc_error("unsigned comparision on floats?");
1864 op
=TOK_ULE
; /* correct in unordered case only if AC bit in FPSR set */
1868 x
&=~0x400000; // cmfe -> cmf
1890 r
=fpr(gv(RC_FLOAT
));
1897 r2
=fpr(gv(RC_FLOAT
));
1899 vtop
[-1].r
= VT_CMP
;
1902 tcc_error("unknown fp op %x!",op
);
1906 if(vtop
[-1].r
== VT_CMP
)
1912 vtop
[-1].r
=get_reg_ex(RC_FLOAT
,two2mask(vtop
[-1].r
,c1
));
1916 o(x
|(r
<<16)|(c1
<<12)|r2
);
1920 /* convert integers to fp 't' type. Must handle 'int', 'unsigned int'
1921 and 'long long' cases. */
1922 ST_FUNC
void gen_cvt_itof1(int t
)
1926 bt
=vtop
->type
.t
& VT_BTYPE
;
1927 if(bt
== VT_INT
|| bt
== VT_SHORT
|| bt
== VT_BYTE
) {
1933 r2
=vfpr(vtop
->r
=get_reg(RC_FLOAT
));
1934 o(0xEE000A10|(r
<<12)|(r2
<<16)); /* fmsr */
1936 if(!(vtop
->type
.t
& VT_UNSIGNED
))
1937 r2
|=0x80; /* fuitoX -> fsituX */
1938 o(0xEEB80A40|r2
|T2CPR(t
)); /* fYitoX*/
1940 r2
=fpr(vtop
->r
=get_reg(RC_FLOAT
));
1941 if((t
& VT_BTYPE
) != VT_FLOAT
)
1942 dsize
=0x80; /* flts -> fltd */
1943 o(0xEE000110|dsize
|(r2
<<16)|(r
<<12)); /* flts */
1944 if((vtop
->type
.t
& (VT_UNSIGNED
|VT_BTYPE
)) == (VT_UNSIGNED
|VT_INT
)) {
1946 o(0xE3500000|(r
<<12)); /* cmp */
1947 r
=fpr(get_reg(RC_FLOAT
));
1948 if(last_itod_magic
) {
1949 off
=ind
+8-last_itod_magic
;
1954 o(0xBD1F0100|(r
<<12)|off
); /* ldflts */
1956 o(0xEA000000); /* b */
1957 last_itod_magic
=ind
;
1958 o(0x4F800000); /* 4294967296.0f */
1960 o(0xBE000100|dsize
|(r2
<<16)|(r2
<<12)|r
); /* adflt */
1964 } else if(bt
== VT_LLONG
) {
1966 CType
*func_type
= 0;
1967 if((t
& VT_BTYPE
) == VT_FLOAT
) {
1968 func_type
= &func_float_type
;
1969 if(vtop
->type
.t
& VT_UNSIGNED
)
1970 func
=TOK___floatundisf
;
1972 func
=TOK___floatdisf
;
1973 #if LDOUBLE_SIZE != 8
1974 } else if((t
& VT_BTYPE
) == VT_LDOUBLE
) {
1975 func_type
= &func_ldouble_type
;
1976 if(vtop
->type
.t
& VT_UNSIGNED
)
1977 func
=TOK___floatundixf
;
1979 func
=TOK___floatdixf
;
1980 } else if((t
& VT_BTYPE
) == VT_DOUBLE
) {
1982 } else if((t
& VT_BTYPE
) == VT_DOUBLE
|| (t
& VT_BTYPE
) == VT_LDOUBLE
) {
1984 func_type
= &func_double_type
;
1985 if(vtop
->type
.t
& VT_UNSIGNED
)
1986 func
=TOK___floatundidf
;
1988 func
=TOK___floatdidf
;
1991 vpush_global_sym(func_type
, func
);
1999 tcc_error("unimplemented gen_cvt_itof %x!",vtop
->type
.t
);
2002 /* convert fp to int 't' type */
2003 void gen_cvt_ftoi(int t
)
2009 r2
=vtop
->type
.t
& VT_BTYPE
;
2012 r
=vfpr(gv(RC_FLOAT
));
2014 o(0xEEBC0AC0|(r
<<12)|r
|T2CPR(r2
)|u
); /* ftoXizY */
2015 r2
=intr(vtop
->r
=get_reg(RC_INT
));
2016 o(0xEE100A10|(r
<<16)|(r2
<<12));
2021 func
=TOK___fixunssfsi
;
2022 #if LDOUBLE_SIZE != 8
2023 else if(r2
== VT_LDOUBLE
)
2024 func
=TOK___fixunsxfsi
;
2025 else if(r2
== VT_DOUBLE
)
2027 else if(r2
== VT_LDOUBLE
|| r2
== VT_DOUBLE
)
2029 func
=TOK___fixunsdfsi
;
2031 r
=fpr(gv(RC_FLOAT
));
2032 r2
=intr(vtop
->r
=get_reg(RC_INT
));
2033 o(0xEE100170|(r2
<<12)|r
);
2037 } else if(t
== VT_LLONG
) { // unsigned handled in gen_cvt_ftoi1
2040 #if LDOUBLE_SIZE != 8
2041 else if(r2
== VT_LDOUBLE
)
2043 else if(r2
== VT_DOUBLE
)
2045 else if(r2
== VT_LDOUBLE
|| r2
== VT_DOUBLE
)
2050 vpush_global_sym(&func_old_type
, func
);
2055 vtop
->r2
= REG_LRET
;
2059 tcc_error("unimplemented gen_cvt_ftoi!");
2062 /* convert from one floating point type to another */
2063 void gen_cvt_ftof(int t
)
2066 if(((vtop
->type
.t
& VT_BTYPE
) == VT_FLOAT
) != ((t
& VT_BTYPE
) == VT_FLOAT
)) {
2067 uint32_t r
= vfpr(gv(RC_FLOAT
));
2068 o(0xEEB70AC0|(r
<<12)|r
|T2CPR(vtop
->type
.t
));
2071 /* all we have to do on i386 and FPA ARM is to put the float in a register */
2076 /* computed goto support */
2083 /* Save the stack pointer onto the stack and return the location of its address */
2084 ST_FUNC
void gen_vla_sp_save(int addr
) {
2085 tcc_error("variable length arrays unsupported for this target");
2088 /* Restore the SP from a location on the stack */
2089 ST_FUNC
void gen_vla_sp_restore(int addr
) {
2090 tcc_error("variable length arrays unsupported for this target");
2093 /* Subtract from the stack pointer, and push the resulting value onto the stack */
2094 ST_FUNC
void gen_vla_alloc(CType
*type
, int align
) {
2095 tcc_error("variable length arrays unsupported for this target");
2098 /* end of ARM code generator */
2099 /*************************************************************/
2101 /*************************************************************/