2 * ARMv4 code generator for TCC
4 * Copyright (c) 2003 Daniel Glöckner
5 * Copyright (c) 2012 Thomas Preud'homme
7 * Based on i386-gen.c by Fabrice Bellard
9 * This library is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU Lesser General Public
11 * License as published by the Free Software Foundation; either
12 * version 2 of the License, or (at your option) any later version.
14 * This library is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * Lesser General Public License for more details.
19 * You should have received a copy of the GNU Lesser General Public
20 * License along with this library; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
24 #ifdef TARGET_DEFS_ONLY
26 #if defined(TCC_ARM_EABI) && !defined(TCC_ARM_VFP)
27 #error "Currently TinyCC only supports float computation with VFP instructions"
30 /* number of available registers */
37 #ifndef TCC_CPU_VERSION
38 # define TCC_CPU_VERSION 5
41 /* a register can belong to several classes. The classes must be
42 sorted from more general to more precise (see gv2() code which does
43 assumptions on it). */
44 #define RC_INT 0x0001 /* generic integer register */
45 #define RC_FLOAT 0x0002 /* generic float register */
61 #define RC_IRET RC_R0 /* function return: integer register */
62 #define RC_LRET RC_R1 /* function return: second integer register */
63 #define RC_FRET RC_F0 /* function return: float register */
65 /* pretty names for the registers */
87 #define T2CPR(t) (((t) & VT_BTYPE) != VT_FLOAT ? 0x100 : 0)
90 /* return registers for function */
91 #define REG_IRET TREG_R0 /* single word int return register */
92 #define REG_LRET TREG_R1 /* second word return register (for long long) */
93 #define REG_FRET TREG_F0 /* float return register */
96 #define TOK___divdi3 TOK___aeabi_ldivmod
97 #define TOK___moddi3 TOK___aeabi_ldivmod
98 #define TOK___udivdi3 TOK___aeabi_uldivmod
99 #define TOK___umoddi3 TOK___aeabi_uldivmod
102 /* defined if function parameters must be evaluated in reverse order */
103 #define INVERT_FUNC_PARAMS
105 /* defined if structures are passed as pointers. Otherwise structures
106 are directly pushed on stack. */
107 /* #define FUNC_STRUCT_PARAM_AS_PTR */
109 /* pointer size, in bytes */
112 /* long double size and alignment, in bytes */
114 #define LDOUBLE_SIZE 8
118 #define LDOUBLE_SIZE 8
122 #define LDOUBLE_ALIGN 8
124 #define LDOUBLE_ALIGN 4
127 /* maximum alignment (for aligned attribute support) */
130 #define CHAR_IS_UNSIGNED
132 /******************************************************/
133 #else /* ! TARGET_DEFS_ONLY */
134 /******************************************************/
137 enum float_abi float_abi
;
139 ST_DATA
const int reg_classes
[NB_REGS
] = {
140 /* r0 */ RC_INT
| RC_R0
,
141 /* r1 */ RC_INT
| RC_R1
,
142 /* r2 */ RC_INT
| RC_R2
,
143 /* r3 */ RC_INT
| RC_R3
,
144 /* r12 */ RC_INT
| RC_R12
,
145 /* f0 */ RC_FLOAT
| RC_F0
,
146 /* f1 */ RC_FLOAT
| RC_F1
,
147 /* f2 */ RC_FLOAT
| RC_F2
,
148 /* f3 */ RC_FLOAT
| RC_F3
,
150 /* d4/s8 */ RC_FLOAT
| RC_F4
,
151 /* d5/s10 */ RC_FLOAT
| RC_F5
,
152 /* d6/s12 */ RC_FLOAT
| RC_F6
,
153 /* d7/s14 */ RC_FLOAT
| RC_F7
,
157 static int func_sub_sp_offset
, last_itod_magic
;
160 #if defined(TCC_ARM_EABI) && defined(TCC_ARM_VFP)
161 static CType float_type
, double_type
, func_float_type
, func_double_type
;
162 ST_FUNC
void arm_init(struct TCCState
*s
)
164 float_type
.t
= VT_FLOAT
;
165 double_type
.t
= VT_DOUBLE
;
166 func_float_type
.t
= VT_FUNC
;
167 func_float_type
.ref
= sym_push(SYM_FIELD
, &float_type
, FUNC_CDECL
, FUNC_OLD
);
168 func_double_type
.t
= VT_FUNC
;
169 func_double_type
.ref
= sym_push(SYM_FIELD
, &double_type
, FUNC_CDECL
, FUNC_OLD
);
171 float_abi
= s
->float_abi
;
172 #ifndef TCC_ARM_HARDFLOAT
173 tcc_warning("soft float ABI currently not supported: default to softfp");
177 #define func_float_type func_old_type
178 #define func_double_type func_old_type
179 #define func_ldouble_type func_old_type
180 ST_FUNC
void arm_init(struct TCCState
*s
)
183 #if !defined (TCC_ARM_VFP)
184 tcc_warning("Support for FPA is deprecated and will be removed in next"
187 #if !defined (TCC_ARM_EABI)
188 tcc_warning("Support for OABI is deprecated and will be removed in next"
195 static int two2mask(int a
,int b
) {
196 return (reg_classes
[a
]|reg_classes
[b
])&~(RC_INT
|RC_FLOAT
);
199 static int regmask(int r
) {
200 return reg_classes
[r
]&~(RC_INT
|RC_FLOAT
);
203 /******************************************************/
205 #if defined(TCC_ARM_EABI) && !defined(CONFIG_TCC_ELFINTERP)
206 const char *default_elfinterp(struct TCCState
*s
)
208 if (s
->float_abi
== ARM_HARD_FLOAT
)
209 return "/lib/ld-linux-armhf.so.3";
211 return "/lib/ld-linux.so.3";
217 /* this is a good place to start adding big-endian support*/
222 if (!cur_text_section
)
223 tcc_error("compiler error! This happens f.ex. if the compiler\n"
224 "can't evaluate constant expressions outside of a function.");
225 if (ind1
> cur_text_section
->data_allocated
)
226 section_realloc(cur_text_section
, ind1
);
227 cur_text_section
->data
[ind
++] = i
&255;
229 cur_text_section
->data
[ind
++] = i
&255;
231 cur_text_section
->data
[ind
++] = i
&255;
233 cur_text_section
->data
[ind
++] = i
;
236 static uint32_t stuff_const(uint32_t op
, uint32_t c
)
239 uint32_t nc
= 0, negop
= 0;
249 case 0x1A00000: //mov
250 case 0x1E00000: //mvn
257 return (op
&0xF010F000)|((op
>>16)&0xF)|0x1E00000;
261 return (op
&0xF010F000)|((op
>>16)&0xF)|0x1A00000;
262 case 0x1C00000: //bic
267 case 0x1800000: //orr
269 return (op
&0xFFF0FFFF)|0x1E00000;
275 if(c
<256) /* catch undefined <<32 */
278 m
=(0xff>>i
)|(0xff<<(32-i
));
280 return op
|(i
<<7)|(c
<<i
)|(c
>>(32-i
));
290 void stuff_const_harder(uint32_t op
, uint32_t v
) {
296 uint32_t a
[16], nv
, no
, o2
, n2
;
299 o2
=(op
&0xfff0ffff)|((op
&0xf000)<<4);;
301 a
[i
]=(a
[i
-1]>>2)|(a
[i
-1]<<30);
303 for(j
=i
<4?i
+12:15;j
>=i
+4;j
--)
304 if((v
&(a
[i
]|a
[j
]))==v
) {
305 o(stuff_const(op
,v
&a
[i
]));
306 o(stuff_const(o2
,v
&a
[j
]));
313 for(j
=i
<4?i
+12:15;j
>=i
+4;j
--)
314 if((nv
&(a
[i
]|a
[j
]))==nv
) {
315 o(stuff_const(no
,nv
&a
[i
]));
316 o(stuff_const(n2
,nv
&a
[j
]));
321 for(k
=i
<4?i
+12:15;k
>=j
+4;k
--)
322 if((v
&(a
[i
]|a
[j
]|a
[k
]))==v
) {
323 o(stuff_const(op
,v
&a
[i
]));
324 o(stuff_const(o2
,v
&a
[j
]));
325 o(stuff_const(o2
,v
&a
[k
]));
332 for(k
=i
<4?i
+12:15;k
>=j
+4;k
--)
333 if((nv
&(a
[i
]|a
[j
]|a
[k
]))==nv
) {
334 o(stuff_const(no
,nv
&a
[i
]));
335 o(stuff_const(n2
,nv
&a
[j
]));
336 o(stuff_const(n2
,nv
&a
[k
]));
339 o(stuff_const(op
,v
&a
[0]));
340 o(stuff_const(o2
,v
&a
[4]));
341 o(stuff_const(o2
,v
&a
[8]));
342 o(stuff_const(o2
,v
&a
[12]));
346 uint32_t encbranch(int pos
, int addr
, int fail
)
350 if(addr
>=0x1000000 || addr
<-0x1000000) {
352 tcc_error("FIXME: function bigger than 32MB");
355 return 0x0A000000|(addr
&0xffffff);
358 int decbranch(int pos
)
361 x
=*(uint32_t *)(cur_text_section
->data
+ pos
);
368 /* output a symbol and patch all calls to it */
369 void gsym_addr(int t
, int a
)
374 x
=(uint32_t *)(cur_text_section
->data
+ t
);
377 *x
=0xE1A00000; // nop
380 *x
|= encbranch(lt
,a
,1);
386 static uint32_t vfpr(int r
)
388 if(r
<TREG_F0
|| r
>TREG_F7
)
389 tcc_error("compiler error! register %i is no vfp register",r
);
393 static uint32_t fpr(int r
)
395 if(r
<TREG_F0
|| r
>TREG_F3
)
396 tcc_error("compiler error! register %i is no fpa register",r
);
401 static uint32_t intr(int r
)
405 if(r
>= TREG_R0
&& r
<= TREG_R3
)
407 if (!(r
>= TREG_SP
&& r
<= TREG_LR
))
408 tcc_error("compiler error! register %i is no int register",r
);
409 return r
+ (13 - TREG_SP
);
412 static void calcaddr(uint32_t *base
, int *off
, int *sgn
, int maxoff
, unsigned shift
)
414 if(*off
>maxoff
|| *off
&((1<<shift
)-1)) {
421 y
=stuff_const(x
,*off
&~maxoff
);
427 y
=stuff_const(x
,(*off
+maxoff
)&~maxoff
);
431 *off
=((*off
+maxoff
)&~maxoff
)-*off
;
434 stuff_const_harder(x
,*off
&~maxoff
);
439 static uint32_t mapcc(int cc
)
444 return 0x30000000; /* CC/LO */
446 return 0x20000000; /* CS/HS */
448 return 0x00000000; /* EQ */
450 return 0x10000000; /* NE */
452 return 0x90000000; /* LS */
454 return 0x80000000; /* HI */
456 return 0x40000000; /* MI */
458 return 0x50000000; /* PL */
460 return 0xB0000000; /* LT */
462 return 0xA0000000; /* GE */
464 return 0xD0000000; /* LE */
466 return 0xC0000000; /* GT */
468 tcc_error("unexpected condition code");
469 return 0xE0000000; /* AL */
472 static int negcc(int cc
)
501 tcc_error("unexpected condition code");
505 /* load 'r' from value 'sv' */
506 void load(int r
, SValue
*sv
)
508 int v
, ft
, fc
, fr
, sign
;
525 uint32_t base
= 0xB; // fp
528 v1
.r
= VT_LOCAL
| VT_LVAL
;
534 } else if(v
== VT_CONST
) {
543 } else if(v
< VT_CONST
) {
550 calcaddr(&base
,&fc
,&sign
,1020,2);
552 op
=0xED100A00; /* flds */
555 if ((ft
& VT_BTYPE
) != VT_FLOAT
)
556 op
|=0x100; /* flds -> fldd */
557 o(op
|(vfpr(r
)<<12)|(fc
>>2)|(base
<<16));
562 #if LDOUBLE_SIZE == 8
563 if ((ft
& VT_BTYPE
) != VT_FLOAT
)
566 if ((ft
& VT_BTYPE
) == VT_DOUBLE
)
568 else if ((ft
& VT_BTYPE
) == VT_LDOUBLE
)
571 o(op
|(fpr(r
)<<12)|(fc
>>2)|(base
<<16));
573 } else if((ft
& (VT_BTYPE
|VT_UNSIGNED
)) == VT_BYTE
574 || (ft
& VT_BTYPE
) == VT_SHORT
) {
575 calcaddr(&base
,&fc
,&sign
,255,0);
577 if ((ft
& VT_BTYPE
) == VT_SHORT
)
579 if ((ft
& VT_UNSIGNED
) == 0)
583 o(op
|(intr(r
)<<12)|(base
<<16)|((fc
&0xf0)<<4)|(fc
&0xf));
585 calcaddr(&base
,&fc
,&sign
,4095,0);
589 if ((ft
& VT_BTYPE
) == VT_BYTE
|| (ft
& VT_BTYPE
) == VT_BOOL
)
591 o(op
|(intr(r
)<<12)|fc
|(base
<<16));
597 op
=stuff_const(0xE3A00000|(intr(r
)<<12),sv
->c
.i
);
598 if (fr
& VT_SYM
|| !op
) {
599 o(0xE59F0000|(intr(r
)<<12));
602 greloc(cur_text_section
, sv
->sym
, ind
, R_ARM_ABS32
);
607 } else if (v
== VT_LOCAL
) {
608 op
=stuff_const(0xE28B0000|(intr(r
)<<12),sv
->c
.i
);
609 if (fr
& VT_SYM
|| !op
) {
610 o(0xE59F0000|(intr(r
)<<12));
612 if(fr
& VT_SYM
) // needed ?
613 greloc(cur_text_section
, sv
->sym
, ind
, R_ARM_ABS32
);
615 o(0xE08B0000|(intr(r
)<<12)|intr(r
));
619 } else if(v
== VT_CMP
) {
620 o(mapcc(sv
->c
.i
)|0x3A00001|(intr(r
)<<12));
621 o(mapcc(negcc(sv
->c
.i
))|0x3A00000|(intr(r
)<<12));
623 } else if (v
== VT_JMP
|| v
== VT_JMPI
) {
626 o(0xE3A00000|(intr(r
)<<12)|t
);
629 o(0xE3A00000|(intr(r
)<<12)|(t
^1));
631 } else if (v
< VT_CONST
) {
634 o(0xEEB00A40|(vfpr(r
)<<12)|vfpr(v
)|T2CPR(ft
)); /* fcpyX */
636 o(0xEE008180|(fpr(r
)<<12)|fpr(v
));
639 o(0xE1A00000|(intr(r
)<<12)|intr(v
));
643 tcc_error("load unimplemented!");
646 /* store register 'r' in lvalue 'v' */
647 void store(int r
, SValue
*sv
)
650 int v
, ft
, fc
, fr
, sign
;
665 if (fr
& VT_LVAL
|| fr
== VT_LOCAL
) {
666 uint32_t base
= 0xb; /* fp */
671 } else if(v
== VT_CONST
) {
683 calcaddr(&base
,&fc
,&sign
,1020,2);
685 op
=0xED000A00; /* fsts */
688 if ((ft
& VT_BTYPE
) != VT_FLOAT
)
689 op
|=0x100; /* fsts -> fstd */
690 o(op
|(vfpr(r
)<<12)|(fc
>>2)|(base
<<16));
695 #if LDOUBLE_SIZE == 8
696 if ((ft
& VT_BTYPE
) != VT_FLOAT
)
699 if ((ft
& VT_BTYPE
) == VT_DOUBLE
)
701 if ((ft
& VT_BTYPE
) == VT_LDOUBLE
)
704 o(op
|(fpr(r
)<<12)|(fc
>>2)|(base
<<16));
707 } else if((ft
& VT_BTYPE
) == VT_SHORT
) {
708 calcaddr(&base
,&fc
,&sign
,255,0);
712 o(op
|(intr(r
)<<12)|(base
<<16)|((fc
&0xf0)<<4)|(fc
&0xf));
714 calcaddr(&base
,&fc
,&sign
,4095,0);
718 if ((ft
& VT_BTYPE
) == VT_BYTE
|| (ft
& VT_BTYPE
) == VT_BOOL
)
720 o(op
|(intr(r
)<<12)|fc
|(base
<<16));
725 tcc_error("store unimplemented");
728 static void gadd_sp(int val
)
730 stuff_const_harder(0xE28DD000,val
);
733 /* 'is_jmp' is '1' if it is a jump */
734 static void gcall_or_jmp(int is_jmp
)
738 if ((vtop
->r
& (VT_VALMASK
| VT_LVAL
)) == VT_CONST
) {
740 if(vtop
->r
& VT_SYM
){
741 x
=encbranch(ind
,ind
+vtop
->c
.i
,0);
743 /* relocation case */
744 greloc(cur_text_section
, vtop
->sym
, ind
, R_ARM_PC24
);
745 o(x
|(is_jmp
?0xE0000000:0xE1000000));
748 o(0xE28FE004); // add lr,pc,#4
749 o(0xE51FF004); // ldr pc,[pc,#-4]
750 greloc(cur_text_section
, vtop
->sym
, ind
, R_ARM_ABS32
);
755 o(0xE28FE004); // add lr,pc,#4
756 o(0xE51FF004); // ldr pc,[pc,#-4]
760 /* otherwise, indirect call */
763 o(0xE1A0E00F); // mov lr,pc
764 o(0xE1A0F000|intr(r
)); // mov pc,r
768 static int unalias_ldbl(int btype
)
770 #if LDOUBLE_SIZE == 8
771 if (btype
== VT_LDOUBLE
)
777 /* Return whether a structure is an homogeneous float aggregate or not.
778 The answer is true if all the elements of the structure are of the same
779 primitive float type and there is less than 4 elements.
781 type: the type corresponding to the structure to be tested */
782 static int is_hgen_float_aggr(CType
*type
)
784 if ((type
->t
& VT_BTYPE
) == VT_STRUCT
) {
786 int btype
, nb_fields
= 0;
788 ref
= type
->ref
->next
;
789 btype
= unalias_ldbl(ref
->type
.t
& VT_BTYPE
);
790 if (btype
== VT_FLOAT
|| btype
== VT_DOUBLE
) {
791 for(; ref
&& btype
== unalias_ldbl(ref
->type
.t
& VT_BTYPE
); ref
= ref
->next
, nb_fields
++);
792 return !ref
&& nb_fields
<= 4;
799 signed char avail
[3]; /* 3 holes max with only float and double alignments */
800 int first_hole
; /* first available hole */
801 int last_hole
; /* last available hole (none if equal to first_hole) */
802 int first_free_reg
; /* next free register in the sequence, hole excluded */
805 #define AVAIL_REGS_INITIALIZER (struct avail_regs) { { 0, 0, 0}, 0, 0, 0 }
807 /* Find suitable registers for a VFP Co-Processor Register Candidate (VFP CPRC
808 param) according to the rules described in the procedure call standard for
809 the ARM architecture (AAPCS). If found, the registers are assigned to this
810 VFP CPRC parameter. Registers are allocated in sequence unless a hole exists
811 and the parameter is a single float.
813 avregs: opaque structure to keep track of available VFP co-processor regs
814 align: alignment constraints for the param, as returned by type_size()
815 size: size of the parameter, as returned by type_size() */
816 int assign_vfpreg(struct avail_regs
*avregs
, int align
, int size
)
820 if (avregs
->first_free_reg
== -1)
822 if (align
>> 3) { /* double alignment */
823 first_reg
= avregs
->first_free_reg
;
824 /* alignment constraint not respected so use next reg and record hole */
826 avregs
->avail
[avregs
->last_hole
++] = first_reg
++;
827 } else { /* no special alignment (float or array of float) */
828 /* if single float and a hole is available, assign the param to it */
829 if (size
== 4 && avregs
->first_hole
!= avregs
->last_hole
)
830 return avregs
->avail
[avregs
->first_hole
++];
832 first_reg
= avregs
->first_free_reg
;
834 if (first_reg
+ size
/ 4 <= 16) {
835 avregs
->first_free_reg
= first_reg
+ size
/ 4;
838 avregs
->first_free_reg
= -1;
842 /* Returns whether all params need to be passed in core registers or not.
843 This is the case for function part of the runtime ABI. */
844 int floats_in_core_regs(SValue
*sval
)
849 switch (sval
->sym
->v
) {
850 case TOK___floatundisf
:
851 case TOK___floatundidf
:
852 case TOK___fixunssfdi
:
853 case TOK___fixunsdfdi
:
855 case TOK___fixunsxfdi
:
857 case TOK___floatdisf
:
858 case TOK___floatdidf
:
868 /* Return the number of registers needed to return the struct, or 0 if
869 returning via struct pointer. */
870 ST_FUNC
int gfunc_sret(CType
*vt
, int variadic
, CType
*ret
, int *ret_align
, int *regsize
) {
873 size
= type_size(vt
, &align
);
874 if (float_abi
== ARM_HARD_FLOAT
&& !variadic
&&
875 (is_float(vt
->t
) || is_hgen_float_aggr(vt
))) {
880 return (size
+ 7) >> 3;
881 } else if (size
<= 4) {
894 /* Parameters are classified according to how they are copied to their final
895 destination for the function call. Because the copying is performed class
896 after class according to the order in the union below, it is important that
897 some constraints about the order of the members of this union are respected:
898 - CORE_STRUCT_CLASS must come after STACK_CLASS;
899 - CORE_CLASS must come after STACK_CLASS, CORE_STRUCT_CLASS and
901 - VFP_STRUCT_CLASS must come after VFP_CLASS.
902 See the comment for the main loop in copy_params() for the reason. */
913 int start
; /* first reg or addr used depending on the class */
914 int end
; /* last reg used or next free addr depending on the class */
915 SValue
*sval
; /* pointer to SValue on the value stack */
916 struct param_plan
*prev
; /* previous element in this class */
920 struct param_plan
*pplans
; /* array of all the param plans */
921 struct param_plan
*clsplans
[NB_CLASSES
]; /* per class lists of param plans */
924 #define add_param_plan(plan,pplan,class) \
926 pplan.prev = plan->clsplans[class]; \
927 plan->pplans[plan ## _nb] = pplan; \
928 plan->clsplans[class] = &plan->pplans[plan ## _nb++]; \
931 /* Assign parameters to registers and stack with alignment according to the
932 rules in the procedure call standard for the ARM architecture (AAPCS).
933 The overall assignment is recorded in an array of per parameter structures
934 called parameter plans. The parameter plans are also further organized in a
935 number of linked lists, one per class of parameter (see the comment for the
936 definition of union reg_class).
938 nb_args: number of parameters of the function for which a call is generated
939 float_abi: float ABI in use for this function call
940 plan: the structure where the overall assignment is recorded
941 todo: a bitmap that record which core registers hold a parameter
943 Returns the amount of stack space needed for parameter passing
945 Note: this function allocated an array in plan->pplans with tcc_malloc. It
946 is the responsibility of the caller to free this array once used (ie not
947 before copy_params). */
948 static int assign_regs(int nb_args
, int float_abi
, struct plan
*plan
, int *todo
)
951 int ncrn
/* next core register number */, nsaa
/* next stacked argument address*/;
953 struct param_plan pplan
;
954 struct avail_regs avregs
= AVAIL_REGS_INITIALIZER
;
958 plan
->pplans
= tcc_malloc(nb_args
* sizeof(*plan
->pplans
));
959 memset(plan
->clsplans
, 0, sizeof(plan
->clsplans
));
960 for(i
= nb_args
; i
-- ;) {
961 int j
, start_vfpreg
= 0;
962 CType type
= vtop
[-i
].type
;
964 size
= type_size(&type
, &align
);
965 size
= (size
+ 3) & ~3;
966 align
= (align
+ 3) & ~3;
967 switch(vtop
[-i
].type
.t
& VT_BTYPE
) {
972 if (float_abi
== ARM_HARD_FLOAT
) {
973 int is_hfa
= 0; /* Homogeneous float aggregate */
975 if (is_float(vtop
[-i
].type
.t
)
976 || (is_hfa
= is_hgen_float_aggr(&vtop
[-i
].type
))) {
979 start_vfpreg
= assign_vfpreg(&avregs
, align
, size
);
980 end_vfpreg
= start_vfpreg
+ ((size
- 1) >> 2);
981 if (start_vfpreg
>= 0) {
982 pplan
= (struct param_plan
) {start_vfpreg
, end_vfpreg
, &vtop
[-i
]};
984 add_param_plan(plan
, pplan
, VFP_STRUCT_CLASS
);
986 add_param_plan(plan
, pplan
, VFP_CLASS
);
992 ncrn
= (ncrn
+ (align
-1)/4) & ~((align
/4) - 1);
993 if (ncrn
+ size
/4 <= 4 || (ncrn
< 4 && start_vfpreg
!= -1)) {
994 /* The parameter is allocated both in core register and on stack. As
995 * such, it can be of either class: it would either be the last of
996 * CORE_STRUCT_CLASS or the first of STACK_CLASS. */
997 for (j
= ncrn
; j
< 4 && j
< ncrn
+ size
/ 4; j
++)
999 pplan
= (struct param_plan
) {ncrn
, j
, &vtop
[-i
]};
1000 add_param_plan(plan
, pplan
, CORE_STRUCT_CLASS
);
1003 nsaa
= (ncrn
- 4) * 4;
1011 int is_long
= (vtop
[-i
].type
.t
& VT_BTYPE
) == VT_LLONG
;
1014 ncrn
= (ncrn
+ 1) & -2;
1018 pplan
= (struct param_plan
) {ncrn
, ncrn
, &vtop
[-i
]};
1022 add_param_plan(plan
, pplan
, CORE_CLASS
);
1026 nsaa
= (nsaa
+ (align
- 1)) & ~(align
- 1);
1027 pplan
= (struct param_plan
) {nsaa
, nsaa
+ size
, &vtop
[-i
]};
1028 add_param_plan(plan
, pplan
, STACK_CLASS
);
1029 nsaa
+= size
; /* size already rounded up before */
1034 #undef add_param_plan
1036 /* Copy parameters to their final destination (core reg, VFP reg or stack) for
1039 nb_args: number of parameters the function take
1040 plan: the overall assignment plan for parameters
1041 todo: a bitmap indicating what core reg will hold a parameter
1043 Returns the number of SValue added by this function on the value stack */
1044 static int copy_params(int nb_args
, struct plan
*plan
, int todo
)
1046 int size
, align
, r
, i
, nb_extra_sval
= 0;
1047 struct param_plan
*pplan
;
1050 /* Several constraints require parameters to be copied in a specific order:
1051 - structures are copied to the stack before being loaded in a reg;
1052 - floats loaded to an odd numbered VFP reg are first copied to the
1053 preceding even numbered VFP reg and then moved to the next VFP reg.
1055 It is thus important that:
1056 - structures assigned to core regs must be copied after parameters
1057 assigned to the stack but before structures assigned to VFP regs because
1058 a structure can lie partly in core registers and partly on the stack;
1059 - parameters assigned to the stack and all structures be copied before
1060 parameters assigned to a core reg since copying a parameter to the stack
1061 require using a core reg;
1062 - parameters assigned to VFP regs be copied before structures assigned to
1063 VFP regs as the copy might use an even numbered VFP reg that already
1064 holds part of a structure. */
1066 for(i
= 0; i
< NB_CLASSES
; i
++) {
1067 for(pplan
= plan
->clsplans
[i
]; pplan
; pplan
= pplan
->prev
) {
1070 && (i
!= CORE_CLASS
|| pplan
->sval
->r
< VT_CONST
))
1073 vpushv(pplan
->sval
);
1074 pplan
->sval
->r
= pplan
->sval
->r2
= VT_CONST
; /* disable entry */
1077 case CORE_STRUCT_CLASS
:
1078 case VFP_STRUCT_CLASS
:
1079 if ((pplan
->sval
->type
.t
& VT_BTYPE
) == VT_STRUCT
) {
1081 size
= type_size(&pplan
->sval
->type
, &align
);
1082 /* align to stack align size */
1083 size
= (size
+ 3) & ~3;
1084 if (i
== STACK_CLASS
&& pplan
->prev
)
1085 padding
= pplan
->start
- pplan
->prev
->end
;
1086 size
+= padding
; /* Add padding if any */
1087 /* allocate the necessary size on stack */
1089 /* generate structure store */
1090 r
= get_reg(RC_INT
);
1091 o(0xE28D0000|(intr(r
)<<12)|padding
); /* add r, sp, padding */
1092 vset(&vtop
->type
, r
| VT_LVAL
, 0);
1094 vstore(); /* memcpy to current sp + potential padding */
1096 /* Homogeneous float aggregate are loaded to VFP registers
1097 immediately since there is no way of loading data in multiple
1098 non consecutive VFP registers as what is done for other
1099 structures (see the use of todo). */
1100 if (i
== VFP_STRUCT_CLASS
) {
1101 int first
= pplan
->start
, nb
= pplan
->end
- first
+ 1;
1102 /* vpop.32 {pplan->start, ..., pplan->end} */
1103 o(0xECBD0A00|(first
&1)<<22|(first
>>1)<<12|nb
);
1104 /* No need to write the register used to a SValue since VFP regs
1105 cannot be used for gcall_or_jmp */
1108 if (is_float(pplan
->sval
->type
.t
)) {
1110 r
= vfpr(gv(RC_FLOAT
)) << 12;
1111 if ((pplan
->sval
->type
.t
& VT_BTYPE
) == VT_FLOAT
)
1115 r
|= 0x101; /* vpush.32 -> vpush.64 */
1117 o(0xED2D0A01 + r
); /* vpush */
1119 r
= fpr(gv(RC_FLOAT
)) << 12;
1120 if ((pplan
->sval
->type
.t
& VT_BTYPE
) == VT_FLOAT
)
1122 else if ((pplan
->sval
->type
.t
& VT_BTYPE
) == VT_DOUBLE
)
1125 size
= LDOUBLE_SIZE
;
1132 o(0xED2D0100|r
|(size
>>2)); /* some kind of vpush for FPA */
1135 /* simple type (currently always same size) */
1136 /* XXX: implicit cast ? */
1138 if ((pplan
->sval
->type
.t
& VT_BTYPE
) == VT_LLONG
) {
1142 o(0xE52D0004|(intr(r
)<<12)); /* push r */
1146 o(0xE52D0004|(intr(r
)<<12)); /* push r */
1148 if (i
== STACK_CLASS
&& pplan
->prev
)
1149 gadd_sp(pplan
->prev
->end
- pplan
->start
); /* Add padding if any */
1154 gv(regmask(TREG_F0
+ (pplan
->start
>> 1)));
1155 if (pplan
->start
& 1) { /* Must be in upper part of double register */
1156 o(0xEEF00A40|((pplan
->start
>>1)<<12)|(pplan
->start
>>1)); /* vmov.f32 s(n+1), sn */
1157 vtop
->r
= VT_CONST
; /* avoid being saved on stack by gv for next float */
1162 if ((pplan
->sval
->type
.t
& VT_BTYPE
) == VT_LLONG
) {
1164 gv(regmask(pplan
->end
));
1165 pplan
->sval
->r2
= vtop
->r
;
1168 gv(regmask(pplan
->start
));
1169 /* Mark register as used so that gcall_or_jmp use another one
1170 (regs >=4 are free as never used to pass parameters) */
1171 pplan
->sval
->r
= vtop
->r
;
1178 /* second pass to restore registers that were saved on stack by accident.
1179 Maybe redundant after the "lvalue_save" patch in tccgen.c:gv() */
1183 /* Manually free remaining registers since next parameters are loaded
1184 * manually, without the help of gv(int). */
1188 o(0xE8BD0000|todo
); /* pop {todo} */
1189 for(pplan
= plan
->clsplans
[CORE_STRUCT_CLASS
]; pplan
; pplan
= pplan
->prev
) {
1191 pplan
->sval
->r
= pplan
->start
;
1192 /* An SValue can only pin 2 registers at best (r and r2) but a structure
1193 can occupy more than 2 registers. Thus, we need to push on the value
1194 stack some fake parameter to have on SValue for each registers used
1195 by a structure (r2 is not used). */
1196 for (r
= pplan
->start
+ 1; r
<= pplan
->end
; r
++) {
1197 if (todo
& (1 << r
)) {
1205 return nb_extra_sval
;
1208 /* Generate function call. The function address is pushed first, then
1209 all the parameters in call order. This functions pops all the
1210 parameters and the function address. */
1211 void gfunc_call(int nb_args
)
1214 int def_float_abi
= float_abi
;
1221 if (float_abi
== ARM_HARD_FLOAT
) {
1222 variadic
= (vtop
[-nb_args
].type
.ref
->f
.func_type
== FUNC_ELLIPSIS
);
1223 if (variadic
|| floats_in_core_regs(&vtop
[-nb_args
]))
1224 float_abi
= ARM_SOFTFP_FLOAT
;
1227 /* cannot let cpu flags if other instruction are generated. Also avoid leaving
1228 VT_JMP anywhere except on the top of the stack because it would complicate
1229 the code generator. */
1230 r
= vtop
->r
& VT_VALMASK
;
1231 if (r
== VT_CMP
|| (r
& ~1) == VT_JMP
)
1234 args_size
= assign_regs(nb_args
, float_abi
, &plan
, &todo
);
1237 if (args_size
& 7) { /* Stack must be 8 byte aligned at fct call for EABI */
1238 args_size
= (args_size
+ 7) & ~7;
1239 o(0xE24DD004); /* sub sp, sp, #4 */
1243 nb_args
+= copy_params(nb_args
, &plan
, todo
);
1244 tcc_free(plan
.pplans
);
1246 /* Move fct SValue on top as required by gcall_or_jmp */
1250 gadd_sp(args_size
); /* pop all parameters passed on the stack */
1251 #if defined(TCC_ARM_EABI) && defined(TCC_ARM_VFP)
1252 if(float_abi
== ARM_SOFTFP_FLOAT
&& is_float(vtop
->type
.ref
->type
.t
)) {
1253 if((vtop
->type
.ref
->type
.t
& VT_BTYPE
) == VT_FLOAT
) {
1254 o(0xEE000A10); /*vmov s0, r0 */
1256 o(0xEE000B10); /* vmov.32 d0[0], r0 */
1257 o(0xEE201B10); /* vmov.32 d0[1], r1 */
1261 vtop
-= nb_args
+ 1; /* Pop all params and fct address from value stack */
1262 leaffunc
= 0; /* we are calling a function, so we aren't in a leaf function */
1263 float_abi
= def_float_abi
;
1266 /* generate function prolog of type 't' */
1267 void gfunc_prolog(CType
*func_type
)
1270 int n
, nf
, size
, align
, rs
, struct_ret
= 0;
1271 int addr
, pn
, sn
; /* pn=core, sn=stack */
1275 struct avail_regs avregs
= AVAIL_REGS_INITIALIZER
;
1278 sym
= func_type
->ref
;
1279 func_vt
= sym
->type
;
1280 func_var
= (func_type
->ref
->f
.func_type
== FUNC_ELLIPSIS
);
1283 if ((func_vt
.t
& VT_BTYPE
) == VT_STRUCT
&&
1284 !gfunc_sret(&func_vt
, func_var
, &ret_type
, &align
, &rs
))
1288 func_vc
= 12; /* Offset from fp of the place to store the result */
1290 for(sym2
= sym
->next
; sym2
&& (n
< 4 || nf
< 16); sym2
= sym2
->next
) {
1291 size
= type_size(&sym2
->type
, &align
);
1293 if (float_abi
== ARM_HARD_FLOAT
&& !func_var
&&
1294 (is_float(sym2
->type
.t
) || is_hgen_float_aggr(&sym2
->type
))) {
1295 int tmpnf
= assign_vfpreg(&avregs
, align
, size
);
1296 tmpnf
+= (size
+ 3) / 4;
1297 nf
= (tmpnf
> nf
) ? tmpnf
: nf
;
1301 n
+= (size
+ 3) / 4;
1303 o(0xE1A0C00D); /* mov ip,sp */
1312 o(0xE92D0000|((1<<n
)-1)); /* save r0-r4 on stack if needed */
1317 nf
=(nf
+1)&-2; /* nf => HARDFLOAT => EABI */
1318 o(0xED2D0A00|nf
); /* save s0-s15 on stack if needed */
1320 o(0xE92D5800); /* save fp, ip, lr */
1321 o(0xE1A0B00D); /* mov fp, sp */
1322 func_sub_sp_offset
= ind
;
1323 o(0xE1A00000); /* nop, leave space for stack adjustment in epilog */
1326 if (float_abi
== ARM_HARD_FLOAT
) {
1328 avregs
= AVAIL_REGS_INITIALIZER
;
1331 pn
= struct_ret
, sn
= 0;
1332 while ((sym
= sym
->next
)) {
1335 size
= type_size(type
, &align
);
1336 size
= (size
+ 3) >> 2;
1337 align
= (align
+ 3) & ~3;
1339 if (float_abi
== ARM_HARD_FLOAT
&& !func_var
&& (is_float(sym
->type
.t
)
1340 || is_hgen_float_aggr(&sym
->type
))) {
1341 int fpn
= assign_vfpreg(&avregs
, align
, size
<< 2);
1350 pn
= (pn
+ (align
-1)/4) & -(align
/4);
1352 addr
= (nf
+ pn
) * 4;
1359 sn
= (sn
+ (align
-1)/4) & -(align
/4);
1361 addr
= (n
+ nf
+ sn
) * 4;
1364 sym_push(sym
->v
& ~SYM_FIELD
, type
, VT_LOCAL
| lvalue_type(type
->t
),
1372 /* generate function epilog */
1373 void gfunc_epilog(void)
1377 /* Copy float return value to core register if base standard is used and
1378 float computation is made with VFP */
1379 #if defined(TCC_ARM_EABI) && defined(TCC_ARM_VFP)
1380 if ((float_abi
== ARM_SOFTFP_FLOAT
|| func_var
) && is_float(func_vt
.t
)) {
1381 if((func_vt
.t
& VT_BTYPE
) == VT_FLOAT
)
1382 o(0xEE100A10); /* fmrs r0, s0 */
1384 o(0xEE100B10); /* fmrdl r0, d0 */
1385 o(0xEE301B10); /* fmrdh r1, d0 */
1389 o(0xE89BA800); /* restore fp, sp, pc */
1390 diff
= (-loc
+ 3) & -4;
1393 diff
= ((diff
+ 11) & -8) - 4;
1396 x
=stuff_const(0xE24BD000, diff
); /* sub sp,fp,# */
1398 *(uint32_t *)(cur_text_section
->data
+ func_sub_sp_offset
) = x
;
1402 o(0xE59FC004); /* ldr ip,[pc+4] */
1403 o(0xE04BD00C); /* sub sp,fp,ip */
1404 o(0xE1A0F00E); /* mov pc,lr */
1406 *(uint32_t *)(cur_text_section
->data
+ func_sub_sp_offset
) = 0xE1000000|encbranch(func_sub_sp_offset
,addr
,1);
1411 ST_FUNC
void gen_fill_nops(int bytes
)
1414 tcc_error("alignment of code section not multiple of 4");
1421 /* generate a jump to a label */
1422 ST_FUNC
int gjmp(int t
)
1428 o(0xE0000000|encbranch(r
,t
,1));
1432 /* generate a jump to a fixed address */
1433 ST_FUNC
void gjmp_addr(int a
)
1438 ST_FUNC
int gjmp_cond(int op
, int t
)
1445 op
|=encbranch(r
,t
,1);
1450 ST_FUNC
int gjmp_append(int n
, int t
)
1457 p
= decbranch(lp
=p
);
1459 x
= (uint32_t *)(cur_text_section
->data
+ lp
);
1461 *x
|= encbranch(lp
,t
,1);
1467 /* generate an integer binary operation */
1468 void gen_opi(int op
)
1471 uint32_t opc
= 0, r
, fr
;
1472 unsigned short retreg
= REG_IRET
;
1480 case TOK_ADDC1
: /* add with carry generation */
1488 case TOK_SUBC1
: /* sub with carry generation */
1492 case TOK_ADDC2
: /* add with carry use */
1496 case TOK_SUBC2
: /* sub with carry use */
1513 gv2(RC_INT
, RC_INT
);
1517 o(0xE0000090|(intr(r
)<<16)|(intr(r
)<<8)|intr(fr
));
1542 func
=TOK___aeabi_idivmod
;
1551 func
=TOK___aeabi_uidivmod
;
1559 gv2(RC_INT
, RC_INT
);
1560 r
=intr(vtop
[-1].r2
=get_reg(RC_INT
));
1562 vtop
[-1].r
=get_reg_ex(RC_INT
,regmask(c
));
1564 o(0xE0800090|(r
<<16)|(intr(vtop
->r
)<<12)|(intr(c
)<<8)|intr(vtop
[1].r
));
1573 if((vtop
[-1].r
& (VT_VALMASK
| VT_LVAL
| VT_SYM
)) == VT_CONST
) {
1574 if(opc
== 4 || opc
== 5 || opc
== 0xc) {
1576 opc
|=2; // sub -> rsb
1579 if ((vtop
->r
& VT_VALMASK
) == VT_CMP
||
1580 (vtop
->r
& (VT_VALMASK
& ~1)) == VT_JMP
)
1585 opc
=0xE0000000|(opc
<<20)|(c
<<16);
1586 if((vtop
->r
& (VT_VALMASK
| VT_LVAL
| VT_SYM
)) == VT_CONST
) {
1588 x
=stuff_const(opc
|0x2000000,vtop
->c
.i
);
1590 r
=intr(vtop
[-1].r
=get_reg_ex(RC_INT
,regmask(vtop
[-1].r
)));
1595 fr
=intr(gv(RC_INT
));
1596 r
=intr(vtop
[-1].r
=get_reg_ex(RC_INT
,two2mask(vtop
->r
,vtop
[-1].r
)));
1600 if (op
>= TOK_ULT
&& op
<= TOK_GT
)
1604 opc
=0xE1A00000|(opc
<<5);
1605 if ((vtop
->r
& VT_VALMASK
) == VT_CMP
||
1606 (vtop
->r
& (VT_VALMASK
& ~1)) == VT_JMP
)
1612 if ((vtop
->r
& (VT_VALMASK
| VT_LVAL
| VT_SYM
)) == VT_CONST
) {
1613 fr
=intr(vtop
[-1].r
=get_reg_ex(RC_INT
,regmask(vtop
[-1].r
)));
1614 c
= vtop
->c
.i
& 0x1f;
1615 o(opc
|(c
<<7)|(fr
<<12));
1617 fr
=intr(gv(RC_INT
));
1618 c
=intr(vtop
[-1].r
=get_reg_ex(RC_INT
,two2mask(vtop
->r
,vtop
[-1].r
)));
1619 o(opc
|(c
<<12)|(fr
<<8)|0x10);
1624 vpush_global_sym(&func_old_type
, func
);
1631 tcc_error("gen_opi %i unimplemented!",op
);
1636 static int is_zero(int i
)
1638 if((vtop
[i
].r
& (VT_VALMASK
| VT_LVAL
| VT_SYM
)) != VT_CONST
)
1640 if (vtop
[i
].type
.t
== VT_FLOAT
)
1641 return (vtop
[i
].c
.f
== 0.f
);
1642 else if (vtop
[i
].type
.t
== VT_DOUBLE
)
1643 return (vtop
[i
].c
.d
== 0.0);
1644 return (vtop
[i
].c
.ld
== 0.l
);
1647 /* generate a floating point operation 'v = t1 op t2' instruction. The
1648 * two operands are guaranteed to have the same floating point type */
1649 void gen_opf(int op
)
1653 x
=0xEE000A00|T2CPR(vtop
->type
.t
);
1671 x
|=0x810000; /* fsubX -> fnegX */
1684 if(op
< TOK_ULT
|| op
> TOK_GT
) {
1685 tcc_error("unknown fp op %x!",op
);
1691 case TOK_LT
: op
=TOK_GT
; break;
1692 case TOK_GE
: op
=TOK_ULE
; break;
1693 case TOK_LE
: op
=TOK_GE
; break;
1694 case TOK_GT
: op
=TOK_ULT
; break;
1697 x
|=0xB40040; /* fcmpX */
1698 if(op
!=TOK_EQ
&& op
!=TOK_NE
)
1699 x
|=0x80; /* fcmpX -> fcmpeX */
1702 o(x
|0x10000|(vfpr(gv(RC_FLOAT
))<<12)); /* fcmp(e)X -> fcmp(e)zX */
1704 x
|=vfpr(gv(RC_FLOAT
));
1706 o(x
|(vfpr(gv(RC_FLOAT
))<<12));
1709 o(0xEEF1FA10); /* fmstat */
1712 case TOK_LE
: op
=TOK_ULE
; break;
1713 case TOK_LT
: op
=TOK_ULT
; break;
1714 case TOK_UGE
: op
=TOK_GE
; break;
1715 case TOK_UGT
: op
=TOK_GT
; break;
1730 vtop
->r
=get_reg_ex(RC_FLOAT
,r
);
1733 o(x
|(vfpr(vtop
->r
)<<12));
1737 static uint32_t is_fconst()
1741 if((vtop
->r
& (VT_VALMASK
| VT_LVAL
| VT_SYM
)) != VT_CONST
)
1743 if (vtop
->type
.t
== VT_FLOAT
)
1745 else if (vtop
->type
.t
== VT_DOUBLE
)
1775 /* generate a floating point operation 'v = t1 op t2' instruction. The
1776 two operands are guaranteed to have the same floating point type */
1777 void gen_opf(int op
)
1779 uint32_t x
, r
, r2
, c1
, c2
;
1780 //fputs("gen_opf\n",stderr);
1786 #if LDOUBLE_SIZE == 8
1787 if ((vtop
->type
.t
& VT_BTYPE
) != VT_FLOAT
)
1790 if ((vtop
->type
.t
& VT_BTYPE
) == VT_DOUBLE
)
1792 else if ((vtop
->type
.t
& VT_BTYPE
) == VT_LDOUBLE
)
1803 r
=fpr(gv(RC_FLOAT
));
1810 r2
=fpr(gv(RC_FLOAT
));
1819 r
=fpr(gv(RC_FLOAT
));
1821 } else if(c1
&& c1
<=0xf) {
1824 r
=fpr(gv(RC_FLOAT
));
1829 r
=fpr(gv(RC_FLOAT
));
1831 r2
=fpr(gv(RC_FLOAT
));
1840 r
=fpr(gv(RC_FLOAT
));
1845 r2
=fpr(gv(RC_FLOAT
));
1853 r
=fpr(gv(RC_FLOAT
));
1855 } else if(c1
&& c1
<=0xf) {
1858 r
=fpr(gv(RC_FLOAT
));
1863 r
=fpr(gv(RC_FLOAT
));
1865 r2
=fpr(gv(RC_FLOAT
));
1869 if(op
>= TOK_ULT
&& op
<= TOK_GT
) {
1870 x
|=0xd0f110; // cmfe
1871 /* bug (intention?) in Linux FPU emulator
1872 doesn't set carry if equal */
1878 tcc_error("unsigned comparison on floats?");
1884 op
=TOK_ULE
; /* correct in unordered case only if AC bit in FPSR set */
1888 x
&=~0x400000; // cmfe -> cmf
1910 r
=fpr(gv(RC_FLOAT
));
1917 r2
=fpr(gv(RC_FLOAT
));
1923 tcc_error("unknown fp op %x!",op
);
1927 if(vtop
[-1].r
== VT_CMP
)
1933 vtop
[-1].r
=get_reg_ex(RC_FLOAT
,two2mask(vtop
[-1].r
,c1
));
1937 o(x
|(r
<<16)|(c1
<<12)|r2
);
1941 /* convert integers to fp 't' type. Must handle 'int', 'unsigned int'
1942 and 'long long' cases. */
1943 ST_FUNC
void gen_cvt_itof1(int t
)
1947 bt
=vtop
->type
.t
& VT_BTYPE
;
1948 if(bt
== VT_INT
|| bt
== VT_SHORT
|| bt
== VT_BYTE
) {
1954 r2
=vfpr(vtop
->r
=get_reg(RC_FLOAT
));
1955 o(0xEE000A10|(r
<<12)|(r2
<<16)); /* fmsr */
1957 if(!(vtop
->type
.t
& VT_UNSIGNED
))
1958 r2
|=0x80; /* fuitoX -> fsituX */
1959 o(0xEEB80A40|r2
|T2CPR(t
)); /* fYitoX*/
1961 r2
=fpr(vtop
->r
=get_reg(RC_FLOAT
));
1962 if((t
& VT_BTYPE
) != VT_FLOAT
)
1963 dsize
=0x80; /* flts -> fltd */
1964 o(0xEE000110|dsize
|(r2
<<16)|(r
<<12)); /* flts */
1965 if((vtop
->type
.t
& (VT_UNSIGNED
|VT_BTYPE
)) == (VT_UNSIGNED
|VT_INT
)) {
1967 o(0xE3500000|(r
<<12)); /* cmp */
1968 r
=fpr(get_reg(RC_FLOAT
));
1969 if(last_itod_magic
) {
1970 off
=ind
+8-last_itod_magic
;
1975 o(0xBD1F0100|(r
<<12)|off
); /* ldflts */
1977 o(0xEA000000); /* b */
1978 last_itod_magic
=ind
;
1979 o(0x4F800000); /* 4294967296.0f */
1981 o(0xBE000100|dsize
|(r2
<<16)|(r2
<<12)|r
); /* adflt */
1985 } else if(bt
== VT_LLONG
) {
1987 CType
*func_type
= 0;
1988 if((t
& VT_BTYPE
) == VT_FLOAT
) {
1989 func_type
= &func_float_type
;
1990 if(vtop
->type
.t
& VT_UNSIGNED
)
1991 func
=TOK___floatundisf
;
1993 func
=TOK___floatdisf
;
1994 #if LDOUBLE_SIZE != 8
1995 } else if((t
& VT_BTYPE
) == VT_LDOUBLE
) {
1996 func_type
= &func_ldouble_type
;
1997 if(vtop
->type
.t
& VT_UNSIGNED
)
1998 func
=TOK___floatundixf
;
2000 func
=TOK___floatdixf
;
2001 } else if((t
& VT_BTYPE
) == VT_DOUBLE
) {
2003 } else if((t
& VT_BTYPE
) == VT_DOUBLE
|| (t
& VT_BTYPE
) == VT_LDOUBLE
) {
2005 func_type
= &func_double_type
;
2006 if(vtop
->type
.t
& VT_UNSIGNED
)
2007 func
=TOK___floatundidf
;
2009 func
=TOK___floatdidf
;
2012 vpush_global_sym(func_type
, func
);
2020 tcc_error("unimplemented gen_cvt_itof %x!",vtop
->type
.t
);
2023 /* convert fp to int 't' type */
2024 void gen_cvt_ftoi(int t
)
2030 r2
=vtop
->type
.t
& VT_BTYPE
;
2033 r
=vfpr(gv(RC_FLOAT
));
2035 o(0xEEBC0AC0|(r
<<12)|r
|T2CPR(r2
)|u
); /* ftoXizY */
2036 r2
=intr(vtop
->r
=get_reg(RC_INT
));
2037 o(0xEE100A10|(r
<<16)|(r2
<<12));
2042 func
=TOK___fixunssfsi
;
2043 #if LDOUBLE_SIZE != 8
2044 else if(r2
== VT_LDOUBLE
)
2045 func
=TOK___fixunsxfsi
;
2046 else if(r2
== VT_DOUBLE
)
2048 else if(r2
== VT_LDOUBLE
|| r2
== VT_DOUBLE
)
2050 func
=TOK___fixunsdfsi
;
2052 r
=fpr(gv(RC_FLOAT
));
2053 r2
=intr(vtop
->r
=get_reg(RC_INT
));
2054 o(0xEE100170|(r2
<<12)|r
);
2058 } else if(t
== VT_LLONG
) { // unsigned handled in gen_cvt_ftoi1
2061 #if LDOUBLE_SIZE != 8
2062 else if(r2
== VT_LDOUBLE
)
2064 else if(r2
== VT_DOUBLE
)
2066 else if(r2
== VT_LDOUBLE
|| r2
== VT_DOUBLE
)
2071 vpush_global_sym(&func_old_type
, func
);
2076 vtop
->r2
= REG_LRET
;
2080 tcc_error("unimplemented gen_cvt_ftoi!");
2083 /* convert from one floating point type to another */
2084 void gen_cvt_ftof(int t
)
2087 if(((vtop
->type
.t
& VT_BTYPE
) == VT_FLOAT
) != ((t
& VT_BTYPE
) == VT_FLOAT
)) {
2088 uint32_t r
= vfpr(gv(RC_FLOAT
));
2089 o(0xEEB70AC0|(r
<<12)|r
|T2CPR(vtop
->type
.t
));
2092 /* all we have to do on i386 and FPA ARM is to put the float in a register */
2097 /* computed goto support */
2104 /* Save the stack pointer onto the stack and return the location of its address */
2105 ST_FUNC
void gen_vla_sp_save(int addr
) {
2108 v
.r
= VT_LOCAL
| VT_LVAL
;
2113 /* Restore the SP from a location on the stack */
2114 ST_FUNC
void gen_vla_sp_restore(int addr
) {
2117 v
.r
= VT_LOCAL
| VT_LVAL
;
2122 /* Subtract from the stack pointer, and push the resulting value onto the stack */
2123 ST_FUNC
void gen_vla_alloc(CType
*type
, int align
) {
2124 int r
= intr(gv(RC_INT
));
2125 o(0xE04D0000|(r
<<12)|r
); /* sub r, sp, r */
2133 if (align
& (align
- 1))
2134 tcc_error("alignment is not a power of 2: %i", align
);
2135 o(stuff_const(0xE3C0D000|(r
<<16), align
- 1)); /* bic sp, r, #align-1 */
2139 /* end of ARM code generator */
2140 /*************************************************************/
2142 /*************************************************************/