macos: workaround to build tcc using tcc until .o object files generated by tcc are...
[tinycc.git] / riscv64-gen.c
blob37677027f1776756761b932dfc944311ba2402ae
1 #ifdef TARGET_DEFS_ONLY
3 // Number of registers available to allocator:
4 #define NB_REGS 19 // x10-x17 aka a0-a7, f10-f17 aka fa0-fa7, xxx, ra, sp
5 #define NB_ASM_REGS 32
6 #define CONFIG_TCC_ASM
8 #define TREG_R(x) (x) // x = 0..7
9 #define TREG_F(x) (x + 8) // x = 0..7
11 // Register classes sorted from more general to more precise:
12 #define RC_INT (1 << 0)
13 #define RC_FLOAT (1 << 1)
14 #define RC_R(x) (1 << (2 + (x))) // x = 0..7
15 #define RC_F(x) (1 << (10 + (x))) // x = 0..7
17 #define RC_IRET (RC_R(0)) // int return register class
18 #define RC_IRE2 (RC_R(1)) // int 2nd return register class
19 #define RC_FRET (RC_F(0)) // float return register class
21 #define REG_IRET (TREG_R(0)) // int return register number
22 #define REG_IRE2 (TREG_R(1)) // int 2nd return register number
23 #define REG_FRET (TREG_F(0)) // float return register number
25 #define PTR_SIZE 8
27 #define LDOUBLE_SIZE 16
28 #define LDOUBLE_ALIGN 16
30 #define MAX_ALIGN 16
32 #define CHAR_IS_UNSIGNED
34 #else
35 #define USING_GLOBALS
36 #include "tcc.h"
37 #include <assert.h>
39 #define XLEN 8
41 #define TREG_RA 17
42 #define TREG_SP 18
44 ST_DATA const int reg_classes[NB_REGS] = {
45 RC_INT | RC_R(0),
46 RC_INT | RC_R(1),
47 RC_INT | RC_R(2),
48 RC_INT | RC_R(3),
49 RC_INT | RC_R(4),
50 RC_INT | RC_R(5),
51 RC_INT | RC_R(6),
52 RC_INT | RC_R(7),
53 RC_FLOAT | RC_F(0),
54 RC_FLOAT | RC_F(1),
55 RC_FLOAT | RC_F(2),
56 RC_FLOAT | RC_F(3),
57 RC_FLOAT | RC_F(4),
58 RC_FLOAT | RC_F(5),
59 RC_FLOAT | RC_F(6),
60 RC_FLOAT | RC_F(7),
62 1 << TREG_RA,
63 1 << TREG_SP
66 #if defined(CONFIG_TCC_BCHECK)
67 static addr_t func_bound_offset;
68 static unsigned long func_bound_ind;
69 static int func_bound_add_epilog;
70 #endif
72 static int ireg(int r)
74 if (r == TREG_RA)
75 return 1; // ra
76 if (r == TREG_SP)
77 return 2; // sp
78 assert(r >= 0 && r < 8);
79 return r + 10; // tccrX --> aX == x(10+X)
82 static int is_ireg(int r)
84 return (unsigned)r < 8 || r == TREG_RA || r == TREG_SP;
87 static int freg(int r)
89 assert(r >= 8 && r < 16);
90 return r - 8 + 10; // tccfX --> faX == f(10+X)
93 static int is_freg(int r)
95 return r >= 8 && r < 16;
98 ST_FUNC void o(unsigned int c)
100 int ind1 = ind + 4;
101 if (nocode_wanted)
102 return;
103 if (ind1 > cur_text_section->data_allocated)
104 section_realloc(cur_text_section, ind1);
105 write32le(cur_text_section->data + ind, c);
106 ind = ind1;
109 static void EIu(uint32_t opcode, uint32_t func3,
110 uint32_t rd, uint32_t rs1, uint32_t imm)
112 o(opcode | (func3 << 12) | (rd << 7) | (rs1 << 15) | (imm << 20));
115 static void ER(uint32_t opcode, uint32_t func3,
116 uint32_t rd, uint32_t rs1, uint32_t rs2, uint32_t func7)
118 o(opcode | func3 << 12 | rd << 7 | rs1 << 15 | rs2 << 20 | func7 << 25);
121 static void EI(uint32_t opcode, uint32_t func3,
122 uint32_t rd, uint32_t rs1, uint32_t imm)
124 assert(! ((imm + (1 << 11)) >> 12));
125 EIu(opcode, func3, rd, rs1, imm);
128 static void ES(uint32_t opcode, uint32_t func3,
129 uint32_t rs1, uint32_t rs2, uint32_t imm)
131 assert(! ((imm + (1 << 11)) >> 12));
132 o(opcode | (func3 << 12) | ((imm & 0x1f) << 7) | (rs1 << 15)
133 | (rs2 << 20) | ((imm >> 5) << 25));
136 // Patch all branches in list pointed to by t to branch to a:
137 ST_FUNC void gsym_addr(int t_, int a_)
139 uint32_t t = t_;
140 uint32_t a = a_;
141 while (t) {
142 unsigned char *ptr = cur_text_section->data + t;
143 uint32_t next = read32le(ptr);
144 uint32_t r = a - t, imm;
145 if ((r + (1 << 21)) & ~((1U << 22) - 2))
146 tcc_error("out-of-range branch chain");
147 imm = (((r >> 12) & 0xff) << 12)
148 | (((r >> 11) & 1) << 20)
149 | (((r >> 1) & 0x3ff) << 21)
150 | (((r >> 20) & 1) << 31);
151 write32le(ptr, r == 4 ? 0x33 : 0x6f | imm); // nop || j imm
152 t = next;
156 static int load_symofs(int r, SValue *sv, int forstore)
158 static Sym label;
159 int rr, doload = 0;
160 int fc = sv->c.i, v = sv->r & VT_VALMASK;
161 if (sv->r & VT_SYM) {
162 assert(v == VT_CONST);
163 if (sv->sym->type.t & VT_STATIC) { // XXX do this per linker relax
164 greloca(cur_text_section, sv->sym, ind,
165 R_RISCV_PCREL_HI20, sv->c.i);
166 sv->c.i = 0;
167 } else {
168 if (((unsigned)fc + (1 << 11)) >> 12)
169 tcc_error("unimp: large addend for global address (0x%llx)", (long long)sv->c.i);
170 greloca(cur_text_section, sv->sym, ind,
171 R_RISCV_GOT_HI20, 0);
172 doload = 1;
174 if (!label.v) {
175 label.v = tok_alloc(".L0 ", 4)->tok;
176 label.type.t = VT_VOID | VT_STATIC;
178 label.c = 0; /* force new local ELF symbol */
179 put_extern_sym(&label, cur_text_section, ind, 0);
180 rr = is_ireg(r) ? ireg(r) : 5;
181 o(0x17 | (rr << 7)); // auipc RR, 0 %pcrel_hi(sym)+addend
182 greloca(cur_text_section, &label, ind,
183 doload || !forstore
184 ? R_RISCV_PCREL_LO12_I : R_RISCV_PCREL_LO12_S, 0);
185 if (doload) {
186 EI(0x03, 3, rr, rr, 0); // ld RR, 0(RR)
188 } else if (v == VT_LOCAL || v == VT_LLOCAL) {
189 rr = 8; // s0
190 if (fc != sv->c.i)
191 tcc_error("unimp: store(giant local off) (0x%llx)", (long long)sv->c.i);
192 if (((unsigned)fc + (1 << 11)) >> 12) {
193 rr = is_ireg(r) ? ireg(r) : 5; // t0
194 o(0x37 | (rr << 7) | ((0x800 + fc) & 0xfffff000)); //lui RR, upper(fc)
195 ER(0x33, 0, rr, rr, 8, 0); // add RR, RR, s0
196 sv->c.i = fc << 20 >> 20;
198 } else
199 tcc_error("uhh");
200 return rr;
203 ST_FUNC void load(int r, SValue *sv)
205 int fr = sv->r;
206 int v = fr & VT_VALMASK;
207 int rr = is_ireg(r) ? ireg(r) : freg(r);
208 int fc = sv->c.i;
209 int bt = sv->type.t & VT_BTYPE;
210 int align, size = type_size(&sv->type, &align);
211 if (fr & VT_LVAL) {
212 int func3, opcode = is_freg(r) ? 0x07 : 0x03, br;
213 assert (!is_freg(r) || bt == VT_FLOAT || bt == VT_DOUBLE);
214 if (bt == VT_FUNC) /* XXX should be done in generic code */
215 size = PTR_SIZE;
216 func3 = size == 1 ? 0 : size == 2 ? 1 : size == 4 ? 2 : 3;
217 if (size < 4 && !is_float(sv->type.t) && (sv->type.t & VT_UNSIGNED))
218 func3 |= 4;
219 if (v == VT_LOCAL || (fr & VT_SYM)) {
220 br = load_symofs(r, sv, 0);
221 fc = sv->c.i;
222 } else if (v < VT_CONST) {
223 br = ireg(v);
224 /*if (((unsigned)fc + (1 << 11)) >> 12)
225 tcc_error("unimp: load(large addend) (0x%x)", fc);*/
226 fc = 0; // XXX store ofs in LVAL(reg)
227 } else if (v == VT_LLOCAL) {
228 br = load_symofs(r, sv, 0);
229 fc = sv->c.i;
230 EI(0x03, 3, rr, br, fc); // ld RR, fc(BR)
231 br = rr;
232 fc = 0;
233 } else {
234 tcc_error("unimp: load(non-local lval)");
236 EI(opcode, func3, rr, br, fc); // l[bhwd][u] / fl[wd] RR, fc(BR)
237 } else if (v == VT_CONST) {
238 int rb = 0, do32bit = 8, zext = 0;
239 assert((!is_float(sv->type.t) && is_ireg(r)) || bt == VT_LDOUBLE);
240 if (fr & VT_SYM) {
241 rb = load_symofs(r, sv, 0);
242 fc = sv->c.i;
243 do32bit = 0;
245 if (is_float(sv->type.t) && bt != VT_LDOUBLE)
246 tcc_error("unimp: load(float)");
247 if (fc != sv->c.i) {
248 int64_t si = sv->c.i;
249 uint32_t pi;
250 si >>= 32;
251 if (si != 0) {
252 pi = si;
253 if (fc < 0)
254 pi++;
255 o(0x37 | (rr << 7) | (((pi + 0x800) & 0xfffff000))); // lui RR, up(up(fc))
256 EI(0x13, 0, rr, rr, (int)pi << 20 >> 20); // addi RR, RR, lo(up(fc))
257 EI(0x13, 1, rr, rr, 12); // slli RR, RR, 12
258 EI(0x13, 0, rr, rr, (fc + (1 << 19)) >> 20); // addi RR, RR, up(lo(fc))
259 EI(0x13, 1, rr, rr, 12); // slli RR, RR, 12
260 fc = fc << 12 >> 12;
261 EI(0x13, 0, rr, rr, fc >> 8); // addi RR, RR, lo1(lo(fc))
262 EI(0x13, 1, rr, rr, 8); // slli RR, RR, 8
263 fc &= 0xff;
264 rb = rr;
265 do32bit = 0;
266 } else if (bt == VT_LLONG) {
267 /* A 32bit unsigned constant for a 64bit type.
268 lui always sign extends, so we need to do an explicit zext.*/
269 zext = 1;
272 if (((unsigned)fc + (1 << 11)) >> 12)
273 o(0x37 | (rr << 7) | ((0x800 + fc) & 0xfffff000)), rb = rr; //lui RR, upper(fc)
274 if (fc || (rr != rb) || do32bit || (fr & VT_SYM))
275 EI(0x13 | do32bit, 0, rr, rb, fc << 20 >> 20); // addi[w] R, x0|R, FC
276 if (zext) {
277 EI(0x13, 1, rr, rr, 32); // slli RR, RR, 32
278 EI(0x13, 5, rr, rr, 32); // srli RR, RR, 32
280 } else if (v == VT_LOCAL) {
281 int br = load_symofs(r, sv, 0);
282 assert(is_ireg(r));
283 fc = sv->c.i;
284 EI(0x13, 0, rr, br, fc); // addi R, s0, FC
285 } else if (v < VT_CONST) { /* reg-reg */
286 //assert(!fc); XXX support offseted regs
287 if (is_freg(r) && is_freg(v))
288 ER(0x53, 0, rr, freg(v), freg(v), bt == VT_DOUBLE ? 0x11 : 0x10); //fsgnj.[sd] RR, V, V == fmv.[sd] RR, V
289 else if (is_ireg(r) && is_ireg(v))
290 EI(0x13, 0, rr, ireg(v), 0); // addi RR, V, 0 == mv RR, V
291 else {
292 int func7 = is_ireg(r) ? 0x70 : 0x78;
293 if (size == 8)
294 func7 |= 1;
295 assert(size == 4 || size == 8);
296 o(0x53 | (rr << 7) | ((is_freg(v) ? freg(v) : ireg(v)) << 15)
297 | (func7 << 25)); // fmv.{w.x, x.w, d.x, x.d} RR, VR
299 } else if (v == VT_CMP) {
300 int op = vtop->cmp_op;
301 int a = vtop->cmp_r & 0xff;
302 int b = (vtop->cmp_r >> 8) & 0xff;
303 int inv = 0;
304 switch (op) {
305 case TOK_ULT:
306 case TOK_UGE:
307 case TOK_ULE:
308 case TOK_UGT:
309 case TOK_LT:
310 case TOK_GE:
311 case TOK_LE:
312 case TOK_GT:
313 if (op & 1) { // remove [U]GE,GT
314 inv = 1;
315 op--;
317 if ((op & 7) == 6) { // [U]LE
318 int t = a; a = b; b = t;
319 inv ^= 1;
321 ER(0x33, (op > TOK_UGT) ? 2 : 3, rr, a, b, 0); // slt[u] d, a, b
322 if (inv)
323 EI(0x13, 4, rr, rr, 1); // xori d, d, 1
324 break;
325 case TOK_NE:
326 case TOK_EQ:
327 if (rr != a || b)
328 ER(0x33, 0, rr, a, b, 0x20); // sub d, a, b
329 if (op == TOK_NE)
330 ER(0x33, 3, rr, 0, rr, 0); // sltu d, x0, d == snez d,d
331 else
332 EI(0x13, 3, rr, rr, 1); // sltiu d, d, 1 == seqz d,d
333 break;
335 } else if ((v & ~1) == VT_JMP) {
336 int t = v & 1;
337 assert(is_ireg(r));
338 EI(0x13, 0, rr, 0, t); // addi RR, x0, t
339 gjmp_addr(ind + 8);
340 gsym(fc);
341 EI(0x13, 0, rr, 0, t ^ 1); // addi RR, x0, !t
342 } else
343 tcc_error("unimp: load(non-const)");
346 ST_FUNC void store(int r, SValue *sv)
348 int fr = sv->r & VT_VALMASK;
349 int rr = is_ireg(r) ? ireg(r) : freg(r), ptrreg;
350 int fc = sv->c.i;
351 int bt = sv->type.t & VT_BTYPE;
352 int align, size = type_size(&sv->type, &align);
353 assert(!is_float(bt) || is_freg(r) || bt == VT_LDOUBLE);
354 /* long doubles are in two integer registers, but the load/store
355 primitives only deal with one, so do as if it's one reg. */
356 if (bt == VT_LDOUBLE)
357 size = align = 8;
358 if (bt == VT_STRUCT)
359 tcc_error("unimp: store(struct)");
360 if (size > 8)
361 tcc_error("unimp: large sized store");
362 assert(sv->r & VT_LVAL);
363 if (fr == VT_LOCAL || (sv->r & VT_SYM)) {
364 ptrreg = load_symofs(-1, sv, 1);
365 fc = sv->c.i;
366 } else if (fr < VT_CONST) {
367 ptrreg = ireg(fr);
368 /*if (((unsigned)fc + (1 << 11)) >> 12)
369 tcc_error("unimp: store(large addend) (0x%x)", fc);*/
370 fc = 0; // XXX support offsets regs
371 } else
372 tcc_error("implement me: %s(!local)", __FUNCTION__);
373 ES(is_freg(r) ? 0x27 : 0x23, // fs... | s...
374 size == 1 ? 0 : size == 2 ? 1 : size == 4 ? 2 : 3, // ... [wd] | [bhwd]
375 ptrreg, rr, fc); // RR, fc(base)
378 static void gcall_or_jmp(int docall)
380 int tr = docall ? 1 : 5; // ra or t0
381 if ((vtop->r & (VT_VALMASK | VT_LVAL)) == VT_CONST &&
382 ((vtop->r & VT_SYM) && vtop->c.i == (int)vtop->c.i)) {
383 /* constant symbolic case -> simple relocation */
384 greloca(cur_text_section, vtop->sym, ind,
385 R_RISCV_CALL_PLT, (int)vtop->c.i);
386 o(0x17 | (tr << 7)); // auipc TR, 0 %call(func)
387 EI(0x67, 0, tr, tr, 0);// jalr TR, r(TR)
388 #ifdef CONFIG_TCC_BCHECK
389 if (tcc_state->do_bounds_check &&
390 (vtop->sym->v == TOK_setjmp ||
391 vtop->sym->v == TOK__setjmp ||
392 vtop->sym->v == TOK_sigsetjmp ||
393 vtop->sym->v == TOK___sigsetjmp))
394 func_bound_add_epilog = 1;
395 #endif
396 } else if (vtop->r < VT_CONST) {
397 int r = ireg(vtop->r);
398 EI(0x67, 0, tr, r, 0); // jalr TR, 0(R)
399 } else {
400 int r = TREG_RA;
401 load(r, vtop);
402 r = ireg(r);
403 EI(0x67, 0, tr, r, 0); // jalr TR, 0(R)
407 #if defined(CONFIG_TCC_BCHECK)
409 static void gen_bounds_call(int v)
411 Sym *sym = external_global_sym(v, &func_old_type);
413 greloca(cur_text_section, sym, ind, R_RISCV_CALL_PLT, 0);
414 o(0x17 | (1 << 7)); // auipc TR, 0 %call(func)
415 EI(0x67, 0, 1, 1, 0); // jalr TR, r(TR)
418 /* generate a bounded pointer addition */
419 ST_FUNC void gen_bounded_ptr_add(void)
421 vpush_global_sym(&func_old_type, TOK___bound_ptr_add);
422 vrott(3);
423 gfunc_call(2);
424 vpushi(0);
425 /* returned pointer is in REG_IRET */
426 vtop->r = REG_IRET | VT_BOUNDED;
427 if (nocode_wanted)
428 return;
429 /* relocation offset of the bounding function call point */
430 vtop->c.i = (cur_text_section->reloc->data_offset - sizeof(ElfW(Rela)));
433 /* patch pointer addition in vtop so that pointer dereferencing is
434 also tested */
435 ST_FUNC void gen_bounded_ptr_deref(void)
437 addr_t func;
438 int size, align;
439 ElfW(Rela) *rel;
440 Sym *sym;
442 if (nocode_wanted)
443 return;
445 size = type_size(&vtop->type, &align);
446 switch(size) {
447 case 1: func = TOK___bound_ptr_indir1; break;
448 case 2: func = TOK___bound_ptr_indir2; break;
449 case 4: func = TOK___bound_ptr_indir4; break;
450 case 8: func = TOK___bound_ptr_indir8; break;
451 case 12: func = TOK___bound_ptr_indir12; break;
452 case 16: func = TOK___bound_ptr_indir16; break;
453 default:
454 /* may happen with struct member access */
455 return;
456 //tcc_error("unhandled size when dereferencing bounded pointer");
457 //func = 0;
458 //break;
460 sym = external_global_sym(func, &func_old_type);
461 if (!sym->c)
462 put_extern_sym(sym, NULL, 0, 0);
463 /* patch relocation */
464 /* XXX: find a better solution ? */
465 rel = (ElfW(Rela) *)(cur_text_section->reloc->data + vtop->c.i);
466 rel->r_info = ELF64_R_INFO(sym->c, ELF64_R_TYPE(rel->r_info));
469 static void gen_bounds_prolog(void)
471 /* leave some room for bound checking code */
472 func_bound_offset = lbounds_section->data_offset;
473 func_bound_ind = ind;
474 func_bound_add_epilog = 0;
475 o(0x00000013); /* ld a0,#lbound section pointer */
476 o(0x00000013);
477 o(0x00000013); /* nop -> call __bound_local_new */
478 o(0x00000013);
481 static void gen_bounds_epilog(void)
483 static Sym label;
484 addr_t saved_ind;
485 addr_t *bounds_ptr;
486 Sym *sym_data;
487 int offset_modified = func_bound_offset != lbounds_section->data_offset;
489 if (!offset_modified && !func_bound_add_epilog)
490 return;
492 /* add end of table info */
493 bounds_ptr = section_ptr_add(lbounds_section, sizeof(addr_t));
494 *bounds_ptr = 0;
496 sym_data = get_sym_ref(&char_pointer_type, lbounds_section,
497 func_bound_offset, lbounds_section->data_offset);
499 if (!label.v) {
500 label.v = tok_alloc(".LB0 ", 4)->tok;
501 label.type.t = VT_VOID | VT_STATIC;
503 /* generate bound local allocation */
504 if (offset_modified) {
505 saved_ind = ind;
506 ind = func_bound_ind;
507 label.c = 0; /* force new local ELF symbol */
508 put_extern_sym(&label, cur_text_section, ind, 0);
509 greloca(cur_text_section, sym_data, ind, R_RISCV_GOT_HI20, 0);
510 o(0x17 | (10 << 7)); // auipc a0, 0 %pcrel_hi(sym)+addend
511 greloca(cur_text_section, &label, ind, R_RISCV_PCREL_LO12_I, 0);
512 EI(0x03, 3, 10, 10, 0); // ld a0, 0(a0)
513 gen_bounds_call(TOK___bound_local_new);
514 ind = saved_ind;
517 /* generate bound check local freeing */
518 o(0xe02a1101); /* addi sp,sp,-32 sd a0,0(sp) */
519 o(0xa82ae42e); /* sd a1,8(sp) fsd fa0,16(sp) */
520 label.c = 0; /* force new local ELF symbol */
521 put_extern_sym(&label, cur_text_section, ind, 0);
522 greloca(cur_text_section, sym_data, ind, R_RISCV_GOT_HI20, 0);
523 o(0x17 | (10 << 7)); // auipc a0, 0 %pcrel_hi(sym)+addend
524 greloca(cur_text_section, &label, ind, R_RISCV_PCREL_LO12_I, 0);
525 EI(0x03, 3, 10, 10, 0); // ld a0, 0(a0)
526 gen_bounds_call(TOK___bound_local_delete);
527 o(0x65a26502); /* ld a0,0(sp) ld a1,8(sp) */
528 o(0x61052542); /* fld fa0,16(sp) addi sp,sp,32 */
530 #endif
531 static void reg_pass_rec(CType *type, int *rc, int *fieldofs, int ofs)
533 if ((type->t & VT_BTYPE) == VT_STRUCT) {
534 Sym *f;
535 if (type->ref->type.t == VT_UNION)
536 rc[0] = -1;
537 else for (f = type->ref->next; f; f = f->next)
538 reg_pass_rec(&f->type, rc, fieldofs, ofs + f->c);
539 } else if (type->t & VT_ARRAY) {
540 if (type->ref->c < 0 || type->ref->c > 2)
541 rc[0] = -1;
542 else {
543 int a, sz = type_size(&type->ref->type, &a);
544 reg_pass_rec(&type->ref->type, rc, fieldofs, ofs);
545 if (rc[0] > 2 || (rc[0] == 2 && type->ref->c > 1))
546 rc[0] = -1;
547 else if (type->ref->c == 2 && rc[0] && rc[1] == RC_FLOAT) {
548 rc[++rc[0]] = RC_FLOAT;
549 fieldofs[rc[0]] = ((ofs + sz) << 4)
550 | (type->ref->type.t & VT_BTYPE);
551 } else if (type->ref->c == 2)
552 rc[0] = -1;
554 } else if (rc[0] == 2 || rc[0] < 0 || (type->t & VT_BTYPE) == VT_LDOUBLE)
555 rc[0] = -1;
556 else if (!rc[0] || rc[1] == RC_FLOAT || is_float(type->t)) {
557 rc[++rc[0]] = is_float(type->t) ? RC_FLOAT : RC_INT;
558 fieldofs[rc[0]] = (ofs << 4) | (type->t & VT_BTYPE);
559 } else
560 rc[0] = -1;
563 static void reg_pass(CType *type, int *prc, int *fieldofs, int named)
565 prc[0] = 0;
566 reg_pass_rec(type, prc, fieldofs, 0);
567 if (prc[0] <= 0 || !named) {
568 int align, size = type_size(type, &align);
569 prc[0] = (size + 7) >> 3;
570 prc[1] = prc[2] = RC_INT;
571 fieldofs[1] = (0 << 4) | (size <= 1 ? VT_BYTE : size <= 2 ? VT_SHORT : size <= 4 ? VT_INT : VT_LLONG);
572 fieldofs[2] = (8 << 4) | (size <= 9 ? VT_BYTE : size <= 10 ? VT_SHORT : size <= 12 ? VT_INT : VT_LLONG);
576 ST_FUNC void gfunc_call(int nb_args)
578 int i, align, size, areg[2];
579 int info[nb_args ? nb_args : 1];
580 int stack_adj = 0, tempspace = 0, ofs, splitofs = 0;
581 SValue *sv;
582 Sym *sa;
584 #ifdef CONFIG_TCC_BCHECK
585 if (tcc_state->do_bounds_check)
586 gbound_args(nb_args);
587 #endif
589 areg[0] = 0; /* int arg regs */
590 areg[1] = 8; /* float arg regs */
591 sa = vtop[-nb_args].type.ref->next;
592 for (i = 0; i < nb_args; i++) {
593 int nregs, byref = 0, tempofs;
594 int prc[3], fieldofs[3];
595 sv = &vtop[1 + i - nb_args];
596 sv->type.t &= ~VT_ARRAY; // XXX this should be done in tccgen.c
597 size = type_size(&sv->type, &align);
598 if (size > 16) {
599 if (align < XLEN)
600 align = XLEN;
601 tempspace = (tempspace + align - 1) & -align;
602 tempofs = tempspace;
603 tempspace += size;
604 size = align = 8;
605 byref = 64 | (tempofs << 7);
607 reg_pass(&sv->type, prc, fieldofs, sa != 0);
608 if (!sa && align == 2*XLEN && size <= 2*XLEN)
609 areg[0] = (areg[0] + 1) & ~1;
610 nregs = prc[0];
611 if ((prc[1] == RC_INT && areg[0] >= 8)
612 || (prc[1] == RC_FLOAT && areg[1] >= 16)
613 || (nregs == 2 && prc[1] == RC_FLOAT && prc[2] == RC_FLOAT
614 && areg[1] >= 15)
615 || (nregs == 2 && prc[1] != prc[2]
616 && (areg[1] >= 16 || areg[0] >= 8))) {
617 info[i] = 32;
618 if (align < XLEN)
619 align = XLEN;
620 stack_adj += (size + align - 1) & -align;
621 if (!sa) /* one vararg on stack forces the rest on stack */
622 areg[0] = 8, areg[1] = 16;
623 } else {
624 info[i] = areg[prc[1] - 1]++;
625 if (!byref)
626 info[i] |= (fieldofs[1] & VT_BTYPE) << 12;
627 assert(!(fieldofs[1] >> 4));
628 if (nregs == 2) {
629 if (prc[2] == RC_FLOAT || areg[0] < 8)
630 info[i] |= (1 + areg[prc[2] - 1]++) << 7;
631 else {
632 info[i] |= 16;
633 stack_adj += 8;
635 if (!byref) {
636 assert((fieldofs[2] >> 4) < 2048);
637 info[i] |= fieldofs[2] << (12 + 4); // includes offset
641 info[i] |= byref;
642 if (sa)
643 sa = sa->next;
645 stack_adj = (stack_adj + 15) & -16;
646 tempspace = (tempspace + 15) & -16;
647 if (stack_adj + tempspace) {
648 EI(0x13, 0, 2, 2, -(stack_adj + tempspace)); // addi sp, sp, -adj
649 for (i = ofs = 0; i < nb_args; i++) {
650 if (info[i] & (64 | 32)) {
651 vrotb(nb_args - i);
652 size = type_size(&vtop->type, &align);
653 if (info[i] & 64) {
654 vset(&char_pointer_type, TREG_SP, 0);
655 vpushi(stack_adj + (info[i] >> 7));
656 gen_op('+');
657 vpushv(vtop); // this replaces the old argument
658 vrott(3);
659 indir();
660 vtop->type = vtop[-1].type;
661 vswap();
662 vstore();
663 vpop();
664 size = align = 8;
666 if (info[i] & 32) {
667 if (align < XLEN)
668 align = XLEN;
669 /* Once we support offseted regs we can do this:
670 vset(&vtop->type, TREG_SP | VT_LVAL, ofs);
671 to construct the lvalue for the outgoing stack slot,
672 until then we have to jump through hoops. */
673 vset(&char_pointer_type, TREG_SP, 0);
674 ofs = (ofs + align - 1) & -align;
675 vpushi(ofs);
676 gen_op('+');
677 indir();
678 vtop->type = vtop[-1].type;
679 vswap();
680 vstore();
681 vtop->r = vtop->r2 = VT_CONST; // this arg is done
682 ofs += size;
684 vrott(nb_args - i);
685 } else if (info[i] & 16) {
686 assert(!splitofs);
687 splitofs = ofs;
688 ofs += 8;
692 for (i = 0; i < nb_args; i++) {
693 int ii = info[nb_args - 1 - i], r = ii, r2 = r;
694 if (!(r & 32)) {
695 CType origtype;
696 int loadt;
697 r &= 15;
698 r2 = r2 & 64 ? 0 : (r2 >> 7) & 31;
699 assert(r2 <= 16);
700 vrotb(i+1);
701 origtype = vtop->type;
702 size = type_size(&vtop->type, &align);
703 loadt = vtop->type.t & VT_BTYPE;
704 if (loadt == VT_STRUCT) {
705 loadt = (ii >> 12) & VT_BTYPE;
707 if (info[nb_args - 1 - i] & 16) {
708 assert(!r2);
709 r2 = 1 + TREG_RA;
711 if (loadt == VT_LDOUBLE) {
712 assert(r2);
713 r2--;
714 } else if (r2) {
715 test_lvalue();
716 vpushv(vtop);
718 vtop->type.t = loadt | (vtop->type.t & VT_UNSIGNED);
719 gv(r < 8 ? RC_R(r) : RC_F(r - 8));
720 vtop->type = origtype;
722 if (r2 && loadt != VT_LDOUBLE) {
723 r2--;
724 assert(r2 < 16 || r2 == TREG_RA);
725 vswap();
726 gaddrof();
727 vtop->type = char_pointer_type;
728 vpushi(ii >> 20);
729 gen_op('+');
730 indir();
731 vtop->type = origtype;
732 loadt = vtop->type.t & VT_BTYPE;
733 if (loadt == VT_STRUCT) {
734 loadt = (ii >> 16) & VT_BTYPE;
736 save_reg_upstack(r2, 1);
737 vtop->type.t = loadt | (vtop->type.t & VT_UNSIGNED);
738 load(r2, vtop);
739 assert(r2 < VT_CONST);
740 vtop--;
741 vtop->r2 = r2;
743 if (info[nb_args - 1 - i] & 16) {
744 ES(0x23, 3, 2, ireg(vtop->r2), splitofs); // sd t0, ofs(sp)
745 vtop->r2 = VT_CONST;
746 } else if (loadt == VT_LDOUBLE && vtop->r2 != r2) {
747 assert(vtop->r2 <= 7 && r2 <= 7);
748 /* XXX we'd like to have 'gv' move directly into
749 the right class instead of us fixing it up. */
750 EI(0x13, 0, ireg(r2), ireg(vtop->r2), 0); // mv Ra+1, RR2
751 vtop->r2 = r2;
753 vrott(i+1);
756 vrotb(nb_args + 1);
757 save_regs(nb_args + 1);
758 gcall_or_jmp(1);
759 vtop -= nb_args + 1;
760 if (stack_adj + tempspace)
761 EI(0x13, 0, 2, 2, stack_adj + tempspace); // addi sp, sp, adj
764 static int func_sub_sp_offset, num_va_regs, func_va_list_ofs;
766 ST_FUNC void gfunc_prolog(Sym *func_sym)
768 CType *func_type = &func_sym->type;
769 int i, addr, align, size;
770 int param_addr = 0;
771 int areg[2];
772 Sym *sym;
773 CType *type;
775 sym = func_type->ref;
776 loc = -16; // for ra and s0
777 func_sub_sp_offset = ind;
778 ind += 5 * 4;
780 areg[0] = 0, areg[1] = 0;
781 addr = 0;
782 /* if the function returns by reference, then add an
783 implicit pointer parameter */
784 size = type_size(&func_vt, &align);
785 if (size > 2 * XLEN) {
786 loc -= 8;
787 func_vc = loc;
788 ES(0x23, 3, 8, 10 + areg[0]++, loc); // sd a0, loc(s0)
790 /* define parameters */
791 while ((sym = sym->next) != NULL) {
792 int byref = 0;
793 int regcount;
794 int prc[3], fieldofs[3];
795 type = &sym->type;
796 size = type_size(type, &align);
797 if (size > 2 * XLEN) {
798 type = &char_pointer_type;
799 size = align = byref = 8;
801 reg_pass(type, prc, fieldofs, 1);
802 regcount = prc[0];
803 if (areg[prc[1] - 1] >= 8
804 || (regcount == 2
805 && ((prc[1] == RC_FLOAT && prc[2] == RC_FLOAT && areg[1] >= 7)
806 || (prc[1] != prc[2] && (areg[1] >= 8 || areg[0] >= 8))))) {
807 if (align < XLEN)
808 align = XLEN;
809 addr = (addr + align - 1) & -align;
810 param_addr = addr;
811 addr += size;
812 } else {
813 loc -= regcount * 8; // XXX could reserve only 'size' bytes
814 param_addr = loc;
815 for (i = 0; i < regcount; i++) {
816 if (areg[prc[1+i] - 1] >= 8) {
817 assert(i == 1 && regcount == 2 && !(addr & 7));
818 EI(0x03, 3, 5, 8, addr); // ld t0, addr(s0)
819 addr += 8;
820 ES(0x23, 3, 8, 5, loc + i*8); // sd t0, loc(s0)
821 } else if (prc[1+i] == RC_FLOAT) {
822 ES(0x27, (size / regcount) == 4 ? 2 : 3, 8, 10 + areg[1]++, loc + (fieldofs[i+1] >> 4)); // fs[wd] FAi, loc(s0)
823 } else {
824 ES(0x23, 3, 8, 10 + areg[0]++, loc + i*8); // sd aX, loc(s0) // XXX
828 sym_push(sym->v & ~SYM_FIELD, &sym->type,
829 (byref ? VT_LLOCAL : VT_LOCAL) | VT_LVAL,
830 param_addr);
832 func_va_list_ofs = addr;
833 num_va_regs = 0;
834 if (func_var) {
835 for (; areg[0] < 8; areg[0]++) {
836 num_va_regs++;
837 ES(0x23, 3, 8, 10 + areg[0], -8 + num_va_regs * 8); // sd aX, loc(s0)
840 #ifdef CONFIG_TCC_BCHECK
841 if (tcc_state->do_bounds_check)
842 gen_bounds_prolog();
843 #endif
846 ST_FUNC int gfunc_sret(CType *vt, int variadic, CType *ret,
847 int *ret_align, int *regsize)
849 int align, size = type_size(vt, &align), nregs;
850 int prc[3], fieldofs[3];
851 *ret_align = 1;
852 *regsize = 8;
853 if (size > 16)
854 return 0;
855 reg_pass(vt, prc, fieldofs, 1);
856 nregs = prc[0];
857 if (nregs == 2 && prc[1] != prc[2])
858 return -1; /* generic code can't deal with this case */
859 if (prc[1] == RC_FLOAT) {
860 *regsize = size / nregs;
862 ret->t = fieldofs[1] & VT_BTYPE;
863 return nregs;
866 ST_FUNC void arch_transfer_ret_regs(int aftercall)
868 int prc[3], fieldofs[3];
869 reg_pass(&vtop->type, prc, fieldofs, 1);
870 assert(prc[0] == 2 && prc[1] != prc[2] && !(fieldofs[1] >> 4));
871 assert(vtop->r == (VT_LOCAL | VT_LVAL));
872 vpushv(vtop);
873 vtop->type.t = fieldofs[1] & VT_BTYPE;
874 (aftercall ? store : load)(prc[1] == RC_INT ? REG_IRET : REG_FRET, vtop);
875 vtop->c.i += fieldofs[2] >> 4;
876 vtop->type.t = fieldofs[2] & VT_BTYPE;
877 (aftercall ? store : load)(prc[2] == RC_INT ? REG_IRET : REG_FRET, vtop);
878 vtop--;
881 ST_FUNC void gfunc_epilog(void)
883 int v, saved_ind, d, large_ofs_ind;
885 #ifdef CONFIG_TCC_BCHECK
886 if (tcc_state->do_bounds_check)
887 gen_bounds_epilog();
888 #endif
890 loc = (loc - num_va_regs * 8);
891 d = v = (-loc + 15) & -16;
893 if (v >= (1 << 11)) {
894 d = 16;
895 o(0x37 | (5 << 7) | ((0x800 + (v-16)) & 0xfffff000)); //lui t0, upper(v)
896 EI(0x13, 0, 5, 5, (v-16) << 20 >> 20); // addi t0, t0, lo(v)
897 ER(0x33, 0, 2, 2, 5, 0); // add sp, sp, t0
899 EI(0x03, 3, 1, 2, d - 8 - num_va_regs * 8); // ld ra, v-8(sp)
900 EI(0x03, 3, 8, 2, d - 16 - num_va_regs * 8); // ld s0, v-16(sp)
901 EI(0x13, 0, 2, 2, d); // addi sp, sp, v
902 EI(0x67, 0, 0, 1, 0); // jalr x0, 0(x1), aka ret
903 large_ofs_ind = ind;
904 if (v >= (1 << 11)) {
905 EI(0x13, 0, 8, 2, d - num_va_regs * 8); // addi s0, sp, d
906 o(0x37 | (5 << 7) | ((0x800 + (v-16)) & 0xfffff000)); //lui t0, upper(v)
907 EI(0x13, 0, 5, 5, (v-16) << 20 >> 20); // addi t0, t0, lo(v)
908 ER(0x33, 0, 2, 2, 5, 0x20); // sub sp, sp, t0
909 gjmp_addr(func_sub_sp_offset + 5*4);
911 saved_ind = ind;
913 ind = func_sub_sp_offset;
914 EI(0x13, 0, 2, 2, -d); // addi sp, sp, -d
915 ES(0x23, 3, 2, 1, d - 8 - num_va_regs * 8); // sd ra, d-8(sp)
916 ES(0x23, 3, 2, 8, d - 16 - num_va_regs * 8); // sd s0, d-16(sp)
917 if (v < (1 << 11))
918 EI(0x13, 0, 8, 2, d - num_va_regs * 8); // addi s0, sp, d
919 else
920 gjmp_addr(large_ofs_ind);
921 if ((ind - func_sub_sp_offset) != 5*4)
922 EI(0x13, 0, 0, 0, 0); // addi x0, x0, 0 == nop
923 ind = saved_ind;
926 ST_FUNC void gen_va_start(void)
928 vtop--;
929 vset(&char_pointer_type, VT_LOCAL, func_va_list_ofs);
932 ST_FUNC void gen_fill_nops(int bytes)
934 if ((bytes & 3))
935 tcc_error("alignment of code section not multiple of 4");
936 while (bytes > 0) {
937 EI(0x13, 0, 0, 0, 0); // addi x0, x0, 0 == nop
938 bytes -= 4;
942 // Generate forward branch to label:
943 ST_FUNC int gjmp(int t)
945 if (nocode_wanted)
946 return t;
947 o(t);
948 return ind - 4;
951 // Generate branch to known address:
952 ST_FUNC void gjmp_addr(int a)
954 uint32_t r = a - ind, imm;
955 if ((r + (1 << 21)) & ~((1U << 22) - 2)) {
956 o(0x17 | (5 << 7) | (((r + 0x800) & 0xfffff000))); // lui RR, up(r)
957 r = (int)r << 20 >> 20;
958 EI(0x67, 0, 0, 5, r); // jalr x0, r(t0)
959 } else {
960 imm = (((r >> 12) & 0xff) << 12)
961 | (((r >> 11) & 1) << 20)
962 | (((r >> 1) & 0x3ff) << 21)
963 | (((r >> 20) & 1) << 31);
964 o(0x6f | imm); // jal x0, imm == j imm
968 ST_FUNC int gjmp_cond(int op, int t)
970 int tmp;
971 int a = vtop->cmp_r & 0xff;
972 int b = (vtop->cmp_r >> 8) & 0xff;
973 switch (op) {
974 case TOK_ULT: op = 6; break;
975 case TOK_UGE: op = 7; break;
976 case TOK_ULE: op = 7; tmp = a; a = b; b = tmp; break;
977 case TOK_UGT: op = 6; tmp = a; a = b; b = tmp; break;
978 case TOK_LT: op = 4; break;
979 case TOK_GE: op = 5; break;
980 case TOK_LE: op = 5; tmp = a; a = b; b = tmp; break;
981 case TOK_GT: op = 4; tmp = a; a = b; b = tmp; break;
982 case TOK_NE: op = 1; break;
983 case TOK_EQ: op = 0; break;
985 o(0x63 | (op ^ 1) << 12 | a << 15 | b << 20 | 8 << 7); // bOP a,b,+4
986 return gjmp(t);
989 ST_FUNC int gjmp_append(int n, int t)
991 void *p;
992 /* insert jump list n into t */
993 if (n) {
994 uint32_t n1 = n, n2;
995 while ((n2 = read32le(p = cur_text_section->data + n1)))
996 n1 = n2;
997 write32le(p, t);
998 t = n;
1000 return t;
1003 static void gen_opil(int op, int ll)
1005 int a, b, d;
1006 int func3 = 0;
1007 ll = ll ? 0 : 8;
1008 if ((vtop->r & (VT_VALMASK | VT_LVAL | VT_SYM)) == VT_CONST) {
1009 int fc = vtop->c.i;
1010 if (fc == vtop->c.i && !(((unsigned)fc + (1 << 11)) >> 12)) {
1011 int cll = 0;
1012 vswap();
1013 gv(RC_INT);
1014 a = ireg(vtop[0].r);
1015 --vtop;
1016 d = get_reg(RC_INT);
1017 ++vtop;
1018 vswap();
1019 switch (op) {
1020 case '-':
1021 if (fc <= -(1 << 11))
1022 break;
1023 fc = -fc;
1024 case '+':
1025 func3 = 0; // addi d, a, fc
1026 do_cop:
1027 EI(0x13 | cll, func3, ireg(d), a, fc);
1028 --vtop;
1029 if (op >= TOK_ULT && op <= TOK_GT) {
1030 vset_VT_CMP(TOK_NE);
1031 vtop->cmp_r = ireg(d) | 0 << 8;
1032 } else
1033 vtop[0].r = d;
1034 return;
1035 case TOK_LE:
1036 if (fc >= (1 << 11) - 1)
1037 break;
1038 ++fc;
1039 case TOK_LT: func3 = 2; goto do_cop; // slti d, a, fc
1040 case TOK_ULE:
1041 if (fc >= (1 << 11) - 1)
1042 break;
1043 ++fc;
1044 case TOK_ULT: func3 = 3; goto do_cop; // sltiu d, a, fc
1045 case '^': func3 = 4; goto do_cop; // xori d, a, fc
1046 case '|': func3 = 6; goto do_cop; // ori d, a, fc
1047 case '&': func3 = 7; goto do_cop; // andi d, a, fc
1048 case TOK_SHL: func3 = 1; fc &= 63; goto do_cop; // slli d, a, fc
1049 case TOK_SHR: func3 = 5; cll = ll; fc &= 63; goto do_cop; // srli d, a, fc
1050 case TOK_SAR: func3 = 5; cll = ll; fc = 1024 | (fc & 63); goto do_cop;
1052 case TOK_UGE:
1053 case TOK_UGT:
1054 case TOK_GE:
1055 case TOK_GT:
1056 gen_opil(op - 1, ll);
1057 vtop->cmp_op ^= 1;
1058 return;
1060 case TOK_NE:
1061 case TOK_EQ:
1062 if (fc)
1063 gen_opil('-', ll), a = ireg(vtop++->r);
1064 --vtop;
1065 vset_VT_CMP(op);
1066 vtop->cmp_r = a | 0 << 8;
1067 return;
1071 gv2(RC_INT, RC_INT);
1072 a = ireg(vtop[-1].r);
1073 b = ireg(vtop[0].r);
1074 vtop -= 2;
1075 d = get_reg(RC_INT);
1076 vtop++;
1077 vtop[0].r = d;
1078 d = ireg(d);
1079 switch (op) {
1080 default:
1081 if (op >= TOK_ULT && op <= TOK_GT) {
1082 vset_VT_CMP(op);
1083 vtop->cmp_r = a | b << 8;
1084 break;
1086 tcc_error("implement me: %s(%s)", __FUNCTION__, get_tok_str(op, NULL));
1087 break;
1089 case '+':
1090 ER(0x33, 0, d, a, b, 0); // add d, a, b
1091 break;
1092 case '-':
1093 ER(0x33, 0, d, a, b, 0x20); // sub d, a, b
1094 break;
1095 case TOK_SAR:
1096 ER(0x33 | ll, 5, d, a, b, 0x20); // sra d, a, b
1097 break;
1098 case TOK_SHR:
1099 ER(0x33 | ll, 5, d, a, b, 0); // srl d, a, b
1100 break;
1101 case TOK_SHL:
1102 ER(0x33, 1, d, a, b, 0); // sll d, a, b
1103 break;
1104 case '*':
1105 ER(0x33, 0, d, a, b, 1); // mul d, a, b
1106 break;
1107 case '/':
1108 ER(0x33, 4, d, a, b, 1); // div d, a, b
1109 break;
1110 case '&':
1111 ER(0x33, 7, d, a, b, 0); // and d, a, b
1112 break;
1113 case '^':
1114 ER(0x33, 4, d, a, b, 0); // xor d, a, b
1115 break;
1116 case '|':
1117 ER(0x33, 6, d, a, b, 0); // or d, a, b
1118 break;
1119 case '%':
1120 ER(0x33, 6, d, a, b, 1); // rem d, a, b
1121 break;
1122 case TOK_UMOD:
1123 ER(0x33, 7, d, a, b, 1); // remu d, a, b
1124 break;
1125 case TOK_PDIV:
1126 case TOK_UDIV:
1127 ER(0x33, 5, d, a, b, 1); // divu d, a, b
1128 break;
1132 ST_FUNC void gen_opi(int op)
1134 gen_opil(op, 0);
1137 ST_FUNC void gen_opl(int op)
1139 gen_opil(op, 1);
1142 ST_FUNC void gen_opf(int op)
1144 int rs1, rs2, rd, dbl, invert;
1145 if (vtop[0].type.t == VT_LDOUBLE) {
1146 CType type = vtop[0].type;
1147 int func = 0;
1148 int cond = -1;
1149 switch (op) {
1150 case '*': func = TOK___multf3; break;
1151 case '+': func = TOK___addtf3; break;
1152 case '-': func = TOK___subtf3; break;
1153 case '/': func = TOK___divtf3; break;
1154 case TOK_EQ: func = TOK___eqtf2; cond = 1; break;
1155 case TOK_NE: func = TOK___netf2; cond = 0; break;
1156 case TOK_LT: func = TOK___lttf2; cond = 10; break;
1157 case TOK_GE: func = TOK___getf2; cond = 11; break;
1158 case TOK_LE: func = TOK___letf2; cond = 12; break;
1159 case TOK_GT: func = TOK___gttf2; cond = 13; break;
1160 default: assert(0); break;
1162 vpush_global_sym(&func_old_type, func);
1163 vrott(3);
1164 gfunc_call(2);
1165 vpushi(0);
1166 vtop->r = REG_IRET;
1167 vtop->r2 = cond < 0 ? TREG_R(1) : VT_CONST;
1168 if (cond < 0)
1169 vtop->type = type;
1170 else {
1171 vpushi(0);
1172 gen_opil(op, 1);
1174 return;
1177 gv2(RC_FLOAT, RC_FLOAT);
1178 assert(vtop->type.t == VT_DOUBLE || vtop->type.t == VT_FLOAT);
1179 dbl = vtop->type.t == VT_DOUBLE;
1180 rs1 = freg(vtop[-1].r);
1181 rs2 = freg(vtop->r);
1182 vtop--;
1183 invert = 0;
1184 switch(op) {
1185 default:
1186 assert(0);
1187 case '+':
1188 op = 0; // fadd
1189 arithop:
1190 rd = get_reg(RC_FLOAT);
1191 vtop->r = rd;
1192 rd = freg(rd);
1193 ER(0x53, 7, rd, rs1, rs2, dbl | (op << 2)); // fop.[sd] RD, RS1, RS2 (dyn rm)
1194 break;
1195 case '-':
1196 op = 1; // fsub
1197 goto arithop;
1198 case '*':
1199 op = 2; // fmul
1200 goto arithop;
1201 case '/':
1202 op = 3; // fdiv
1203 goto arithop;
1204 case TOK_EQ:
1205 op = 2; // EQ
1206 cmpop:
1207 rd = get_reg(RC_INT);
1208 vtop->r = rd;
1209 rd = ireg(rd);
1210 ER(0x53, op, rd, rs1, rs2, dbl | 0x50); // fcmp.[sd] RD, RS1, RS2 (op == eq/lt/le)
1211 if (invert)
1212 EI(0x13, 4, rd, rd, 1); // xori RD, 1
1213 break;
1214 case TOK_NE:
1215 invert = 1;
1216 op = 2; // EQ
1217 goto cmpop;
1218 case TOK_LT:
1219 op = 1; // LT
1220 goto cmpop;
1221 case TOK_LE:
1222 op = 0; // LE
1223 goto cmpop;
1224 case TOK_GT:
1225 op = 1; // LT
1226 rd = rs1, rs1 = rs2, rs2 = rd;
1227 goto cmpop;
1228 case TOK_GE:
1229 op = 0; // LE
1230 rd = rs1, rs1 = rs2, rs2 = rd;
1231 goto cmpop;
1235 ST_FUNC void gen_cvt_sxtw(void)
1237 /* XXX on risc-v the registers are usually sign-extended already.
1238 Let's try to not do anything here. */
1241 ST_FUNC void gen_cvt_itof(int t)
1243 int rr = ireg(gv(RC_INT)), dr;
1244 int u = vtop->type.t & VT_UNSIGNED;
1245 int l = (vtop->type.t & VT_BTYPE) == VT_LLONG;
1246 if (t == VT_LDOUBLE) {
1247 int func = l ?
1248 (u ? TOK___floatunditf : TOK___floatditf) :
1249 (u ? TOK___floatunsitf : TOK___floatsitf);
1250 vpush_global_sym(&func_old_type, func);
1251 vrott(2);
1252 gfunc_call(1);
1253 vpushi(0);
1254 vtop->type.t = t;
1255 vtop->r = REG_IRET;
1256 vtop->r2 = TREG_R(1);
1257 } else {
1258 vtop--;
1259 dr = get_reg(RC_FLOAT);
1260 vtop++;
1261 vtop->r = dr;
1262 dr = freg(dr);
1263 EIu(0x53, 7, dr, rr, ((0x68 | (t == VT_DOUBLE ? 1 : 0)) << 5) | (u ? 1 : 0) | (l ? 2 : 0)); // fcvt.[sd].[wl][u]
1267 ST_FUNC void gen_cvt_ftoi(int t)
1269 int ft = vtop->type.t & VT_BTYPE;
1270 int l = (t & VT_BTYPE) == VT_LLONG;
1271 int u = t & VT_UNSIGNED;
1272 if (ft == VT_LDOUBLE) {
1273 int func = l ?
1274 (u ? TOK___fixunstfdi : TOK___fixtfdi) :
1275 (u ? TOK___fixunstfsi : TOK___fixtfsi);
1276 vpush_global_sym(&func_old_type, func);
1277 vrott(2);
1278 gfunc_call(1);
1279 vpushi(0);
1280 vtop->type.t = t;
1281 vtop->r = REG_IRET;
1282 } else {
1283 int rr = freg(gv(RC_FLOAT)), dr;
1284 vtop--;
1285 dr = get_reg(RC_INT);
1286 vtop++;
1287 vtop->r = dr;
1288 dr = ireg(dr);
1289 EIu(0x53, 1, dr, rr, ((0x60 | (ft == VT_DOUBLE ? 1 : 0)) << 5) | (u ? 1 : 0) | (l ? 2 : 0)); // fcvt.[wl][u].[sd] rtz
1293 ST_FUNC void gen_cvt_ftof(int dt)
1295 int st = vtop->type.t & VT_BTYPE, rs, rd;
1296 dt &= VT_BTYPE;
1297 if (st == dt)
1298 return;
1299 if (dt == VT_LDOUBLE || st == VT_LDOUBLE) {
1300 int func = (dt == VT_LDOUBLE) ?
1301 (st == VT_FLOAT ? TOK___extendsftf2 : TOK___extenddftf2) :
1302 (dt == VT_FLOAT ? TOK___trunctfsf2 : TOK___trunctfdf2);
1303 /* We can't use gfunc_call, as func_old_type works like vararg
1304 functions, and on riscv unnamed float args are passed like
1305 integers. But we really need them in the float argument registers
1306 for extendsftf2/extenddftf2. So, do it explicitely. */
1307 save_regs(1);
1308 if (dt == VT_LDOUBLE)
1309 gv(RC_F(0));
1310 else {
1311 gv(RC_R(0));
1312 assert(vtop->r2 < 7);
1313 if (vtop->r2 != 1 + vtop->r) {
1314 EI(0x13, 0, ireg(vtop->r) + 1, ireg(vtop->r2), 0); // mv Ra+1, RR2
1315 vtop->r2 = 1 + vtop->r;
1318 vpush_global_sym(&func_old_type, func);
1319 gcall_or_jmp(1);
1320 vtop -= 2;
1321 vpushi(0);
1322 vtop->type.t = dt;
1323 if (dt == VT_LDOUBLE)
1324 vtop->r = REG_IRET, vtop->r2 = REG_IRET+1;
1325 else
1326 vtop->r = REG_FRET;
1327 } else {
1328 assert (dt == VT_FLOAT || dt == VT_DOUBLE);
1329 assert (st == VT_FLOAT || st == VT_DOUBLE);
1330 rs = gv(RC_FLOAT);
1331 rd = get_reg(RC_FLOAT);
1332 if (dt == VT_DOUBLE)
1333 EI(0x53, 0, freg(rd), freg(rs), 0x21 << 5); // fcvt.d.s RD, RS (no rm)
1334 else
1335 EI(0x53, 7, freg(rd), freg(rs), (0x20 << 5) | 1); // fcvt.s.d RD, RS (dyn rm)
1336 vtop->r = rd;
1340 ST_FUNC void ggoto(void)
1342 gcall_or_jmp(0);
1343 vtop--;
1346 ST_FUNC void gen_vla_sp_save(int addr)
1348 ES(0x23, 3, 8, 2, addr); // sd sp, fc(s0)
1351 ST_FUNC void gen_vla_sp_restore(int addr)
1353 EI(0x03, 3, 2, 8, addr); // ld sp, fc(s0)
1356 ST_FUNC void gen_vla_alloc(CType *type, int align)
1358 int rr;
1359 #if defined(CONFIG_TCC_BCHECK)
1360 if (tcc_state->do_bounds_check)
1361 vpushv(vtop);
1362 #endif
1363 rr = ireg(gv(RC_INT));
1364 EI(0x13, 0, rr, rr, 15); // addi RR, RR, 15
1365 EI(0x13, 7, rr, rr, -16); // andi, RR, RR, -16
1366 ER(0x33, 0, 2, 2, rr, 0x20); // sub sp, sp, rr
1367 vpop();
1368 #if defined(CONFIG_TCC_BCHECK)
1369 if (tcc_state->do_bounds_check) {
1370 vpushi(0);
1371 vtop->r = TREG_R(0);
1372 o(0x00010513); /* mv a0,sp */
1373 vswap();
1374 vpush_global_sym(&func_old_type, TOK___bound_new_region);
1375 vrott(3);
1376 gfunc_call(2);
1377 func_bound_add_epilog = 1;
1379 #endif
1381 #endif