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Add USES file which list some software known to support tcc builds.
[tinycc.git] / riscv64-gen.c
blob8c3486df26d0f1f917cfb2fd7d155196552958cc
1 #ifdef TARGET_DEFS_ONLY
2
3 // Number of registers available to allocator:
4 #define NB_REGS 19 // x10-x17 aka a0-a7, f10-f17 aka fa0-fa7, xxx, ra, sp
5 #define NB_ASM_REGS 32
6 #define CONFIG_TCC_ASM
7
8 #define TREG_R(x) (x) // x = 0..7
9 #define TREG_F(x) (x + 8) // x = 0..7
10
11 // Register classes sorted from more general to more precise:
12 #define RC_INT (1 << 0)
13 #define RC_FLOAT (1 << 1)
14 #define RC_R(x) (1 << (2 + (x))) // x = 0..7
15 #define RC_F(x) (1 << (10 + (x))) // x = 0..7
16
17 #define RC_IRET (RC_R(0)) // int return register class
18 #define RC_IRE2 (RC_R(1)) // int 2nd return register class
19 #define RC_FRET (RC_F(0)) // float return register class
20
21 #define REG_IRET (TREG_R(0)) // int return register number
22 #define REG_IRE2 (TREG_R(1)) // int 2nd return register number
23 #define REG_FRET (TREG_F(0)) // float return register number
24
25 #define PTR_SIZE 8
26
27 #define LDOUBLE_SIZE 16
28 #define LDOUBLE_ALIGN 16
29
30 #define MAX_ALIGN 16
31
32 #define CHAR_IS_UNSIGNED
33
34 #else
35 #define USING_GLOBALS
36 #include "tcc.h"
37 #include <assert.h>
38
39 #define XLEN 8
40
41 #define TREG_RA 17
42 #define TREG_SP 18
43
44 ST_DATA const int reg_classes[NB_REGS] = {
45 RC_INT | RC_R(0),
46 RC_INT | RC_R(1),
47 RC_INT | RC_R(2),
48 RC_INT | RC_R(3),
49 RC_INT | RC_R(4),
50 RC_INT | RC_R(5),
51 RC_INT | RC_R(6),
52 RC_INT | RC_R(7),
53 RC_FLOAT | RC_F(0),
54 RC_FLOAT | RC_F(1),
55 RC_FLOAT | RC_F(2),
56 RC_FLOAT | RC_F(3),
57 RC_FLOAT | RC_F(4),
58 RC_FLOAT | RC_F(5),
59 RC_FLOAT | RC_F(6),
60 RC_FLOAT | RC_F(7),
61 0,
62 1 << TREG_RA,
63 1 << TREG_SP
64 };
65
66 #if defined(CONFIG_TCC_BCHECK)
67 static addr_t func_bound_offset;
68 static unsigned long func_bound_ind;
69 ST_DATA int func_bound_add_epilog;
70 #endif
71
72 static int ireg(int r)
73 {
74 if (r == TREG_RA)
75 return 1; // ra
76 if (r == TREG_SP)
77 return 2; // sp
78 assert(r >= 0 && r < 8);
79 return r + 10; // tccrX --> aX == x(10+X)
80 }
81
82 static int is_ireg(int r)
83 {
84 return (unsigned)r < 8 || r == TREG_RA || r == TREG_SP;
85 }
86
87 static int freg(int r)
88 {
89 assert(r >= 8 && r < 16);
90 return r - 8 + 10; // tccfX --> faX == f(10+X)
91 }
92
93 static int is_freg(int r)
94 {
95 return r >= 8 && r < 16;
96 }
97
98 ST_FUNC void o(unsigned int c)
99 {
100 int ind1 = ind + 4;
101 if (nocode_wanted)
102 return;
103 if (ind1 > cur_text_section->data_allocated)
104 section_realloc(cur_text_section, ind1);
105 write32le(cur_text_section->data + ind, c);
106 ind = ind1;
107 }
108
109 static void EIu(uint32_t opcode, uint32_t func3,
110 uint32_t rd, uint32_t rs1, uint32_t imm)
111 {
112 o(opcode | (func3 << 12) | (rd << 7) | (rs1 << 15) | (imm << 20));
113 }
114
115 static void ER(uint32_t opcode, uint32_t func3,
116 uint32_t rd, uint32_t rs1, uint32_t rs2, uint32_t func7)
117 {
118 o(opcode | func3 << 12 | rd << 7 | rs1 << 15 | rs2 << 20 | func7 << 25);
119 }
120
121 static void EI(uint32_t opcode, uint32_t func3,
122 uint32_t rd, uint32_t rs1, uint32_t imm)
123 {
124 assert(! ((imm + (1 << 11)) >> 12));
125 EIu(opcode, func3, rd, rs1, imm);
126 }
127
128 static void ES(uint32_t opcode, uint32_t func3,
129 uint32_t rs1, uint32_t rs2, uint32_t imm)
130 {
131 assert(! ((imm + (1 << 11)) >> 12));
132 o(opcode | (func3 << 12) | ((imm & 0x1f) << 7) | (rs1 << 15)
133 | (rs2 << 20) | ((imm >> 5) << 25));
134 }
135
136 // Patch all branches in list pointed to by t to branch to a:
137 ST_FUNC void gsym_addr(int t_, int a_)
138 {
139 uint32_t t = t_;
140 uint32_t a = a_;
141 while (t) {
142 unsigned char *ptr = cur_text_section->data + t;
143 uint32_t next = read32le(ptr);
144 uint32_t r = a - t, imm;
145 if ((r + (1 << 21)) & ~((1U << 22) - 2))
146 tcc_error("out-of-range branch chain");
147 imm = (((r >> 12) & 0xff) << 12)
148 | (((r >> 11) & 1) << 20)
149 | (((r >> 1) & 0x3ff) << 21)
150 | (((r >> 20) & 1) << 31);
151 write32le(ptr, r == 4 ? 0x33 : 0x6f | imm); // nop || j imm
152 t = next;
153 }
154 }
155
156 static int load_symofs(int r, SValue *sv, int forstore)
157 {
158 static Sym label;
159 int rr, doload = 0;
160 int fc = sv->c.i, v = sv->r & VT_VALMASK;
161 if (sv->r & VT_SYM) {
162 assert(v == VT_CONST);
163 if (sv->sym->type.t & VT_STATIC) { // XXX do this per linker relax
164 greloca(cur_text_section, sv->sym, ind,
165 R_RISCV_PCREL_HI20, sv->c.i);
166 sv->c.i = 0;
167 } else {
168 if (((unsigned)fc + (1 << 11)) >> 12)
169 tcc_error("unimp: large addend for global address (0x%llx)", (long long)sv->c.i);
170 greloca(cur_text_section, sv->sym, ind,
171 R_RISCV_GOT_HI20, 0);
172 doload = 1;
173 }
174 if (!label.v) {
175 label.v = tok_alloc(".L0 ", 4)->tok;
176 label.type.t = VT_VOID | VT_STATIC;
177 }
178 label.c = 0; /* force new local ELF symbol */
179 put_extern_sym(&label, cur_text_section, ind, 0);
180 rr = is_ireg(r) ? ireg(r) : 5;
181 o(0x17 | (rr << 7)); // auipc RR, 0 %pcrel_hi(sym)+addend
182 greloca(cur_text_section, &label, ind,
183 doload || !forstore
184 ? R_RISCV_PCREL_LO12_I : R_RISCV_PCREL_LO12_S, 0);
185 if (doload) {
186 EI(0x03, 3, rr, rr, 0); // ld RR, 0(RR)
187 }
188 } else if (v == VT_LOCAL || v == VT_LLOCAL) {
189 rr = 8; // s0
190 if (fc != sv->c.i)
191 tcc_error("unimp: store(giant local off) (0x%llx)", (long long)sv->c.i);
192 if (((unsigned)fc + (1 << 11)) >> 12) {
193 rr = is_ireg(r) ? ireg(r) : 5; // t0
194 o(0x37 | (rr << 7) | ((0x800 + fc) & 0xfffff000)); //lui RR, upper(fc)
195 ER(0x33, 0, rr, rr, 8, 0); // add RR, RR, s0
196 sv->c.i = fc << 20 >> 20;
197 }
198 } else
199 tcc_error("uhh");
200 return rr;
201 }
202
203 ST_FUNC void load(int r, SValue *sv)
204 {
205 int fr = sv->r;
206 int v = fr & VT_VALMASK;
207 int rr = is_ireg(r) ? ireg(r) : freg(r);
208 int fc = sv->c.i;
209 int bt = sv->type.t & VT_BTYPE;
210 int align, size;
211 if (fr & VT_LVAL) {
212 int func3, opcode = is_freg(r) ? 0x07 : 0x03, br;
213 size = type_size(&sv->type, &align);
214 assert (!is_freg(r) || bt == VT_FLOAT || bt == VT_DOUBLE);
215 if (bt == VT_FUNC) /* XXX should be done in generic code */
216 size = PTR_SIZE;
217 func3 = size == 1 ? 0 : size == 2 ? 1 : size == 4 ? 2 : 3;
218 if (size < 4 && !is_float(sv->type.t) && (sv->type.t & VT_UNSIGNED))
219 func3 |= 4;
220 if (v == VT_LOCAL || (fr & VT_SYM)) {
221 br = load_symofs(r, sv, 0);
222 fc = sv->c.i;
223 } else if (v < VT_CONST) {
224 br = ireg(v);
225 /*if (((unsigned)fc + (1 << 11)) >> 12)
226 tcc_error("unimp: load(large addend) (0x%x)", fc);*/
227 fc = 0; // XXX store ofs in LVAL(reg)
228 } else if (v == VT_LLOCAL) {
229 br = load_symofs(r, sv, 0);
230 fc = sv->c.i;
231 EI(0x03, 3, rr, br, fc); // ld RR, fc(BR)
232 br = rr;
233 fc = 0;
234 } else {
235 tcc_error("unimp: load(non-local lval)");
236 }
237 EI(opcode, func3, rr, br, fc); // l[bhwd][u] / fl[wd] RR, fc(BR)
238 } else if (v == VT_CONST) {
239 int rb = 0, do32bit = 8, zext = 0;
240 assert((!is_float(sv->type.t) && is_ireg(r)) || bt == VT_LDOUBLE);
241 if (fr & VT_SYM) {
242 rb = load_symofs(r, sv, 0);
243 fc = sv->c.i;
244 do32bit = 0;
245 }
246 if (is_float(sv->type.t) && bt != VT_LDOUBLE)
247 tcc_error("unimp: load(float)");
248 if (fc != sv->c.i) {
249 int64_t si = sv->c.i;
250 uint32_t pi;
251 si >>= 32;
252 if (si != 0) {
253 pi = si;
254 if (fc < 0)
255 pi++;
256 o(0x37 | (rr << 7) | (((pi + 0x800) & 0xfffff000))); // lui RR, up(up(fc))
257 EI(0x13, 0, rr, rr, (int)pi << 20 >> 20); // addi RR, RR, lo(up(fc))
258 EI(0x13, 1, rr, rr, 12); // slli RR, RR, 12
259 EI(0x13, 0, rr, rr, (fc + (1 << 19)) >> 20); // addi RR, RR, up(lo(fc))
260 EI(0x13, 1, rr, rr, 12); // slli RR, RR, 12
261 fc = fc << 12 >> 12;
262 EI(0x13, 0, rr, rr, fc >> 8); // addi RR, RR, lo1(lo(fc))
263 EI(0x13, 1, rr, rr, 8); // slli RR, RR, 8
264 fc &= 0xff;
265 rb = rr;
266 do32bit = 0;
267 } else if (bt == VT_LLONG) {
268 /* A 32bit unsigned constant for a 64bit type.
269 lui always sign extends, so we need to do an explicit zext.*/
270 zext = 1;
271 }
272 }
273 if (((unsigned)fc + (1 << 11)) >> 12)
274 o(0x37 | (rr << 7) | ((0x800 + fc) & 0xfffff000)), rb = rr; //lui RR, upper(fc)
275 if (fc || (rr != rb) || do32bit || (fr & VT_SYM))
276 EI(0x13 | do32bit, 0, rr, rb, fc << 20 >> 20); // addi[w] R, x0|R, FC
277 if (zext) {
278 EI(0x13, 1, rr, rr, 32); // slli RR, RR, 32
279 EI(0x13, 5, rr, rr, 32); // srli RR, RR, 32
280 }
281 } else if (v == VT_LOCAL) {
282 int br = load_symofs(r, sv, 0);
283 assert(is_ireg(r));
284 fc = sv->c.i;
285 EI(0x13, 0, rr, br, fc); // addi R, s0, FC
286 } else if (v < VT_CONST) { /* reg-reg */
287 //assert(!fc); XXX support offseted regs
288 if (is_freg(r) && is_freg(v))
289 ER(0x53, 0, rr, freg(v), freg(v), bt == VT_DOUBLE ? 0x11 : 0x10); //fsgnj.[sd] RR, V, V == fmv.[sd] RR, V
290 else if (is_ireg(r) && is_ireg(v))
291 EI(0x13, 0, rr, ireg(v), 0); // addi RR, V, 0 == mv RR, V
292 else {
293 int func7 = is_ireg(r) ? 0x70 : 0x78;
294 size = type_size(&sv->type, &align);
295 if (size == 8)
296 func7 |= 1;
297 assert(size == 4 || size == 8);
298 o(0x53 | (rr << 7) | ((is_freg(v) ? freg(v) : ireg(v)) << 15)
299 | (func7 << 25)); // fmv.{w.x, x.w, d.x, x.d} RR, VR
300 }
301 } else if (v == VT_CMP) {
302 int op = vtop->cmp_op;
303 int a = vtop->cmp_r & 0xff;
304 int b = (vtop->cmp_r >> 8) & 0xff;
305 int inv = 0;
306 switch (op) {
307 case TOK_ULT:
308 case TOK_UGE:
309 case TOK_ULE:
310 case TOK_UGT:
311 case TOK_LT:
312 case TOK_GE:
313 case TOK_LE:
314 case TOK_GT:
315 if (op & 1) { // remove [U]GE,GT
316 inv = 1;
317 op--;
318 }
319 if ((op & 7) == 6) { // [U]LE
320 int t = a; a = b; b = t;
321 inv ^= 1;
322 }
323 ER(0x33, (op > TOK_UGT) ? 2 : 3, rr, a, b, 0); // slt[u] d, a, b
324 if (inv)
325 EI(0x13, 4, rr, rr, 1); // xori d, d, 1
326 break;
327 case TOK_NE:
328 case TOK_EQ:
329 if (rr != a || b)
330 ER(0x33, 0, rr, a, b, 0x20); // sub d, a, b
331 if (op == TOK_NE)
332 ER(0x33, 3, rr, 0, rr, 0); // sltu d, x0, d == snez d,d
333 else
334 EI(0x13, 3, rr, rr, 1); // sltiu d, d, 1 == seqz d,d
335 break;
336 }
337 } else if ((v & ~1) == VT_JMP) {
338 int t = v & 1;
339 assert(is_ireg(r));
340 EI(0x13, 0, rr, 0, t); // addi RR, x0, t
341 gjmp_addr(ind + 8);
342 gsym(fc);
343 EI(0x13, 0, rr, 0, t ^ 1); // addi RR, x0, !t
344 } else
345 tcc_error("unimp: load(non-const)");
346 }
347
348 ST_FUNC void store(int r, SValue *sv)
349 {
350 int fr = sv->r & VT_VALMASK;
351 int rr = is_ireg(r) ? ireg(r) : freg(r), ptrreg;
352 int fc = sv->c.i;
353 int bt = sv->type.t & VT_BTYPE;
354 int align, size = type_size(&sv->type, &align);
355 assert(!is_float(bt) || is_freg(r) || bt == VT_LDOUBLE);
356 /* long doubles are in two integer registers, but the load/store
357 primitives only deal with one, so do as if it's one reg. */
358 if (bt == VT_LDOUBLE)
359 size = align = 8;
360 if (bt == VT_STRUCT)
361 tcc_error("unimp: store(struct)");
362 if (size > 8)
363 tcc_error("unimp: large sized store");
364 assert(sv->r & VT_LVAL);
365 if (fr == VT_LOCAL || (sv->r & VT_SYM)) {
366 ptrreg = load_symofs(-1, sv, 1);
367 fc = sv->c.i;
368 } else if (fr < VT_CONST) {
369 ptrreg = ireg(fr);
370 /*if (((unsigned)fc + (1 << 11)) >> 12)
371 tcc_error("unimp: store(large addend) (0x%x)", fc);*/
372 fc = 0; // XXX support offsets regs
373 } else
374 tcc_error("implement me: %s(!local)", __FUNCTION__);
375 ES(is_freg(r) ? 0x27 : 0x23, // fs... | s...
376 size == 1 ? 0 : size == 2 ? 1 : size == 4 ? 2 : 3, // ... [wd] | [bhwd]
377 ptrreg, rr, fc); // RR, fc(base)
378 }
379
380 static void gcall_or_jmp(int docall)
381 {
382 int tr = docall ? 1 : 5; // ra or t0
383 if ((vtop->r & (VT_VALMASK | VT_LVAL)) == VT_CONST &&
384 ((vtop->r & VT_SYM) && vtop->c.i == (int)vtop->c.i)) {
385 /* constant symbolic case -> simple relocation */
386 greloca(cur_text_section, vtop->sym, ind,
387 R_RISCV_CALL_PLT, (int)vtop->c.i);
388 o(0x17 | (tr << 7)); // auipc TR, 0 %call(func)
389 EI(0x67, 0, tr, tr, 0);// jalr TR, r(TR)
390 } else if (vtop->r < VT_CONST) {
391 int r = ireg(vtop->r);
392 EI(0x67, 0, tr, r, 0); // jalr TR, 0(R)
393 } else {
394 int r = TREG_RA;
395 load(r, vtop);
396 r = ireg(r);
397 EI(0x67, 0, tr, r, 0); // jalr TR, 0(R)
398 }
399 }
400
401 #if defined(CONFIG_TCC_BCHECK)
402
403 static void gen_bounds_call(int v)
404 {
405 Sym *sym = external_global_sym(v, &func_old_type);
406
407 greloca(cur_text_section, sym, ind, R_RISCV_CALL_PLT, 0);
408 o(0x17 | (1 << 7)); // auipc TR, 0 %call(func)
409 EI(0x67, 0, 1, 1, 0); // jalr TR, r(TR)
410 }
411
412 /* generate a bounded pointer addition */
413 ST_FUNC void gen_bounded_ptr_add(void)
414 {
415 vpush_global_sym(&func_old_type, TOK___bound_ptr_add);
416 vrott(3);
417 gfunc_call(2);
418 vpushi(0);
419 /* returned pointer is in REG_IRET */
420 vtop->r = REG_IRET | VT_BOUNDED;
421 if (nocode_wanted)
422 return;
423 /* relocation offset of the bounding function call point */
424 vtop->c.i = (cur_text_section->reloc->data_offset - sizeof(ElfW(Rela)));
425 }
426
427 /* patch pointer addition in vtop so that pointer dereferencing is
428 also tested */
429 ST_FUNC void gen_bounded_ptr_deref(void)
430 {
431 addr_t func;
432 int size, align;
433 ElfW(Rela) *rel;
434 Sym *sym;
435
436 if (nocode_wanted)
437 return;
438
439 size = type_size(&vtop->type, &align);
440 switch(size) {
441 case 1: func = TOK___bound_ptr_indir1; break;
442 case 2: func = TOK___bound_ptr_indir2; break;
443 case 4: func = TOK___bound_ptr_indir4; break;
444 case 8: func = TOK___bound_ptr_indir8; break;
445 case 12: func = TOK___bound_ptr_indir12; break;
446 case 16: func = TOK___bound_ptr_indir16; break;
447 default:
448 /* may happen with struct member access */
449 return;
450 //tcc_error("unhandled size when dereferencing bounded pointer");
451 //func = 0;
452 //break;
453 }
454 sym = external_global_sym(func, &func_old_type);
455 if (!sym->c)
456 put_extern_sym(sym, NULL, 0, 0);
457 /* patch relocation */
458 /* XXX: find a better solution ? */
459 rel = (ElfW(Rela) *)(cur_text_section->reloc->data + vtop->c.i);
460 rel->r_info = ELF64_R_INFO(sym->c, ELF64_R_TYPE(rel->r_info));
461 }
462
463 static void gen_bounds_prolog(void)
464 {
465 /* leave some room for bound checking code */
466 func_bound_offset = lbounds_section->data_offset;
467 func_bound_ind = ind;
468 func_bound_add_epilog = 0;
469 o(0x00000013); /* ld a0,#lbound section pointer */
470 o(0x00000013);
471 o(0x00000013); /* nop -> call __bound_local_new */
472 o(0x00000013);
473 }
474
475 static void gen_bounds_epilog(void)
476 {
477 static Sym label;
478 addr_t saved_ind;
479 addr_t *bounds_ptr;
480 Sym *sym_data;
481 int offset_modified = func_bound_offset != lbounds_section->data_offset;
482
483 if (!offset_modified && !func_bound_add_epilog)
484 return;
485
486 /* add end of table info */
487 bounds_ptr = section_ptr_add(lbounds_section, sizeof(addr_t));
488 *bounds_ptr = 0;
489
490 sym_data = get_sym_ref(&char_pointer_type, lbounds_section,
491 func_bound_offset, lbounds_section->data_offset);
492
493 if (!label.v) {
494 label.v = tok_alloc(".LB0 ", 4)->tok;
495 label.type.t = VT_VOID | VT_STATIC;
496 }
497 /* generate bound local allocation */
498 if (offset_modified) {
499 saved_ind = ind;
500 ind = func_bound_ind;
501 label.c = 0; /* force new local ELF symbol */
502 put_extern_sym(&label, cur_text_section, ind, 0);
503 greloca(cur_text_section, sym_data, ind, R_RISCV_GOT_HI20, 0);
504 o(0x17 | (10 << 7)); // auipc a0, 0 %pcrel_hi(sym)+addend
505 greloca(cur_text_section, &label, ind, R_RISCV_PCREL_LO12_I, 0);
506 EI(0x03, 3, 10, 10, 0); // ld a0, 0(a0)
507 gen_bounds_call(TOK___bound_local_new);
508 ind = saved_ind;
509 }
510
511 /* generate bound check local freeing */
512 o(0xe02a1101); /* addi sp,sp,-32 sd a0,0(sp) */
513 o(0xa82ae42e); /* sd a1,8(sp) fsd fa0,16(sp) */
514 label.c = 0; /* force new local ELF symbol */
515 put_extern_sym(&label, cur_text_section, ind, 0);
516 greloca(cur_text_section, sym_data, ind, R_RISCV_GOT_HI20, 0);
517 o(0x17 | (10 << 7)); // auipc a0, 0 %pcrel_hi(sym)+addend
518 greloca(cur_text_section, &label, ind, R_RISCV_PCREL_LO12_I, 0);
519 EI(0x03, 3, 10, 10, 0); // ld a0, 0(a0)
520 gen_bounds_call(TOK___bound_local_delete);
521 o(0x65a26502); /* ld a0,0(sp) ld a1,8(sp) */
522 o(0x61052542); /* fld fa0,16(sp) addi sp,sp,32 */
523 }
524 #endif
525 static void reg_pass_rec(CType *type, int *rc, int *fieldofs, int ofs)
526 {
527 if ((type->t & VT_BTYPE) == VT_STRUCT) {
528 Sym *f;
529 if (type->ref->type.t == VT_UNION)
530 rc[0] = -1;
531 else for (f = type->ref->next; f; f = f->next)
532 reg_pass_rec(&f->type, rc, fieldofs, ofs + f->c);
533 } else if (type->t & VT_ARRAY) {
534 if (type->ref->c < 0 || type->ref->c > 2)
535 rc[0] = -1;
536 else {
537 int a, sz = type_size(&type->ref->type, &a);
538 reg_pass_rec(&type->ref->type, rc, fieldofs, ofs);
539 if (rc[0] > 2 || (rc[0] == 2 && type->ref->c > 1))
540 rc[0] = -1;
541 else if (type->ref->c == 2 && rc[0] && rc[1] == RC_FLOAT) {
542 rc[++rc[0]] = RC_FLOAT;
543 fieldofs[rc[0]] = ((ofs + sz) << 4)
544 | (type->ref->type.t & VT_BTYPE);
545 } else if (type->ref->c == 2)
546 rc[0] = -1;
547 }
548 } else if (rc[0] == 2 || rc[0] < 0 || (type->t & VT_BTYPE) == VT_LDOUBLE)
549 rc[0] = -1;
550 else if (!rc[0] || rc[1] == RC_FLOAT || is_float(type->t)) {
551 rc[++rc[0]] = is_float(type->t) ? RC_FLOAT : RC_INT;
552 fieldofs[rc[0]] = (ofs << 4) | (type->t & VT_BTYPE);
553 } else
554 rc[0] = -1;
555 }
556
557 static void reg_pass(CType *type, int *prc, int *fieldofs, int named)
558 {
559 prc[0] = 0;
560 reg_pass_rec(type, prc, fieldofs, 0);
561 if (prc[0] <= 0 || !named) {
562 int align, size = type_size(type, &align);
563 prc[0] = (size + 7) >> 3;
564 prc[1] = prc[2] = RC_INT;
565 fieldofs[1] = (0 << 4) | (size <= 1 ? VT_BYTE : size <= 2 ? VT_SHORT : size <= 4 ? VT_INT : VT_LLONG);
566 fieldofs[2] = (8 << 4) | (size <= 9 ? VT_BYTE : size <= 10 ? VT_SHORT : size <= 12 ? VT_INT : VT_LLONG);
567 }
568 }
569
570 ST_FUNC void gfunc_call(int nb_args)
571 {
572 int i, align, size, areg[2];
573 int *info = tcc_malloc((nb_args + 1) * sizeof (int));
574 int stack_adj = 0, tempspace = 0, stack_add, ofs, splitofs = 0;
575 SValue *sv;
576 Sym *sa;
577
578 #ifdef CONFIG_TCC_BCHECK
579 if (tcc_state->do_bounds_check)
580 gbound_args(nb_args);
581 #endif
582
583 areg[0] = 0; /* int arg regs */
584 areg[1] = 8; /* float arg regs */
585 sa = vtop[-nb_args].type.ref->next;
586 for (i = 0; i < nb_args; i++) {
587 int nregs, byref = 0, tempofs;
588 int prc[3], fieldofs[3];
589 sv = &vtop[1 + i - nb_args];
590 sv->type.t &= ~VT_ARRAY; // XXX this should be done in tccgen.c
591 size = type_size(&sv->type, &align);
592 if (size > 16) {
593 if (align < XLEN)
594 align = XLEN;
595 tempspace = (tempspace + align - 1) & -align;
596 tempofs = tempspace;
597 tempspace += size;
598 size = align = 8;
599 byref = 64 | (tempofs << 7);
600 }
601 reg_pass(&sv->type, prc, fieldofs, sa != 0);
602 if (!sa && align == 2*XLEN && size <= 2*XLEN)
603 areg[0] = (areg[0] + 1) & ~1;
604 nregs = prc[0];
605 if ((prc[1] == RC_INT && areg[0] >= 8)
606 || (prc[1] == RC_FLOAT && areg[1] >= 16)
607 || (nregs == 2 && prc[1] == RC_FLOAT && prc[2] == RC_FLOAT
608 && areg[1] >= 15)
609 || (nregs == 2 && prc[1] != prc[2]
610 && (areg[1] >= 16 || areg[0] >= 8))) {
611 info[i] = 32;
612 if (align < XLEN)
613 align = XLEN;
614 stack_adj += (size + align - 1) & -align;
615 if (!sa) /* one vararg on stack forces the rest on stack */
616 areg[0] = 8, areg[1] = 16;
617 } else {
618 info[i] = areg[prc[1] - 1]++;
619 if (!byref)
620 info[i] |= (fieldofs[1] & VT_BTYPE) << 12;
621 assert(!(fieldofs[1] >> 4));
622 if (nregs == 2) {
623 if (prc[2] == RC_FLOAT || areg[0] < 8)
624 info[i] |= (1 + areg[prc[2] - 1]++) << 7;
625 else {
626 info[i] |= 16;
627 stack_adj += 8;
628 }
629 if (!byref) {
630 assert((fieldofs[2] >> 4) < 2048);
631 info[i] |= fieldofs[2] << (12 + 4); // includes offset
632 }
633 }
634 }
635 info[i] |= byref;
636 if (sa)
637 sa = sa->next;
638 }
639 stack_adj = (stack_adj + 15) & -16;
640 tempspace = (tempspace + 15) & -16;
641 stack_add = stack_adj + tempspace;
642 if (stack_add) {
643 if (stack_add >= 0x1000) {
644 o(0x37 | (5 << 7) | (-stack_add & 0xfffff000)); //lui t0, upper(v)
645 EI(0x13, 0, 5, 5, -stack_add << 20 >> 20); // addi t0, t0, lo(v)
646 ER(0x33, 0, 2, 2, 5, 0); // add sp, sp, t0
647 }
648 else
649 EI(0x13, 0, 2, 2, -stack_add); // addi sp, sp, -adj
650 for (i = ofs = 0; i < nb_args; i++) {
651 if (info[i] & (64 | 32)) {
652 vrotb(nb_args - i);
653 size = type_size(&vtop->type, &align);
654 if (info[i] & 64) {
655 vset(&char_pointer_type, TREG_SP, 0);
656 vpushi(stack_adj + (info[i] >> 7));
657 gen_op('+');
658 vpushv(vtop); // this replaces the old argument
659 vrott(3);
660 indir();
661 vtop->type = vtop[-1].type;
662 vswap();
663 vstore();
664 vpop();
665 size = align = 8;
666 }
667 if (info[i] & 32) {
668 if (align < XLEN)
669 align = XLEN;
670 /* Once we support offseted regs we can do this:
671 vset(&vtop->type, TREG_SP | VT_LVAL, ofs);
672 to construct the lvalue for the outgoing stack slot,
673 until then we have to jump through hoops. */
674 vset(&char_pointer_type, TREG_SP, 0);
675 ofs = (ofs + align - 1) & -align;
676 vpushi(ofs);
677 gen_op('+');
678 indir();
679 vtop->type = vtop[-1].type;
680 vswap();
681 vstore();
682 vtop->r = vtop->r2 = VT_CONST; // this arg is done
683 ofs += size;
684 }
685 vrott(nb_args - i);
686 } else if (info[i] & 16) {
687 assert(!splitofs);
688 splitofs = ofs;
689 ofs += 8;
690 }
691 }
692 }
693 for (i = 0; i < nb_args; i++) {
694 int ii = info[nb_args - 1 - i], r = ii, r2 = r;
695 if (!(r & 32)) {
696 CType origtype;
697 int loadt;
698 r &= 15;
699 r2 = r2 & 64 ? 0 : (r2 >> 7) & 31;
700 assert(r2 <= 16);
701 vrotb(i+1);
702 origtype = vtop->type;
703 size = type_size(&vtop->type, &align);
704 loadt = vtop->type.t & VT_BTYPE;
705 if (loadt == VT_STRUCT) {
706 loadt = (ii >> 12) & VT_BTYPE;
707 }
708 if (info[nb_args - 1 - i] & 16) {
709 assert(!r2);
710 r2 = 1 + TREG_RA;
711 }
712 if (loadt == VT_LDOUBLE) {
713 assert(r2);
714 r2--;
715 } else if (r2) {
716 test_lvalue();
717 vpushv(vtop);
718 }
719 vtop->type.t = loadt | (vtop->type.t & VT_UNSIGNED);
720 gv(r < 8 ? RC_R(r) : RC_F(r - 8));
721 vtop->type = origtype;
722
723 if (r2 && loadt != VT_LDOUBLE) {
724 r2--;
725 assert(r2 < 16 || r2 == TREG_RA);
726 vswap();
727 gaddrof();
728 vtop->type = char_pointer_type;
729 vpushi(ii >> 20);
730 gen_op('+');
731 indir();
732 vtop->type = origtype;
733 loadt = vtop->type.t & VT_BTYPE;
734 if (loadt == VT_STRUCT) {
735 loadt = (ii >> 16) & VT_BTYPE;
736 }
737 save_reg_upstack(r2, 1);
738 vtop->type.t = loadt | (vtop->type.t & VT_UNSIGNED);
739 load(r2, vtop);
740 assert(r2 < VT_CONST);
741 vtop--;
742 vtop->r2 = r2;
743 }
744 if (info[nb_args - 1 - i] & 16) {
745 ES(0x23, 3, 2, ireg(vtop->r2), splitofs); // sd t0, ofs(sp)
746 vtop->r2 = VT_CONST;
747 } else if (loadt == VT_LDOUBLE && vtop->r2 != r2) {
748 assert(vtop->r2 <= 7 && r2 <= 7);
749 /* XXX we'd like to have 'gv' move directly into
750 the right class instead of us fixing it up. */
751 EI(0x13, 0, ireg(r2), ireg(vtop->r2), 0); // mv Ra+1, RR2
752 vtop->r2 = r2;
753 }
754 vrott(i+1);
755 }
756 }
757 vrotb(nb_args + 1);
758 save_regs(nb_args + 1);
759 gcall_or_jmp(1);
760 vtop -= nb_args + 1;
761 if (stack_add) {
762 if (stack_add >= 0x1000) {
763 o(0x37 | (5 << 7) | (stack_add & 0xfffff000)); //lui t0, upper(v)
764 EI(0x13, 0, 5, 5, stack_add << 20 >> 20); // addi t0, t0, lo(v)
765 ER(0x33, 0, 2, 2, 5, 0); // add sp, sp, t0
766 }
767 else
768 EI(0x13, 0, 2, 2, stack_add); // addi sp, sp, adj
769 }
770 tcc_free(info);
771 }
772
773 static int func_sub_sp_offset, num_va_regs, func_va_list_ofs;
774
775 ST_FUNC void gfunc_prolog(Sym *func_sym)
776 {
777 CType *func_type = &func_sym->type;
778 int i, addr, align, size;
779 int param_addr = 0;
780 int areg[2];
781 Sym *sym;
782 CType *type;
783
784 sym = func_type->ref;
785 loc = -16; // for ra and s0
786 func_sub_sp_offset = ind;
787 ind += 5 * 4;
788
789 areg[0] = 0, areg[1] = 0;
790 addr = 0;
791 /* if the function returns by reference, then add an
792 implicit pointer parameter */
793 size = type_size(&func_vt, &align);
794 if (size > 2 * XLEN) {
795 loc -= 8;
796 func_vc = loc;
797 ES(0x23, 3, 8, 10 + areg[0]++, loc); // sd a0, loc(s0)
798 }
799 /* define parameters */
800 while ((sym = sym->next) != NULL) {
801 int byref = 0;
802 int regcount;
803 int prc[3], fieldofs[3];
804 type = &sym->type;
805 size = type_size(type, &align);
806 if (size > 2 * XLEN) {
807 type = &char_pointer_type;
808 size = align = byref = 8;
809 }
810 reg_pass(type, prc, fieldofs, 1);
811 regcount = prc[0];
812 if (areg[prc[1] - 1] >= 8
813 || (regcount == 2
814 && ((prc[1] == RC_FLOAT && prc[2] == RC_FLOAT && areg[1] >= 7)
815 || (prc[1] != prc[2] && (areg[1] >= 8 || areg[0] >= 8))))) {
816 if (align < XLEN)
817 align = XLEN;
818 addr = (addr + align - 1) & -align;
819 param_addr = addr;
820 addr += size;
821 } else {
822 loc -= regcount * 8; // XXX could reserve only 'size' bytes
823 param_addr = loc;
824 for (i = 0; i < regcount; i++) {
825 if (areg[prc[1+i] - 1] >= 8) {
826 assert(i == 1 && regcount == 2 && !(addr & 7));
827 EI(0x03, 3, 5, 8, addr); // ld t0, addr(s0)
828 addr += 8;
829 ES(0x23, 3, 8, 5, loc + i*8); // sd t0, loc(s0)
830 } else if (prc[1+i] == RC_FLOAT) {
831 ES(0x27, (size / regcount) == 4 ? 2 : 3, 8, 10 + areg[1]++, loc + (fieldofs[i+1] >> 4)); // fs[wd] FAi, loc(s0)
832 } else {
833 ES(0x23, 3, 8, 10 + areg[0]++, loc + i*8); // sd aX, loc(s0) // XXX
834 }
835 }
836 }
837 sym_push(sym->v & ~SYM_FIELD, &sym->type,
838 (byref ? VT_LLOCAL : VT_LOCAL) | VT_LVAL,
839 param_addr);
840 }
841 func_va_list_ofs = addr;
842 num_va_regs = 0;
843 if (func_var) {
844 for (; areg[0] < 8; areg[0]++) {
845 num_va_regs++;
846 ES(0x23, 3, 8, 10 + areg[0], -8 + num_va_regs * 8); // sd aX, loc(s0)
847 }
848 }
849 #ifdef CONFIG_TCC_BCHECK
850 if (tcc_state->do_bounds_check)
851 gen_bounds_prolog();
852 #endif
853 }
854
855 ST_FUNC int gfunc_sret(CType *vt, int variadic, CType *ret,
856 int *ret_align, int *regsize)
857 {
858 int align, size = type_size(vt, &align), nregs;
859 int prc[3], fieldofs[3];
860 *ret_align = 1;
861 *regsize = 8;
862 if (size > 16)
863 return 0;
864 reg_pass(vt, prc, fieldofs, 1);
865 nregs = prc[0];
866 if (nregs == 2 && prc[1] != prc[2])
867 return -1; /* generic code can't deal with this case */
868 if (prc[1] == RC_FLOAT) {
869 *regsize = size / nregs;
870 }
871 ret->t = fieldofs[1] & VT_BTYPE;
872 return nregs;
873 }
874
875 ST_FUNC void arch_transfer_ret_regs(int aftercall)
876 {
877 int prc[3], fieldofs[3];
878 reg_pass(&vtop->type, prc, fieldofs, 1);
879 assert(prc[0] == 2 && prc[1] != prc[2] && !(fieldofs[1] >> 4));
880 assert(vtop->r == (VT_LOCAL | VT_LVAL));
881 vpushv(vtop);
882 vtop->type.t = fieldofs[1] & VT_BTYPE;
883 (aftercall ? store : load)(prc[1] == RC_INT ? REG_IRET : REG_FRET, vtop);
884 vtop->c.i += fieldofs[2] >> 4;
885 vtop->type.t = fieldofs[2] & VT_BTYPE;
886 (aftercall ? store : load)(prc[2] == RC_INT ? REG_IRET : REG_FRET, vtop);
887 vtop--;
888 }
889
890 ST_FUNC void gfunc_epilog(void)
891 {
892 int v, saved_ind, d, large_ofs_ind;
893
894 #ifdef CONFIG_TCC_BCHECK
895 if (tcc_state->do_bounds_check)
896 gen_bounds_epilog();
897 #endif
898
899 loc = (loc - num_va_regs * 8);
900 d = v = (-loc + 15) & -16;
901
902 if (v >= (1 << 11)) {
903 d = 16;
904 o(0x37 | (5 << 7) | ((0x800 + (v-16)) & 0xfffff000)); //lui t0, upper(v)
905 EI(0x13, 0, 5, 5, (v-16) << 20 >> 20); // addi t0, t0, lo(v)
906 ER(0x33, 0, 2, 2, 5, 0); // add sp, sp, t0
907 }
908 EI(0x03, 3, 1, 2, d - 8 - num_va_regs * 8); // ld ra, v-8(sp)
909 EI(0x03, 3, 8, 2, d - 16 - num_va_regs * 8); // ld s0, v-16(sp)
910 EI(0x13, 0, 2, 2, d); // addi sp, sp, v
911 EI(0x67, 0, 0, 1, 0); // jalr x0, 0(x1), aka ret
912 large_ofs_ind = ind;
913 if (v >= (1 << 11)) {
914 EI(0x13, 0, 8, 2, d - num_va_regs * 8); // addi s0, sp, d
915 o(0x37 | (5 << 7) | ((0x800 + (v-16)) & 0xfffff000)); //lui t0, upper(v)
916 EI(0x13, 0, 5, 5, (v-16) << 20 >> 20); // addi t0, t0, lo(v)
917 ER(0x33, 0, 2, 2, 5, 0x20); // sub sp, sp, t0
918 gjmp_addr(func_sub_sp_offset + 5*4);
919 }
920 saved_ind = ind;
921
922 ind = func_sub_sp_offset;
923 EI(0x13, 0, 2, 2, -d); // addi sp, sp, -d
924 ES(0x23, 3, 2, 1, d - 8 - num_va_regs * 8); // sd ra, d-8(sp)
925 ES(0x23, 3, 2, 8, d - 16 - num_va_regs * 8); // sd s0, d-16(sp)
926 if (v < (1 << 11))
927 EI(0x13, 0, 8, 2, d - num_va_regs * 8); // addi s0, sp, d
928 else
929 gjmp_addr(large_ofs_ind);
930 if ((ind - func_sub_sp_offset) != 5*4)
931 EI(0x13, 0, 0, 0, 0); // addi x0, x0, 0 == nop
932 ind = saved_ind;
933 }
934
935 ST_FUNC void gen_va_start(void)
936 {
937 vtop--;
938 vset(&char_pointer_type, VT_LOCAL, func_va_list_ofs);
939 }
940
941 ST_FUNC void gen_fill_nops(int bytes)
942 {
943 if ((bytes & 3))
944 tcc_error("alignment of code section not multiple of 4");
945 while (bytes > 0) {
946 EI(0x13, 0, 0, 0, 0); // addi x0, x0, 0 == nop
947 bytes -= 4;
948 }
949 }
950
951 // Generate forward branch to label:
952 ST_FUNC int gjmp(int t)
953 {
954 if (nocode_wanted)
955 return t;
956 o(t);
957 return ind - 4;
958 }
959
960 // Generate branch to known address:
961 ST_FUNC void gjmp_addr(int a)
962 {
963 uint32_t r = a - ind, imm;
964 if ((r + (1 << 21)) & ~((1U << 22) - 2)) {
965 o(0x17 | (5 << 7) | (((r + 0x800) & 0xfffff000))); // lui RR, up(r)
966 r = (int)r << 20 >> 20;
967 EI(0x67, 0, 0, 5, r); // jalr x0, r(t0)
968 } else {
969 imm = (((r >> 12) & 0xff) << 12)
970 | (((r >> 11) & 1) << 20)
971 | (((r >> 1) & 0x3ff) << 21)
972 | (((r >> 20) & 1) << 31);
973 o(0x6f | imm); // jal x0, imm == j imm
974 }
975 }
976
977 ST_FUNC int gjmp_cond(int op, int t)
978 {
979 int tmp;
980 int a = vtop->cmp_r & 0xff;
981 int b = (vtop->cmp_r >> 8) & 0xff;
982 switch (op) {
983 case TOK_ULT: op = 6; break;
984 case TOK_UGE: op = 7; break;
985 case TOK_ULE: op = 7; tmp = a; a = b; b = tmp; break;
986 case TOK_UGT: op = 6; tmp = a; a = b; b = tmp; break;
987 case TOK_LT: op = 4; break;
988 case TOK_GE: op = 5; break;
989 case TOK_LE: op = 5; tmp = a; a = b; b = tmp; break;
990 case TOK_GT: op = 4; tmp = a; a = b; b = tmp; break;
991 case TOK_NE: op = 1; break;
992 case TOK_EQ: op = 0; break;
993 }
994 o(0x63 | (op ^ 1) << 12 | a << 15 | b << 20 | 8 << 7); // bOP a,b,+4
995 return gjmp(t);
996 }
997
998 ST_FUNC int gjmp_append(int n, int t)
999 {
1000 void *p;
1001 /* insert jump list n into t */
1002 if (n) {
1003 uint32_t n1 = n, n2;
1004 while ((n2 = read32le(p = cur_text_section->data + n1)))
1005 n1 = n2;
1006 write32le(p, t);
1007 t = n;
1008 }
1009 return t;
1010 }
1011
1012 static void gen_opil(int op, int ll)
1013 {
1014 int a, b, d;
1015 int func3 = 0;
1016 ll = ll ? 0 : 8;
1017 if ((vtop->r & (VT_VALMASK | VT_LVAL | VT_SYM)) == VT_CONST) {
1018 int fc = vtop->c.i;
1019 if (fc == vtop->c.i && !(((unsigned)fc + (1 << 11)) >> 12)) {
1020 int cll = 0;
1021 int m = ll ? 31 : 63;
1022 vswap();
1023 gv(RC_INT);
1024 a = ireg(vtop[0].r);
1025 --vtop;
1026 d = get_reg(RC_INT);
1027 ++vtop;
1028 vswap();
1029 switch (op) {
1030 case '-':
1031 if (fc <= -(1 << 11))
1032 break;
1033 fc = -fc;
1034 case '+':
1035 func3 = 0; // addi d, a, fc
1036 cll = ll;
1037 do_cop:
1038 EI(0x13 | cll, func3, ireg(d), a, fc);
1039 --vtop;
1040 if (op >= TOK_ULT && op <= TOK_GT) {
1041 vset_VT_CMP(TOK_NE);
1042 vtop->cmp_r = ireg(d) | 0 << 8;
1043 } else
1044 vtop[0].r = d;
1045 return;
1046 case TOK_LE:
1047 if (fc >= (1 << 11) - 1)
1048 break;
1049 ++fc;
1050 case TOK_LT: func3 = 2; goto do_cop; // slti d, a, fc
1051 case TOK_ULE:
1052 if (fc >= (1 << 11) - 1)
1053 break;
1054 ++fc;
1055 case TOK_ULT: func3 = 3; goto do_cop; // sltiu d, a, fc
1056 case '^': func3 = 4; goto do_cop; // xori d, a, fc
1057 case '|': func3 = 6; goto do_cop; // ori d, a, fc
1058 case '&': func3 = 7; goto do_cop; // andi d, a, fc
1059 case TOK_SHL: func3 = 1; cll = ll; fc &= m; goto do_cop; // slli d, a, fc
1060 case TOK_SHR: func3 = 5; cll = ll; fc &= m; goto do_cop; // srli d, a, fc
1061 case TOK_SAR: func3 = 5; cll = ll; fc = 1024 | (fc & m); goto do_cop;
1062
1063 case TOK_UGE: /* -> TOK_ULT */
1064 case TOK_UGT: /* -> TOK_ULE */
1065 case TOK_GE: /* -> TOK_LT */
1066 case TOK_GT: /* -> TOK_LE */
1067 gen_opil(op - 1, !ll);
1068 vtop->cmp_op ^= 1;
1069 return;
1070
1071 case TOK_NE:
1072 case TOK_EQ:
1073 if (fc)
1074 gen_opil('-', !ll), a = ireg(vtop++->r);
1075 --vtop;
1076 vset_VT_CMP(op);
1077 vtop->cmp_r = a | 0 << 8;
1078 return;
1079 }
1080 }
1081 }
1082 gv2(RC_INT, RC_INT);
1083 a = ireg(vtop[-1].r);
1084 b = ireg(vtop[0].r);
1085 vtop -= 2;
1086 d = get_reg(RC_INT);
1087 vtop++;
1088 vtop[0].r = d;
1089 d = ireg(d);
1090 switch (op) {
1091 default:
1092 if (op >= TOK_ULT && op <= TOK_GT) {
1093 vset_VT_CMP(op);
1094 vtop->cmp_r = a | b << 8;
1095 break;
1096 }
1097 tcc_error("implement me: %s(%s)", __FUNCTION__, get_tok_str(op, NULL));
1098 break;
1099
1100 case '+':
1101 ER(0x33 | ll, 0, d, a, b, 0); // add d, a, b
1102 break;
1103 case '-':
1104 ER(0x33 | ll, 0, d, a, b, 0x20); // sub d, a, b
1105 break;
1106 case TOK_SAR:
1107 ER(0x33 | ll | ll, 5, d, a, b, 0x20); // sra d, a, b
1108 break;
1109 case TOK_SHR:
1110 ER(0x33 | ll | ll, 5, d, a, b, 0); // srl d, a, b
1111 break;
1112 case TOK_SHL:
1113 ER(0x33 | ll, 1, d, a, b, 0); // sll d, a, b
1114 break;
1115 case '*':
1116 ER(0x33 | ll, 0, d, a, b, 1); // mul d, a, b
1117 break;
1118 case '/':
1119 ER(0x33 | ll, 4, d, a, b, 1); // div d, a, b
1120 break;
1121 case '&':
1122 ER(0x33, 7, d, a, b, 0); // and d, a, b
1123 break;
1124 case '^':
1125 ER(0x33, 4, d, a, b, 0); // xor d, a, b
1126 break;
1127 case '|':
1128 ER(0x33, 6, d, a, b, 0); // or d, a, b
1129 break;
1130 case '%':
1131 ER(ll ? 0x3b: 0x33, 6, d, a, b, 1); // rem d, a, b
1132 break;
1133 case TOK_UMOD:
1134 ER(0x33 | ll, 7, d, a, b, 1); // remu d, a, b
1135 break;
1136 case TOK_PDIV:
1137 case TOK_UDIV:
1138 ER(0x33 | ll, 5, d, a, b, 1); // divu d, a, b
1139 break;
1140 }
1141 }
1142
1143 ST_FUNC void gen_opi(int op)
1144 {
1145 gen_opil(op, 0);
1146 }
1147
1148 ST_FUNC void gen_opl(int op)
1149 {
1150 gen_opil(op, 1);
1151 }
1152
1153 ST_FUNC void gen_opf(int op)
1154 {
1155 int rs1, rs2, rd, dbl, invert;
1156 if (vtop[0].type.t == VT_LDOUBLE) {
1157 CType type = vtop[0].type;
1158 int func = 0;
1159 int cond = -1;
1160 switch (op) {
1161 case '*': func = TOK___multf3; break;
1162 case '+': func = TOK___addtf3; break;
1163 case '-': func = TOK___subtf3; break;
1164 case '/': func = TOK___divtf3; break;
1165 case TOK_EQ: func = TOK___eqtf2; cond = 1; break;
1166 case TOK_NE: func = TOK___netf2; cond = 0; break;
1167 case TOK_LT: func = TOK___lttf2; cond = 10; break;
1168 case TOK_GE: func = TOK___getf2; cond = 11; break;
1169 case TOK_LE: func = TOK___letf2; cond = 12; break;
1170 case TOK_GT: func = TOK___gttf2; cond = 13; break;
1171 default: assert(0); break;
1172 }
1173 vpush_global_sym(&func_old_type, func);
1174 vrott(3);
1175 gfunc_call(2);
1176 vpushi(0);
1177 vtop->r = REG_IRET;
1178 vtop->r2 = cond < 0 ? TREG_R(1) : VT_CONST;
1179 if (cond < 0)
1180 vtop->type = type;
1181 else {
1182 vpushi(0);
1183 gen_opil(op, 1);
1184 }
1185 return;
1186 }
1187
1188 gv2(RC_FLOAT, RC_FLOAT);
1189 assert(vtop->type.t == VT_DOUBLE || vtop->type.t == VT_FLOAT);
1190 dbl = vtop->type.t == VT_DOUBLE;
1191 rs1 = freg(vtop[-1].r);
1192 rs2 = freg(vtop->r);
1193 vtop--;
1194 invert = 0;
1195 switch(op) {
1196 default:
1197 assert(0);
1198 case '+':
1199 op = 0; // fadd
1200 arithop:
1201 rd = get_reg(RC_FLOAT);
1202 vtop->r = rd;
1203 rd = freg(rd);
1204 ER(0x53, 7, rd, rs1, rs2, dbl | (op << 2)); // fop.[sd] RD, RS1, RS2 (dyn rm)
1205 break;
1206 case '-':
1207 op = 1; // fsub
1208 goto arithop;
1209 case '*':
1210 op = 2; // fmul
1211 goto arithop;
1212 case '/':
1213 op = 3; // fdiv
1214 goto arithop;
1215 case TOK_EQ:
1216 op = 2; // EQ
1217 cmpop:
1218 rd = get_reg(RC_INT);
1219 vtop->r = rd;
1220 rd = ireg(rd);
1221 ER(0x53, op, rd, rs1, rs2, dbl | 0x50); // fcmp.[sd] RD, RS1, RS2 (op == eq/lt/le)
1222 if (invert)
1223 EI(0x13, 4, rd, rd, 1); // xori RD, 1
1224 break;
1225 case TOK_NE:
1226 invert = 1;
1227 op = 2; // EQ
1228 goto cmpop;
1229 case TOK_LT:
1230 op = 1; // LT
1231 goto cmpop;
1232 case TOK_LE:
1233 op = 0; // LE
1234 goto cmpop;
1235 case TOK_GT:
1236 op = 1; // LT
1237 rd = rs1, rs1 = rs2, rs2 = rd;
1238 goto cmpop;
1239 case TOK_GE:
1240 op = 0; // LE
1241 rd = rs1, rs1 = rs2, rs2 = rd;
1242 goto cmpop;
1243 }
1244 }
1245
1246 ST_FUNC void gen_cvt_sxtw(void)
1247 {
1248 /* XXX on risc-v the registers are usually sign-extended already.
1249 Let's try to not do anything here. */
1250 }
1251
1252 ST_FUNC void gen_cvt_itof(int t)
1253 {
1254 int rr = ireg(gv(RC_INT)), dr;
1255 int u = vtop->type.t & VT_UNSIGNED;
1256 int l = (vtop->type.t & VT_BTYPE) == VT_LLONG;
1257 if (t == VT_LDOUBLE) {
1258 int func = l ?
1259 (u ? TOK___floatunditf : TOK___floatditf) :
1260 (u ? TOK___floatunsitf : TOK___floatsitf);
1261 vpush_global_sym(&func_old_type, func);
1262 vrott(2);
1263 gfunc_call(1);
1264 vpushi(0);
1265 vtop->type.t = t;
1266 vtop->r = REG_IRET;
1267 vtop->r2 = TREG_R(1);
1268 } else {
1269 vtop--;
1270 dr = get_reg(RC_FLOAT);
1271 vtop++;
1272 vtop->r = dr;
1273 dr = freg(dr);
1274 EIu(0x53, 7, dr, rr, ((0x68 | (t == VT_DOUBLE ? 1 : 0)) << 5) | (u ? 1 : 0) | (l ? 2 : 0)); // fcvt.[sd].[wl][u]
1275 }
1276 }
1277
1278 ST_FUNC void gen_cvt_ftoi(int t)
1279 {
1280 int ft = vtop->type.t & VT_BTYPE;
1281 int l = (t & VT_BTYPE) == VT_LLONG;
1282 int u = t & VT_UNSIGNED;
1283 if (ft == VT_LDOUBLE) {
1284 int func = l ?
1285 (u ? TOK___fixunstfdi : TOK___fixtfdi) :
1286 (u ? TOK___fixunstfsi : TOK___fixtfsi);
1287 vpush_global_sym(&func_old_type, func);
1288 vrott(2);
1289 gfunc_call(1);
1290 vpushi(0);
1291 vtop->type.t = t;
1292 vtop->r = REG_IRET;
1293 } else {
1294 int rr = freg(gv(RC_FLOAT)), dr;
1295 vtop--;
1296 dr = get_reg(RC_INT);
1297 vtop++;
1298 vtop->r = dr;
1299 dr = ireg(dr);
1300 EIu(0x53, 1, dr, rr, ((0x60 | (ft == VT_DOUBLE ? 1 : 0)) << 5) | (u ? 1 : 0) | (l ? 2 : 0)); // fcvt.[wl][u].[sd] rtz
1301 }
1302 }
1303
1304 ST_FUNC void gen_cvt_ftof(int dt)
1305 {
1306 int st = vtop->type.t & VT_BTYPE, rs, rd;
1307 dt &= VT_BTYPE;
1308 if (st == dt)
1309 return;
1310 if (dt == VT_LDOUBLE || st == VT_LDOUBLE) {
1311 int func = (dt == VT_LDOUBLE) ?
1312 (st == VT_FLOAT ? TOK___extendsftf2 : TOK___extenddftf2) :
1313 (dt == VT_FLOAT ? TOK___trunctfsf2 : TOK___trunctfdf2);
1314 /* We can't use gfunc_call, as func_old_type works like vararg
1315 functions, and on riscv unnamed float args are passed like
1316 integers. But we really need them in the float argument registers
1317 for extendsftf2/extenddftf2. So, do it explicitely. */
1318 save_regs(1);
1319 if (dt == VT_LDOUBLE)
1320 gv(RC_F(0));
1321 else {
1322 gv(RC_R(0));
1323 assert(vtop->r2 < 7);
1324 if (vtop->r2 != 1 + vtop->r) {
1325 EI(0x13, 0, ireg(vtop->r) + 1, ireg(vtop->r2), 0); // mv Ra+1, RR2
1326 vtop->r2 = 1 + vtop->r;
1327 }
1328 }
1329 vpush_global_sym(&func_old_type, func);
1330 gcall_or_jmp(1);
1331 vtop -= 2;
1332 vpushi(0);
1333 vtop->type.t = dt;
1334 if (dt == VT_LDOUBLE)
1335 vtop->r = REG_IRET, vtop->r2 = REG_IRET+1;
1336 else
1337 vtop->r = REG_FRET;
1338 } else {
1339 assert (dt == VT_FLOAT || dt == VT_DOUBLE);
1340 assert (st == VT_FLOAT || st == VT_DOUBLE);
1341 rs = gv(RC_FLOAT);
1342 rd = get_reg(RC_FLOAT);
1343 if (dt == VT_DOUBLE)
1344 EI(0x53, 0, freg(rd), freg(rs), 0x21 << 5); // fcvt.d.s RD, RS (no rm)
1345 else
1346 EI(0x53, 7, freg(rd), freg(rs), (0x20 << 5) | 1); // fcvt.s.d RD, RS (dyn rm)
1347 vtop->r = rd;
1348 }
1349 }
1350
1351 ST_FUNC void ggoto(void)
1352 {
1353 gcall_or_jmp(0);
1354 vtop--;
1355 }
1356
1357 ST_FUNC void gen_vla_sp_save(int addr)
1358 {
1359 ES(0x23, 3, 8, 2, addr); // sd sp, fc(s0)
1360 }
1361
1362 ST_FUNC void gen_vla_sp_restore(int addr)
1363 {
1364 EI(0x03, 3, 2, 8, addr); // ld sp, fc(s0)
1365 }
1366
1367 ST_FUNC void gen_vla_alloc(CType *type, int align)
1368 {
1369 int rr;
1370 #if defined(CONFIG_TCC_BCHECK)
1371 if (tcc_state->do_bounds_check)
1372 vpushv(vtop);
1373 #endif
1374 rr = ireg(gv(RC_INT));
1375 EI(0x13, 0, rr, rr, 15); // addi RR, RR, 15
1376 EI(0x13, 7, rr, rr, -16); // andi, RR, RR, -16
1377 ER(0x33, 0, 2, 2, rr, 0x20); // sub sp, sp, rr
1378 vpop();
1379 #if defined(CONFIG_TCC_BCHECK)
1380 if (tcc_state->do_bounds_check) {
1381 vpushi(0);
1382 vtop->r = TREG_R(0);
1383 o(0x00010513); /* mv a0,sp */
1384 vswap();
1385 vpush_global_sym(&func_old_type, TOK___bound_new_region);
1386 vrott(3);
1387 gfunc_call(2);
1388 func_bound_add_epilog = 1;
1389 }
1390 #endif
1391 }
1392 #endif
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