arm-gen.c

   1 /*
   2  *  ARMv4 code generator for TCC
   3  *
   4  *  Copyright (c) 2003 Daniel Glöckner
   5  *  Copyright (c) 2012 Thomas Preud'homme
   6  *
   7  *  Based on i386-gen.c by Fabrice Bellard
   8  *
   9  * This library is free software; you can redistribute it and/or
  10  * modify it under the terms of the GNU Lesser General Public
  11  * License as published by the Free Software Foundation; either
  12  * version 2 of the License, or (at your option) any later version.
  13  *
  14  * This library is distributed in the hope that it will be useful,
  15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  17  * Lesser General Public License for more details.
  18  *
  19  * You should have received a copy of the GNU Lesser General Public
  20  * License along with this library; if not, write to the Free Software
  21  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  22  */
  23
  24 #ifdef TARGET_DEFS_ONLY
  25
  26 #if defined(TCC_ARM_EABI) && !defined(TCC_ARM_VFP)
  27 #error "Currently TinyCC only supports float computation with VFP instructions"
  28 #endif
  29
  30 /* number of available registers */
  31 #ifdef TCC_ARM_VFP
  32 #define NB_REGS            13
  33 #else
  34 #define NB_REGS             9
  35 #endif
  36
  37 #ifndef TCC_CPU_VERSION
  38 # define TCC_CPU_VERSION 5
  39 #endif
  40
  41 /* a register can belong to several classes. The classes must be
  42    sorted from more general to more precise (see gv2() code which does
  43    assumptions on it). */
  44 #define RC_INT     0x0001 /* generic integer register */
  45 #define RC_FLOAT   0x0002 /* generic float register */
  46 #define RC_R0      0x0004
  47 #define RC_R1      0x0008
  48 #define RC_R2      0x0010
  49 #define RC_R3      0x0020
  50 #define RC_R12     0x0040
  51 #define RC_F0      0x0080
  52 #define RC_F1      0x0100
  53 #define RC_F2      0x0200
  54 #define RC_F3      0x0400
  55 #ifdef TCC_ARM_VFP
  56 #define RC_F4      0x0800
  57 #define RC_F5      0x1000
  58 #define RC_F6      0x2000
  59 #define RC_F7      0x4000
  60 #endif
  61 #define RC_IRET    RC_R0  /* function return: integer register */
  62 #define RC_IRE2    RC_R1  /* function return: second integer register */
  63 #define RC_FRET    RC_F0  /* function return: float register */
  64
  65 /* pretty names for the registers */
  66 enum {
  67     TREG_R0 = 0,
  68     TREG_R1,
  69     TREG_R2,
  70     TREG_R3,
  71     TREG_R12,
  72     TREG_F0,
  73     TREG_F1,
  74     TREG_F2,
  75     TREG_F3,
  76 #ifdef TCC_ARM_VFP
  77     TREG_F4,
  78     TREG_F5,
  79     TREG_F6,
  80     TREG_F7,
  81 #endif
  82     TREG_SP = 13,
  83     TREG_LR,
  84 };
  85
  86 #ifdef TCC_ARM_VFP
  87 #define T2CPR(t) (((t) & VT_BTYPE) != VT_FLOAT ? 0x100 : 0)
  88 #endif
  89
  90 /* return registers for function */
  91 #define REG_IRET TREG_R0 /* single word int return register */
  92 #define REG_IRE2 TREG_R1 /* second word return register (for long long) */
  93 #define REG_FRET TREG_F0 /* float return register */
  94
  95 #ifdef TCC_ARM_EABI
  96 #define TOK___divdi3 TOK___aeabi_ldivmod
  97 #define TOK___moddi3 TOK___aeabi_ldivmod
  98 #define TOK___udivdi3 TOK___aeabi_uldivmod
  99 #define TOK___umoddi3 TOK___aeabi_uldivmod
 100 #endif
 101
 102 /* defined if function parameters must be evaluated in reverse order */
 103 #define INVERT_FUNC_PARAMS
 104
 105 /* defined if structures are passed as pointers. Otherwise structures
 106    are directly pushed on stack. */
 107 /* #define FUNC_STRUCT_PARAM_AS_PTR */
 108
 109 /* pointer size, in bytes */
 110 #define PTR_SIZE 4
 111
 112 /* long double size and alignment, in bytes */
 113 #ifdef TCC_ARM_VFP
 114 #define LDOUBLE_SIZE  8
 115 #endif
 116
 117 #ifndef LDOUBLE_SIZE
 118 #define LDOUBLE_SIZE  8
 119 #endif
 120
 121 #ifdef TCC_ARM_EABI
 122 #define LDOUBLE_ALIGN 8
 123 #else
 124 #define LDOUBLE_ALIGN 4
 125 #endif
 126
 127 /* maximum alignment (for aligned attribute support) */
 128 #define MAX_ALIGN     8
 129
 130 #define CHAR_IS_UNSIGNED
 131
 132 /******************************************************/
 133 #else /* ! TARGET_DEFS_ONLY */
 134 /******************************************************/
 135 #define USING_GLOBALS
 136 #include "tcc.h"
 137
 138 enum float_abi float_abi;
 139
 140 ST_DATA const int reg_classes[NB_REGS] = {
 141     /* r0 */ RC_INT | RC_R0,
 142     /* r1 */ RC_INT | RC_R1,
 143     /* r2 */ RC_INT | RC_R2,
 144     /* r3 */ RC_INT | RC_R3,
 145     /* r12 */ RC_INT | RC_R12,
 146     /* f0 */ RC_FLOAT | RC_F0,
 147     /* f1 */ RC_FLOAT | RC_F1,
 148     /* f2 */ RC_FLOAT | RC_F2,
 149     /* f3 */ RC_FLOAT | RC_F3,
 150 #ifdef TCC_ARM_VFP
 151  /* d4/s8 */ RC_FLOAT | RC_F4,
 152 /* d5/s10 */ RC_FLOAT | RC_F5,
 153 /* d6/s12 */ RC_FLOAT | RC_F6,
 154 /* d7/s14 */ RC_FLOAT | RC_F7,
 155 #endif
 156 };
 157
 158 static int func_sub_sp_offset, last_itod_magic;
 159 static int leaffunc;
 160
 161 #if defined(TCC_ARM_EABI) && defined(TCC_ARM_VFP)
 162 static CType float_type, double_type, func_float_type, func_double_type;
 163 ST_FUNC void arm_init(struct TCCState *s)
 164 {
 165     float_type.t = VT_FLOAT;
 166     double_type.t = VT_DOUBLE;
 167     func_float_type.t = VT_FUNC;
 168     func_float_type.ref = sym_push(SYM_FIELD, &float_type, FUNC_CDECL, FUNC_OLD);
 169     func_double_type.t = VT_FUNC;
 170     func_double_type.ref = sym_push(SYM_FIELD, &double_type, FUNC_CDECL, FUNC_OLD);
 171
 172     float_abi = s->float_abi;
 173 #ifndef TCC_ARM_HARDFLOAT
 174 # warning "soft float ABI currently not supported: default to softfp"
 175 #endif
 176 }
 177 #else
 178 #define func_float_type func_old_type
 179 #define func_double_type func_old_type
 180 #define func_ldouble_type func_old_type
 181 ST_FUNC void arm_init(struct TCCState *s)
 182 {
 183 #if 0
 184 #if !defined (TCC_ARM_VFP)
 185     tcc_warning("Support for FPA is deprecated and will be removed in next"
 186                 " release");
 187 #endif
 188 #if !defined (TCC_ARM_EABI)
 189     tcc_warning("Support for OABI is deprecated and will be removed in next"
 190                 " release");
 191 #endif
 192 #endif
 193 }
 194 #endif
 195
 196 static int two2mask(int a,int b) {
 197   return (reg_classes[a]|reg_classes[b])&~(RC_INT|RC_FLOAT);
 198 }
 199
 200 static int regmask(int r) {
 201   return reg_classes[r]&~(RC_INT|RC_FLOAT);
 202 }
 203
 204 /******************************************************/
 205
 206 #if defined(TCC_ARM_EABI) && !defined(CONFIG_TCC_ELFINTERP)
 207 const char *default_elfinterp(struct TCCState *s)
 208 {
 209     if (s->float_abi == ARM_HARD_FLOAT)
 210         return "/lib/ld-linux-armhf.so.3";
 211     else
 212         return "/lib/ld-linux.so.3";
 213 }
 214 #endif
 215
 216 void o(uint32_t i)
 217 {
 218   /* this is a good place to start adding big-endian support*/
 219   int ind1;
 220   if (nocode_wanted)
 221     return;
 222   ind1 = ind + 4;
 223   if (!cur_text_section)
 224     tcc_error("compiler error! This happens f.ex. if the compiler\n"
 225          "can't evaluate constant expressions outside of a function.");
 226   if (ind1 > cur_text_section->data_allocated)
 227     section_realloc(cur_text_section, ind1);
 228   cur_text_section->data[ind++] = i&255;
 229   i>>=8;
 230   cur_text_section->data[ind++] = i&255;
 231   i>>=8;
 232   cur_text_section->data[ind++] = i&255;
 233   i>>=8;
 234   cur_text_section->data[ind++] = i;
 235 }
 236
 237 static uint32_t stuff_const(uint32_t op, uint32_t c)
 238 {
 239   int try_neg=0;
 240   uint32_t nc = 0, negop = 0;
 241
 242   switch(op&0x1F00000)
 243   {
 244     case 0x800000: //add
 245     case 0x400000: //sub
 246       try_neg=1;
 247       negop=op^0xC00000;
 248       nc=-c;
 249       break;
 250     case 0x1A00000: //mov
 251     case 0x1E00000: //mvn
 252       try_neg=1;
 253       negop=op^0x400000;
 254       nc=~c;
 255       break;
 256     case 0x200000: //xor
 257       if(c==~0)
 258         return (op&0xF010F000)|((op>>16)&0xF)|0x1E00000;
 259       break;
 260     case 0x0: //and
 261       if(c==~0)
 262         return (op&0xF010F000)|((op>>16)&0xF)|0x1A00000;
 263     case 0x1C00000: //bic
 264       try_neg=1;
 265       negop=op^0x1C00000;
 266       nc=~c;
 267       break;
 268     case 0x1800000: //orr
 269       if(c==~0)
 270         return (op&0xFFF0FFFF)|0x1E00000;
 271       break;
 272   }
 273   do {
 274     uint32_t m;
 275     int i;
 276     if(c<256) /* catch undefined <<32 */
 277       return op|c;
 278     for(i=2;i<32;i+=2) {
 279       m=(0xff>>i)|(0xff<<(32-i));
 280       if(!(c&~m))
 281         return op|(i<<7)|(c<<i)|(c>>(32-i));
 282     }
 283     op=negop;
 284     c=nc;
 285   } while(try_neg--);
 286   return 0;
 287 }
 288
 289
 290 //only add,sub
 291 void stuff_const_harder(uint32_t op, uint32_t v) {
 292   uint32_t x;
 293   x=stuff_const(op,v);
 294   if(x)
 295     o(x);
 296   else {
 297     uint32_t a[16], nv, no, o2, n2;
 298     int i,j,k;
 299     a[0]=0xff;
 300     o2=(op&0xfff0ffff)|((op&0xf000)<<4);;
 301     for(i=1;i<16;i++)
 302       a[i]=(a[i-1]>>2)|(a[i-1]<<30);
 303     for(i=0;i<12;i++)
 304       for(j=i<4?i+12:15;j>=i+4;j--)
 305         if((v&(a[i]|a[j]))==v) {
 306           o(stuff_const(op,v&a[i]));
 307           o(stuff_const(o2,v&a[j]));
 308           return;
 309         }
 310     no=op^0xC00000;
 311     n2=o2^0xC00000;
 312     nv=-v;
 313     for(i=0;i<12;i++)
 314       for(j=i<4?i+12:15;j>=i+4;j--)
 315         if((nv&(a[i]|a[j]))==nv) {
 316           o(stuff_const(no,nv&a[i]));
 317           o(stuff_const(n2,nv&a[j]));
 318           return;
 319         }
 320     for(i=0;i<8;i++)
 321       for(j=i+4;j<12;j++)
 322         for(k=i<4?i+12:15;k>=j+4;k--)
 323           if((v&(a[i]|a[j]|a[k]))==v) {
 324             o(stuff_const(op,v&a[i]));
 325             o(stuff_const(o2,v&a[j]));
 326             o(stuff_const(o2,v&a[k]));
 327             return;
 328           }
 329     no=op^0xC00000;
 330     nv=-v;
 331     for(i=0;i<8;i++)
 332       for(j=i+4;j<12;j++)
 333         for(k=i<4?i+12:15;k>=j+4;k--)
 334           if((nv&(a[i]|a[j]|a[k]))==nv) {
 335             o(stuff_const(no,nv&a[i]));
 336             o(stuff_const(n2,nv&a[j]));
 337             o(stuff_const(n2,nv&a[k]));
 338             return;
 339           }
 340     o(stuff_const(op,v&a[0]));
 341     o(stuff_const(o2,v&a[4]));
 342     o(stuff_const(o2,v&a[8]));
 343     o(stuff_const(o2,v&a[12]));
 344   }
 345 }
 346
 347 uint32_t encbranch(int pos, int addr, int fail)
 348 {
 349   addr-=pos+8;
 350   addr/=4;
 351   if(addr>=0x1000000 || addr<-0x1000000) {
 352     if(fail)
 353       tcc_error("FIXME: function bigger than 32MB");
 354     return 0;
 355   }
 356   return 0x0A000000|(addr&0xffffff);
 357 }
 358
 359 int decbranch(int pos)
 360 {
 361   int x;
 362   x=*(uint32_t *)(cur_text_section->data + pos);
 363   x&=0x00ffffff;
 364   if(x&0x800000)
 365     x-=0x1000000;
 366   return x*4+pos+8;
 367 }
 368
 369 /* output a symbol and patch all calls to it */
 370 void gsym_addr(int t, int a)
 371 {
 372   uint32_t *x;
 373   int lt;
 374   while(t) {
 375     x=(uint32_t *)(cur_text_section->data + t);
 376     t=decbranch(lt=t);
 377     if(a==lt+4)
 378       *x=0xE1A00000; // nop
 379     else {
 380       *x &= 0xff000000;
 381       *x |= encbranch(lt,a,1);
 382     }
 383   }
 384 }
 385
 386 #ifdef TCC_ARM_VFP
 387 static uint32_t vfpr(int r)
 388 {
 389   if(r<TREG_F0 || r>TREG_F7)
 390     tcc_error("compiler error! register %i is no vfp register",r);
 391   return r - TREG_F0;
 392 }
 393 #else
 394 static uint32_t fpr(int r)
 395 {
 396   if(r<TREG_F0 || r>TREG_F3)
 397     tcc_error("compiler error! register %i is no fpa register",r);
 398   return r - TREG_F0;
 399 }
 400 #endif
 401
 402 static uint32_t intr(int r)
 403 {
 404   if(r == TREG_R12)
 405     return 12;
 406   if(r >= TREG_R0 && r <= TREG_R3)
 407     return r - TREG_R0;
 408   if (!(r >= TREG_SP && r <= TREG_LR))
 409     tcc_error("compiler error! register %i is no int register",r);
 410   return r + (13 - TREG_SP);
 411 }
 412
 413 static void calcaddr(uint32_t *base, int *off, int *sgn, int maxoff, unsigned shift)
 414 {
 415   if(*off>maxoff || *off&((1<<shift)-1)) {
 416     uint32_t x, y;
 417     x=0xE280E000;
 418     if(*sgn)
 419       x=0xE240E000;
 420     x|=(*base)<<16;
 421     *base=14; // lr
 422     y=stuff_const(x,*off&~maxoff);
 423     if(y) {
 424       o(y);
 425       *off&=maxoff;
 426       return;
 427     }
 428     y=stuff_const(x,(*off+maxoff)&~maxoff);
 429     if(y) {
 430       o(y);
 431       *sgn=!*sgn;
 432       *off=((*off+maxoff)&~maxoff)-*off;
 433       return;
 434     }
 435     stuff_const_harder(x,*off&~maxoff);
 436     *off&=maxoff;
 437   }
 438 }
 439
 440 static uint32_t mapcc(int cc)
 441 {
 442   switch(cc)
 443   {
 444     case TOK_ULT:
 445       return 0x30000000; /* CC/LO */
 446     case TOK_UGE:
 447       return 0x20000000; /* CS/HS */
 448     case TOK_EQ:
 449       return 0x00000000; /* EQ */
 450     case TOK_NE:
 451       return 0x10000000; /* NE */
 452     case TOK_ULE:
 453       return 0x90000000; /* LS */
 454     case TOK_UGT:
 455       return 0x80000000; /* HI */
 456     case TOK_Nset:
 457       return 0x40000000; /* MI */
 458     case TOK_Nclear:
 459       return 0x50000000; /* PL */
 460     case TOK_LT:
 461       return 0xB0000000; /* LT */
 462     case TOK_GE:
 463       return 0xA0000000; /* GE */
 464     case TOK_LE:
 465       return 0xD0000000; /* LE */
 466     case TOK_GT:
 467       return 0xC0000000; /* GT */
 468   }
 469   tcc_error("unexpected condition code");
 470   return 0xE0000000; /* AL */
 471 }
 472
 473 static int negcc(int cc)
 474 {
 475   switch(cc)
 476   {
 477     case TOK_ULT:
 478       return TOK_UGE;
 479     case TOK_UGE:
 480       return TOK_ULT;
 481     case TOK_EQ:
 482       return TOK_NE;
 483     case TOK_NE:
 484       return TOK_EQ;
 485     case TOK_ULE:
 486       return TOK_UGT;
 487     case TOK_UGT:
 488       return TOK_ULE;
 489     case TOK_Nset:
 490       return TOK_Nclear;
 491     case TOK_Nclear:
 492       return TOK_Nset;
 493     case TOK_LT:
 494       return TOK_GE;
 495     case TOK_GE:
 496       return TOK_LT;
 497     case TOK_LE:
 498       return TOK_GT;
 499     case TOK_GT:
 500       return TOK_LE;
 501   }
 502   tcc_error("unexpected condition code");
 503   return TOK_NE;
 504 }
 505
 506 /* load 'r' from value 'sv' */
 507 void load(int r, SValue *sv)
 508 {
 509   int v, ft, fc, fr, sign;
 510   uint32_t op;
 511   SValue v1;
 512
 513   fr = sv->r;
 514   ft = sv->type.t;
 515   fc = sv->c.i;
 516
 517   if(fc>=0)
 518     sign=0;
 519   else {
 520     sign=1;
 521     fc=-fc;
 522   }
 523
 524   v = fr & VT_VALMASK;
 525   if (fr & VT_LVAL) {
 526     uint32_t base = 0xB; // fp
 527     if(v == VT_LLOCAL) {
 528       v1.type.t = VT_PTR;
 529       v1.r = VT_LOCAL | VT_LVAL;
 530       v1.c.i = sv->c.i;
 531       load(TREG_LR, &v1);
 532       base = 14; /* lr */
 533       fc=sign=0;
 534       v=VT_LOCAL;
 535     } else if(v == VT_CONST) {
 536       v1.type.t = VT_PTR;
 537       v1.r = fr&~VT_LVAL;
 538       v1.c.i = sv->c.i;
 539       v1.sym=sv->sym;
 540       load(TREG_LR, &v1);
 541       base = 14; /* lr */
 542       fc=sign=0;
 543       v=VT_LOCAL;
 544     } else if(v < VT_CONST) {
 545       base=intr(v);
 546       fc=sign=0;
 547       v=VT_LOCAL;
 548     }
 549     if(v == VT_LOCAL) {
 550       if(is_float(ft)) {
 551         calcaddr(&base,&fc,&sign,1020,2);
 552 #ifdef TCC_ARM_VFP
 553         op=0xED100A00; /* flds */
 554         if(!sign)
 555           op|=0x800000;
 556         if ((ft & VT_BTYPE) != VT_FLOAT)
 557           op|=0x100;   /* flds -> fldd */
 558         o(op|(vfpr(r)<<12)|(fc>>2)|(base<<16));
 559 #else
 560         op=0xED100100;
 561         if(!sign)
 562           op|=0x800000;
 563 #if LDOUBLE_SIZE == 8
 564         if ((ft & VT_BTYPE) != VT_FLOAT)
 565           op|=0x8000;
 566 #else
 567         if ((ft & VT_BTYPE) == VT_DOUBLE)
 568           op|=0x8000;
 569         else if ((ft & VT_BTYPE) == VT_LDOUBLE)
 570           op|=0x400000;
 571 #endif
 572         o(op|(fpr(r)<<12)|(fc>>2)|(base<<16));
 573 #endif
 574       } else if((ft & (VT_BTYPE|VT_UNSIGNED)) == VT_BYTE
 575                 || (ft & VT_BTYPE) == VT_SHORT) {
 576         calcaddr(&base,&fc,&sign,255,0);
 577         op=0xE1500090;
 578         if ((ft & VT_BTYPE) == VT_SHORT)
 579           op|=0x20;
 580         if ((ft & VT_UNSIGNED) == 0)
 581           op|=0x40;
 582         if(!sign)
 583           op|=0x800000;
 584         o(op|(intr(r)<<12)|(base<<16)|((fc&0xf0)<<4)|(fc&0xf));
 585       } else {
 586         calcaddr(&base,&fc,&sign,4095,0);
 587         op=0xE5100000;
 588         if(!sign)
 589           op|=0x800000;
 590         if ((ft & VT_BTYPE) == VT_BYTE || (ft & VT_BTYPE) == VT_BOOL)
 591           op|=0x400000;
 592         o(op|(intr(r)<<12)|fc|(base<<16));
 593       }
 594       return;
 595     }
 596   } else {
 597     if (v == VT_CONST) {
 598       op=stuff_const(0xE3A00000|(intr(r)<<12),sv->c.i);
 599       if (fr & VT_SYM || !op) {
 600         o(0xE59F0000|(intr(r)<<12));
 601         o(0xEA000000);
 602         if(fr & VT_SYM)
 603           greloc(cur_text_section, sv->sym, ind, R_ARM_ABS32);
 604         o(sv->c.i);
 605       } else
 606         o(op);
 607       return;
 608     } else if (v == VT_LOCAL) {
 609       op=stuff_const(0xE28B0000|(intr(r)<<12),sv->c.i);
 610       if (fr & VT_SYM || !op) {
 611         o(0xE59F0000|(intr(r)<<12));
 612         o(0xEA000000);
 613         if(fr & VT_SYM) // needed ?
 614           greloc(cur_text_section, sv->sym, ind, R_ARM_ABS32);
 615         o(sv->c.i);
 616         o(0xE08B0000|(intr(r)<<12)|intr(r));
 617       } else
 618         o(op);
 619       return;
 620     } else if(v == VT_CMP) {
 621       o(mapcc(sv->c.i)|0x3A00001|(intr(r)<<12));
 622       o(mapcc(negcc(sv->c.i))|0x3A00000|(intr(r)<<12));
 623       return;
 624     } else if (v == VT_JMP || v == VT_JMPI) {
 625       int t;
 626       t = v & 1;
 627       o(0xE3A00000|(intr(r)<<12)|t);
 628       o(0xEA000000);
 629       gsym(sv->c.i);
 630       o(0xE3A00000|(intr(r)<<12)|(t^1));
 631       return;
 632     } else if (v < VT_CONST) {
 633       if(is_float(ft))
 634 #ifdef TCC_ARM_VFP
 635         o(0xEEB00A40|(vfpr(r)<<12)|vfpr(v)|T2CPR(ft)); /* fcpyX */
 636 #else
 637         o(0xEE008180|(fpr(r)<<12)|fpr(v));
 638 #endif
 639       else
 640         o(0xE1A00000|(intr(r)<<12)|intr(v));
 641       return;
 642     }
 643   }
 644   tcc_error("load unimplemented!");
 645 }
 646
 647 /* store register 'r' in lvalue 'v' */
 648 void store(int r, SValue *sv)
 649 {
 650   SValue v1;
 651   int v, ft, fc, fr, sign;
 652   uint32_t op;
 653
 654   fr = sv->r;
 655   ft = sv->type.t;
 656   fc = sv->c.i;
 657
 658   if(fc>=0)
 659     sign=0;
 660   else {
 661     sign=1;
 662     fc=-fc;
 663   }
 664
 665   v = fr & VT_VALMASK;
 666   if (fr & VT_LVAL || fr == VT_LOCAL) {
 667     uint32_t base = 0xb; /* fp */
 668     if(v < VT_CONST) {
 669       base=intr(v);
 670       v=VT_LOCAL;
 671       fc=sign=0;
 672     } else if(v == VT_CONST) {
 673       v1.type.t = ft;
 674       v1.r = fr&~VT_LVAL;
 675       v1.c.i = sv->c.i;
 676       v1.sym=sv->sym;
 677       load(TREG_LR, &v1);
 678       base = 14; /* lr */
 679       fc=sign=0;
 680       v=VT_LOCAL;
 681     }
 682     if(v == VT_LOCAL) {
 683        if(is_float(ft)) {
 684         calcaddr(&base,&fc,&sign,1020,2);
 685 #ifdef TCC_ARM_VFP
 686         op=0xED000A00; /* fsts */
 687         if(!sign)
 688           op|=0x800000;
 689         if ((ft & VT_BTYPE) != VT_FLOAT)
 690           op|=0x100;   /* fsts -> fstd */
 691         o(op|(vfpr(r)<<12)|(fc>>2)|(base<<16));
 692 #else
 693         op=0xED000100;
 694         if(!sign)
 695           op|=0x800000;
 696 #if LDOUBLE_SIZE == 8
 697         if ((ft & VT_BTYPE) != VT_FLOAT)
 698           op|=0x8000;
 699 #else
 700         if ((ft & VT_BTYPE) == VT_DOUBLE)
 701           op|=0x8000;
 702         if ((ft & VT_BTYPE) == VT_LDOUBLE)
 703           op|=0x400000;
 704 #endif
 705         o(op|(fpr(r)<<12)|(fc>>2)|(base<<16));
 706 #endif
 707         return;
 708       } else if((ft & VT_BTYPE) == VT_SHORT) {
 709         calcaddr(&base,&fc,&sign,255,0);
 710         op=0xE14000B0;
 711         if(!sign)
 712           op|=0x800000;
 713         o(op|(intr(r)<<12)|(base<<16)|((fc&0xf0)<<4)|(fc&0xf));
 714       } else {
 715         calcaddr(&base,&fc,&sign,4095,0);
 716         op=0xE5000000;
 717         if(!sign)
 718           op|=0x800000;
 719         if ((ft & VT_BTYPE) == VT_BYTE || (ft & VT_BTYPE) == VT_BOOL)
 720           op|=0x400000;
 721         o(op|(intr(r)<<12)|fc|(base<<16));
 722       }
 723       return;
 724     }
 725   }
 726   tcc_error("store unimplemented");
 727 }
 728
 729 static void gadd_sp(int val)
 730 {
 731   stuff_const_harder(0xE28DD000,val);
 732 }
 733
 734 /* 'is_jmp' is '1' if it is a jump */
 735 static void gcall_or_jmp(int is_jmp)
 736 {
 737   int r;
 738   uint32_t x;
 739   if ((vtop->r & (VT_VALMASK | VT_LVAL)) == VT_CONST) {
 740     /* constant case */
 741         if(vtop->r & VT_SYM){
 742                 x=encbranch(ind,ind+vtop->c.i,0);
 743                 if(x) {
 744                 /* relocation case */
 745                   greloc(cur_text_section, vtop->sym, ind, R_ARM_PC24);
 746                   o(x|(is_jmp?0xE0000000:0xE1000000));
 747                 } else {
 748                         if(!is_jmp)
 749                                 o(0xE28FE004); // add lr,pc,#4
 750                         o(0xE51FF004);   // ldr pc,[pc,#-4]
 751                         greloc(cur_text_section, vtop->sym, ind, R_ARM_ABS32);
 752                         o(vtop->c.i);
 753                 }
 754         }else{
 755                 if(!is_jmp)
 756                         o(0xE28FE004); // add lr,pc,#4
 757                 o(0xE51FF004);   // ldr pc,[pc,#-4]
 758                 o(vtop->c.i);
 759         }
 760   } else {
 761     /* otherwise, indirect call */
 762     r = gv(RC_INT);
 763     if(!is_jmp)
 764       o(0xE1A0E00F);       // mov lr,pc
 765     o(0xE1A0F000|intr(r)); // mov pc,r
 766   }
 767 }
 768
 769 static int unalias_ldbl(int btype)
 770 {
 771 #if LDOUBLE_SIZE == 8
 772     if (btype == VT_LDOUBLE)
 773       btype = VT_DOUBLE;
 774 #endif
 775     return btype;
 776 }
 777
 778 /* Return whether a structure is an homogeneous float aggregate or not.
 779    The answer is true if all the elements of the structure are of the same
 780    primitive float type and there is less than 4 elements.
 781
 782    type: the type corresponding to the structure to be tested */
 783 static int is_hgen_float_aggr(CType *type)
 784 {
 785   if ((type->t & VT_BTYPE) == VT_STRUCT) {
 786     struct Sym *ref;
 787     int btype, nb_fields = 0;
 788
 789     ref = type->ref->next;
 790     btype = unalias_ldbl(ref->type.t & VT_BTYPE);
 791     if (btype == VT_FLOAT || btype == VT_DOUBLE) {
 792       for(; ref && btype == unalias_ldbl(ref->type.t & VT_BTYPE); ref = ref->next, nb_fields++);
 793       return !ref && nb_fields <= 4;
 794     }
 795   }
 796   return 0;
 797 }
 798
 799 struct avail_regs {
 800   signed char avail[3]; /* 3 holes max with only float and double alignments */
 801   int first_hole; /* first available hole */
 802   int last_hole; /* last available hole (none if equal to first_hole) */
 803   int first_free_reg; /* next free register in the sequence, hole excluded */
 804 };
 805
 806 #define AVAIL_REGS_INITIALIZER (struct avail_regs) { { 0, 0, 0}, 0, 0, 0 }
 807
 808 /* Find suitable registers for a VFP Co-Processor Register Candidate (VFP CPRC
 809    param) according to the rules described in the procedure call standard for
 810    the ARM architecture (AAPCS). If found, the registers are assigned to this
 811    VFP CPRC parameter. Registers are allocated in sequence unless a hole exists
 812    and the parameter is a single float.
 813
 814    avregs: opaque structure to keep track of available VFP co-processor regs
 815    align: alignment constraints for the param, as returned by type_size()
 816    size: size of the parameter, as returned by type_size() */
 817 int assign_vfpreg(struct avail_regs *avregs, int align, int size)
 818 {
 819   int first_reg = 0;
 820
 821   if (avregs->first_free_reg == -1)
 822     return -1;
 823   if (align >> 3) { /* double alignment */
 824     first_reg = avregs->first_free_reg;
 825     /* alignment constraint not respected so use next reg and record hole */
 826     if (first_reg & 1)
 827       avregs->avail[avregs->last_hole++] = first_reg++;
 828   } else { /* no special alignment (float or array of float) */
 829     /* if single float and a hole is available, assign the param to it */
 830     if (size == 4 && avregs->first_hole != avregs->last_hole)
 831       return avregs->avail[avregs->first_hole++];
 832     else
 833       first_reg = avregs->first_free_reg;
 834   }
 835   if (first_reg + size / 4 <= 16) {
 836     avregs->first_free_reg = first_reg + size / 4;
 837     return first_reg;
 838   }
 839   avregs->first_free_reg = -1;
 840   return -1;
 841 }
 842
 843 /* Returns whether all params need to be passed in core registers or not.
 844    This is the case for function part of the runtime ABI. */
 845 int floats_in_core_regs(SValue *sval)
 846 {
 847   if (!sval->sym)
 848     return 0;
 849
 850   switch (sval->sym->v) {
 851     case TOK___floatundisf:
 852     case TOK___floatundidf:
 853     case TOK___fixunssfdi:
 854     case TOK___fixunsdfdi:
 855 #ifndef TCC_ARM_VFP
 856     case TOK___fixunsxfdi:
 857 #endif
 858     case TOK___floatdisf:
 859     case TOK___floatdidf:
 860     case TOK___fixsfdi:
 861     case TOK___fixdfdi:
 862       return 1;
 863
 864     default:
 865       return 0;
 866   }
 867 }
 868
 869 /* Return the number of registers needed to return the struct, or 0 if
 870    returning via struct pointer. */
 871 ST_FUNC int gfunc_sret(CType *vt, int variadic, CType *ret, int *ret_align, int *regsize) {
 872 #ifdef TCC_ARM_EABI
 873     int size, align;
 874     size = type_size(vt, &align);
 875     if (float_abi == ARM_HARD_FLOAT && !variadic &&
 876         (is_float(vt->t) || is_hgen_float_aggr(vt))) {
 877         *ret_align = 8;
 878         *regsize = 8;
 879         ret->ref = NULL;
 880         ret->t = VT_DOUBLE;
 881         return (size + 7) >> 3;
 882     } else if (size <= 4) {
 883         *ret_align = 4;
 884         *regsize = 4;
 885         ret->ref = NULL;
 886         ret->t = VT_INT;
 887         return 1;
 888     } else
 889         return 0;
 890 #else
 891     return 0;
 892 #endif
 893 }
 894
 895 /* Parameters are classified according to how they are copied to their final
 896    destination for the function call. Because the copying is performed class
 897    after class according to the order in the union below, it is important that
 898    some constraints about the order of the members of this union are respected:
 899    - CORE_STRUCT_CLASS must come after STACK_CLASS;
 900    - CORE_CLASS must come after STACK_CLASS, CORE_STRUCT_CLASS and
 901      VFP_STRUCT_CLASS;
 902    - VFP_STRUCT_CLASS must come after VFP_CLASS.
 903    See the comment for the main loop in copy_params() for the reason. */
 904 enum reg_class {
 905         STACK_CLASS = 0,
 906         CORE_STRUCT_CLASS,
 907         VFP_CLASS,
 908         VFP_STRUCT_CLASS,
 909         CORE_CLASS,
 910         NB_CLASSES
 911 };
 912
 913 struct param_plan {
 914     int start; /* first reg or addr used depending on the class */
 915     int end; /* last reg used or next free addr depending on the class */
 916     SValue *sval; /* pointer to SValue on the value stack */
 917     struct param_plan *prev; /*  previous element in this class */
 918 };
 919
 920 struct plan {
 921     struct param_plan *pplans; /* array of all the param plans */
 922     struct param_plan *clsplans[NB_CLASSES]; /* per class lists of param plans */
 923 };
 924
 925 #define add_param_plan(plan,pplan,class)                        \
 926     do {                                                        \
 927         pplan.prev = plan->clsplans[class];                     \
 928         plan->pplans[plan ## _nb] = pplan;                      \
 929         plan->clsplans[class] = &plan->pplans[plan ## _nb++];   \
 930     } while(0)
 931
 932 /* Assign parameters to registers and stack with alignment according to the
 933    rules in the procedure call standard for the ARM architecture (AAPCS).
 934    The overall assignment is recorded in an array of per parameter structures
 935    called parameter plans. The parameter plans are also further organized in a
 936    number of linked lists, one per class of parameter (see the comment for the
 937    definition of union reg_class).
 938
 939    nb_args: number of parameters of the function for which a call is generated
 940    float_abi: float ABI in use for this function call
 941    plan: the structure where the overall assignment is recorded
 942    todo: a bitmap that record which core registers hold a parameter
 943
 944    Returns the amount of stack space needed for parameter passing
 945
 946    Note: this function allocated an array in plan->pplans with tcc_malloc. It
 947    is the responsibility of the caller to free this array once used (ie not
 948    before copy_params). */
 949 static int assign_regs(int nb_args, int float_abi, struct plan *plan, int *todo)
 950 {
 951   int i, size, align;
 952   int ncrn /* next core register number */, nsaa /* next stacked argument address*/;
 953   int plan_nb = 0;
 954   struct param_plan pplan;
 955   struct avail_regs avregs = AVAIL_REGS_INITIALIZER;
 956
 957   ncrn = nsaa = 0;
 958   *todo = 0;
 959   plan->pplans = tcc_malloc(nb_args * sizeof(*plan->pplans));
 960   memset(plan->clsplans, 0, sizeof(plan->clsplans));
 961   for(i = nb_args; i-- ;) {
 962     int j, start_vfpreg = 0;
 963     CType type = vtop[-i].type;
 964     type.t &= ~VT_ARRAY;
 965     size = type_size(&type, &align);
 966     size = (size + 3) & ~3;
 967     align = (align + 3) & ~3;
 968     switch(vtop[-i].type.t & VT_BTYPE) {
 969       case VT_STRUCT:
 970       case VT_FLOAT:
 971       case VT_DOUBLE:
 972       case VT_LDOUBLE:
 973       if (float_abi == ARM_HARD_FLOAT) {
 974         int is_hfa = 0; /* Homogeneous float aggregate */
 975
 976         if (is_float(vtop[-i].type.t)
 977             || (is_hfa = is_hgen_float_aggr(&vtop[-i].type))) {
 978           int end_vfpreg;
 979
 980           start_vfpreg = assign_vfpreg(&avregs, align, size);
 981           end_vfpreg = start_vfpreg + ((size - 1) >> 2);
 982           if (start_vfpreg >= 0) {
 983             pplan = (struct param_plan) {start_vfpreg, end_vfpreg, &vtop[-i]};
 984             if (is_hfa)
 985               add_param_plan(plan, pplan, VFP_STRUCT_CLASS);
 986             else
 987               add_param_plan(plan, pplan, VFP_CLASS);
 988             continue;
 989           } else
 990             break;
 991         }
 992       }
 993       ncrn = (ncrn + (align-1)/4) & ~((align/4) - 1);
 994       if (ncrn + size/4 <= 4 || (ncrn < 4 && start_vfpreg != -1)) {
 995         /* The parameter is allocated both in core register and on stack. As
 996          * such, it can be of either class: it would either be the last of
 997          * CORE_STRUCT_CLASS or the first of STACK_CLASS. */
 998         for (j = ncrn; j < 4 && j < ncrn + size / 4; j++)
 999           *todo|=(1<<j);
1000         pplan = (struct param_plan) {ncrn, j, &vtop[-i]};
1001         add_param_plan(plan, pplan, CORE_STRUCT_CLASS);
1002         ncrn += size/4;
1003         if (ncrn > 4)
1004           nsaa = (ncrn - 4) * 4;
1005       } else {
1006         ncrn = 4;
1007         break;
1008       }
1009       continue;
1010       default:
1011       if (ncrn < 4) {
1012         int is_long = (vtop[-i].type.t & VT_BTYPE) == VT_LLONG;
1013
1014         if (is_long) {
1015           ncrn = (ncrn + 1) & -2;
1016           if (ncrn == 4)
1017             break;
1018         }
1019         pplan = (struct param_plan) {ncrn, ncrn, &vtop[-i]};
1020         ncrn++;
1021         if (is_long)
1022           pplan.end = ncrn++;
1023         add_param_plan(plan, pplan, CORE_CLASS);
1024         continue;
1025       }
1026     }
1027     nsaa = (nsaa + (align - 1)) & ~(align - 1);
1028     pplan = (struct param_plan) {nsaa, nsaa + size, &vtop[-i]};
1029     add_param_plan(plan, pplan, STACK_CLASS);
1030     nsaa += size; /* size already rounded up before */
1031   }
1032   return nsaa;
1033 }
1034
1035 #undef add_param_plan
1036
1037 /* Copy parameters to their final destination (core reg, VFP reg or stack) for
1038    function call.
1039
1040    nb_args: number of parameters the function take
1041    plan: the overall assignment plan for parameters
1042    todo: a bitmap indicating what core reg will hold a parameter
1043
1044    Returns the number of SValue added by this function on the value stack */
1045 static int copy_params(int nb_args, struct plan *plan, int todo)
1046 {
1047   int size, align, r, i, nb_extra_sval = 0;
1048   struct param_plan *pplan;
1049   int pass = 0;
1050
1051    /* Several constraints require parameters to be copied in a specific order:
1052       - structures are copied to the stack before being loaded in a reg;
1053       - floats loaded to an odd numbered VFP reg are first copied to the
1054         preceding even numbered VFP reg and then moved to the next VFP reg.
1055
1056       It is thus important that:
1057       - structures assigned to core regs must be copied after parameters
1058         assigned to the stack but before structures assigned to VFP regs because
1059         a structure can lie partly in core registers and partly on the stack;
1060       - parameters assigned to the stack and all structures be copied before
1061         parameters assigned to a core reg since copying a parameter to the stack
1062         require using a core reg;
1063       - parameters assigned to VFP regs be copied before structures assigned to
1064         VFP regs as the copy might use an even numbered VFP reg that already
1065         holds part of a structure. */
1066 again:
1067   for(i = 0; i < NB_CLASSES; i++) {
1068     for(pplan = plan->clsplans[i]; pplan; pplan = pplan->prev) {
1069
1070       if (pass
1071           && (i != CORE_CLASS || pplan->sval->r < VT_CONST))
1072         continue;
1073
1074       vpushv(pplan->sval);
1075       pplan->sval->r = pplan->sval->r2 = VT_CONST; /* disable entry */
1076       switch(i) {
1077         case STACK_CLASS:
1078         case CORE_STRUCT_CLASS:
1079         case VFP_STRUCT_CLASS:
1080           if ((pplan->sval->type.t & VT_BTYPE) == VT_STRUCT) {
1081             int padding = 0;
1082             size = type_size(&pplan->sval->type, &align);
1083             /* align to stack align size */
1084             size = (size + 3) & ~3;
1085             if (i == STACK_CLASS && pplan->prev)
1086               padding = pplan->start - pplan->prev->end;
1087             size += padding; /* Add padding if any */
1088             /* allocate the necessary size on stack */
1089             gadd_sp(-size);
1090             /* generate structure store */
1091             r = get_reg(RC_INT);
1092             o(0xE28D0000|(intr(r)<<12)|padding); /* add r, sp, padding */
1093             vset(&vtop->type, r | VT_LVAL, 0);
1094             vswap();
1095             vstore(); /* memcpy to current sp + potential padding */
1096
1097             /* Homogeneous float aggregate are loaded to VFP registers
1098                immediately since there is no way of loading data in multiple
1099                non consecutive VFP registers as what is done for other
1100                structures (see the use of todo). */
1101             if (i == VFP_STRUCT_CLASS) {
1102               int first = pplan->start, nb = pplan->end - first + 1;
1103               /* vpop.32 {pplan->start, ..., pplan->end} */
1104               o(0xECBD0A00|(first&1)<<22|(first>>1)<<12|nb);
1105               /* No need to write the register used to a SValue since VFP regs
1106                  cannot be used for gcall_or_jmp */
1107             }
1108           } else {
1109             if (is_float(pplan->sval->type.t)) {
1110 #ifdef TCC_ARM_VFP
1111               r = vfpr(gv(RC_FLOAT)) << 12;
1112               if ((pplan->sval->type.t & VT_BTYPE) == VT_FLOAT)
1113                 size = 4;
1114               else {
1115                 size = 8;
1116                 r |= 0x101; /* vpush.32 -> vpush.64 */
1117               }
1118               o(0xED2D0A01 + r); /* vpush */
1119 #else
1120               r = fpr(gv(RC_FLOAT)) << 12;
1121               if ((pplan->sval->type.t & VT_BTYPE) == VT_FLOAT)
1122                 size = 4;
1123               else if ((pplan->sval->type.t & VT_BTYPE) == VT_DOUBLE)
1124                 size = 8;
1125               else
1126                 size = LDOUBLE_SIZE;
1127
1128               if (size == 12)
1129                 r |= 0x400000;
1130               else if(size == 8)
1131                 r|=0x8000;
1132
1133               o(0xED2D0100|r|(size>>2)); /* some kind of vpush for FPA */
1134 #endif
1135             } else {
1136               /* simple type (currently always same size) */
1137               /* XXX: implicit cast ? */
1138               size=4;
1139               if ((pplan->sval->type.t & VT_BTYPE) == VT_LLONG) {
1140                 lexpand();
1141                 size = 8;
1142                 r = gv(RC_INT);
1143                 o(0xE52D0004|(intr(r)<<12)); /* push r */
1144                 vtop--;
1145               }
1146               r = gv(RC_INT);
1147               o(0xE52D0004|(intr(r)<<12)); /* push r */
1148             }
1149             if (i == STACK_CLASS && pplan->prev)
1150               gadd_sp(pplan->prev->end - pplan->start); /* Add padding if any */
1151           }
1152           break;
1153
1154         case VFP_CLASS:
1155           gv(regmask(TREG_F0 + (pplan->start >> 1)));
1156           if (pplan->start & 1) { /* Must be in upper part of double register */
1157             o(0xEEF00A40|((pplan->start>>1)<<12)|(pplan->start>>1)); /* vmov.f32 s(n+1), sn */
1158             vtop->r = VT_CONST; /* avoid being saved on stack by gv for next float */
1159           }
1160           break;
1161
1162         case CORE_CLASS:
1163           if ((pplan->sval->type.t & VT_BTYPE) == VT_LLONG) {
1164             lexpand();
1165             gv(regmask(pplan->end));
1166             pplan->sval->r2 = vtop->r;
1167             vtop--;
1168           }
1169           gv(regmask(pplan->start));
1170           /* Mark register as used so that gcall_or_jmp use another one
1171              (regs >=4 are free as never used to pass parameters) */
1172           pplan->sval->r = vtop->r;
1173           break;
1174       }
1175       vtop--;
1176     }
1177   }
1178
1179   /* second pass to restore registers that were saved on stack by accident.
1180      Maybe redundant after the "lvalue_save" patch in tccgen.c:gv() */
1181   if (++pass < 2)
1182     goto again;
1183
1184   /* Manually free remaining registers since next parameters are loaded
1185    * manually, without the help of gv(int). */
1186   save_regs(nb_args);
1187
1188   if(todo) {
1189     o(0xE8BD0000|todo); /* pop {todo} */
1190     for(pplan = plan->clsplans[CORE_STRUCT_CLASS]; pplan; pplan = pplan->prev) {
1191       int r;
1192       pplan->sval->r = pplan->start;
1193       /* An SValue can only pin 2 registers at best (r and r2) but a structure
1194          can occupy more than 2 registers. Thus, we need to push on the value
1195          stack some fake parameter to have on SValue for each registers used
1196          by a structure (r2 is not used). */
1197       for (r = pplan->start + 1; r <= pplan->end; r++) {
1198         if (todo & (1 << r)) {
1199           nb_extra_sval++;
1200           vpushi(0);
1201           vtop->r = r;
1202         }
1203       }
1204     }
1205   }
1206   return nb_extra_sval;
1207 }
1208
1209 /* Generate function call. The function address is pushed first, then
1210    all the parameters in call order. This functions pops all the
1211    parameters and the function address. */
1212 void gfunc_call(int nb_args)
1213 {
1214   int r, args_size;
1215   int def_float_abi = float_abi;
1216   int todo;
1217   struct plan plan;
1218
1219 #ifdef TCC_ARM_EABI
1220   int variadic;
1221
1222   if (float_abi == ARM_HARD_FLOAT) {
1223     variadic = (vtop[-nb_args].type.ref->f.func_type == FUNC_ELLIPSIS);
1224     if (variadic || floats_in_core_regs(&vtop[-nb_args]))
1225       float_abi = ARM_SOFTFP_FLOAT;
1226   }
1227 #endif
1228   /* cannot let cpu flags if other instruction are generated. Also avoid leaving
1229      VT_JMP anywhere except on the top of the stack because it would complicate
1230      the code generator. */
1231   r = vtop->r & VT_VALMASK;
1232   if (r == VT_CMP || (r & ~1) == VT_JMP)
1233     gv(RC_INT);
1234
1235   args_size = assign_regs(nb_args, float_abi, &plan, &todo);
1236
1237 #ifdef TCC_ARM_EABI
1238   if (args_size & 7) { /* Stack must be 8 byte aligned at fct call for EABI */
1239     args_size = (args_size + 7) & ~7;
1240     o(0xE24DD004); /* sub sp, sp, #4 */
1241   }
1242 #endif
1243
1244   nb_args += copy_params(nb_args, &plan, todo);
1245   tcc_free(plan.pplans);
1246
1247   /* Move fct SValue on top as required by gcall_or_jmp */
1248   vrotb(nb_args + 1);
1249   gcall_or_jmp(0);
1250   if (args_size)
1251       gadd_sp(args_size); /* pop all parameters passed on the stack */
1252 #if defined(TCC_ARM_EABI) && defined(TCC_ARM_VFP)
1253   if(float_abi == ARM_SOFTFP_FLOAT && is_float(vtop->type.ref->type.t)) {
1254     if((vtop->type.ref->type.t & VT_BTYPE) == VT_FLOAT) {
1255       o(0xEE000A10); /*vmov s0, r0 */
1256     } else {
1257       o(0xEE000B10); /* vmov.32 d0[0], r0 */
1258       o(0xEE201B10); /* vmov.32 d0[1], r1 */
1259     }
1260   }
1261 #endif
1262   vtop -= nb_args + 1; /* Pop all params and fct address from value stack */
1263   leaffunc = 0; /* we are calling a function, so we aren't in a leaf function */
1264   float_abi = def_float_abi;
1265 }
1266
1267 /* generate function prolog of type 't' */
1268 void gfunc_prolog(Sym *func_sym)
1269 {
1270   CType *func_type = &func_sym->type;
1271   Sym *sym,*sym2;
1272   int n, nf, size, align, rs, struct_ret = 0;
1273   int addr, pn, sn; /* pn=core, sn=stack */
1274   CType ret_type;
1275
1276 #ifdef TCC_ARM_EABI
1277   struct avail_regs avregs = AVAIL_REGS_INITIALIZER;
1278 #endif
1279
1280   sym = func_type->ref;
1281
1282   n = nf = 0;
1283   if ((func_vt.t & VT_BTYPE) == VT_STRUCT &&
1284       !gfunc_sret(&func_vt, func_var, &ret_type, &align, &rs))
1285   {
1286     n++;
1287     struct_ret = 1;
1288     func_vc = 12; /* Offset from fp of the place to store the result */
1289   }
1290   for(sym2 = sym->next; sym2 && (n < 4 || nf < 16); sym2 = sym2->next) {
1291     size = type_size(&sym2->type, &align);
1292 #ifdef TCC_ARM_EABI
1293     if (float_abi == ARM_HARD_FLOAT && !func_var &&
1294         (is_float(sym2->type.t) || is_hgen_float_aggr(&sym2->type))) {
1295       int tmpnf = assign_vfpreg(&avregs, align, size);
1296       tmpnf += (size + 3) / 4;
1297       nf = (tmpnf > nf) ? tmpnf : nf;
1298     } else
1299 #endif
1300     if (n < 4)
1301       n += (size + 3) / 4;
1302   }
1303   o(0xE1A0C00D); /* mov ip,sp */
1304   if (func_var)
1305     n=4;
1306   if (n) {
1307     if(n>4)
1308       n=4;
1309 #ifdef TCC_ARM_EABI
1310     n=(n+1)&-2;
1311 #endif
1312     o(0xE92D0000|((1<<n)-1)); /* save r0-r4 on stack if needed */
1313   }
1314   if (nf) {
1315     if (nf>16)
1316       nf=16;
1317     nf=(nf+1)&-2; /* nf => HARDFLOAT => EABI */
1318     o(0xED2D0A00|nf); /* save s0-s15 on stack if needed */
1319   }
1320   o(0xE92D5800); /* save fp, ip, lr */
1321   o(0xE1A0B00D); /* mov fp, sp */
1322   func_sub_sp_offset = ind;
1323   o(0xE1A00000); /* nop, leave space for stack adjustment in epilog */
1324
1325 #ifdef TCC_ARM_EABI
1326   if (float_abi == ARM_HARD_FLOAT) {
1327     func_vc += nf * 4;
1328     avregs = AVAIL_REGS_INITIALIZER;
1329   }
1330 #endif
1331   pn = struct_ret, sn = 0;
1332   while ((sym = sym->next)) {
1333     CType *type;
1334     type = &sym->type;
1335     size = type_size(type, &align);
1336     size = (size + 3) >> 2;
1337     align = (align + 3) & ~3;
1338 #ifdef TCC_ARM_EABI
1339     if (float_abi == ARM_HARD_FLOAT && !func_var && (is_float(sym->type.t)
1340         || is_hgen_float_aggr(&sym->type))) {
1341       int fpn = assign_vfpreg(&avregs, align, size << 2);
1342       if (fpn >= 0)
1343         addr = fpn * 4;
1344       else
1345         goto from_stack;
1346     } else
1347 #endif
1348     if (pn < 4) {
1349 #ifdef TCC_ARM_EABI
1350         pn = (pn + (align-1)/4) & -(align/4);
1351 #endif
1352       addr = (nf + pn) * 4;
1353       pn += size;
1354       if (!sn && pn > 4)
1355         sn = (pn - 4);
1356     } else {
1357 #ifdef TCC_ARM_EABI
1358 from_stack:
1359         sn = (sn + (align-1)/4) & -(align/4);
1360 #endif
1361       addr = (n + nf + sn) * 4;
1362       sn += size;
1363     }
1364     sym_push(sym->v & ~SYM_FIELD, type, VT_LOCAL | VT_LVAL,
1365              addr + 12);
1366   }
1367   last_itod_magic=0;
1368   leaffunc = 1;
1369   loc = 0;
1370 }
1371
1372 /* generate function epilog */
1373 void gfunc_epilog(void)
1374 {
1375   uint32_t x;
1376   int diff;
1377   /* Copy float return value to core register if base standard is used and
1378      float computation is made with VFP */
1379 #if defined(TCC_ARM_EABI) && defined(TCC_ARM_VFP)
1380   if ((float_abi == ARM_SOFTFP_FLOAT || func_var) && is_float(func_vt.t)) {
1381     if((func_vt.t & VT_BTYPE) == VT_FLOAT)
1382       o(0xEE100A10); /* fmrs r0, s0 */
1383     else {
1384       o(0xEE100B10); /* fmrdl r0, d0 */
1385       o(0xEE301B10); /* fmrdh r1, d0 */
1386     }
1387   }
1388 #endif
1389   o(0xE89BA800); /* restore fp, sp, pc */
1390   diff = (-loc + 3) & -4;
1391 #ifdef TCC_ARM_EABI
1392   if(!leaffunc)
1393     diff = ((diff + 11) & -8) - 4;
1394 #endif
1395   if(diff > 0) {
1396     x=stuff_const(0xE24BD000, diff); /* sub sp,fp,# */
1397     if(x)
1398       *(uint32_t *)(cur_text_section->data + func_sub_sp_offset) = x;
1399     else {
1400       int addr;
1401       addr=ind;
1402       o(0xE59FC004); /* ldr ip,[pc+4] */
1403       o(0xE04BD00C); /* sub sp,fp,ip  */
1404       o(0xE1A0F00E); /* mov pc,lr */
1405       o(diff);
1406       *(uint32_t *)(cur_text_section->data + func_sub_sp_offset) = 0xE1000000|encbranch(func_sub_sp_offset,addr,1);
1407     }
1408   }
1409 }
1410
1411 ST_FUNC void gen_fill_nops(int bytes)
1412 {
1413     if ((bytes & 3))
1414       tcc_error("alignment of code section not multiple of 4");
1415     while (bytes > 0) {
1416         o(0xE1A00000);
1417         bytes -= 4;
1418     }
1419 }
1420
1421 /* generate a jump to a label */
1422 ST_FUNC int gjmp(int t)
1423 {
1424   int r;
1425   if (nocode_wanted)
1426     return t;
1427   r=ind;
1428   o(0xE0000000|encbranch(r,t,1));
1429   return r;
1430 }
1431
1432 /* generate a jump to a fixed address */
1433 ST_FUNC void gjmp_addr(int a)
1434 {
1435   gjmp(a);
1436 }
1437
1438 ST_FUNC int gjmp_cond(int op, int t)
1439 {
1440   int r;
1441   if (nocode_wanted)
1442     return t;
1443   r=ind;
1444   op=mapcc(op);
1445   op|=encbranch(r,t,1);
1446   o(op);
1447   return r;
1448 }
1449
1450 ST_FUNC int gjmp_append(int n, int t)
1451 {
1452   uint32_t *x;
1453   int p,lp;
1454   if(n) {
1455     p = n;
1456     do {
1457       p = decbranch(lp=p);
1458     } while(p);
1459     x = (uint32_t *)(cur_text_section->data + lp);
1460     *x &= 0xff000000;
1461     *x |= encbranch(lp,t,1);
1462     t = n;
1463   }
1464   return t;
1465 }
1466
1467 /* generate an integer binary operation */
1468 void gen_opi(int op)
1469 {
1470   int c, func = 0;
1471   uint32_t opc = 0, r, fr;
1472   unsigned short retreg = REG_IRET;
1473
1474   c=0;
1475   switch(op) {
1476     case '+':
1477       opc = 0x8;
1478       c=1;
1479       break;
1480     case TOK_ADDC1: /* add with carry generation */
1481       opc = 0x9;
1482       c=1;
1483       break;
1484     case '-':
1485       opc = 0x4;
1486       c=1;
1487       break;
1488     case TOK_SUBC1: /* sub with carry generation */
1489       opc = 0x5;
1490       c=1;
1491       break;
1492     case TOK_ADDC2: /* add with carry use */
1493       opc = 0xA;
1494       c=1;
1495       break;
1496     case TOK_SUBC2: /* sub with carry use */
1497       opc = 0xC;
1498       c=1;
1499       break;
1500     case '&':
1501       opc = 0x0;
1502       c=1;
1503       break;
1504     case '^':
1505       opc = 0x2;
1506       c=1;
1507       break;
1508     case '|':
1509       opc = 0x18;
1510       c=1;
1511       break;
1512     case '*':
1513       gv2(RC_INT, RC_INT);
1514       r = vtop[-1].r;
1515       fr = vtop[0].r;
1516       vtop--;
1517       o(0xE0000090|(intr(r)<<16)|(intr(r)<<8)|intr(fr));
1518       return;
1519     case TOK_SHL:
1520       opc = 0;
1521       c=2;
1522       break;
1523     case TOK_SHR:
1524       opc = 1;
1525       c=2;
1526       break;
1527     case TOK_SAR:
1528       opc = 2;
1529       c=2;
1530       break;
1531     case '/':
1532     case TOK_PDIV:
1533       func=TOK___divsi3;
1534       c=3;
1535       break;
1536     case TOK_UDIV:
1537       func=TOK___udivsi3;
1538       c=3;
1539       break;
1540     case '%':
1541 #ifdef TCC_ARM_EABI
1542       func=TOK___aeabi_idivmod;
1543       retreg=REG_IRE2;
1544 #else
1545       func=TOK___modsi3;
1546 #endif
1547       c=3;
1548       break;
1549     case TOK_UMOD:
1550 #ifdef TCC_ARM_EABI
1551       func=TOK___aeabi_uidivmod;
1552       retreg=REG_IRE2;
1553 #else
1554       func=TOK___umodsi3;
1555 #endif
1556       c=3;
1557       break;
1558     case TOK_UMULL:
1559       gv2(RC_INT, RC_INT);
1560       r=intr(vtop[-1].r2=get_reg(RC_INT));
1561       c=vtop[-1].r;
1562       vtop[-1].r=get_reg_ex(RC_INT,regmask(c));
1563       vtop--;
1564       o(0xE0800090|(r<<16)|(intr(vtop->r)<<12)|(intr(c)<<8)|intr(vtop[1].r));
1565       return;
1566     default:
1567       opc = 0x15;
1568       c=1;
1569       break;
1570   }
1571   switch(c) {
1572     case 1:
1573       if((vtop[-1].r & (VT_VALMASK | VT_LVAL | VT_SYM)) == VT_CONST) {
1574         if(opc == 4 || opc == 5 || opc == 0xc) {
1575           vswap();
1576           opc|=2; // sub -> rsb
1577         }
1578       }
1579       if ((vtop->r & VT_VALMASK) == VT_CMP ||
1580           (vtop->r & (VT_VALMASK & ~1)) == VT_JMP)
1581         gv(RC_INT);
1582       vswap();
1583       c=intr(gv(RC_INT));
1584       vswap();
1585       opc=0xE0000000|(opc<<20)|(c<<16);
1586       if((vtop->r & (VT_VALMASK | VT_LVAL | VT_SYM)) == VT_CONST) {
1587         uint32_t x;
1588         x=stuff_const(opc|0x2000000,vtop->c.i);
1589         if(x) {
1590           r=intr(vtop[-1].r=get_reg_ex(RC_INT,regmask(vtop[-1].r)));
1591           o(x|(r<<12));
1592           goto done;
1593         }
1594       }
1595       fr=intr(gv(RC_INT));
1596       r=intr(vtop[-1].r=get_reg_ex(RC_INT,two2mask(vtop->r,vtop[-1].r)));
1597       o(opc|(r<<12)|fr);
1598 done:
1599       vtop--;
1600       if (op >= TOK_ULT && op <= TOK_GT)
1601         vset_VT_CMP(op);
1602       break;
1603     case 2:
1604       opc=0xE1A00000|(opc<<5);
1605       if ((vtop->r & VT_VALMASK) == VT_CMP ||
1606           (vtop->r & (VT_VALMASK & ~1)) == VT_JMP)
1607         gv(RC_INT);
1608       vswap();
1609       r=intr(gv(RC_INT));
1610       vswap();
1611       opc|=r;
1612       if ((vtop->r & (VT_VALMASK | VT_LVAL | VT_SYM)) == VT_CONST) {
1613         fr=intr(vtop[-1].r=get_reg_ex(RC_INT,regmask(vtop[-1].r)));
1614         c = vtop->c.i & 0x1f;
1615         o(opc|(c<<7)|(fr<<12));
1616       } else {
1617         fr=intr(gv(RC_INT));
1618         c=intr(vtop[-1].r=get_reg_ex(RC_INT,two2mask(vtop->r,vtop[-1].r)));
1619         o(opc|(c<<12)|(fr<<8)|0x10);
1620       }
1621       vtop--;
1622       break;
1623     case 3:
1624       vpush_global_sym(&func_old_type, func);
1625       vrott(3);
1626       gfunc_call(2);
1627       vpushi(0);
1628       vtop->r = retreg;
1629       break;
1630     default:
1631       tcc_error("gen_opi %i unimplemented!",op);
1632   }
1633 }
1634
1635 #ifdef TCC_ARM_VFP
1636 static int is_zero(int i)
1637 {
1638   if((vtop[i].r & (VT_VALMASK | VT_LVAL | VT_SYM)) != VT_CONST)
1639     return 0;
1640   if (vtop[i].type.t == VT_FLOAT)
1641     return (vtop[i].c.f == 0.f);
1642   else if (vtop[i].type.t == VT_DOUBLE)
1643     return (vtop[i].c.d == 0.0);
1644   return (vtop[i].c.ld == 0.l);
1645 }
1646
1647 /* generate a floating point operation 'v = t1 op t2' instruction. The
1648  *    two operands are guaranteed to have the same floating point type */
1649 void gen_opf(int op)
1650 {
1651   uint32_t x;
1652   int fneg=0,r;
1653   x=0xEE000A00|T2CPR(vtop->type.t);
1654   switch(op) {
1655     case '+':
1656       if(is_zero(-1))
1657         vswap();
1658       if(is_zero(0)) {
1659         vtop--;
1660         return;
1661       }
1662       x|=0x300000;
1663       break;
1664     case '-':
1665       x|=0x300040;
1666       if(is_zero(0)) {
1667         vtop--;
1668         return;
1669       }
1670       if(is_zero(-1)) {
1671         x|=0x810000; /* fsubX -> fnegX */
1672         vswap();
1673         vtop--;
1674         fneg=1;
1675       }
1676       break;
1677     case '*':
1678       x|=0x200000;
1679       break;
1680     case '/':
1681       x|=0x800000;
1682       break;
1683     default:
1684       if(op < TOK_ULT || op > TOK_GT) {
1685         tcc_error("unknown fp op %x!",op);
1686         return;
1687       }
1688       if(is_zero(-1)) {
1689         vswap();
1690         switch(op) {
1691           case TOK_LT: op=TOK_GT; break;
1692           case TOK_GE: op=TOK_ULE; break;
1693           case TOK_LE: op=TOK_GE; break;
1694           case TOK_GT: op=TOK_ULT; break;
1695         }
1696       }
1697       x|=0xB40040; /* fcmpX */
1698       if(op!=TOK_EQ && op!=TOK_NE)
1699         x|=0x80; /* fcmpX -> fcmpeX */
1700       if(is_zero(0)) {
1701         vtop--;
1702         o(x|0x10000|(vfpr(gv(RC_FLOAT))<<12)); /* fcmp(e)X -> fcmp(e)zX */
1703       } else {
1704         x|=vfpr(gv(RC_FLOAT));
1705         vswap();
1706         o(x|(vfpr(gv(RC_FLOAT))<<12));
1707         vtop--;
1708       }
1709       o(0xEEF1FA10); /* fmstat */
1710
1711       switch(op) {
1712         case TOK_LE: op=TOK_ULE; break;
1713         case TOK_LT: op=TOK_ULT; break;
1714         case TOK_UGE: op=TOK_GE; break;
1715         case TOK_UGT: op=TOK_GT; break;
1716       }
1717       vset_VT_CMP(op);
1718       return;
1719   }
1720   r=gv(RC_FLOAT);
1721   x|=vfpr(r);
1722   r=regmask(r);
1723   if(!fneg) {
1724     int r2;
1725     vswap();
1726     r2=gv(RC_FLOAT);
1727     x|=vfpr(r2)<<16;
1728     r|=regmask(r2);
1729   }
1730   vtop->r=get_reg_ex(RC_FLOAT,r);
1731   if(!fneg)
1732     vtop--;
1733   o(x|(vfpr(vtop->r)<<12));
1734 }
1735
1736 #else
1737 static uint32_t is_fconst()
1738 {
1739   long double f;
1740   uint32_t r;
1741   if((vtop->r & (VT_VALMASK | VT_LVAL | VT_SYM)) != VT_CONST)
1742     return 0;
1743   if (vtop->type.t == VT_FLOAT)
1744     f = vtop->c.f;
1745   else if (vtop->type.t == VT_DOUBLE)
1746     f = vtop->c.d;
1747   else
1748     f = vtop->c.ld;
1749   if(!ieee_finite(f))
1750     return 0;
1751   r=0x8;
1752   if(f<0.0) {
1753     r=0x18;
1754     f=-f;
1755   }
1756   if(f==0.0)
1757     return r;
1758   if(f==1.0)
1759     return r|1;
1760   if(f==2.0)
1761     return r|2;
1762   if(f==3.0)
1763     return r|3;
1764   if(f==4.0)
1765     return r|4;
1766   if(f==5.0)
1767     return r|5;
1768   if(f==0.5)
1769     return r|6;
1770   if(f==10.0)
1771     return r|7;
1772   return 0;
1773 }
1774
1775 /* generate a floating point operation 'v = t1 op t2' instruction. The
1776    two operands are guaranteed to have the same floating point type */
1777 void gen_opf(int op)
1778 {
1779   uint32_t x, r, r2, c1, c2;
1780   //fputs("gen_opf\n",stderr);
1781   vswap();
1782   c1 = is_fconst();
1783   vswap();
1784   c2 = is_fconst();
1785   x=0xEE000100;
1786 #if LDOUBLE_SIZE == 8
1787   if ((vtop->type.t & VT_BTYPE) != VT_FLOAT)
1788     x|=0x80;
1789 #else
1790   if ((vtop->type.t & VT_BTYPE) == VT_DOUBLE)
1791     x|=0x80;
1792   else if ((vtop->type.t & VT_BTYPE) == VT_LDOUBLE)
1793     x|=0x80000;
1794 #endif
1795   switch(op)
1796   {
1797     case '+':
1798       if(!c2) {
1799         vswap();
1800         c2=c1;
1801       }
1802       vswap();
1803       r=fpr(gv(RC_FLOAT));
1804       vswap();
1805       if(c2) {
1806         if(c2>0xf)
1807           x|=0x200000; // suf
1808         r2=c2&0xf;
1809       } else {
1810         r2=fpr(gv(RC_FLOAT));
1811       }
1812       break;
1813     case '-':
1814       if(c2) {
1815         if(c2<=0xf)
1816           x|=0x200000; // suf
1817         r2=c2&0xf;
1818         vswap();
1819         r=fpr(gv(RC_FLOAT));
1820         vswap();
1821       } else if(c1 && c1<=0xf) {
1822         x|=0x300000; // rsf
1823         r2=c1;
1824         r=fpr(gv(RC_FLOAT));
1825         vswap();
1826       } else {
1827         x|=0x200000; // suf
1828         vswap();
1829         r=fpr(gv(RC_FLOAT));
1830         vswap();
1831         r2=fpr(gv(RC_FLOAT));
1832       }
1833       break;
1834     case '*':
1835       if(!c2 || c2>0xf) {
1836         vswap();
1837         c2=c1;
1838       }
1839       vswap();
1840       r=fpr(gv(RC_FLOAT));
1841       vswap();
1842       if(c2 && c2<=0xf)
1843         r2=c2;
1844       else
1845         r2=fpr(gv(RC_FLOAT));
1846       x|=0x100000; // muf
1847       break;
1848     case '/':
1849       if(c2 && c2<=0xf) {
1850         x|=0x400000; // dvf
1851         r2=c2;
1852         vswap();
1853         r=fpr(gv(RC_FLOAT));
1854         vswap();
1855       } else if(c1 && c1<=0xf) {
1856         x|=0x500000; // rdf
1857         r2=c1;
1858         r=fpr(gv(RC_FLOAT));
1859         vswap();
1860       } else {
1861         x|=0x400000; // dvf
1862         vswap();
1863         r=fpr(gv(RC_FLOAT));
1864         vswap();
1865         r2=fpr(gv(RC_FLOAT));
1866       }
1867       break;
1868     default:
1869       if(op >= TOK_ULT && op <= TOK_GT) {
1870         x|=0xd0f110; // cmfe
1871 /* bug (intention?) in Linux FPU emulator
1872    doesn't set carry if equal */
1873         switch(op) {
1874           case TOK_ULT:
1875           case TOK_UGE:
1876           case TOK_ULE:
1877           case TOK_UGT:
1878             tcc_error("unsigned comparison on floats?");
1879             break;
1880           case TOK_LT:
1881             op=TOK_Nset;
1882             break;
1883           case TOK_LE:
1884             op=TOK_ULE; /* correct in unordered case only if AC bit in FPSR set */
1885             break;
1886           case TOK_EQ:
1887           case TOK_NE:
1888             x&=~0x400000; // cmfe -> cmf
1889             break;
1890         }
1891         if(c1 && !c2) {
1892           c2=c1;
1893           vswap();
1894           switch(op) {
1895             case TOK_Nset:
1896               op=TOK_GT;
1897               break;
1898             case TOK_GE:
1899               op=TOK_ULE;
1900               break;
1901             case TOK_ULE:
1902               op=TOK_GE;
1903               break;
1904             case TOK_GT:
1905               op=TOK_Nset;
1906               break;
1907           }
1908         }
1909         vswap();
1910         r=fpr(gv(RC_FLOAT));
1911         vswap();
1912         if(c2) {
1913           if(c2>0xf)
1914             x|=0x200000;
1915           r2=c2&0xf;
1916         } else {
1917           r2=fpr(gv(RC_FLOAT));
1918         }
1919         --vtop;
1920         vset_VT_CMP(op);
1921         ++vtop;
1922       } else {
1923         tcc_error("unknown fp op %x!",op);
1924         return;
1925       }
1926   }
1927   if(vtop[-1].r == VT_CMP)
1928     c1=15;
1929   else {
1930     c1=vtop->r;
1931     if(r2&0x8)
1932       c1=vtop[-1].r;
1933     vtop[-1].r=get_reg_ex(RC_FLOAT,two2mask(vtop[-1].r,c1));
1934     c1=fpr(vtop[-1].r);
1935   }
1936   vtop--;
1937   o(x|(r<<16)|(c1<<12)|r2);
1938 }
1939 #endif
1940
1941 /* convert integers to fp 't' type. Must handle 'int', 'unsigned int'
1942    and 'long long' cases. */
1943 ST_FUNC void gen_cvt_itof(int t)
1944 {
1945   uint32_t r, r2;
1946   int bt;
1947   bt=vtop->type.t & VT_BTYPE;
1948   if(bt == VT_INT || bt == VT_SHORT || bt == VT_BYTE) {
1949 #ifndef TCC_ARM_VFP
1950     uint32_t dsize = 0;
1951 #endif
1952     r=intr(gv(RC_INT));
1953 #ifdef TCC_ARM_VFP
1954     r2=vfpr(vtop->r=get_reg(RC_FLOAT));
1955     o(0xEE000A10|(r<<12)|(r2<<16)); /* fmsr */
1956     r2|=r2<<12;
1957     if(!(vtop->type.t & VT_UNSIGNED))
1958       r2|=0x80;                /* fuitoX -> fsituX */
1959     o(0xEEB80A40|r2|T2CPR(t)); /* fYitoX*/
1960 #else
1961     r2=fpr(vtop->r=get_reg(RC_FLOAT));
1962     if((t & VT_BTYPE) != VT_FLOAT)
1963       dsize=0x80;    /* flts -> fltd */
1964     o(0xEE000110|dsize|(r2<<16)|(r<<12)); /* flts */
1965     if((vtop->type.t & (VT_UNSIGNED|VT_BTYPE)) == (VT_UNSIGNED|VT_INT)) {
1966       uint32_t off = 0;
1967       o(0xE3500000|(r<<12));        /* cmp */
1968       r=fpr(get_reg(RC_FLOAT));
1969       if(last_itod_magic) {
1970         off=ind+8-last_itod_magic;
1971         off/=4;
1972         if(off>255)
1973           off=0;
1974       }
1975       o(0xBD1F0100|(r<<12)|off);    /* ldflts */
1976       if(!off) {
1977         o(0xEA000000);              /* b */
1978         last_itod_magic=ind;
1979         o(0x4F800000);              /* 4294967296.0f */
1980       }
1981       o(0xBE000100|dsize|(r2<<16)|(r2<<12)|r); /* adflt */
1982     }
1983 #endif
1984     return;
1985   } else if(bt == VT_LLONG) {
1986     int func;
1987     CType *func_type = 0;
1988     if((t & VT_BTYPE) == VT_FLOAT) {
1989       func_type = &func_float_type;
1990       if(vtop->type.t & VT_UNSIGNED)
1991         func=TOK___floatundisf;
1992       else
1993         func=TOK___floatdisf;
1994 #if LDOUBLE_SIZE != 8
1995     } else if((t & VT_BTYPE) == VT_LDOUBLE) {
1996       func_type = &func_ldouble_type;
1997       if(vtop->type.t & VT_UNSIGNED)
1998         func=TOK___floatundixf;
1999       else
2000         func=TOK___floatdixf;
2001     } else if((t & VT_BTYPE) == VT_DOUBLE) {
2002 #else
2003     } else if((t & VT_BTYPE) == VT_DOUBLE || (t & VT_BTYPE) == VT_LDOUBLE) {
2004 #endif
2005       func_type = &func_double_type;
2006       if(vtop->type.t & VT_UNSIGNED)
2007         func=TOK___floatundidf;
2008       else
2009         func=TOK___floatdidf;
2010     }
2011     if(func_type) {
2012       vpush_global_sym(func_type, func);
2013       vswap();
2014       gfunc_call(1);
2015       vpushi(0);
2016       vtop->r=TREG_F0;
2017       return;
2018     }
2019   }
2020   tcc_error("unimplemented gen_cvt_itof %x!",vtop->type.t);
2021 }
2022
2023 /* convert fp to int 't' type */
2024 void gen_cvt_ftoi(int t)
2025 {
2026   uint32_t r, r2;
2027   int u, func = 0;
2028   u=t&VT_UNSIGNED;
2029   t&=VT_BTYPE;
2030   r2=vtop->type.t & VT_BTYPE;
2031   if(t==VT_INT) {
2032 #ifdef TCC_ARM_VFP
2033     r=vfpr(gv(RC_FLOAT));
2034     u=u?0:0x10000;
2035     o(0xEEBC0AC0|(r<<12)|r|T2CPR(r2)|u); /* ftoXizY */
2036     r2=intr(vtop->r=get_reg(RC_INT));
2037     o(0xEE100A10|(r<<16)|(r2<<12));
2038     return;
2039 #else
2040     if(u) {
2041       if(r2 == VT_FLOAT)
2042         func=TOK___fixunssfsi;
2043 #if LDOUBLE_SIZE != 8
2044       else if(r2 == VT_LDOUBLE)
2045         func=TOK___fixunsxfsi;
2046       else if(r2 == VT_DOUBLE)
2047 #else
2048       else if(r2 == VT_LDOUBLE || r2 == VT_DOUBLE)
2049 #endif
2050         func=TOK___fixunsdfsi;
2051     } else {
2052       r=fpr(gv(RC_FLOAT));
2053       r2=intr(vtop->r=get_reg(RC_INT));
2054       o(0xEE100170|(r2<<12)|r);
2055       return;
2056     }
2057 #endif
2058   } else if(t == VT_LLONG) { // unsigned handled in gen_cvt_ftoi1
2059     if(r2 == VT_FLOAT)
2060       func=TOK___fixsfdi;
2061 #if LDOUBLE_SIZE != 8
2062     else if(r2 == VT_LDOUBLE)
2063       func=TOK___fixxfdi;
2064     else if(r2 == VT_DOUBLE)
2065 #else
2066     else if(r2 == VT_LDOUBLE || r2 == VT_DOUBLE)
2067 #endif
2068       func=TOK___fixdfdi;
2069   }
2070   if(func) {
2071     vpush_global_sym(&func_old_type, func);
2072     vswap();
2073     gfunc_call(1);
2074     vpushi(0);
2075     if(t == VT_LLONG)
2076       vtop->r2 = REG_IRE2;
2077     vtop->r = REG_IRET;
2078     return;
2079   }
2080   tcc_error("unimplemented gen_cvt_ftoi!");
2081 }
2082
2083 /* convert from one floating point type to another */
2084 void gen_cvt_ftof(int t)
2085 {
2086 #ifdef TCC_ARM_VFP
2087   if(((vtop->type.t & VT_BTYPE) == VT_FLOAT) != ((t & VT_BTYPE) == VT_FLOAT)) {
2088     uint32_t r = vfpr(gv(RC_FLOAT));
2089     o(0xEEB70AC0|(r<<12)|r|T2CPR(vtop->type.t));
2090   }
2091 #else
2092   /* all we have to do on i386 and FPA ARM is to put the float in a register */
2093   gv(RC_FLOAT);
2094 #endif
2095 }
2096
2097 /* computed goto support */
2098 void ggoto(void)
2099 {
2100   gcall_or_jmp(1);
2101   vtop--;
2102 }
2103
2104 /* Save the stack pointer onto the stack and return the location of its address */
2105 ST_FUNC void gen_vla_sp_save(int addr) {
2106     SValue v;
2107     v.type.t = VT_PTR;
2108     v.r = VT_LOCAL | VT_LVAL;
2109     v.c.i = addr;
2110     store(TREG_SP, &v);
2111 }
2112
2113 /* Restore the SP from a location on the stack */
2114 ST_FUNC void gen_vla_sp_restore(int addr) {
2115     SValue v;
2116     v.type.t = VT_PTR;
2117     v.r = VT_LOCAL | VT_LVAL;
2118     v.c.i = addr;
2119     load(TREG_SP, &v);
2120 }
2121
2122 /* Subtract from the stack pointer, and push the resulting value onto the stack */
2123 ST_FUNC void gen_vla_alloc(CType *type, int align) {
2124     int r = intr(gv(RC_INT));
2125     o(0xE04D0000|(r<<12)|r); /* sub r, sp, r */
2126 #ifdef TCC_ARM_EABI
2127     if (align < 8)
2128         align = 8;
2129 #else
2130     if (align < 4)
2131         align = 4;
2132 #endif
2133     if (align & (align - 1))
2134         tcc_error("alignment is not a power of 2: %i", align);
2135     o(stuff_const(0xE3C0D000|(r<<16), align - 1)); /* bic sp, r, #align-1 */
2136     vpop();
2137 }
2138
2139 /* end of ARM code generator */
2140 /*************************************************************/
2141 #endif
2142 /*************************************************************/