2 * x86-64 code generator for TCC
4 * Copyright (c) 2008 Shinichiro Hamaji
6 * Based on i386-gen.c by Fabrice Bellard
8 * This library is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU Lesser General Public
10 * License as published by the Free Software Foundation; either
11 * version 2 of the License, or (at your option) any later version.
13 * This library is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * Lesser General Public License for more details.
18 * You should have received a copy of the GNU Lesser General Public
19 * License along with this library; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 #ifdef TARGET_DEFS_ONLY
25 /* number of available registers */
27 #define NB_ASM_REGS 16
28 #define CONFIG_TCC_ASM
30 /* a register can belong to several classes. The classes must be
31 sorted from more general to more precise (see gv2() code which does
32 assumptions on it). */
33 #define RC_INT 0x0001 /* generic integer register */
34 #define RC_FLOAT 0x0002 /* generic float register */
38 #define RC_ST0 0x0080 /* only for long double */
43 #define RC_XMM0 0x1000
44 #define RC_XMM1 0x2000
45 #define RC_XMM2 0x4000
46 #define RC_XMM3 0x8000
47 #define RC_XMM4 0x10000
48 #define RC_XMM5 0x20000
49 #define RC_XMM6 0x40000
50 #define RC_XMM7 0x80000
51 #define RC_IRET RC_RAX /* function return: integer register */
52 #define RC_LRET RC_RDX /* function return: second integer register */
53 #define RC_FRET RC_XMM0 /* function return: float register */
54 #define RC_QRET RC_XMM1 /* function return: second float register */
56 /* pretty names for the registers */
84 #define REX_BASE(reg) (((reg) >> 3) & 1)
85 #define REG_VALUE(reg) ((reg) & 7)
87 /* return registers for function */
88 #define REG_IRET TREG_RAX /* single word int return register */
89 #define REG_LRET TREG_RDX /* second word return register (for long long) */
90 #define REG_FRET TREG_XMM0 /* float return register */
91 #define REG_QRET TREG_XMM1 /* second float return register */
93 /* defined if function parameters must be evaluated in reverse order */
94 #define INVERT_FUNC_PARAMS
96 /* pointer size, in bytes */
99 /* long double size and alignment, in bytes */
100 #define LDOUBLE_SIZE 16
101 #define LDOUBLE_ALIGN 16
102 /* maximum alignment (for aligned attribute support) */
105 /******************************************************/
106 #else /* ! TARGET_DEFS_ONLY */
107 /******************************************************/
111 ST_DATA
const int reg_classes
[NB_REGS
] = {
112 /* eax */ RC_INT
| RC_RAX
,
113 /* ecx */ RC_INT
| RC_RCX
,
114 /* edx */ RC_INT
| RC_RDX
,
128 /* xmm0 */ RC_FLOAT
| RC_XMM0
,
129 /* xmm1 */ RC_FLOAT
| RC_XMM1
,
130 /* xmm2 */ RC_FLOAT
| RC_XMM2
,
131 /* xmm3 */ RC_FLOAT
| RC_XMM3
,
132 /* xmm4 */ RC_FLOAT
| RC_XMM4
,
133 /* xmm5 */ RC_FLOAT
| RC_XMM5
,
134 /* xmm6 an xmm7 are included so gv() can be used on them,
135 but they are not tagged with RC_FLOAT because they are
136 callee saved on Windows */
142 static unsigned long func_sub_sp_offset
;
143 static int func_ret_sub
;
145 /* XXX: make it faster ? */
146 ST_FUNC
void g(int c
)
152 if (ind1
> cur_text_section
->data_allocated
)
153 section_realloc(cur_text_section
, ind1
);
154 cur_text_section
->data
[ind
] = c
;
158 ST_FUNC
void o(unsigned int c
)
166 ST_FUNC
void gen_le16(int v
)
172 ST_FUNC
void gen_le32(int c
)
180 ST_FUNC
void gen_le64(int64_t c
)
192 static void orex(int ll
, int r
, int r2
, int b
)
194 if ((r
& VT_VALMASK
) >= VT_CONST
)
196 if ((r2
& VT_VALMASK
) >= VT_CONST
)
198 if (ll
|| REX_BASE(r
) || REX_BASE(r2
))
199 o(0x40 | REX_BASE(r
) | (REX_BASE(r2
) << 2) | (ll
<< 3));
203 /* output a symbol and patch all calls to it */
204 ST_FUNC
void gsym_addr(int t
, int a
)
207 unsigned char *ptr
= cur_text_section
->data
+ t
;
208 uint32_t n
= read32le(ptr
); /* next value */
209 write32le(ptr
, a
- t
- 4);
214 static int is64_type(int t
)
216 return ((t
& VT_BTYPE
) == VT_PTR
||
217 (t
& VT_BTYPE
) == VT_FUNC
||
218 (t
& VT_BTYPE
) == VT_LLONG
);
221 /* instruction + 4 bytes data. Return the address of the data */
222 static int oad(int c
, int s
)
233 /* generate jmp to a label */
234 #define gjmp2(instr,lbl) oad(instr,lbl)
236 ST_FUNC
void gen_addr32(int r
, Sym
*sym
, int c
)
239 greloca(cur_text_section
, sym
, ind
, R_X86_64_32S
, c
), c
=0;
243 /* output constant with relocation if 'r & VT_SYM' is true */
244 ST_FUNC
void gen_addr64(int r
, Sym
*sym
, int64_t c
)
247 greloca(cur_text_section
, sym
, ind
, R_X86_64_64
, c
), c
=0;
251 /* output constant with relocation if 'r & VT_SYM' is true */
252 ST_FUNC
void gen_addrpc32(int r
, Sym
*sym
, int c
)
255 greloca(cur_text_section
, sym
, ind
, R_X86_64_PC32
, c
-4), c
=4;
259 /* output got address with relocation */
260 static void gen_gotpcrel(int r
, Sym
*sym
, int c
)
263 tcc_error("internal error: no GOT on PE: %s %x %x | %02x %02x %02x\n",
264 get_tok_str(sym
->v
, NULL
), c
, r
,
265 cur_text_section
->data
[ind
-3],
266 cur_text_section
->data
[ind
-2],
267 cur_text_section
->data
[ind
-1]
270 greloca(cur_text_section
, sym
, ind
, R_X86_64_GOTPCREL
, -4);
273 /* we use add c, %xxx for displacement */
275 o(0xc0 + REG_VALUE(r
));
280 static void gen_modrm_impl(int op_reg
, int r
, Sym
*sym
, int c
, int is_got
)
282 op_reg
= REG_VALUE(op_reg
) << 3;
283 if ((r
& VT_VALMASK
) == VT_CONST
) {
284 /* constant memory reference */
286 /* Absolute memory reference */
287 o(0x04 | op_reg
); /* [sib] | destreg */
288 oad(0x25, c
); /* disp32 */
290 o(0x05 | op_reg
); /* (%rip)+disp32 | destreg */
292 gen_gotpcrel(r
, sym
, c
);
294 gen_addrpc32(r
, sym
, c
);
297 } else if ((r
& VT_VALMASK
) == VT_LOCAL
) {
298 /* currently, we use only ebp as base */
300 /* short reference */
304 oad(0x85 | op_reg
, c
);
306 } else if ((r
& VT_VALMASK
) >= TREG_MEM
) {
308 g(0x80 | op_reg
| REG_VALUE(r
));
311 g(0x00 | op_reg
| REG_VALUE(r
));
314 g(0x00 | op_reg
| REG_VALUE(r
));
318 /* generate a modrm reference. 'op_reg' contains the additional 3
320 static void gen_modrm(int op_reg
, int r
, Sym
*sym
, int c
)
322 gen_modrm_impl(op_reg
, r
, sym
, c
, 0);
325 /* generate a modrm reference. 'op_reg' contains the additional 3
327 static void gen_modrm64(int opcode
, int op_reg
, int r
, Sym
*sym
, int c
)
330 is_got
= (op_reg
& TREG_MEM
) && !(sym
->type
.t
& VT_STATIC
);
331 orex(1, r
, op_reg
, opcode
);
332 gen_modrm_impl(op_reg
, r
, sym
, c
, is_got
);
336 /* load 'r' from value 'sv' */
337 void load(int r
, SValue
*sv
)
339 int v
, t
, ft
, fc
, fr
;
344 sv
= pe_getimport(sv
, &v2
);
348 ft
= sv
->type
.t
& ~VT_DEFSIGN
;
350 if (fc
!= sv
->c
.i
&& (fr
& VT_SYM
))
351 tcc_error("64 bit addend in load");
353 ft
&= ~(VT_VOLATILE
| VT_CONSTANT
);
355 #ifndef TCC_TARGET_PE
356 /* we use indirect access via got */
357 if ((fr
& VT_VALMASK
) == VT_CONST
&& (fr
& VT_SYM
) &&
358 (fr
& VT_LVAL
) && !(sv
->sym
->type
.t
& VT_STATIC
)) {
359 /* use the result register as a temporal register */
360 int tr
= r
| TREG_MEM
;
362 /* we cannot use float registers as a temporal register */
363 tr
= get_reg(RC_INT
) | TREG_MEM
;
365 gen_modrm64(0x8b, tr
, fr
, sv
->sym
, 0);
367 /* load from the temporal register */
375 if (v
== VT_LLOCAL
) {
377 v1
.r
= VT_LOCAL
| VT_LVAL
;
380 if (!(reg_classes
[fr
] & (RC_INT
|RC_R11
)))
381 fr
= get_reg(RC_INT
);
385 /* If the addends doesn't fit into a 32bit signed
386 we must use a 64bit move. We've checked above
387 that this doesn't have a sym associated. */
388 v1
.type
.t
= VT_LLONG
;
392 if (!(reg_classes
[fr
] & (RC_INT
|RC_R11
)))
393 fr
= get_reg(RC_INT
);
398 /* Like GCC we can load from small enough properly sized
399 structs and unions as well.
400 XXX maybe move to generic operand handling, but should
401 occur only with asm, so tccasm.c might also be a better place */
402 if ((ft
& VT_BTYPE
) == VT_STRUCT
) {
404 switch (type_size(&sv
->type
, &align
)) {
405 case 1: ft
= VT_BYTE
; break;
406 case 2: ft
= VT_SHORT
; break;
407 case 4: ft
= VT_INT
; break;
408 case 8: ft
= VT_LLONG
; break;
410 tcc_error("invalid aggregate type for register load");
414 if ((ft
& VT_BTYPE
) == VT_FLOAT
) {
416 r
= REG_VALUE(r
); /* movd */
417 } else if ((ft
& VT_BTYPE
) == VT_DOUBLE
) {
418 b
= 0x7e0ff3; /* movq */
420 } else if ((ft
& VT_BTYPE
) == VT_LDOUBLE
) {
421 b
= 0xdb, r
= 5; /* fldt */
422 } else if ((ft
& VT_TYPE
) == VT_BYTE
|| (ft
& VT_TYPE
) == VT_BOOL
) {
423 b
= 0xbe0f; /* movsbl */
424 } else if ((ft
& VT_TYPE
) == (VT_BYTE
| VT_UNSIGNED
)) {
425 b
= 0xb60f; /* movzbl */
426 } else if ((ft
& VT_TYPE
) == VT_SHORT
) {
427 b
= 0xbf0f; /* movswl */
428 } else if ((ft
& VT_TYPE
) == (VT_SHORT
| VT_UNSIGNED
)) {
429 b
= 0xb70f; /* movzwl */
431 assert(((ft
& VT_BTYPE
) == VT_INT
)
432 || ((ft
& VT_BTYPE
) == VT_LLONG
)
433 || ((ft
& VT_BTYPE
) == VT_PTR
)
434 || ((ft
& VT_BTYPE
) == VT_FUNC
)
440 gen_modrm64(b
, r
, fr
, sv
->sym
, fc
);
443 gen_modrm(r
, fr
, sv
->sym
, fc
);
450 o(0x05 + REG_VALUE(r
) * 8); /* lea xx(%rip), r */
451 gen_addrpc32(fr
, sv
->sym
, fc
);
453 if (sv
->sym
->type
.t
& VT_STATIC
) {
455 o(0x05 + REG_VALUE(r
) * 8); /* lea xx(%rip), r */
456 gen_addrpc32(fr
, sv
->sym
, fc
);
459 o(0x05 + REG_VALUE(r
) * 8); /* mov xx(%rip), r */
460 gen_gotpcrel(r
, sv
->sym
, fc
);
463 } else if (is64_type(ft
)) {
464 orex(1,r
,0, 0xb8 + REG_VALUE(r
)); /* mov $xx, r */
467 orex(0,r
,0, 0xb8 + REG_VALUE(r
)); /* mov $xx, r */
470 } else if (v
== VT_LOCAL
) {
471 orex(1,0,r
,0x8d); /* lea xxx(%ebp), r */
472 gen_modrm(r
, VT_LOCAL
, sv
->sym
, fc
);
473 } else if (v
== VT_CMP
) {
475 if ((fc
& ~0x100) != TOK_NE
)
476 oad(0xb8 + REG_VALUE(r
), 0); /* mov $0, r */
478 oad(0xb8 + REG_VALUE(r
), 1); /* mov $1, r */
481 /* This was a float compare. If the parity bit is
482 set the result was unordered, meaning false for everything
483 except TOK_NE, and true for TOK_NE. */
485 o(0x037a + (REX_BASE(r
) << 8));
487 orex(0,r
,0, 0x0f); /* setxx %br */
489 o(0xc0 + REG_VALUE(r
));
490 } else if (v
== VT_JMP
|| v
== VT_JMPI
) {
493 oad(0xb8 + REG_VALUE(r
), t
); /* mov $1, r */
494 o(0x05eb + (REX_BASE(r
) << 8)); /* jmp after */
497 oad(0xb8 + REG_VALUE(r
), t
^ 1); /* mov $0, r */
499 if ((r
>= TREG_XMM0
) && (r
<= TREG_XMM7
)) {
501 /* gen_cvt_ftof(VT_DOUBLE); */
502 o(0xf0245cdd); /* fstpl -0x10(%rsp) */
503 /* movsd -0x10(%rsp),%xmmN */
505 o(0x44 + REG_VALUE(r
)*8); /* %xmmN */
508 assert((v
>= TREG_XMM0
) && (v
<= TREG_XMM7
));
509 if ((ft
& VT_BTYPE
) == VT_FLOAT
) {
512 assert((ft
& VT_BTYPE
) == VT_DOUBLE
);
515 o(0xc0 + REG_VALUE(v
) + REG_VALUE(r
)*8);
517 } else if (r
== TREG_ST0
) {
518 assert((v
>= TREG_XMM0
) && (v
<= TREG_XMM7
));
519 /* gen_cvt_ftof(VT_LDOUBLE); */
520 /* movsd %xmmN,-0x10(%rsp) */
522 o(0x44 + REG_VALUE(r
)*8); /* %xmmN */
524 o(0xf02444dd); /* fldl -0x10(%rsp) */
527 o(0xc0 + REG_VALUE(r
) + REG_VALUE(v
) * 8); /* mov v, r */
533 /* store register 'r' in lvalue 'v' */
534 void store(int r
, SValue
*v
)
538 /* store the REX prefix in this variable when PIC is enabled */
543 v
= pe_getimport(v
, &v2
);
546 fr
= v
->r
& VT_VALMASK
;
549 if (fc
!= v
->c
.i
&& (fr
& VT_SYM
))
550 tcc_error("64 bit addend in store");
551 ft
&= ~(VT_VOLATILE
| VT_CONSTANT
);
554 #ifndef TCC_TARGET_PE
555 /* we need to access the variable via got */
556 if (fr
== VT_CONST
&& (v
->r
& VT_SYM
)) {
557 /* mov xx(%rip), %r11 */
559 gen_gotpcrel(TREG_R11
, v
->sym
, v
->c
.i
);
560 pic
= is64_type(bt
) ? 0x49 : 0x41;
564 /* XXX: incorrect if float reg to reg */
565 if (bt
== VT_FLOAT
) {
568 o(0x7e0f); /* movd */
570 } else if (bt
== VT_DOUBLE
) {
573 o(0xd60f); /* movq */
575 } else if (bt
== VT_LDOUBLE
) {
576 o(0xc0d9); /* fld %st(0) */
584 if (bt
== VT_BYTE
|| bt
== VT_BOOL
)
586 else if (is64_type(bt
))
592 /* xxx r, (%r11) where xxx is mov, movq, fld, or etc */
597 if (fr
== VT_CONST
|| fr
== VT_LOCAL
|| (v
->r
& VT_LVAL
)) {
598 gen_modrm64(op64
, r
, v
->r
, v
->sym
, fc
);
599 } else if (fr
!= r
) {
600 /* XXX: don't we really come here? */
602 o(0xc0 + fr
+ r
* 8); /* mov r, fr */
605 if (fr
== VT_CONST
|| fr
== VT_LOCAL
|| (v
->r
& VT_LVAL
)) {
606 gen_modrm(r
, v
->r
, v
->sym
, fc
);
607 } else if (fr
!= r
) {
608 /* XXX: don't we really come here? */
610 o(0xc0 + fr
+ r
* 8); /* mov r, fr */
615 /* 'is_jmp' is '1' if it is a jump */
616 static void gcall_or_jmp(int is_jmp
)
619 if ((vtop
->r
& (VT_VALMASK
| VT_LVAL
)) == VT_CONST
&&
620 ((vtop
->r
& VT_SYM
) && (vtop
->c
.i
-4) == (int)(vtop
->c
.i
-4))) {
621 /* constant symbolic case -> simple relocation */
623 greloca(cur_text_section
, vtop
->sym
, ind
+ 1, R_X86_64_PC32
, (int)(vtop
->c
.i
-4));
625 greloca(cur_text_section
, vtop
->sym
, ind
+ 1, R_X86_64_PLT32
, (int)(vtop
->c
.i
-4));
627 oad(0xe8 + is_jmp
, 0); /* call/jmp im */
629 /* otherwise, indirect call */
633 o(0xff); /* call/jmp *r */
634 o(0xd0 + REG_VALUE(r
) + (is_jmp
<< 4));
638 #if defined(CONFIG_TCC_BCHECK)
639 #ifndef TCC_TARGET_PE
640 static addr_t func_bound_offset
;
641 static unsigned long func_bound_ind
;
644 static void gen_static_call(int v
)
646 Sym
*sym
= external_global_sym(v
, &func_old_type
);
648 greloca(cur_text_section
, sym
, ind
-4, R_X86_64_PC32
, -4);
651 /* generate a bounded pointer addition */
652 ST_FUNC
void gen_bounded_ptr_add(void)
654 /* save all temporary registers */
657 /* prepare fast x86_64 function call */
659 o(0xc68948); // mov %rax,%rsi ## second arg in %rsi, this must be size
663 o(0xc78948); // mov %rax,%rdi ## first arg in %rdi, this must be ptr
666 /* do a fast function call */
667 gen_static_call(TOK___bound_ptr_add
);
669 /* returned pointer is in rax */
671 vtop
->r
= TREG_RAX
| VT_BOUNDED
;
674 /* relocation offset of the bounding function call point */
675 vtop
->c
.i
= (cur_text_section
->reloc
->data_offset
- sizeof(ElfW(Rela
)));
678 /* patch pointer addition in vtop so that pointer dereferencing is
680 ST_FUNC
void gen_bounded_ptr_deref(void)
688 /* XXX: put that code in generic part of tcc */
689 if (!is_float(vtop
->type
.t
)) {
690 if (vtop
->r
& VT_LVAL_BYTE
)
692 else if (vtop
->r
& VT_LVAL_SHORT
)
696 size
= type_size(&vtop
->type
, &align
);
698 case 1: func
= TOK___bound_ptr_indir1
; break;
699 case 2: func
= TOK___bound_ptr_indir2
; break;
700 case 4: func
= TOK___bound_ptr_indir4
; break;
701 case 8: func
= TOK___bound_ptr_indir8
; break;
702 case 12: func
= TOK___bound_ptr_indir12
; break;
703 case 16: func
= TOK___bound_ptr_indir16
; break;
705 tcc_error("unhandled size when dereferencing bounded pointer");
710 sym
= external_global_sym(func
, &func_old_type
);
712 put_extern_sym(sym
, NULL
, 0, 0);
714 /* patch relocation */
715 /* XXX: find a better solution ? */
717 rel
= (ElfW(Rela
) *)(cur_text_section
->reloc
->data
+ vtop
->c
.i
);
718 rel
->r_info
= ELF64_R_INFO(sym
->c
, ELF64_R_TYPE(rel
->r_info
));
725 static const uint8_t arg_regs
[REGN
] = {
726 TREG_RCX
, TREG_RDX
, TREG_R8
, TREG_R9
729 /* Prepare arguments in R10 and R11 rather than RCX and RDX
730 because gv() will not ever use these */
731 static int arg_prepare_reg(int idx
) {
732 if (idx
== 0 || idx
== 1)
733 /* idx=0: r10, idx=1: r11 */
736 return arg_regs
[idx
];
739 static int func_scratch
, func_alloca
;
741 /* Generate function call. The function address is pushed first, then
742 all the parameters in call order. This functions pops all the
743 parameters and the function address. */
745 static void gen_offs_sp(int b
, int r
, int d
)
747 orex(1,0,r
& 0x100 ? 0 : r
, b
);
749 o(0x2444 | (REG_VALUE(r
) << 3));
752 o(0x2484 | (REG_VALUE(r
) << 3));
757 static int using_regs(int size
)
759 return !(size
> 8 || (size
& (size
- 1)));
762 /* Return the number of registers needed to return the struct, or 0 if
763 returning via struct pointer. */
764 ST_FUNC
int gfunc_sret(CType
*vt
, int variadic
, CType
*ret
, int *ret_align
, int *regsize
)
767 *ret_align
= 1; // Never have to re-align return values for x86-64
769 size
= type_size(vt
, &align
);
770 if (!using_regs(size
))
784 static int is_sse_float(int t
) {
787 return bt
== VT_DOUBLE
|| bt
== VT_FLOAT
;
790 static int gfunc_arg_size(CType
*type
) {
792 if (type
->t
& (VT_ARRAY
|VT_BITFIELD
))
794 return type_size(type
, &align
);
797 void gfunc_call(int nb_args
)
799 int size
, r
, args_size
, i
, d
, bt
, struct_size
;
802 args_size
= (nb_args
< REGN
? REGN
: nb_args
) * PTR_SIZE
;
805 /* for struct arguments, we need to call memcpy and the function
806 call breaks register passing arguments we are preparing.
807 So, we process arguments which will be passed by stack first. */
808 struct_size
= args_size
;
809 for(i
= 0; i
< nb_args
; i
++) {
814 bt
= (sv
->type
.t
& VT_BTYPE
);
815 size
= gfunc_arg_size(&sv
->type
);
817 if (using_regs(size
))
818 continue; /* arguments smaller than 8 bytes passed in registers or on stack */
820 if (bt
== VT_STRUCT
) {
821 /* align to stack align size */
822 size
= (size
+ 15) & ~15;
823 /* generate structure store */
825 gen_offs_sp(0x8d, r
, struct_size
);
828 /* generate memcpy call */
829 vset(&sv
->type
, r
| VT_LVAL
, 0);
833 } else if (bt
== VT_LDOUBLE
) {
835 gen_offs_sp(0xdb, 0x107, struct_size
);
840 if (func_scratch
< struct_size
)
841 func_scratch
= struct_size
;
844 struct_size
= args_size
;
846 for(i
= 0; i
< nb_args
; i
++) {
848 bt
= (vtop
->type
.t
& VT_BTYPE
);
850 size
= gfunc_arg_size(&vtop
->type
);
851 if (!using_regs(size
)) {
852 /* align to stack align size */
853 size
= (size
+ 15) & ~15;
856 gen_offs_sp(0x8d, d
, struct_size
);
857 gen_offs_sp(0x89, d
, arg
*8);
859 d
= arg_prepare_reg(arg
);
860 gen_offs_sp(0x8d, d
, struct_size
);
864 if (is_sse_float(vtop
->type
.t
)) {
865 if (tcc_state
->nosse
)
866 tcc_error("SSE disabled");
869 /* movq %xmm0, j*8(%rsp) */
870 gen_offs_sp(0xd60f66, 0x100, arg
*8);
872 /* Load directly to xmmN register */
874 d
= arg_prepare_reg(arg
);
875 /* mov %xmmN, %rxx */
878 o(0xc0 + arg
*8 + REG_VALUE(d
));
881 if (bt
== VT_STRUCT
) {
882 vtop
->type
.ref
= NULL
;
883 vtop
->type
.t
= size
> 4 ? VT_LLONG
: size
> 2 ? VT_INT
884 : size
> 1 ? VT_SHORT
: VT_BYTE
;
889 gen_offs_sp(0x89, r
, arg
*8);
891 d
= arg_prepare_reg(arg
);
892 orex(1,d
,r
,0x89); /* mov */
893 o(0xc0 + REG_VALUE(r
) * 8 + REG_VALUE(d
));
900 /* Copy R10 and R11 into RCX and RDX, respectively */
902 o(0xd1894c); /* mov %r10, %rcx */
904 o(0xda894c); /* mov %r11, %rdx */
910 if ((vtop
->r
& VT_SYM
) && vtop
->sym
->v
== TOK_alloca
) {
911 /* need to add the "func_scratch" area after alloca */
912 o(0x0548), gen_le32(func_alloca
), func_alloca
= ind
- 4;
915 /* other compilers don't clear the upper bits when returning char/short */
916 bt
= vtop
->type
.ref
->type
.t
& (VT_BTYPE
| VT_UNSIGNED
);
917 if (bt
== (VT_BYTE
| VT_UNSIGNED
) || (bt
& VT_TYPE
) == VT_BOOL
)
918 o(0xc0b60f); /* movzbl %al, %eax */
919 else if (bt
== VT_BYTE
)
920 o(0xc0be0f); /* movsbl %al, %eax */
921 else if (bt
== VT_SHORT
)
923 else if (bt
== (VT_SHORT
| VT_UNSIGNED
))
924 o(0xc0b70f); /* movzbl %al, %eax */
925 #if 0 /* handled in gen_cast() */
926 else if (bt
== VT_INT
)
927 o(0x9848); /* cltq */
928 else if (bt
== (VT_INT
| VT_UNSIGNED
))
929 o(0xc089); /* mov %eax,%eax */
935 #define FUNC_PROLOG_SIZE 11
937 /* generate function prolog of type 't' */
938 void gfunc_prolog(CType
*func_type
)
940 int addr
, reg_param_index
, bt
, size
;
950 ind
+= FUNC_PROLOG_SIZE
;
951 func_sub_sp_offset
= ind
;
954 sym
= func_type
->ref
;
956 /* if the function returns a structure, then add an
957 implicit pointer parameter */
959 func_var
= (sym
->f
.func_type
== FUNC_ELLIPSIS
);
960 size
= gfunc_arg_size(&func_vt
);
961 if (!using_regs(size
)) {
962 gen_modrm64(0x89, arg_regs
[reg_param_index
], VT_LOCAL
, NULL
, addr
);
968 /* define parameters */
969 while ((sym
= sym
->next
) != NULL
) {
971 bt
= type
->t
& VT_BTYPE
;
972 size
= gfunc_arg_size(type
);
973 if (!using_regs(size
)) {
974 if (reg_param_index
< REGN
) {
975 gen_modrm64(0x89, arg_regs
[reg_param_index
], VT_LOCAL
, NULL
, addr
);
977 sym_push(sym
->v
& ~SYM_FIELD
, type
,
978 VT_LLOCAL
| lvalue_type(type
->t
), addr
);
980 if (reg_param_index
< REGN
) {
981 /* save arguments passed by register */
982 if ((bt
== VT_FLOAT
) || (bt
== VT_DOUBLE
)) {
983 if (tcc_state
->nosse
)
984 tcc_error("SSE disabled");
985 o(0xd60f66); /* movq */
986 gen_modrm(reg_param_index
, VT_LOCAL
, NULL
, addr
);
988 gen_modrm64(0x89, arg_regs
[reg_param_index
], VT_LOCAL
, NULL
, addr
);
991 sym_push(sym
->v
& ~SYM_FIELD
, type
,
992 VT_LOCAL
| lvalue_type(type
->t
), addr
);
998 while (reg_param_index
< REGN
) {
999 if (func_type
->ref
->f
.func_type
== FUNC_ELLIPSIS
) {
1000 gen_modrm64(0x89, arg_regs
[reg_param_index
], VT_LOCAL
, NULL
, addr
);
1007 /* generate function epilog */
1008 void gfunc_epilog(void)
1012 o(0xc9); /* leave */
1013 if (func_ret_sub
== 0) {
1016 o(0xc2); /* ret n */
1018 g(func_ret_sub
>> 8);
1022 ind
= func_sub_sp_offset
- FUNC_PROLOG_SIZE
;
1023 /* align local size to word & save local variables */
1024 func_scratch
= (func_scratch
+ 15) & -16;
1025 v
= (func_scratch
+ -loc
+ 15) & -16;
1028 Sym
*sym
= external_global_sym(TOK___chkstk
, &func_old_type
);
1029 oad(0xb8, v
); /* mov stacksize, %eax */
1030 oad(0xe8, 0); /* call __chkstk, (does the stackframe too) */
1031 greloca(cur_text_section
, sym
, ind
-4, R_X86_64_PC32
, -4);
1032 o(0x90); /* fill for FUNC_PROLOG_SIZE = 11 bytes */
1034 o(0xe5894855); /* push %rbp, mov %rsp, %rbp */
1035 o(0xec8148); /* sub rsp, stacksize */
1039 /* add the "func_scratch" area after each alloca seen */
1040 while (func_alloca
) {
1041 unsigned char *ptr
= cur_text_section
->data
+ func_alloca
;
1042 func_alloca
= read32le(ptr
);
1043 write32le(ptr
, func_scratch
);
1046 cur_text_section
->data_offset
= saved_ind
;
1047 pe_add_unwind_data(ind
, saved_ind
, v
);
1048 ind
= cur_text_section
->data_offset
;
1053 static void gadd_sp(int val
)
1055 if (val
== (char)val
) {
1059 oad(0xc48148, val
); /* add $xxx, %rsp */
1063 typedef enum X86_64_Mode
{
1066 x86_64_mode_integer
,
1071 static X86_64_Mode
classify_x86_64_merge(X86_64_Mode a
, X86_64_Mode b
)
1075 else if (a
== x86_64_mode_none
)
1077 else if (b
== x86_64_mode_none
)
1079 else if ((a
== x86_64_mode_memory
) || (b
== x86_64_mode_memory
))
1080 return x86_64_mode_memory
;
1081 else if ((a
== x86_64_mode_integer
) || (b
== x86_64_mode_integer
))
1082 return x86_64_mode_integer
;
1083 else if ((a
== x86_64_mode_x87
) || (b
== x86_64_mode_x87
))
1084 return x86_64_mode_memory
;
1086 return x86_64_mode_sse
;
1089 static X86_64_Mode
classify_x86_64_inner(CType
*ty
)
1094 switch (ty
->t
& VT_BTYPE
) {
1095 case VT_VOID
: return x86_64_mode_none
;
1104 return x86_64_mode_integer
;
1107 case VT_DOUBLE
: return x86_64_mode_sse
;
1109 case VT_LDOUBLE
: return x86_64_mode_x87
;
1114 mode
= x86_64_mode_none
;
1115 for (f
= f
->next
; f
; f
= f
->next
)
1116 mode
= classify_x86_64_merge(mode
, classify_x86_64_inner(&f
->type
));
1124 static X86_64_Mode
classify_x86_64_arg(CType
*ty
, CType
*ret
, int *psize
, int *palign
, int *reg_count
)
1127 int size
, align
, ret_t
= 0;
1129 if (ty
->t
& (VT_BITFIELD
|VT_ARRAY
)) {
1134 mode
= x86_64_mode_integer
;
1136 size
= type_size(ty
, &align
);
1137 *psize
= (size
+ 7) & ~7;
1138 *palign
= (align
+ 7) & ~7;
1141 mode
= x86_64_mode_memory
;
1143 mode
= classify_x86_64_inner(ty
);
1145 case x86_64_mode_integer
:
1151 ret_t
= (size
> 4) ? VT_LLONG
: VT_INT
;
1155 case x86_64_mode_x87
:
1160 case x86_64_mode_sse
:
1166 ret_t
= (size
> 4) ? VT_DOUBLE
: VT_FLOAT
;
1169 default: break; /* nothing to be done for x86_64_mode_memory and x86_64_mode_none*/
1182 ST_FUNC
int classify_x86_64_va_arg(CType
*ty
)
1184 /* This definition must be synced with stdarg.h */
1185 enum __va_arg_type
{
1186 __va_gen_reg
, __va_float_reg
, __va_stack
1188 int size
, align
, reg_count
;
1189 X86_64_Mode mode
= classify_x86_64_arg(ty
, NULL
, &size
, &align
, ®_count
);
1191 default: return __va_stack
;
1192 case x86_64_mode_integer
: return __va_gen_reg
;
1193 case x86_64_mode_sse
: return __va_float_reg
;
1197 /* Return the number of registers needed to return the struct, or 0 if
1198 returning via struct pointer. */
1199 ST_FUNC
int gfunc_sret(CType
*vt
, int variadic
, CType
*ret
, int *ret_align
, int *regsize
)
1201 int size
, align
, reg_count
;
1202 *ret_align
= 1; // Never have to re-align return values for x86-64
1204 return (classify_x86_64_arg(vt
, ret
, &size
, &align
, ®_count
) != x86_64_mode_memory
);
1208 static const uint8_t arg_regs
[REGN
] = {
1209 TREG_RDI
, TREG_RSI
, TREG_RDX
, TREG_RCX
, TREG_R8
, TREG_R9
1212 static int arg_prepare_reg(int idx
) {
1213 if (idx
== 2 || idx
== 3)
1214 /* idx=2: r10, idx=3: r11 */
1217 return arg_regs
[idx
];
1220 /* Generate function call. The function address is pushed first, then
1221 all the parameters in call order. This functions pops all the
1222 parameters and the function address. */
1223 void gfunc_call(int nb_args
)
1227 int size
, align
, r
, args_size
, stack_adjust
, i
, reg_count
, bt
;
1228 int nb_reg_args
= 0;
1229 int nb_sse_args
= 0;
1230 int sse_reg
, gen_reg
;
1231 char _onstack
[nb_args
? nb_args
: 1], *onstack
= _onstack
;
1233 /* calculate the number of integer/float register arguments, remember
1234 arguments to be passed via stack (in onstack[]), and also remember
1235 if we have to align the stack pointer to 16 (onstack[i] == 2). Needs
1236 to be done in a left-to-right pass over arguments. */
1238 for(i
= nb_args
- 1; i
>= 0; i
--) {
1239 mode
= classify_x86_64_arg(&vtop
[-i
].type
, NULL
, &size
, &align
, ®_count
);
1240 if (mode
== x86_64_mode_sse
&& nb_sse_args
+ reg_count
<= 8) {
1241 nb_sse_args
+= reg_count
;
1243 } else if (mode
== x86_64_mode_integer
&& nb_reg_args
+ reg_count
<= REGN
) {
1244 nb_reg_args
+= reg_count
;
1246 } else if (mode
== x86_64_mode_none
) {
1249 if (align
== 16 && (stack_adjust
&= 15)) {
1254 stack_adjust
+= size
;
1258 if (nb_sse_args
&& tcc_state
->nosse
)
1259 tcc_error("SSE disabled but floating point arguments passed");
1261 /* fetch cpu flag before generating any code */
1262 if (vtop
>= vstack
&& (vtop
->r
& VT_VALMASK
) == VT_CMP
)
1265 /* for struct arguments, we need to call memcpy and the function
1266 call breaks register passing arguments we are preparing.
1267 So, we process arguments which will be passed by stack first. */
1268 gen_reg
= nb_reg_args
;
1269 sse_reg
= nb_sse_args
;
1272 for (i
= 0; i
< nb_args
;) {
1273 mode
= classify_x86_64_arg(&vtop
[-i
].type
, NULL
, &size
, &align
, ®_count
);
1278 /* Possibly adjust stack to align SSE boundary. We're processing
1279 args from right to left while allocating happens left to right
1280 (stack grows down), so the adjustment needs to happen _after_
1281 an argument that requires it. */
1283 o(0x50); /* push %rax; aka sub $8,%rsp */
1287 if (onstack
[i
] == 2)
1292 switch (vtop
->type
.t
& VT_BTYPE
) {
1294 /* allocate the necessary size on stack */
1296 oad(0xec81, size
); /* sub $xxx, %rsp */
1297 /* generate structure store */
1298 r
= get_reg(RC_INT
);
1299 orex(1, r
, 0, 0x89); /* mov %rsp, r */
1300 o(0xe0 + REG_VALUE(r
));
1301 vset(&vtop
->type
, r
| VT_LVAL
, 0);
1308 oad(0xec8148, size
); /* sub $xxx, %rsp */
1309 o(0x7cdb); /* fstpt 0(%rsp) */
1316 assert(mode
== x86_64_mode_sse
);
1318 o(0x50); /* push $rax */
1319 /* movq %xmmN, (%rsp) */
1321 o(0x04 + REG_VALUE(r
)*8);
1326 assert(mode
== x86_64_mode_integer
);
1328 /* XXX: implicit cast ? */
1330 orex(0,r
,0,0x50 + REG_VALUE(r
)); /* push r */
1340 /* XXX This should be superfluous. */
1341 save_regs(0); /* save used temporary registers */
1343 /* then, we prepare register passing arguments.
1344 Note that we cannot set RDX and RCX in this loop because gv()
1345 may break these temporary registers. Let's use R10 and R11
1347 assert(gen_reg
<= REGN
);
1348 assert(sse_reg
<= 8);
1349 for(i
= 0; i
< nb_args
; i
++) {
1350 mode
= classify_x86_64_arg(&vtop
->type
, &type
, &size
, &align
, ®_count
);
1351 /* Alter stack entry type so that gv() knows how to treat it */
1353 if (mode
== x86_64_mode_sse
) {
1354 if (reg_count
== 2) {
1356 gv(RC_FRET
); /* Use pair load into xmm0 & xmm1 */
1357 if (sse_reg
) { /* avoid redundant movaps %xmm0, %xmm0 */
1358 /* movaps %xmm0, %xmmN */
1360 o(0xc0 + (sse_reg
<< 3));
1361 /* movaps %xmm1, %xmmN */
1363 o(0xc1 + ((sse_reg
+1) << 3));
1366 assert(reg_count
== 1);
1368 /* Load directly to register */
1369 gv(RC_XMM0
<< sse_reg
);
1371 } else if (mode
== x86_64_mode_integer
) {
1373 /* XXX: implicit cast ? */
1375 gen_reg
-= reg_count
;
1377 d
= arg_prepare_reg(gen_reg
);
1378 orex(1,d
,r
,0x89); /* mov */
1379 o(0xc0 + REG_VALUE(r
) * 8 + REG_VALUE(d
));
1380 if (reg_count
== 2) {
1381 d
= arg_prepare_reg(gen_reg
+1);
1382 orex(1,d
,vtop
->r2
,0x89); /* mov */
1383 o(0xc0 + REG_VALUE(vtop
->r2
) * 8 + REG_VALUE(d
));
1388 assert(gen_reg
== 0);
1389 assert(sse_reg
== 0);
1391 /* We shouldn't have many operands on the stack anymore, but the
1392 call address itself is still there, and it might be in %eax
1393 (or edx/ecx) currently, which the below writes would clobber.
1394 So evict all remaining operands here. */
1397 /* Copy R10 and R11 into RDX and RCX, respectively */
1398 if (nb_reg_args
> 2) {
1399 o(0xd2894c); /* mov %r10, %rdx */
1400 if (nb_reg_args
> 3) {
1401 o(0xd9894c); /* mov %r11, %rcx */
1405 if (vtop
->type
.ref
->f
.func_type
!= FUNC_NEW
) /* implies FUNC_OLD or FUNC_ELLIPSIS */
1406 oad(0xb8, nb_sse_args
< 8 ? nb_sse_args
: 8); /* mov nb_sse_args, %eax */
1410 /* other compilers don't clear the upper bits when returning char/short,
1411 TCC does so for convenience. When we'd stay purely within TCC compiled
1412 code we wouldn't need this, but for compatibility we have to extend.
1413 Ideally TCC wouldn't extend at return statements to not do double
1414 extensions, or would understand sub-int types during expression
1416 bt
= vtop
->type
.ref
->type
.t
& (VT_BTYPE
| VT_UNSIGNED
);
1417 if (bt
== (VT_BYTE
| VT_UNSIGNED
) || (bt
& VT_TYPE
) == VT_BOOL
)
1418 o(0xc0b60f); /* movzbl %al, %eax */
1419 else if (bt
== VT_BYTE
)
1420 o(0xc0be0f); /* movsbl %al, %eax */
1421 else if (bt
== VT_SHORT
)
1423 else if (bt
== (VT_SHORT
| VT_UNSIGNED
))
1424 o(0xc0b70f); /* movzwl %al, %eax */
1429 #define FUNC_PROLOG_SIZE 11
1431 static void push_arg_reg(int i
) {
1433 gen_modrm64(0x89, arg_regs
[i
], VT_LOCAL
, NULL
, loc
);
1436 /* generate function prolog of type 't' */
1437 void gfunc_prolog(CType
*func_type
)
1440 int i
, addr
, align
, size
, reg_count
;
1441 int param_addr
= 0, reg_param_index
, sse_param_index
;
1445 sym
= func_type
->ref
;
1446 addr
= PTR_SIZE
* 2;
1448 ind
+= FUNC_PROLOG_SIZE
;
1449 func_sub_sp_offset
= ind
;
1452 if (sym
->f
.func_type
== FUNC_ELLIPSIS
) {
1453 int seen_reg_num
, seen_sse_num
, seen_stack_size
;
1454 seen_reg_num
= seen_sse_num
= 0;
1455 /* frame pointer and return address */
1456 seen_stack_size
= PTR_SIZE
* 2;
1457 /* count the number of seen parameters */
1458 sym
= func_type
->ref
;
1459 while ((sym
= sym
->next
) != NULL
) {
1461 mode
= classify_x86_64_arg(type
, NULL
, &size
, &align
, ®_count
);
1465 seen_stack_size
= ((seen_stack_size
+ align
- 1) & -align
) + size
;
1468 case x86_64_mode_integer
:
1469 if (seen_reg_num
+ reg_count
> REGN
)
1471 seen_reg_num
+= reg_count
;
1474 case x86_64_mode_sse
:
1475 if (seen_sse_num
+ reg_count
> 8)
1477 seen_sse_num
+= reg_count
;
1483 /* movl $0x????????, -0x10(%rbp) */
1485 gen_le32(seen_reg_num
* 8);
1486 /* movl $0x????????, -0xc(%rbp) */
1488 gen_le32(seen_sse_num
* 16 + 48);
1489 /* movl $0x????????, -0x8(%rbp) */
1491 gen_le32(seen_stack_size
);
1493 /* save all register passing arguments */
1494 for (i
= 0; i
< 8; i
++) {
1496 if (!tcc_state
->nosse
) {
1497 o(0xd60f66); /* movq */
1498 gen_modrm(7 - i
, VT_LOCAL
, NULL
, loc
);
1500 /* movq $0, loc+8(%rbp) */
1505 for (i
= 0; i
< REGN
; i
++) {
1506 push_arg_reg(REGN
-1-i
);
1510 sym
= func_type
->ref
;
1511 reg_param_index
= 0;
1512 sse_param_index
= 0;
1514 /* if the function returns a structure, then add an
1515 implicit pointer parameter */
1516 func_vt
= sym
->type
;
1517 mode
= classify_x86_64_arg(&func_vt
, NULL
, &size
, &align
, ®_count
);
1518 if (mode
== x86_64_mode_memory
) {
1519 push_arg_reg(reg_param_index
);
1523 /* define parameters */
1524 while ((sym
= sym
->next
) != NULL
) {
1526 mode
= classify_x86_64_arg(type
, NULL
, &size
, &align
, ®_count
);
1528 case x86_64_mode_sse
:
1529 if (tcc_state
->nosse
)
1530 tcc_error("SSE disabled but floating point arguments used");
1531 if (sse_param_index
+ reg_count
<= 8) {
1532 /* save arguments passed by register */
1533 loc
-= reg_count
* 8;
1535 for (i
= 0; i
< reg_count
; ++i
) {
1536 o(0xd60f66); /* movq */
1537 gen_modrm(sse_param_index
, VT_LOCAL
, NULL
, param_addr
+ i
*8);
1541 addr
= (addr
+ align
- 1) & -align
;
1547 case x86_64_mode_memory
:
1548 case x86_64_mode_x87
:
1549 addr
= (addr
+ align
- 1) & -align
;
1554 case x86_64_mode_integer
: {
1555 if (reg_param_index
+ reg_count
<= REGN
) {
1556 /* save arguments passed by register */
1557 loc
-= reg_count
* 8;
1559 for (i
= 0; i
< reg_count
; ++i
) {
1560 gen_modrm64(0x89, arg_regs
[reg_param_index
], VT_LOCAL
, NULL
, param_addr
+ i
*8);
1564 addr
= (addr
+ align
- 1) & -align
;
1570 default: break; /* nothing to be done for x86_64_mode_none */
1572 sym_push(sym
->v
& ~SYM_FIELD
, type
,
1573 VT_LOCAL
| lvalue_type(type
->t
), param_addr
);
1576 #ifdef CONFIG_TCC_BCHECK
1577 /* leave some room for bound checking code */
1578 if (tcc_state
->do_bounds_check
) {
1579 func_bound_offset
= lbounds_section
->data_offset
;
1580 func_bound_ind
= ind
;
1581 oad(0xb8, 0); /* lbound section pointer */
1582 o(0xc78948); /* mov %rax,%rdi ## first arg in %rdi, this must be ptr */
1583 oad(0xb8, 0); /* call to function */
1588 /* generate function epilog */
1589 void gfunc_epilog(void)
1593 #ifdef CONFIG_TCC_BCHECK
1594 if (tcc_state
->do_bounds_check
1595 && func_bound_offset
!= lbounds_section
->data_offset
)
1601 /* add end of table info */
1602 bounds_ptr
= section_ptr_add(lbounds_section
, sizeof(addr_t
));
1605 /* generate bound local allocation */
1606 sym_data
= get_sym_ref(&char_pointer_type
, lbounds_section
,
1607 func_bound_offset
, lbounds_section
->data_offset
);
1609 ind
= func_bound_ind
;
1610 greloca(cur_text_section
, sym_data
, ind
+ 1, R_X86_64_64
, 0);
1612 gen_static_call(TOK___bound_local_new
);
1615 /* generate bound check local freeing */
1616 o(0x5250); /* save returned value, if any */
1617 greloca(cur_text_section
, sym_data
, ind
+ 1, R_X86_64_64
, 0);
1618 oad(0xb8, 0); /* mov xxx, %rax */
1619 o(0xc78948); /* mov %rax,%rdi # first arg in %rdi, this must be ptr */
1620 gen_static_call(TOK___bound_local_delete
);
1621 o(0x585a); /* restore returned value, if any */
1624 o(0xc9); /* leave */
1625 if (func_ret_sub
== 0) {
1628 o(0xc2); /* ret n */
1630 g(func_ret_sub
>> 8);
1632 /* align local size to word & save local variables */
1633 v
= (-loc
+ 15) & -16;
1635 ind
= func_sub_sp_offset
- FUNC_PROLOG_SIZE
;
1636 o(0xe5894855); /* push %rbp, mov %rsp, %rbp */
1637 o(0xec8148); /* sub rsp, stacksize */
1644 ST_FUNC
void gen_fill_nops(int bytes
)
1650 /* generate a jump to a label */
1653 return gjmp2(0xe9, t
);
1656 /* generate a jump to a fixed address */
1657 void gjmp_addr(int a
)
1665 oad(0xe9, a
- ind
- 5);
1669 ST_FUNC
void gtst_addr(int inv
, int a
)
1671 int v
= vtop
->r
& VT_VALMASK
;
1673 inv
^= (vtop
--)->c
.i
;
1680 oad(inv
- 16, a
- 4);
1682 } else if ((v
& ~1) == VT_JMP
) {
1683 if ((v
& 1) != inv
) {
1695 /* generate a test. set 'inv' to invert test. Stack entry is popped */
1696 ST_FUNC
int gtst(int inv
, int t
)
1698 int v
= vtop
->r
& VT_VALMASK
;
1700 if (nocode_wanted
) {
1702 } else if (v
== VT_CMP
) {
1703 /* fast case : can jump directly since flags are set */
1704 if (vtop
->c
.i
& 0x100)
1706 /* This was a float compare. If the parity flag is set
1707 the result was unordered. For anything except != this
1708 means false and we don't jump (anding both conditions).
1709 For != this means true (oring both).
1710 Take care about inverting the test. We need to jump
1711 to our target if the result was unordered and test wasn't NE,
1712 otherwise if unordered we don't want to jump. */
1713 vtop
->c
.i
&= ~0x100;
1714 if (inv
== (vtop
->c
.i
== TOK_NE
))
1715 o(0x067a); /* jp +6 */
1719 t
= gjmp2(0x8a, t
); /* jp t */
1723 t
= gjmp2((vtop
->c
.i
- 16) ^ inv
, t
);
1724 } else if (v
== VT_JMP
|| v
== VT_JMPI
) {
1725 /* && or || optimization */
1726 if ((v
& 1) == inv
) {
1727 /* insert vtop->c jump list in t */
1728 uint32_t n1
, n
= vtop
->c
.i
;
1730 while ((n1
= read32le(cur_text_section
->data
+ n
)))
1732 write32le(cur_text_section
->data
+ n
, t
);
1744 /* generate an integer binary operation */
1745 void gen_opi(int op
)
1750 ll
= is64_type(vtop
[-1].type
.t
);
1751 uu
= (vtop
[-1].type
.t
& VT_UNSIGNED
) != 0;
1752 cc
= (vtop
->r
& (VT_VALMASK
| VT_LVAL
| VT_SYM
)) == VT_CONST
;
1756 case TOK_ADDC1
: /* add with carry generation */
1759 if (cc
&& (!ll
|| (int)vtop
->c
.i
== vtop
->c
.i
)) {
1766 /* XXX: generate inc and dec for smaller code ? */
1767 orex(ll
, r
, 0, 0x83);
1768 o(0xc0 | (opc
<< 3) | REG_VALUE(r
));
1771 orex(ll
, r
, 0, 0x81);
1772 oad(0xc0 | (opc
<< 3) | REG_VALUE(r
), c
);
1775 gv2(RC_INT
, RC_INT
);
1778 orex(ll
, r
, fr
, (opc
<< 3) | 0x01);
1779 o(0xc0 + REG_VALUE(r
) + REG_VALUE(fr
) * 8);
1782 if (op
>= TOK_ULT
&& op
<= TOK_GT
) {
1788 case TOK_SUBC1
: /* sub with carry generation */
1791 case TOK_ADDC2
: /* add with carry use */
1794 case TOK_SUBC2
: /* sub with carry use */
1807 gv2(RC_INT
, RC_INT
);
1810 orex(ll
, fr
, r
, 0xaf0f); /* imul fr, r */
1811 o(0xc0 + REG_VALUE(fr
) + REG_VALUE(r
) * 8);
1823 opc
= 0xc0 | (opc
<< 3);
1829 orex(ll
, r
, 0, 0xc1); /* shl/shr/sar $xxx, r */
1830 o(opc
| REG_VALUE(r
));
1831 g(vtop
->c
.i
& (ll
? 63 : 31));
1833 /* we generate the shift in ecx */
1834 gv2(RC_INT
, RC_RCX
);
1836 orex(ll
, r
, 0, 0xd3); /* shl/shr/sar %cl, r */
1837 o(opc
| REG_VALUE(r
));
1850 /* first operand must be in eax */
1851 /* XXX: need better constraint for second operand */
1852 gv2(RC_RAX
, RC_RCX
);
1857 orex(ll
, 0, 0, uu
? 0xd231 : 0x99); /* xor %edx,%edx : cqto */
1858 orex(ll
, fr
, 0, 0xf7); /* div fr, %eax */
1859 o((uu
? 0xf0 : 0xf8) + REG_VALUE(fr
));
1860 if (op
== '%' || op
== TOK_UMOD
)
1872 void gen_opl(int op
)
1877 /* generate a floating point operation 'v = t1 op t2' instruction. The
1878 two operands are guaranteed to have the same floating point type */
1879 /* XXX: need to use ST1 too */
1880 void gen_opf(int op
)
1882 int a
, ft
, fc
, swapped
, r
;
1884 (vtop
->type
.t
& VT_BTYPE
) == VT_LDOUBLE
? RC_ST0
: RC_FLOAT
;
1886 /* convert constants to memory references */
1887 if ((vtop
[-1].r
& (VT_VALMASK
| VT_LVAL
)) == VT_CONST
) {
1892 if ((vtop
[0].r
& (VT_VALMASK
| VT_LVAL
)) == VT_CONST
)
1895 /* must put at least one value in the floating point register */
1896 if ((vtop
[-1].r
& VT_LVAL
) &&
1897 (vtop
[0].r
& VT_LVAL
)) {
1903 /* swap the stack if needed so that t1 is the register and t2 is
1904 the memory reference */
1905 if (vtop
[-1].r
& VT_LVAL
) {
1909 if ((vtop
->type
.t
& VT_BTYPE
) == VT_LDOUBLE
) {
1910 if (op
>= TOK_ULT
&& op
<= TOK_GT
) {
1911 /* load on stack second operand */
1912 load(TREG_ST0
, vtop
);
1913 save_reg(TREG_RAX
); /* eax is used by FP comparison code */
1914 if (op
== TOK_GE
|| op
== TOK_GT
)
1916 else if (op
== TOK_EQ
|| op
== TOK_NE
)
1919 o(0xc9d9); /* fxch %st(1) */
1920 if (op
== TOK_EQ
|| op
== TOK_NE
)
1921 o(0xe9da); /* fucompp */
1923 o(0xd9de); /* fcompp */
1924 o(0xe0df); /* fnstsw %ax */
1926 o(0x45e480); /* and $0x45, %ah */
1927 o(0x40fC80); /* cmp $0x40, %ah */
1928 } else if (op
== TOK_NE
) {
1929 o(0x45e480); /* and $0x45, %ah */
1930 o(0x40f480); /* xor $0x40, %ah */
1932 } else if (op
== TOK_GE
|| op
== TOK_LE
) {
1933 o(0x05c4f6); /* test $0x05, %ah */
1936 o(0x45c4f6); /* test $0x45, %ah */
1943 /* no memory reference possible for long double operations */
1944 load(TREG_ST0
, vtop
);
1968 o(0xde); /* fxxxp %st, %st(1) */
1973 if (op
>= TOK_ULT
&& op
<= TOK_GT
) {
1974 /* if saved lvalue, then we must reload it */
1977 if ((r
& VT_VALMASK
) == VT_LLOCAL
) {
1979 r
= get_reg(RC_INT
);
1981 v1
.r
= VT_LOCAL
| VT_LVAL
;
1987 if (op
== TOK_EQ
|| op
== TOK_NE
) {
1990 if (op
== TOK_LE
|| op
== TOK_LT
)
1992 if (op
== TOK_LE
|| op
== TOK_GE
) {
1993 op
= 0x93; /* setae */
1995 op
= 0x97; /* seta */
2003 assert(!(vtop
[-1].r
& VT_LVAL
));
2005 if ((vtop
->type
.t
& VT_BTYPE
) == VT_DOUBLE
)
2007 if (op
== TOK_EQ
|| op
== TOK_NE
)
2008 o(0x2e0f); /* ucomisd */
2010 o(0x2f0f); /* comisd */
2012 if (vtop
->r
& VT_LVAL
) {
2013 gen_modrm(vtop
[-1].r
, r
, vtop
->sym
, fc
);
2015 o(0xc0 + REG_VALUE(vtop
[0].r
) + REG_VALUE(vtop
[-1].r
)*8);
2020 vtop
->c
.i
= op
| 0x100;
2022 assert((vtop
->type
.t
& VT_BTYPE
) != VT_LDOUBLE
);
2040 assert((ft
& VT_BTYPE
) != VT_LDOUBLE
);
2043 /* if saved lvalue, then we must reload it */
2044 if ((vtop
->r
& VT_VALMASK
) == VT_LLOCAL
) {
2046 r
= get_reg(RC_INT
);
2048 v1
.r
= VT_LOCAL
| VT_LVAL
;
2054 assert(!(vtop
[-1].r
& VT_LVAL
));
2056 assert(vtop
->r
& VT_LVAL
);
2061 if ((ft
& VT_BTYPE
) == VT_DOUBLE
) {
2069 if (vtop
->r
& VT_LVAL
) {
2070 gen_modrm(vtop
[-1].r
, r
, vtop
->sym
, fc
);
2072 o(0xc0 + REG_VALUE(vtop
[0].r
) + REG_VALUE(vtop
[-1].r
)*8);
2080 /* convert integers to fp 't' type. Must handle 'int', 'unsigned int'
2081 and 'long long' cases. */
2082 void gen_cvt_itof(int t
)
2084 if ((t
& VT_BTYPE
) == VT_LDOUBLE
) {
2087 if ((vtop
->type
.t
& VT_BTYPE
) == VT_LLONG
) {
2088 /* signed long long to float/double/long double (unsigned case
2089 is handled generically) */
2090 o(0x50 + (vtop
->r
& VT_VALMASK
)); /* push r */
2091 o(0x242cdf); /* fildll (%rsp) */
2092 o(0x08c48348); /* add $8, %rsp */
2093 } else if ((vtop
->type
.t
& (VT_BTYPE
| VT_UNSIGNED
)) ==
2094 (VT_INT
| VT_UNSIGNED
)) {
2095 /* unsigned int to float/double/long double */
2096 o(0x6a); /* push $0 */
2098 o(0x50 + (vtop
->r
& VT_VALMASK
)); /* push r */
2099 o(0x242cdf); /* fildll (%rsp) */
2100 o(0x10c48348); /* add $16, %rsp */
2102 /* int to float/double/long double */
2103 o(0x50 + (vtop
->r
& VT_VALMASK
)); /* push r */
2104 o(0x2404db); /* fildl (%rsp) */
2105 o(0x08c48348); /* add $8, %rsp */
2109 int r
= get_reg(RC_FLOAT
);
2111 o(0xf2 + ((t
& VT_BTYPE
) == VT_FLOAT
?1:0));
2112 if ((vtop
->type
.t
& (VT_BTYPE
| VT_UNSIGNED
)) ==
2113 (VT_INT
| VT_UNSIGNED
) ||
2114 (vtop
->type
.t
& VT_BTYPE
) == VT_LLONG
) {
2118 o(0xc0 + (vtop
->r
& VT_VALMASK
) + REG_VALUE(r
)*8); /* cvtsi2sd */
2123 /* convert from one floating point type to another */
2124 void gen_cvt_ftof(int t
)
2132 if (bt
== VT_FLOAT
) {
2134 if (tbt
== VT_DOUBLE
) {
2135 o(0x140f); /* unpcklps */
2136 o(0xc0 + REG_VALUE(vtop
->r
)*9);
2137 o(0x5a0f); /* cvtps2pd */
2138 o(0xc0 + REG_VALUE(vtop
->r
)*9);
2139 } else if (tbt
== VT_LDOUBLE
) {
2141 /* movss %xmm0,-0x10(%rsp) */
2143 o(0x44 + REG_VALUE(vtop
->r
)*8);
2145 o(0xf02444d9); /* flds -0x10(%rsp) */
2148 } else if (bt
== VT_DOUBLE
) {
2150 if (tbt
== VT_FLOAT
) {
2151 o(0x140f66); /* unpcklpd */
2152 o(0xc0 + REG_VALUE(vtop
->r
)*9);
2153 o(0x5a0f66); /* cvtpd2ps */
2154 o(0xc0 + REG_VALUE(vtop
->r
)*9);
2155 } else if (tbt
== VT_LDOUBLE
) {
2157 /* movsd %xmm0,-0x10(%rsp) */
2159 o(0x44 + REG_VALUE(vtop
->r
)*8);
2161 o(0xf02444dd); /* fldl -0x10(%rsp) */
2167 r
= get_reg(RC_FLOAT
);
2168 if (tbt
== VT_DOUBLE
) {
2169 o(0xf0245cdd); /* fstpl -0x10(%rsp) */
2170 /* movsd -0x10(%rsp),%xmm0 */
2172 o(0x44 + REG_VALUE(r
)*8);
2175 } else if (tbt
== VT_FLOAT
) {
2176 o(0xf0245cd9); /* fstps -0x10(%rsp) */
2177 /* movss -0x10(%rsp),%xmm0 */
2179 o(0x44 + REG_VALUE(r
)*8);
2186 /* convert fp to int 't' type */
2187 void gen_cvt_ftoi(int t
)
2189 int ft
, bt
, size
, r
;
2192 if (bt
== VT_LDOUBLE
) {
2193 gen_cvt_ftof(VT_DOUBLE
);
2203 r
= get_reg(RC_INT
);
2204 if (bt
== VT_FLOAT
) {
2206 } else if (bt
== VT_DOUBLE
) {
2211 orex(size
== 8, r
, 0, 0x2c0f); /* cvttss2si or cvttsd2si */
2212 o(0xc0 + REG_VALUE(vtop
->r
) + REG_VALUE(r
)*8);
2216 /* computed goto support */
2223 /* Save the stack pointer onto the stack and return the location of its address */
2224 ST_FUNC
void gen_vla_sp_save(int addr
) {
2225 /* mov %rsp,addr(%rbp)*/
2226 gen_modrm64(0x89, TREG_RSP
, VT_LOCAL
, NULL
, addr
);
2229 /* Restore the SP from a location on the stack */
2230 ST_FUNC
void gen_vla_sp_restore(int addr
) {
2231 gen_modrm64(0x8b, TREG_RSP
, VT_LOCAL
, NULL
, addr
);
2234 #ifdef TCC_TARGET_PE
2235 /* Save result of gen_vla_alloc onto the stack */
2236 ST_FUNC
void gen_vla_result(int addr
) {
2237 /* mov %rax,addr(%rbp)*/
2238 gen_modrm64(0x89, TREG_RAX
, VT_LOCAL
, NULL
, addr
);
2242 /* Subtract from the stack pointer, and push the resulting value onto the stack */
2243 ST_FUNC
void gen_vla_alloc(CType
*type
, int align
) {
2244 #ifdef TCC_TARGET_PE
2245 /* alloca does more than just adjust %rsp on Windows */
2246 vpush_global_sym(&func_old_type
, TOK_alloca
);
2247 vswap(); /* Move alloca ref past allocation size */
2251 r
= gv(RC_INT
); /* allocation size */
2254 o(0xe0 | REG_VALUE(r
));
2255 /* We align to 16 bytes rather than align */
2263 /* end of x86-64 code generator */
2264 /*************************************************************/
2265 #endif /* ! TARGET_DEFS_ONLY */
2266 /******************************************************/