tccpp: cleanup #include_next
[tinycc.git] / x86_64-gen.c
blob4ac1e93cc35f596d2f4582bbba701cfe4797c451
1 /*
2 * x86-64 code generator for TCC
4 * Copyright (c) 2008 Shinichiro Hamaji
6 * Based on i386-gen.c by Fabrice Bellard
8 * This library is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU Lesser General Public
10 * License as published by the Free Software Foundation; either
11 * version 2 of the License, or (at your option) any later version.
13 * This library is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * Lesser General Public License for more details.
18 * You should have received a copy of the GNU Lesser General Public
19 * License along with this library; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 #ifdef TARGET_DEFS_ONLY
25 /* number of available registers */
26 #define NB_REGS 25
27 #define NB_ASM_REGS 8
29 /* a register can belong to several classes. The classes must be
30 sorted from more general to more precise (see gv2() code which does
31 assumptions on it). */
32 #define RC_INT 0x0001 /* generic integer register */
33 #define RC_FLOAT 0x0002 /* generic float register */
34 #define RC_RAX 0x0004
35 #define RC_RCX 0x0008
36 #define RC_RDX 0x0010
37 #define RC_ST0 0x0080 /* only for long double */
38 #define RC_R8 0x0100
39 #define RC_R9 0x0200
40 #define RC_R10 0x0400
41 #define RC_R11 0x0800
42 #define RC_XMM0 0x1000
43 #define RC_XMM1 0x2000
44 #define RC_XMM2 0x4000
45 #define RC_XMM3 0x8000
46 #define RC_XMM4 0x10000
47 #define RC_XMM5 0x20000
48 #define RC_XMM6 0x40000
49 #define RC_XMM7 0x80000
50 #define RC_IRET RC_RAX /* function return: integer register */
51 #define RC_LRET RC_RDX /* function return: second integer register */
52 #define RC_FRET RC_XMM0 /* function return: float register */
53 #define RC_QRET RC_XMM1 /* function return: second float register */
55 /* pretty names for the registers */
56 enum {
57 TREG_RAX = 0,
58 TREG_RCX = 1,
59 TREG_RDX = 2,
60 TREG_RSP = 4,
61 TREG_RSI = 6,
62 TREG_RDI = 7,
64 TREG_R8 = 8,
65 TREG_R9 = 9,
66 TREG_R10 = 10,
67 TREG_R11 = 11,
69 TREG_XMM0 = 16,
70 TREG_XMM1 = 17,
71 TREG_XMM2 = 18,
72 TREG_XMM3 = 19,
73 TREG_XMM4 = 20,
74 TREG_XMM5 = 21,
75 TREG_XMM6 = 22,
76 TREG_XMM7 = 23,
78 TREG_ST0 = 24,
80 TREG_MEM = 0x20
83 #define REX_BASE(reg) (((reg) >> 3) & 1)
84 #define REG_VALUE(reg) ((reg) & 7)
86 /* return registers for function */
87 #define REG_IRET TREG_RAX /* single word int return register */
88 #define REG_LRET TREG_RDX /* second word return register (for long long) */
89 #define REG_FRET TREG_XMM0 /* float return register */
90 #define REG_QRET TREG_XMM1 /* second float return register */
92 /* defined if function parameters must be evaluated in reverse order */
93 #define INVERT_FUNC_PARAMS
95 /* pointer size, in bytes */
96 #define PTR_SIZE 8
98 /* long double size and alignment, in bytes */
99 #define LDOUBLE_SIZE 16
100 #define LDOUBLE_ALIGN 16
101 /* maximum alignment (for aligned attribute support) */
102 #define MAX_ALIGN 16
104 /******************************************************/
105 /* ELF defines */
107 #define EM_TCC_TARGET EM_X86_64
109 /* relocation type for 32 bit data relocation */
110 #define R_DATA_32 R_X86_64_32
111 #define R_DATA_PTR R_X86_64_64
112 #define R_JMP_SLOT R_X86_64_JUMP_SLOT
113 #define R_COPY R_X86_64_COPY
115 #define ELF_START_ADDR 0x400000
116 #define ELF_PAGE_SIZE 0x200000
118 /******************************************************/
119 #else /* ! TARGET_DEFS_ONLY */
120 /******************************************************/
121 #include "tcc.h"
122 #include <assert.h>
124 ST_DATA const int reg_classes[NB_REGS] = {
125 /* eax */ RC_INT | RC_RAX,
126 /* ecx */ RC_INT | RC_RCX,
127 /* edx */ RC_INT | RC_RDX,
133 RC_R8,
134 RC_R9,
135 RC_R10,
136 RC_R11,
141 /* xmm0 */ RC_FLOAT | RC_XMM0,
142 /* xmm1 */ RC_FLOAT | RC_XMM1,
143 /* xmm2 */ RC_FLOAT | RC_XMM2,
144 /* xmm3 */ RC_FLOAT | RC_XMM3,
145 /* xmm4 */ RC_FLOAT | RC_XMM4,
146 /* xmm5 */ RC_FLOAT | RC_XMM5,
147 /* xmm6 an xmm7 are included so gv() can be used on them,
148 but they are not tagged with RC_FLOAT because they are
149 callee saved on Windows */
150 RC_XMM6,
151 RC_XMM7,
152 /* st0 */ RC_ST0
155 static unsigned long func_sub_sp_offset;
156 static int func_ret_sub;
158 /* XXX: make it faster ? */
159 void g(int c)
161 int ind1;
162 ind1 = ind + 1;
163 if (ind1 > cur_text_section->data_allocated)
164 section_realloc(cur_text_section, ind1);
165 cur_text_section->data[ind] = c;
166 ind = ind1;
169 void o(unsigned int c)
171 while (c) {
172 g(c);
173 c = c >> 8;
177 void gen_le16(int v)
179 g(v);
180 g(v >> 8);
183 void gen_le32(int c)
185 g(c);
186 g(c >> 8);
187 g(c >> 16);
188 g(c >> 24);
191 void gen_le64(int64_t c)
193 g(c);
194 g(c >> 8);
195 g(c >> 16);
196 g(c >> 24);
197 g(c >> 32);
198 g(c >> 40);
199 g(c >> 48);
200 g(c >> 56);
203 void orex(int ll, int r, int r2, int b)
205 if ((r & VT_VALMASK) >= VT_CONST)
206 r = 0;
207 if ((r2 & VT_VALMASK) >= VT_CONST)
208 r2 = 0;
209 if (ll || REX_BASE(r) || REX_BASE(r2))
210 o(0x40 | REX_BASE(r) | (REX_BASE(r2) << 2) | (ll << 3));
211 o(b);
214 /* output a symbol and patch all calls to it */
215 void gsym_addr(int t, int a)
217 while (t) {
218 unsigned char *ptr = cur_text_section->data + t;
219 uint32_t n = read32le(ptr); /* next value */
220 write32le(ptr, a - t - 4);
221 t = n;
225 void gsym(int t)
227 gsym_addr(t, ind);
230 /* psym is used to put an instruction with a data field which is a
231 reference to a symbol. It is in fact the same as oad ! */
232 #define psym oad
234 static int is64_type(int t)
236 return ((t & VT_BTYPE) == VT_PTR ||
237 (t & VT_BTYPE) == VT_FUNC ||
238 (t & VT_BTYPE) == VT_LLONG);
241 /* instruction + 4 bytes data. Return the address of the data */
242 ST_FUNC int oad(int c, int s)
244 int ind1;
246 o(c);
247 ind1 = ind + 4;
248 if (ind1 > cur_text_section->data_allocated)
249 section_realloc(cur_text_section, ind1);
250 write32le(cur_text_section->data + ind, s);
251 s = ind;
252 ind = ind1;
253 return s;
256 ST_FUNC void gen_addr32(int r, Sym *sym, int c)
258 if (r & VT_SYM)
259 greloc(cur_text_section, sym, ind, R_X86_64_32);
260 gen_le32(c);
263 /* output constant with relocation if 'r & VT_SYM' is true */
264 ST_FUNC void gen_addr64(int r, Sym *sym, int64_t c)
266 if (r & VT_SYM)
267 greloc(cur_text_section, sym, ind, R_X86_64_64);
268 gen_le64(c);
271 /* output constant with relocation if 'r & VT_SYM' is true */
272 ST_FUNC void gen_addrpc32(int r, Sym *sym, int c)
274 if (r & VT_SYM)
275 greloc(cur_text_section, sym, ind, R_X86_64_PC32);
276 gen_le32(c-4);
279 /* output got address with relocation */
280 static void gen_gotpcrel(int r, Sym *sym, int c)
282 #ifndef TCC_TARGET_PE
283 Section *sr;
284 ElfW(Rela) *rel;
285 greloc(cur_text_section, sym, ind, R_X86_64_GOTPCREL);
286 sr = cur_text_section->reloc;
287 rel = (ElfW(Rela) *)(sr->data + sr->data_offset - sizeof(ElfW(Rela)));
288 rel->r_addend = -4;
289 #else
290 tcc_error("internal error: no GOT on PE: %s %x %x | %02x %02x %02x\n",
291 get_tok_str(sym->v, NULL), c, r,
292 cur_text_section->data[ind-3],
293 cur_text_section->data[ind-2],
294 cur_text_section->data[ind-1]
296 greloc(cur_text_section, sym, ind, R_X86_64_PC32);
297 #endif
298 gen_le32(0);
299 if (c) {
300 /* we use add c, %xxx for displacement */
301 orex(1, r, 0, 0x81);
302 o(0xc0 + REG_VALUE(r));
303 gen_le32(c);
307 static void gen_modrm_impl(int op_reg, int r, Sym *sym, int c, int is_got)
309 op_reg = REG_VALUE(op_reg) << 3;
310 if ((r & VT_VALMASK) == VT_CONST) {
311 /* constant memory reference */
312 o(0x05 | op_reg);
313 if (is_got) {
314 gen_gotpcrel(r, sym, c);
315 } else {
316 gen_addrpc32(r, sym, c);
318 } else if ((r & VT_VALMASK) == VT_LOCAL) {
319 /* currently, we use only ebp as base */
320 if (c == (char)c) {
321 /* short reference */
322 o(0x45 | op_reg);
323 g(c);
324 } else {
325 oad(0x85 | op_reg, c);
327 } else if ((r & VT_VALMASK) >= TREG_MEM) {
328 if (c) {
329 g(0x80 | op_reg | REG_VALUE(r));
330 gen_le32(c);
331 } else {
332 g(0x00 | op_reg | REG_VALUE(r));
334 } else {
335 g(0x00 | op_reg | REG_VALUE(r));
339 /* generate a modrm reference. 'op_reg' contains the addtionnal 3
340 opcode bits */
341 static void gen_modrm(int op_reg, int r, Sym *sym, int c)
343 gen_modrm_impl(op_reg, r, sym, c, 0);
346 /* generate a modrm reference. 'op_reg' contains the addtionnal 3
347 opcode bits */
348 static void gen_modrm64(int opcode, int op_reg, int r, Sym *sym, int c)
350 int is_got;
351 is_got = (op_reg & TREG_MEM) && !(sym->type.t & VT_STATIC);
352 orex(1, r, op_reg, opcode);
353 gen_modrm_impl(op_reg, r, sym, c, is_got);
357 /* load 'r' from value 'sv' */
358 void load(int r, SValue *sv)
360 int v, t, ft, fc, fr;
361 SValue v1;
363 #ifdef TCC_TARGET_PE
364 SValue v2;
365 sv = pe_getimport(sv, &v2);
366 #endif
368 fr = sv->r;
369 ft = sv->type.t & ~VT_DEFSIGN;
370 fc = sv->c.i;
372 #ifndef TCC_TARGET_PE
373 /* we use indirect access via got */
374 if ((fr & VT_VALMASK) == VT_CONST && (fr & VT_SYM) &&
375 (fr & VT_LVAL) && !(sv->sym->type.t & VT_STATIC)) {
376 /* use the result register as a temporal register */
377 int tr = r | TREG_MEM;
378 if (is_float(ft)) {
379 /* we cannot use float registers as a temporal register */
380 tr = get_reg(RC_INT) | TREG_MEM;
382 gen_modrm64(0x8b, tr, fr, sv->sym, 0);
384 /* load from the temporal register */
385 fr = tr | VT_LVAL;
387 #endif
389 v = fr & VT_VALMASK;
390 if (fr & VT_LVAL) {
391 int b, ll;
392 if (v == VT_LLOCAL) {
393 v1.type.t = VT_PTR;
394 v1.r = VT_LOCAL | VT_LVAL;
395 v1.c.i = fc;
396 fr = r;
397 if (!(reg_classes[fr] & (RC_INT|RC_R11)))
398 fr = get_reg(RC_INT);
399 load(fr, &v1);
401 ll = 0;
402 if ((ft & VT_BTYPE) == VT_FLOAT) {
403 b = 0x6e0f66;
404 r = REG_VALUE(r); /* movd */
405 } else if ((ft & VT_BTYPE) == VT_DOUBLE) {
406 b = 0x7e0ff3; /* movq */
407 r = REG_VALUE(r);
408 } else if ((ft & VT_BTYPE) == VT_LDOUBLE) {
409 b = 0xdb, r = 5; /* fldt */
410 } else if ((ft & VT_TYPE) == VT_BYTE || (ft & VT_TYPE) == VT_BOOL) {
411 b = 0xbe0f; /* movsbl */
412 } else if ((ft & VT_TYPE) == (VT_BYTE | VT_UNSIGNED)) {
413 b = 0xb60f; /* movzbl */
414 } else if ((ft & VT_TYPE) == VT_SHORT) {
415 b = 0xbf0f; /* movswl */
416 } else if ((ft & VT_TYPE) == (VT_SHORT | VT_UNSIGNED)) {
417 b = 0xb70f; /* movzwl */
418 } else {
419 assert(((ft & VT_BTYPE) == VT_INT) || ((ft & VT_BTYPE) == VT_LLONG)
420 || ((ft & VT_BTYPE) == VT_PTR) || ((ft & VT_BTYPE) == VT_ENUM)
421 || ((ft & VT_BTYPE) == VT_FUNC));
422 ll = is64_type(ft);
423 b = 0x8b;
425 if (ll) {
426 gen_modrm64(b, r, fr, sv->sym, fc);
427 } else {
428 orex(ll, fr, r, b);
429 gen_modrm(r, fr, sv->sym, fc);
431 } else {
432 if (v == VT_CONST) {
433 if (fr & VT_SYM) {
434 #ifdef TCC_TARGET_PE
435 orex(1,0,r,0x8d);
436 o(0x05 + REG_VALUE(r) * 8); /* lea xx(%rip), r */
437 gen_addrpc32(fr, sv->sym, fc);
438 #else
439 if (sv->sym->type.t & VT_STATIC) {
440 orex(1,0,r,0x8d);
441 o(0x05 + REG_VALUE(r) * 8); /* lea xx(%rip), r */
442 gen_addrpc32(fr, sv->sym, fc);
443 } else {
444 orex(1,0,r,0x8b);
445 o(0x05 + REG_VALUE(r) * 8); /* mov xx(%rip), r */
446 gen_gotpcrel(r, sv->sym, fc);
448 #endif
449 } else if (is64_type(ft)) {
450 orex(1,r,0, 0xb8 + REG_VALUE(r)); /* mov $xx, r */
451 gen_le64(sv->c.i);
452 } else {
453 orex(0,r,0, 0xb8 + REG_VALUE(r)); /* mov $xx, r */
454 gen_le32(fc);
456 } else if (v == VT_LOCAL) {
457 orex(1,0,r,0x8d); /* lea xxx(%ebp), r */
458 gen_modrm(r, VT_LOCAL, sv->sym, fc);
459 } else if (v == VT_CMP) {
460 orex(0,r,0,0);
461 if ((fc & ~0x100) != TOK_NE)
462 oad(0xb8 + REG_VALUE(r), 0); /* mov $0, r */
463 else
464 oad(0xb8 + REG_VALUE(r), 1); /* mov $1, r */
465 if (fc & 0x100)
467 /* This was a float compare. If the parity bit is
468 set the result was unordered, meaning false for everything
469 except TOK_NE, and true for TOK_NE. */
470 fc &= ~0x100;
471 o(0x037a + (REX_BASE(r) << 8));
473 orex(0,r,0, 0x0f); /* setxx %br */
474 o(fc);
475 o(0xc0 + REG_VALUE(r));
476 } else if (v == VT_JMP || v == VT_JMPI) {
477 t = v & 1;
478 orex(0,r,0,0);
479 oad(0xb8 + REG_VALUE(r), t); /* mov $1, r */
480 o(0x05eb + (REX_BASE(r) << 8)); /* jmp after */
481 gsym(fc);
482 orex(0,r,0,0);
483 oad(0xb8 + REG_VALUE(r), t ^ 1); /* mov $0, r */
484 } else if (v != r) {
485 if ((r >= TREG_XMM0) && (r <= TREG_XMM7)) {
486 if (v == TREG_ST0) {
487 /* gen_cvt_ftof(VT_DOUBLE); */
488 o(0xf0245cdd); /* fstpl -0x10(%rsp) */
489 /* movsd -0x10(%rsp),%xmmN */
490 o(0x100ff2);
491 o(0x44 + REG_VALUE(r)*8); /* %xmmN */
492 o(0xf024);
493 } else {
494 assert((v >= TREG_XMM0) && (v <= TREG_XMM7));
495 if ((ft & VT_BTYPE) == VT_FLOAT) {
496 o(0x100ff3);
497 } else {
498 assert((ft & VT_BTYPE) == VT_DOUBLE);
499 o(0x100ff2);
501 o(0xc0 + REG_VALUE(v) + REG_VALUE(r)*8);
503 } else if (r == TREG_ST0) {
504 assert((v >= TREG_XMM0) && (v <= TREG_XMM7));
505 /* gen_cvt_ftof(VT_LDOUBLE); */
506 /* movsd %xmmN,-0x10(%rsp) */
507 o(0x110ff2);
508 o(0x44 + REG_VALUE(r)*8); /* %xmmN */
509 o(0xf024);
510 o(0xf02444dd); /* fldl -0x10(%rsp) */
511 } else {
512 orex(1,r,v, 0x89);
513 o(0xc0 + REG_VALUE(r) + REG_VALUE(v) * 8); /* mov v, r */
519 /* store register 'r' in lvalue 'v' */
520 void store(int r, SValue *v)
522 int fr, bt, ft, fc;
523 int op64 = 0;
524 /* store the REX prefix in this variable when PIC is enabled */
525 int pic = 0;
527 #ifdef TCC_TARGET_PE
528 SValue v2;
529 v = pe_getimport(v, &v2);
530 #endif
532 ft = v->type.t;
533 fc = v->c.i;
534 fr = v->r & VT_VALMASK;
535 bt = ft & VT_BTYPE;
537 #ifndef TCC_TARGET_PE
538 /* we need to access the variable via got */
539 if (fr == VT_CONST && (v->r & VT_SYM)) {
540 /* mov xx(%rip), %r11 */
541 o(0x1d8b4c);
542 gen_gotpcrel(TREG_R11, v->sym, v->c.i);
543 pic = is64_type(bt) ? 0x49 : 0x41;
545 #endif
547 /* XXX: incorrect if float reg to reg */
548 if (bt == VT_FLOAT) {
549 o(0x66);
550 o(pic);
551 o(0x7e0f); /* movd */
552 r = REG_VALUE(r);
553 } else if (bt == VT_DOUBLE) {
554 o(0x66);
555 o(pic);
556 o(0xd60f); /* movq */
557 r = REG_VALUE(r);
558 } else if (bt == VT_LDOUBLE) {
559 o(0xc0d9); /* fld %st(0) */
560 o(pic);
561 o(0xdb); /* fstpt */
562 r = 7;
563 } else {
564 if (bt == VT_SHORT)
565 o(0x66);
566 o(pic);
567 if (bt == VT_BYTE || bt == VT_BOOL)
568 orex(0, 0, r, 0x88);
569 else if (is64_type(bt))
570 op64 = 0x89;
571 else
572 orex(0, 0, r, 0x89);
574 if (pic) {
575 /* xxx r, (%r11) where xxx is mov, movq, fld, or etc */
576 if (op64)
577 o(op64);
578 o(3 + (r << 3));
579 } else if (op64) {
580 if (fr == VT_CONST || fr == VT_LOCAL || (v->r & VT_LVAL)) {
581 gen_modrm64(op64, r, v->r, v->sym, fc);
582 } else if (fr != r) {
583 /* XXX: don't we really come here? */
584 abort();
585 o(0xc0 + fr + r * 8); /* mov r, fr */
587 } else {
588 if (fr == VT_CONST || fr == VT_LOCAL || (v->r & VT_LVAL)) {
589 gen_modrm(r, v->r, v->sym, fc);
590 } else if (fr != r) {
591 /* XXX: don't we really come here? */
592 abort();
593 o(0xc0 + fr + r * 8); /* mov r, fr */
598 /* 'is_jmp' is '1' if it is a jump */
599 static void gcall_or_jmp(int is_jmp)
601 int r;
602 if ((vtop->r & (VT_VALMASK | VT_LVAL)) == VT_CONST &&
603 ((vtop->r & VT_SYM) || (vtop->c.i-4) == (int)(vtop->c.i-4))) {
604 /* constant case */
605 if (vtop->r & VT_SYM) {
606 /* relocation case */
607 #ifdef TCC_TARGET_PE
608 greloc(cur_text_section, vtop->sym, ind + 1, R_X86_64_PC32);
609 #else
610 greloc(cur_text_section, vtop->sym, ind + 1, R_X86_64_PLT32);
611 #endif
612 } else {
613 /* put an empty PC32 relocation */
614 put_elf_reloc(symtab_section, cur_text_section,
615 ind + 1, R_X86_64_PC32, 0);
617 oad(0xe8 + is_jmp, vtop->c.i - 4); /* call/jmp im */
618 } else {
619 /* otherwise, indirect call */
620 r = TREG_R11;
621 load(r, vtop);
622 o(0x41); /* REX */
623 o(0xff); /* call/jmp *r */
624 o(0xd0 + REG_VALUE(r) + (is_jmp << 4));
628 #if defined(CONFIG_TCC_BCHECK)
629 #ifndef TCC_TARGET_PE
630 static addr_t func_bound_offset;
631 static unsigned long func_bound_ind;
632 #endif
634 static void gen_static_call(int v)
636 Sym *sym = external_global_sym(v, &func_old_type, 0);
637 oad(0xe8, -4);
638 greloc(cur_text_section, sym, ind-4, R_X86_64_PC32);
641 /* generate a bounded pointer addition */
642 ST_FUNC void gen_bounded_ptr_add(void)
644 /* save all temporary registers */
645 save_regs(0);
647 /* prepare fast x86_64 function call */
648 gv(RC_RAX);
649 o(0xc68948); // mov %rax,%rsi ## second arg in %rsi, this must be size
650 vtop--;
652 gv(RC_RAX);
653 o(0xc78948); // mov %rax,%rdi ## first arg in %rdi, this must be ptr
654 vtop--;
656 /* do a fast function call */
657 gen_static_call(TOK___bound_ptr_add);
659 /* returned pointer is in rax */
660 vtop++;
661 vtop->r = TREG_RAX | VT_BOUNDED;
664 /* relocation offset of the bounding function call point */
665 vtop->c.i = (cur_text_section->reloc->data_offset - sizeof(ElfW(Rela)));
668 /* patch pointer addition in vtop so that pointer dereferencing is
669 also tested */
670 ST_FUNC void gen_bounded_ptr_deref(void)
672 addr_t func;
673 int size, align;
674 ElfW(Rela) *rel;
675 Sym *sym;
677 size = 0;
678 /* XXX: put that code in generic part of tcc */
679 if (!is_float(vtop->type.t)) {
680 if (vtop->r & VT_LVAL_BYTE)
681 size = 1;
682 else if (vtop->r & VT_LVAL_SHORT)
683 size = 2;
685 if (!size)
686 size = type_size(&vtop->type, &align);
687 switch(size) {
688 case 1: func = TOK___bound_ptr_indir1; break;
689 case 2: func = TOK___bound_ptr_indir2; break;
690 case 4: func = TOK___bound_ptr_indir4; break;
691 case 8: func = TOK___bound_ptr_indir8; break;
692 case 12: func = TOK___bound_ptr_indir12; break;
693 case 16: func = TOK___bound_ptr_indir16; break;
694 default:
695 tcc_error("unhandled size when dereferencing bounded pointer");
696 func = 0;
697 break;
700 sym = external_global_sym(func, &func_old_type, 0);
701 if (!sym->c)
702 put_extern_sym(sym, NULL, 0, 0);
704 /* patch relocation */
705 /* XXX: find a better solution ? */
707 rel = (ElfW(Rela) *)(cur_text_section->reloc->data + vtop->c.i);
708 rel->r_info = ELF64_R_INFO(sym->c, ELF64_R_TYPE(rel->r_info));
710 #endif
712 #ifdef TCC_TARGET_PE
714 #define REGN 4
715 static const uint8_t arg_regs[REGN] = {
716 TREG_RCX, TREG_RDX, TREG_R8, TREG_R9
719 /* Prepare arguments in R10 and R11 rather than RCX and RDX
720 because gv() will not ever use these */
721 static int arg_prepare_reg(int idx) {
722 if (idx == 0 || idx == 1)
723 /* idx=0: r10, idx=1: r11 */
724 return idx + 10;
725 else
726 return arg_regs[idx];
729 static int func_scratch;
731 /* Generate function call. The function address is pushed first, then
732 all the parameters in call order. This functions pops all the
733 parameters and the function address. */
735 void gen_offs_sp(int b, int r, int d)
737 orex(1,0,r & 0x100 ? 0 : r, b);
738 if (d == (char)d) {
739 o(0x2444 | (REG_VALUE(r) << 3));
740 g(d);
741 } else {
742 o(0x2484 | (REG_VALUE(r) << 3));
743 gen_le32(d);
747 /* Return the number of registers needed to return the struct, or 0 if
748 returning via struct pointer. */
749 ST_FUNC int gfunc_sret(CType *vt, int variadic, CType *ret, int *ret_align, int *regsize)
751 int size, align;
752 *regsize = 8;
753 *ret_align = 1; // Never have to re-align return values for x86-64
754 size = type_size(vt, &align);
755 ret->ref = NULL;
756 if (size > 8) {
757 return 0;
758 } else if (size > 4) {
759 ret->t = VT_LLONG;
760 return 1;
761 } else if (size > 2) {
762 ret->t = VT_INT;
763 return 1;
764 } else if (size > 1) {
765 ret->t = VT_SHORT;
766 return 1;
767 } else {
768 ret->t = VT_BYTE;
769 return 1;
773 static int is_sse_float(int t) {
774 int bt;
775 bt = t & VT_BTYPE;
776 return bt == VT_DOUBLE || bt == VT_FLOAT;
779 int gfunc_arg_size(CType *type) {
780 int align;
781 if (type->t & (VT_ARRAY|VT_BITFIELD))
782 return 8;
783 return type_size(type, &align);
786 void gfunc_call(int nb_args)
788 int size, r, args_size, i, d, bt, struct_size;
789 int arg;
791 args_size = (nb_args < REGN ? REGN : nb_args) * PTR_SIZE;
792 arg = nb_args;
794 /* for struct arguments, we need to call memcpy and the function
795 call breaks register passing arguments we are preparing.
796 So, we process arguments which will be passed by stack first. */
797 struct_size = args_size;
798 for(i = 0; i < nb_args; i++) {
799 SValue *sv;
801 --arg;
802 sv = &vtop[-i];
803 bt = (sv->type.t & VT_BTYPE);
804 size = gfunc_arg_size(&sv->type);
806 if (size <= 8)
807 continue; /* arguments smaller than 8 bytes passed in registers or on stack */
809 if (bt == VT_STRUCT) {
810 /* align to stack align size */
811 size = (size + 15) & ~15;
812 /* generate structure store */
813 r = get_reg(RC_INT);
814 gen_offs_sp(0x8d, r, struct_size);
815 struct_size += size;
817 /* generate memcpy call */
818 vset(&sv->type, r | VT_LVAL, 0);
819 vpushv(sv);
820 vstore();
821 --vtop;
822 } else if (bt == VT_LDOUBLE) {
823 gv(RC_ST0);
824 gen_offs_sp(0xdb, 0x107, struct_size);
825 struct_size += 16;
829 if (func_scratch < struct_size)
830 func_scratch = struct_size;
832 arg = nb_args;
833 struct_size = args_size;
835 for(i = 0; i < nb_args; i++) {
836 --arg;
837 bt = (vtop->type.t & VT_BTYPE);
839 size = gfunc_arg_size(&vtop->type);
840 if (size > 8) {
841 /* align to stack align size */
842 size = (size + 15) & ~15;
843 if (arg >= REGN) {
844 d = get_reg(RC_INT);
845 gen_offs_sp(0x8d, d, struct_size);
846 gen_offs_sp(0x89, d, arg*8);
847 } else {
848 d = arg_prepare_reg(arg);
849 gen_offs_sp(0x8d, d, struct_size);
851 struct_size += size;
852 } else {
853 if (is_sse_float(vtop->type.t)) {
854 gv(RC_XMM0); /* only use one float register */
855 if (arg >= REGN) {
856 /* movq %xmm0, j*8(%rsp) */
857 gen_offs_sp(0xd60f66, 0x100, arg*8);
858 } else {
859 /* movaps %xmm0, %xmmN */
860 o(0x280f);
861 o(0xc0 + (arg << 3));
862 d = arg_prepare_reg(arg);
863 /* mov %xmm0, %rxx */
864 o(0x66);
865 orex(1,d,0, 0x7e0f);
866 o(0xc0 + REG_VALUE(d));
868 } else {
869 if (bt == VT_STRUCT) {
870 vtop->type.ref = NULL;
871 vtop->type.t = size > 4 ? VT_LLONG : size > 2 ? VT_INT
872 : size > 1 ? VT_SHORT : VT_BYTE;
875 r = gv(RC_INT);
876 if (arg >= REGN) {
877 gen_offs_sp(0x89, r, arg*8);
878 } else {
879 d = arg_prepare_reg(arg);
880 orex(1,d,r,0x89); /* mov */
881 o(0xc0 + REG_VALUE(r) * 8 + REG_VALUE(d));
885 vtop--;
887 save_regs(0);
889 /* Copy R10 and R11 into RCX and RDX, respectively */
890 if (nb_args > 0) {
891 o(0xd1894c); /* mov %r10, %rcx */
892 if (nb_args > 1) {
893 o(0xda894c); /* mov %r11, %rdx */
897 gcall_or_jmp(0);
898 vtop--;
902 #define FUNC_PROLOG_SIZE 11
904 /* generate function prolog of type 't' */
905 void gfunc_prolog(CType *func_type)
907 int addr, reg_param_index, bt, size;
908 Sym *sym;
909 CType *type;
911 func_ret_sub = 0;
912 func_scratch = 0;
913 loc = 0;
915 addr = PTR_SIZE * 2;
916 ind += FUNC_PROLOG_SIZE;
917 func_sub_sp_offset = ind;
918 reg_param_index = 0;
920 sym = func_type->ref;
922 /* if the function returns a structure, then add an
923 implicit pointer parameter */
924 func_vt = sym->type;
925 func_var = (sym->c == FUNC_ELLIPSIS);
926 size = gfunc_arg_size(&func_vt);
927 if (size > 8) {
928 gen_modrm64(0x89, arg_regs[reg_param_index], VT_LOCAL, NULL, addr);
929 func_vc = addr;
930 reg_param_index++;
931 addr += 8;
934 /* define parameters */
935 while ((sym = sym->next) != NULL) {
936 type = &sym->type;
937 bt = type->t & VT_BTYPE;
938 size = gfunc_arg_size(type);
939 if (size > 8) {
940 if (reg_param_index < REGN) {
941 gen_modrm64(0x89, arg_regs[reg_param_index], VT_LOCAL, NULL, addr);
943 sym_push(sym->v & ~SYM_FIELD, type, VT_LOCAL | VT_LVAL | VT_REF, addr);
944 } else {
945 if (reg_param_index < REGN) {
946 /* save arguments passed by register */
947 if ((bt == VT_FLOAT) || (bt == VT_DOUBLE)) {
948 o(0xd60f66); /* movq */
949 gen_modrm(reg_param_index, VT_LOCAL, NULL, addr);
950 } else {
951 gen_modrm64(0x89, arg_regs[reg_param_index], VT_LOCAL, NULL, addr);
954 sym_push(sym->v & ~SYM_FIELD, type, VT_LOCAL | VT_LVAL, addr);
956 addr += 8;
957 reg_param_index++;
960 while (reg_param_index < REGN) {
961 if (func_type->ref->c == FUNC_ELLIPSIS) {
962 gen_modrm64(0x89, arg_regs[reg_param_index], VT_LOCAL, NULL, addr);
963 addr += 8;
965 reg_param_index++;
969 /* generate function epilog */
970 void gfunc_epilog(void)
972 int v, saved_ind;
974 o(0xc9); /* leave */
975 if (func_ret_sub == 0) {
976 o(0xc3); /* ret */
977 } else {
978 o(0xc2); /* ret n */
979 g(func_ret_sub);
980 g(func_ret_sub >> 8);
983 saved_ind = ind;
984 ind = func_sub_sp_offset - FUNC_PROLOG_SIZE;
985 /* align local size to word & save local variables */
986 v = (func_scratch + -loc + 15) & -16;
988 if (v >= 4096) {
989 Sym *sym = external_global_sym(TOK___chkstk, &func_old_type, 0);
990 oad(0xb8, v); /* mov stacksize, %eax */
991 oad(0xe8, -4); /* call __chkstk, (does the stackframe too) */
992 greloc(cur_text_section, sym, ind-4, R_X86_64_PC32);
993 o(0x90); /* fill for FUNC_PROLOG_SIZE = 11 bytes */
994 } else {
995 o(0xe5894855); /* push %rbp, mov %rsp, %rbp */
996 o(0xec8148); /* sub rsp, stacksize */
997 gen_le32(v);
1000 cur_text_section->data_offset = saved_ind;
1001 pe_add_unwind_data(ind, saved_ind, v);
1002 ind = cur_text_section->data_offset;
1005 #else
1007 static void gadd_sp(int val)
1009 if (val == (char)val) {
1010 o(0xc48348);
1011 g(val);
1012 } else {
1013 oad(0xc48148, val); /* add $xxx, %rsp */
1017 typedef enum X86_64_Mode {
1018 x86_64_mode_none,
1019 x86_64_mode_memory,
1020 x86_64_mode_integer,
1021 x86_64_mode_sse,
1022 x86_64_mode_x87
1023 } X86_64_Mode;
1025 static X86_64_Mode classify_x86_64_merge(X86_64_Mode a, X86_64_Mode b)
1027 if (a == b)
1028 return a;
1029 else if (a == x86_64_mode_none)
1030 return b;
1031 else if (b == x86_64_mode_none)
1032 return a;
1033 else if ((a == x86_64_mode_memory) || (b == x86_64_mode_memory))
1034 return x86_64_mode_memory;
1035 else if ((a == x86_64_mode_integer) || (b == x86_64_mode_integer))
1036 return x86_64_mode_integer;
1037 else if ((a == x86_64_mode_x87) || (b == x86_64_mode_x87))
1038 return x86_64_mode_memory;
1039 else
1040 return x86_64_mode_sse;
1043 static X86_64_Mode classify_x86_64_inner(CType *ty)
1045 X86_64_Mode mode;
1046 Sym *f;
1048 switch (ty->t & VT_BTYPE) {
1049 case VT_VOID: return x86_64_mode_none;
1051 case VT_INT:
1052 case VT_BYTE:
1053 case VT_SHORT:
1054 case VT_LLONG:
1055 case VT_BOOL:
1056 case VT_PTR:
1057 case VT_FUNC:
1058 case VT_ENUM: return x86_64_mode_integer;
1060 case VT_FLOAT:
1061 case VT_DOUBLE: return x86_64_mode_sse;
1063 case VT_LDOUBLE: return x86_64_mode_x87;
1065 case VT_STRUCT:
1066 f = ty->ref;
1068 mode = x86_64_mode_none;
1069 for (f = f->next; f; f = f->next)
1070 mode = classify_x86_64_merge(mode, classify_x86_64_inner(&f->type));
1072 return mode;
1075 assert(0);
1078 static X86_64_Mode classify_x86_64_arg(CType *ty, CType *ret, int *psize, int *palign, int *reg_count)
1080 X86_64_Mode mode;
1081 int size, align, ret_t = 0;
1083 if (ty->t & (VT_BITFIELD|VT_ARRAY)) {
1084 *psize = 8;
1085 *palign = 8;
1086 *reg_count = 1;
1087 ret_t = ty->t;
1088 mode = x86_64_mode_integer;
1089 } else {
1090 size = type_size(ty, &align);
1091 *psize = (size + 7) & ~7;
1092 *palign = (align + 7) & ~7;
1094 if (size > 16) {
1095 mode = x86_64_mode_memory;
1096 } else {
1097 mode = classify_x86_64_inner(ty);
1098 switch (mode) {
1099 case x86_64_mode_integer:
1100 if (size > 8) {
1101 *reg_count = 2;
1102 ret_t = VT_QLONG;
1103 } else {
1104 *reg_count = 1;
1105 ret_t = (size > 4) ? VT_LLONG : VT_INT;
1107 break;
1109 case x86_64_mode_x87:
1110 *reg_count = 1;
1111 ret_t = VT_LDOUBLE;
1112 break;
1114 case x86_64_mode_sse:
1115 if (size > 8) {
1116 *reg_count = 2;
1117 ret_t = VT_QFLOAT;
1118 } else {
1119 *reg_count = 1;
1120 ret_t = (size > 4) ? VT_DOUBLE : VT_FLOAT;
1122 break;
1123 default: break; /* nothing to be done for x86_64_mode_memory and x86_64_mode_none*/
1128 if (ret) {
1129 ret->ref = NULL;
1130 ret->t = ret_t;
1133 return mode;
1136 ST_FUNC int classify_x86_64_va_arg(CType *ty)
1138 /* This definition must be synced with stdarg.h */
1139 enum __va_arg_type {
1140 __va_gen_reg, __va_float_reg, __va_stack
1142 int size, align, reg_count;
1143 X86_64_Mode mode = classify_x86_64_arg(ty, NULL, &size, &align, &reg_count);
1144 switch (mode) {
1145 default: return __va_stack;
1146 case x86_64_mode_integer: return __va_gen_reg;
1147 case x86_64_mode_sse: return __va_float_reg;
1151 /* Return the number of registers needed to return the struct, or 0 if
1152 returning via struct pointer. */
1153 ST_FUNC int gfunc_sret(CType *vt, int variadic, CType *ret, int *ret_align, int *regsize)
1155 int size, align, reg_count;
1156 *ret_align = 1; // Never have to re-align return values for x86-64
1157 *regsize = 8;
1158 return (classify_x86_64_arg(vt, ret, &size, &align, &reg_count) != x86_64_mode_memory);
1161 #define REGN 6
1162 static const uint8_t arg_regs[REGN] = {
1163 TREG_RDI, TREG_RSI, TREG_RDX, TREG_RCX, TREG_R8, TREG_R9
1166 static int arg_prepare_reg(int idx) {
1167 if (idx == 2 || idx == 3)
1168 /* idx=2: r10, idx=3: r11 */
1169 return idx + 8;
1170 else
1171 return arg_regs[idx];
1174 /* Generate function call. The function address is pushed first, then
1175 all the parameters in call order. This functions pops all the
1176 parameters and the function address. */
1177 void gfunc_call(int nb_args)
1179 X86_64_Mode mode;
1180 CType type;
1181 int size, align, r, args_size, stack_adjust, run_start, run_end, i, reg_count;
1182 int nb_reg_args = 0;
1183 int nb_sse_args = 0;
1184 int sse_reg, gen_reg;
1186 /* calculate the number of integer/float register arguments */
1187 for(i = 0; i < nb_args; i++) {
1188 mode = classify_x86_64_arg(&vtop[-i].type, NULL, &size, &align, &reg_count);
1189 if (mode == x86_64_mode_sse)
1190 nb_sse_args += reg_count;
1191 else if (mode == x86_64_mode_integer)
1192 nb_reg_args += reg_count;
1195 /* arguments are collected in runs. Each run is a collection of 8-byte aligned arguments
1196 and ended by a 16-byte aligned argument. This is because, from the point of view of
1197 the callee, argument alignment is computed from the bottom up. */
1198 /* for struct arguments, we need to call memcpy and the function
1199 call breaks register passing arguments we are preparing.
1200 So, we process arguments which will be passed by stack first. */
1201 gen_reg = nb_reg_args;
1202 sse_reg = nb_sse_args;
1203 run_start = 0;
1204 args_size = 0;
1205 while (run_start != nb_args) {
1206 int run_gen_reg = gen_reg, run_sse_reg = sse_reg;
1208 run_end = nb_args;
1209 stack_adjust = 0;
1210 for(i = run_start; (i < nb_args) && (run_end == nb_args); i++) {
1211 mode = classify_x86_64_arg(&vtop[-i].type, NULL, &size, &align, &reg_count);
1212 switch (mode) {
1213 case x86_64_mode_memory:
1214 case x86_64_mode_x87:
1215 stack_arg:
1216 if (align == 16)
1217 run_end = i;
1218 else
1219 stack_adjust += size;
1220 break;
1222 case x86_64_mode_sse:
1223 sse_reg -= reg_count;
1224 if (sse_reg + reg_count > 8) goto stack_arg;
1225 break;
1227 case x86_64_mode_integer:
1228 gen_reg -= reg_count;
1229 if (gen_reg + reg_count > REGN) goto stack_arg;
1230 break;
1231 default: break; /* nothing to be done for x86_64_mode_none */
1235 gen_reg = run_gen_reg;
1236 sse_reg = run_sse_reg;
1238 /* adjust stack to align SSE boundary */
1239 if (stack_adjust &= 15) {
1240 /* fetch cpu flag before the following sub will change the value */
1241 if (vtop >= vstack && (vtop->r & VT_VALMASK) == VT_CMP)
1242 gv(RC_INT);
1244 stack_adjust = 16 - stack_adjust;
1245 o(0x48);
1246 oad(0xec81, stack_adjust); /* sub $xxx, %rsp */
1247 args_size += stack_adjust;
1250 for(i = run_start; i < run_end;) {
1251 /* Swap argument to top, it will possibly be changed here,
1252 and might use more temps. At the end of the loop we keep
1253 in on the stack and swap it back to its original position
1254 if it is a register. */
1255 SValue tmp = vtop[0];
1256 int arg_stored = 1;
1258 vtop[0] = vtop[-i];
1259 vtop[-i] = tmp;
1260 mode = classify_x86_64_arg(&vtop->type, NULL, &size, &align, &reg_count);
1262 switch (vtop->type.t & VT_BTYPE) {
1263 case VT_STRUCT:
1264 if (mode == x86_64_mode_sse) {
1265 if (sse_reg > 8)
1266 sse_reg -= reg_count;
1267 else
1268 arg_stored = 0;
1269 } else if (mode == x86_64_mode_integer) {
1270 if (gen_reg > REGN)
1271 gen_reg -= reg_count;
1272 else
1273 arg_stored = 0;
1276 if (arg_stored) {
1277 /* allocate the necessary size on stack */
1278 o(0x48);
1279 oad(0xec81, size); /* sub $xxx, %rsp */
1280 /* generate structure store */
1281 r = get_reg(RC_INT);
1282 orex(1, r, 0, 0x89); /* mov %rsp, r */
1283 o(0xe0 + REG_VALUE(r));
1284 vset(&vtop->type, r | VT_LVAL, 0);
1285 vswap();
1286 vstore();
1287 args_size += size;
1289 break;
1291 case VT_LDOUBLE:
1292 assert(0);
1293 break;
1295 case VT_FLOAT:
1296 case VT_DOUBLE:
1297 assert(mode == x86_64_mode_sse);
1298 if (sse_reg > 8) {
1299 --sse_reg;
1300 r = gv(RC_FLOAT);
1301 o(0x50); /* push $rax */
1302 /* movq %xmmN, (%rsp) */
1303 o(0xd60f66);
1304 o(0x04 + REG_VALUE(r)*8);
1305 o(0x24);
1306 args_size += size;
1307 } else {
1308 arg_stored = 0;
1310 break;
1312 default:
1313 assert(mode == x86_64_mode_integer);
1314 /* simple type */
1315 /* XXX: implicit cast ? */
1316 if (gen_reg > REGN) {
1317 --gen_reg;
1318 r = gv(RC_INT);
1319 orex(0,r,0,0x50 + REG_VALUE(r)); /* push r */
1320 args_size += size;
1321 } else {
1322 arg_stored = 0;
1324 break;
1327 /* And swap the argument back to it's original position. */
1328 tmp = vtop[0];
1329 vtop[0] = vtop[-i];
1330 vtop[-i] = tmp;
1332 if (arg_stored) {
1333 vrotb(i+1);
1334 assert((vtop->type.t == tmp.type.t) && (vtop->r == tmp.r));
1335 vpop();
1336 --nb_args;
1337 --run_end;
1338 } else {
1339 ++i;
1343 /* handle 16 byte aligned arguments at end of run */
1344 run_start = i = run_end;
1345 while (i < nb_args) {
1346 /* Rotate argument to top since it will always be popped */
1347 mode = classify_x86_64_arg(&vtop[-i].type, NULL, &size, &align, &reg_count);
1348 if (align != 16)
1349 break;
1351 vrotb(i+1);
1353 if ((vtop->type.t & VT_BTYPE) == VT_LDOUBLE) {
1354 gv(RC_ST0);
1355 oad(0xec8148, size); /* sub $xxx, %rsp */
1356 o(0x7cdb); /* fstpt 0(%rsp) */
1357 g(0x24);
1358 g(0x00);
1359 args_size += size;
1360 } else {
1361 assert(mode == x86_64_mode_memory);
1363 /* allocate the necessary size on stack */
1364 o(0x48);
1365 oad(0xec81, size); /* sub $xxx, %rsp */
1366 /* generate structure store */
1367 r = get_reg(RC_INT);
1368 orex(1, r, 0, 0x89); /* mov %rsp, r */
1369 o(0xe0 + REG_VALUE(r));
1370 vset(&vtop->type, r | VT_LVAL, 0);
1371 vswap();
1372 vstore();
1373 args_size += size;
1376 vpop();
1377 --nb_args;
1381 /* XXX This should be superfluous. */
1382 save_regs(0); /* save used temporary registers */
1384 /* then, we prepare register passing arguments.
1385 Note that we cannot set RDX and RCX in this loop because gv()
1386 may break these temporary registers. Let's use R10 and R11
1387 instead of them */
1388 assert(gen_reg <= REGN);
1389 assert(sse_reg <= 8);
1390 for(i = 0; i < nb_args; i++) {
1391 mode = classify_x86_64_arg(&vtop->type, &type, &size, &align, &reg_count);
1392 /* Alter stack entry type so that gv() knows how to treat it */
1393 vtop->type = type;
1394 if (mode == x86_64_mode_sse) {
1395 if (reg_count == 2) {
1396 sse_reg -= 2;
1397 gv(RC_FRET); /* Use pair load into xmm0 & xmm1 */
1398 if (sse_reg) { /* avoid redundant movaps %xmm0, %xmm0 */
1399 /* movaps %xmm0, %xmmN */
1400 o(0x280f);
1401 o(0xc0 + (sse_reg << 3));
1402 /* movaps %xmm1, %xmmN */
1403 o(0x280f);
1404 o(0xc1 + ((sse_reg+1) << 3));
1406 } else {
1407 assert(reg_count == 1);
1408 --sse_reg;
1409 /* Load directly to register */
1410 gv(RC_XMM0 << sse_reg);
1412 } else if (mode == x86_64_mode_integer) {
1413 /* simple type */
1414 /* XXX: implicit cast ? */
1415 int d;
1416 gen_reg -= reg_count;
1417 r = gv(RC_INT);
1418 d = arg_prepare_reg(gen_reg);
1419 orex(1,d,r,0x89); /* mov */
1420 o(0xc0 + REG_VALUE(r) * 8 + REG_VALUE(d));
1421 if (reg_count == 2) {
1422 d = arg_prepare_reg(gen_reg+1);
1423 orex(1,d,vtop->r2,0x89); /* mov */
1424 o(0xc0 + REG_VALUE(vtop->r2) * 8 + REG_VALUE(d));
1427 vtop--;
1429 assert(gen_reg == 0);
1430 assert(sse_reg == 0);
1432 /* We shouldn't have many operands on the stack anymore, but the
1433 call address itself is still there, and it might be in %eax
1434 (or edx/ecx) currently, which the below writes would clobber.
1435 So evict all remaining operands here. */
1436 save_regs(0);
1438 /* Copy R10 and R11 into RDX and RCX, respectively */
1439 if (nb_reg_args > 2) {
1440 o(0xd2894c); /* mov %r10, %rdx */
1441 if (nb_reg_args > 3) {
1442 o(0xd9894c); /* mov %r11, %rcx */
1446 oad(0xb8, nb_sse_args < 8 ? nb_sse_args : 8); /* mov nb_sse_args, %eax */
1447 gcall_or_jmp(0);
1448 if (args_size)
1449 gadd_sp(args_size);
1450 vtop--;
1454 #define FUNC_PROLOG_SIZE 11
1456 static void push_arg_reg(int i) {
1457 loc -= 8;
1458 gen_modrm64(0x89, arg_regs[i], VT_LOCAL, NULL, loc);
1461 /* generate function prolog of type 't' */
1462 void gfunc_prolog(CType *func_type)
1464 X86_64_Mode mode;
1465 int i, addr, align, size, reg_count;
1466 int param_addr = 0, reg_param_index, sse_param_index;
1467 Sym *sym;
1468 CType *type;
1470 sym = func_type->ref;
1471 addr = PTR_SIZE * 2;
1472 loc = 0;
1473 ind += FUNC_PROLOG_SIZE;
1474 func_sub_sp_offset = ind;
1475 func_ret_sub = 0;
1477 if (func_type->ref->c == FUNC_ELLIPSIS) {
1478 int seen_reg_num, seen_sse_num, seen_stack_size;
1479 seen_reg_num = seen_sse_num = 0;
1480 /* frame pointer and return address */
1481 seen_stack_size = PTR_SIZE * 2;
1482 /* count the number of seen parameters */
1483 sym = func_type->ref;
1484 while ((sym = sym->next) != NULL) {
1485 type = &sym->type;
1486 mode = classify_x86_64_arg(type, NULL, &size, &align, &reg_count);
1487 switch (mode) {
1488 default:
1489 stack_arg:
1490 seen_stack_size = ((seen_stack_size + align - 1) & -align) + size;
1491 break;
1493 case x86_64_mode_integer:
1494 if (seen_reg_num + reg_count <= 8) {
1495 seen_reg_num += reg_count;
1496 } else {
1497 seen_reg_num = 8;
1498 goto stack_arg;
1500 break;
1502 case x86_64_mode_sse:
1503 if (seen_sse_num + reg_count <= 8) {
1504 seen_sse_num += reg_count;
1505 } else {
1506 seen_sse_num = 8;
1507 goto stack_arg;
1509 break;
1513 loc -= 16;
1514 /* movl $0x????????, -0x10(%rbp) */
1515 o(0xf045c7);
1516 gen_le32(seen_reg_num * 8);
1517 /* movl $0x????????, -0xc(%rbp) */
1518 o(0xf445c7);
1519 gen_le32(seen_sse_num * 16 + 48);
1520 /* movl $0x????????, -0x8(%rbp) */
1521 o(0xf845c7);
1522 gen_le32(seen_stack_size);
1524 /* save all register passing arguments */
1525 for (i = 0; i < 8; i++) {
1526 loc -= 16;
1527 o(0xd60f66); /* movq */
1528 gen_modrm(7 - i, VT_LOCAL, NULL, loc);
1529 /* movq $0, loc+8(%rbp) */
1530 o(0x85c748);
1531 gen_le32(loc + 8);
1532 gen_le32(0);
1534 for (i = 0; i < REGN; i++) {
1535 push_arg_reg(REGN-1-i);
1539 sym = func_type->ref;
1540 reg_param_index = 0;
1541 sse_param_index = 0;
1543 /* if the function returns a structure, then add an
1544 implicit pointer parameter */
1545 func_vt = sym->type;
1546 mode = classify_x86_64_arg(&func_vt, NULL, &size, &align, &reg_count);
1547 if (mode == x86_64_mode_memory) {
1548 push_arg_reg(reg_param_index);
1549 func_vc = loc;
1550 reg_param_index++;
1552 /* define parameters */
1553 while ((sym = sym->next) != NULL) {
1554 type = &sym->type;
1555 mode = classify_x86_64_arg(type, NULL, &size, &align, &reg_count);
1556 switch (mode) {
1557 case x86_64_mode_sse:
1558 if (sse_param_index + reg_count <= 8) {
1559 /* save arguments passed by register */
1560 loc -= reg_count * 8;
1561 param_addr = loc;
1562 for (i = 0; i < reg_count; ++i) {
1563 o(0xd60f66); /* movq */
1564 gen_modrm(sse_param_index, VT_LOCAL, NULL, param_addr + i*8);
1565 ++sse_param_index;
1567 } else {
1568 addr = (addr + align - 1) & -align;
1569 param_addr = addr;
1570 addr += size;
1572 break;
1574 case x86_64_mode_memory:
1575 case x86_64_mode_x87:
1576 addr = (addr + align - 1) & -align;
1577 param_addr = addr;
1578 addr += size;
1579 break;
1581 case x86_64_mode_integer: {
1582 if (reg_param_index + reg_count <= REGN) {
1583 /* save arguments passed by register */
1584 loc -= reg_count * 8;
1585 param_addr = loc;
1586 for (i = 0; i < reg_count; ++i) {
1587 gen_modrm64(0x89, arg_regs[reg_param_index], VT_LOCAL, NULL, param_addr + i*8);
1588 ++reg_param_index;
1590 } else {
1591 addr = (addr + align - 1) & -align;
1592 param_addr = addr;
1593 addr += size;
1595 break;
1597 default: break; /* nothing to be done for x86_64_mode_none */
1599 sym_push(sym->v & ~SYM_FIELD, type,
1600 VT_LOCAL | VT_LVAL, param_addr);
1603 #ifdef CONFIG_TCC_BCHECK
1604 /* leave some room for bound checking code */
1605 if (tcc_state->do_bounds_check) {
1606 func_bound_offset = lbounds_section->data_offset;
1607 func_bound_ind = ind;
1608 oad(0xb8, 0); /* lbound section pointer */
1609 o(0xc78948); /* mov %rax,%rdi ## first arg in %rdi, this must be ptr */
1610 oad(0xb8, 0); /* call to function */
1612 #endif
1615 /* generate function epilog */
1616 void gfunc_epilog(void)
1618 int v, saved_ind;
1620 #ifdef CONFIG_TCC_BCHECK
1621 if (tcc_state->do_bounds_check
1622 && func_bound_offset != lbounds_section->data_offset)
1624 addr_t saved_ind;
1625 addr_t *bounds_ptr;
1626 Sym *sym_data;
1628 /* add end of table info */
1629 bounds_ptr = section_ptr_add(lbounds_section, sizeof(addr_t));
1630 *bounds_ptr = 0;
1632 /* generate bound local allocation */
1633 sym_data = get_sym_ref(&char_pointer_type, lbounds_section,
1634 func_bound_offset, lbounds_section->data_offset);
1635 saved_ind = ind;
1636 ind = func_bound_ind;
1637 greloc(cur_text_section, sym_data, ind + 1, R_386_32);
1638 ind = ind + 5 + 3;
1639 gen_static_call(TOK___bound_local_new);
1640 ind = saved_ind;
1642 /* generate bound check local freeing */
1643 o(0x5250); /* save returned value, if any */
1644 greloc(cur_text_section, sym_data, ind + 1, R_386_32);
1645 oad(0xb8, 0); /* mov xxx, %rax */
1646 o(0xc78948); /* mov %rax,%rdi ## first arg in %rdi, this must be ptr */
1647 gen_static_call(TOK___bound_local_delete);
1648 o(0x585a); /* restore returned value, if any */
1650 #endif
1651 o(0xc9); /* leave */
1652 if (func_ret_sub == 0) {
1653 o(0xc3); /* ret */
1654 } else {
1655 o(0xc2); /* ret n */
1656 g(func_ret_sub);
1657 g(func_ret_sub >> 8);
1659 /* align local size to word & save local variables */
1660 v = (-loc + 15) & -16;
1661 saved_ind = ind;
1662 ind = func_sub_sp_offset - FUNC_PROLOG_SIZE;
1663 o(0xe5894855); /* push %rbp, mov %rsp, %rbp */
1664 o(0xec8148); /* sub rsp, stacksize */
1665 gen_le32(v);
1666 ind = saved_ind;
1669 #endif /* not PE */
1671 /* generate a jump to a label */
1672 int gjmp(int t)
1674 return psym(0xe9, t);
1677 /* generate a jump to a fixed address */
1678 void gjmp_addr(int a)
1680 int r;
1681 r = a - ind - 2;
1682 if (r == (char)r) {
1683 g(0xeb);
1684 g(r);
1685 } else {
1686 oad(0xe9, a - ind - 5);
1690 /* generate a test. set 'inv' to invert test. Stack entry is popped */
1691 int gtst(int inv, int t)
1693 int v = vtop->r & VT_VALMASK;
1694 if (v == VT_CMP) {
1695 /* fast case : can jump directly since flags are set */
1696 if (vtop->c.i & 0x100)
1698 /* This was a float compare. If the parity flag is set
1699 the result was unordered. For anything except != this
1700 means false and we don't jump (anding both conditions).
1701 For != this means true (oring both).
1702 Take care about inverting the test. We need to jump
1703 to our target if the result was unordered and test wasn't NE,
1704 otherwise if unordered we don't want to jump. */
1705 vtop->c.i &= ~0x100;
1706 if (inv == (vtop->c.i == TOK_NE))
1707 o(0x067a); /* jp +6 */
1708 else
1710 g(0x0f);
1711 t = psym(0x8a, t); /* jp t */
1714 g(0x0f);
1715 t = psym((vtop->c.i - 16) ^ inv, t);
1716 } else if (v == VT_JMP || v == VT_JMPI) {
1717 /* && or || optimization */
1718 if ((v & 1) == inv) {
1719 uint32_t n1, n = vtop->c.i;
1720 /* insert vtop->c jump list in t */
1721 while ((n1 = read32le(cur_text_section->data + n)))
1722 n = n1;
1723 write32le(cur_text_section->data + n, t);
1724 t = vtop->c.i;
1725 } else {
1726 t = gjmp(t);
1727 gsym(vtop->c.i);
1730 vtop--;
1731 return t;
1734 /* generate an integer binary operation */
1735 void gen_opi(int op)
1737 int r, fr, opc, c;
1738 int ll, uu, cc;
1740 ll = is64_type(vtop[-1].type.t);
1741 uu = (vtop[-1].type.t & VT_UNSIGNED) != 0;
1742 cc = (vtop->r & (VT_VALMASK | VT_LVAL | VT_SYM)) == VT_CONST;
1744 switch(op) {
1745 case '+':
1746 case TOK_ADDC1: /* add with carry generation */
1747 opc = 0;
1748 gen_op8:
1749 if (cc && (!ll || (int)vtop->c.i == vtop->c.i)) {
1750 /* constant case */
1751 vswap();
1752 r = gv(RC_INT);
1753 vswap();
1754 c = vtop->c.i;
1755 if (c == (char)c) {
1756 /* XXX: generate inc and dec for smaller code ? */
1757 orex(ll, r, 0, 0x83);
1758 o(0xc0 | (opc << 3) | REG_VALUE(r));
1759 g(c);
1760 } else {
1761 orex(ll, r, 0, 0x81);
1762 oad(0xc0 | (opc << 3) | REG_VALUE(r), c);
1764 } else {
1765 gv2(RC_INT, RC_INT);
1766 r = vtop[-1].r;
1767 fr = vtop[0].r;
1768 orex(ll, r, fr, (opc << 3) | 0x01);
1769 o(0xc0 + REG_VALUE(r) + REG_VALUE(fr) * 8);
1771 vtop--;
1772 if (op >= TOK_ULT && op <= TOK_GT) {
1773 vtop->r = VT_CMP;
1774 vtop->c.i = op;
1776 break;
1777 case '-':
1778 case TOK_SUBC1: /* sub with carry generation */
1779 opc = 5;
1780 goto gen_op8;
1781 case TOK_ADDC2: /* add with carry use */
1782 opc = 2;
1783 goto gen_op8;
1784 case TOK_SUBC2: /* sub with carry use */
1785 opc = 3;
1786 goto gen_op8;
1787 case '&':
1788 opc = 4;
1789 goto gen_op8;
1790 case '^':
1791 opc = 6;
1792 goto gen_op8;
1793 case '|':
1794 opc = 1;
1795 goto gen_op8;
1796 case '*':
1797 gv2(RC_INT, RC_INT);
1798 r = vtop[-1].r;
1799 fr = vtop[0].r;
1800 orex(ll, fr, r, 0xaf0f); /* imul fr, r */
1801 o(0xc0 + REG_VALUE(fr) + REG_VALUE(r) * 8);
1802 vtop--;
1803 break;
1804 case TOK_SHL:
1805 opc = 4;
1806 goto gen_shift;
1807 case TOK_SHR:
1808 opc = 5;
1809 goto gen_shift;
1810 case TOK_SAR:
1811 opc = 7;
1812 gen_shift:
1813 opc = 0xc0 | (opc << 3);
1814 if (cc) {
1815 /* constant case */
1816 vswap();
1817 r = gv(RC_INT);
1818 vswap();
1819 orex(ll, r, 0, 0xc1); /* shl/shr/sar $xxx, r */
1820 o(opc | REG_VALUE(r));
1821 g(vtop->c.i & (ll ? 63 : 31));
1822 } else {
1823 /* we generate the shift in ecx */
1824 gv2(RC_INT, RC_RCX);
1825 r = vtop[-1].r;
1826 orex(ll, r, 0, 0xd3); /* shl/shr/sar %cl, r */
1827 o(opc | REG_VALUE(r));
1829 vtop--;
1830 break;
1831 case TOK_UDIV:
1832 case TOK_UMOD:
1833 uu = 1;
1834 goto divmod;
1835 case '/':
1836 case '%':
1837 case TOK_PDIV:
1838 uu = 0;
1839 divmod:
1840 /* first operand must be in eax */
1841 /* XXX: need better constraint for second operand */
1842 gv2(RC_RAX, RC_RCX);
1843 r = vtop[-1].r;
1844 fr = vtop[0].r;
1845 vtop--;
1846 save_reg(TREG_RDX);
1847 orex(ll, 0, 0, uu ? 0xd231 : 0x99); /* xor %edx,%edx : cqto */
1848 orex(ll, fr, 0, 0xf7); /* div fr, %eax */
1849 o((uu ? 0xf0 : 0xf8) + REG_VALUE(fr));
1850 if (op == '%' || op == TOK_UMOD)
1851 r = TREG_RDX;
1852 else
1853 r = TREG_RAX;
1854 vtop->r = r;
1855 break;
1856 default:
1857 opc = 7;
1858 goto gen_op8;
1862 void gen_opl(int op)
1864 gen_opi(op);
1867 /* generate a floating point operation 'v = t1 op t2' instruction. The
1868 two operands are guaranted to have the same floating point type */
1869 /* XXX: need to use ST1 too */
1870 void gen_opf(int op)
1872 int a, ft, fc, swapped, r;
1873 int float_type =
1874 (vtop->type.t & VT_BTYPE) == VT_LDOUBLE ? RC_ST0 : RC_FLOAT;
1876 /* convert constants to memory references */
1877 if ((vtop[-1].r & (VT_VALMASK | VT_LVAL)) == VT_CONST) {
1878 vswap();
1879 gv(float_type);
1880 vswap();
1882 if ((vtop[0].r & (VT_VALMASK | VT_LVAL)) == VT_CONST)
1883 gv(float_type);
1885 /* must put at least one value in the floating point register */
1886 if ((vtop[-1].r & VT_LVAL) &&
1887 (vtop[0].r & VT_LVAL)) {
1888 vswap();
1889 gv(float_type);
1890 vswap();
1892 swapped = 0;
1893 /* swap the stack if needed so that t1 is the register and t2 is
1894 the memory reference */
1895 if (vtop[-1].r & VT_LVAL) {
1896 vswap();
1897 swapped = 1;
1899 if ((vtop->type.t & VT_BTYPE) == VT_LDOUBLE) {
1900 if (op >= TOK_ULT && op <= TOK_GT) {
1901 /* load on stack second operand */
1902 load(TREG_ST0, vtop);
1903 save_reg(TREG_RAX); /* eax is used by FP comparison code */
1904 if (op == TOK_GE || op == TOK_GT)
1905 swapped = !swapped;
1906 else if (op == TOK_EQ || op == TOK_NE)
1907 swapped = 0;
1908 if (swapped)
1909 o(0xc9d9); /* fxch %st(1) */
1910 if (op == TOK_EQ || op == TOK_NE)
1911 o(0xe9da); /* fucompp */
1912 else
1913 o(0xd9de); /* fcompp */
1914 o(0xe0df); /* fnstsw %ax */
1915 if (op == TOK_EQ) {
1916 o(0x45e480); /* and $0x45, %ah */
1917 o(0x40fC80); /* cmp $0x40, %ah */
1918 } else if (op == TOK_NE) {
1919 o(0x45e480); /* and $0x45, %ah */
1920 o(0x40f480); /* xor $0x40, %ah */
1921 op = TOK_NE;
1922 } else if (op == TOK_GE || op == TOK_LE) {
1923 o(0x05c4f6); /* test $0x05, %ah */
1924 op = TOK_EQ;
1925 } else {
1926 o(0x45c4f6); /* test $0x45, %ah */
1927 op = TOK_EQ;
1929 vtop--;
1930 vtop->r = VT_CMP;
1931 vtop->c.i = op;
1932 } else {
1933 /* no memory reference possible for long double operations */
1934 load(TREG_ST0, vtop);
1935 swapped = !swapped;
1937 switch(op) {
1938 default:
1939 case '+':
1940 a = 0;
1941 break;
1942 case '-':
1943 a = 4;
1944 if (swapped)
1945 a++;
1946 break;
1947 case '*':
1948 a = 1;
1949 break;
1950 case '/':
1951 a = 6;
1952 if (swapped)
1953 a++;
1954 break;
1956 ft = vtop->type.t;
1957 fc = vtop->c.i;
1958 o(0xde); /* fxxxp %st, %st(1) */
1959 o(0xc1 + (a << 3));
1960 vtop--;
1962 } else {
1963 if (op >= TOK_ULT && op <= TOK_GT) {
1964 /* if saved lvalue, then we must reload it */
1965 r = vtop->r;
1966 fc = vtop->c.i;
1967 if ((r & VT_VALMASK) == VT_LLOCAL) {
1968 SValue v1;
1969 r = get_reg(RC_INT);
1970 v1.type.t = VT_PTR;
1971 v1.r = VT_LOCAL | VT_LVAL;
1972 v1.c.i = fc;
1973 load(r, &v1);
1974 fc = 0;
1977 if (op == TOK_EQ || op == TOK_NE) {
1978 swapped = 0;
1979 } else {
1980 if (op == TOK_LE || op == TOK_LT)
1981 swapped = !swapped;
1982 if (op == TOK_LE || op == TOK_GE) {
1983 op = 0x93; /* setae */
1984 } else {
1985 op = 0x97; /* seta */
1989 if (swapped) {
1990 gv(RC_FLOAT);
1991 vswap();
1993 assert(!(vtop[-1].r & VT_LVAL));
1995 if ((vtop->type.t & VT_BTYPE) == VT_DOUBLE)
1996 o(0x66);
1997 if (op == TOK_EQ || op == TOK_NE)
1998 o(0x2e0f); /* ucomisd */
1999 else
2000 o(0x2f0f); /* comisd */
2002 if (vtop->r & VT_LVAL) {
2003 gen_modrm(vtop[-1].r, r, vtop->sym, fc);
2004 } else {
2005 o(0xc0 + REG_VALUE(vtop[0].r) + REG_VALUE(vtop[-1].r)*8);
2008 vtop--;
2009 vtop->r = VT_CMP;
2010 vtop->c.i = op | 0x100;
2011 } else {
2012 assert((vtop->type.t & VT_BTYPE) != VT_LDOUBLE);
2013 switch(op) {
2014 default:
2015 case '+':
2016 a = 0;
2017 break;
2018 case '-':
2019 a = 4;
2020 break;
2021 case '*':
2022 a = 1;
2023 break;
2024 case '/':
2025 a = 6;
2026 break;
2028 ft = vtop->type.t;
2029 fc = vtop->c.i;
2030 assert((ft & VT_BTYPE) != VT_LDOUBLE);
2032 r = vtop->r;
2033 /* if saved lvalue, then we must reload it */
2034 if ((vtop->r & VT_VALMASK) == VT_LLOCAL) {
2035 SValue v1;
2036 r = get_reg(RC_INT);
2037 v1.type.t = VT_PTR;
2038 v1.r = VT_LOCAL | VT_LVAL;
2039 v1.c.i = fc;
2040 load(r, &v1);
2041 fc = 0;
2044 assert(!(vtop[-1].r & VT_LVAL));
2045 if (swapped) {
2046 assert(vtop->r & VT_LVAL);
2047 gv(RC_FLOAT);
2048 vswap();
2051 if ((ft & VT_BTYPE) == VT_DOUBLE) {
2052 o(0xf2);
2053 } else {
2054 o(0xf3);
2056 o(0x0f);
2057 o(0x58 + a);
2059 if (vtop->r & VT_LVAL) {
2060 gen_modrm(vtop[-1].r, r, vtop->sym, fc);
2061 } else {
2062 o(0xc0 + REG_VALUE(vtop[0].r) + REG_VALUE(vtop[-1].r)*8);
2065 vtop--;
2070 /* convert integers to fp 't' type. Must handle 'int', 'unsigned int'
2071 and 'long long' cases. */
2072 void gen_cvt_itof(int t)
2074 if ((t & VT_BTYPE) == VT_LDOUBLE) {
2075 save_reg(TREG_ST0);
2076 gv(RC_INT);
2077 if ((vtop->type.t & VT_BTYPE) == VT_LLONG) {
2078 /* signed long long to float/double/long double (unsigned case
2079 is handled generically) */
2080 o(0x50 + (vtop->r & VT_VALMASK)); /* push r */
2081 o(0x242cdf); /* fildll (%rsp) */
2082 o(0x08c48348); /* add $8, %rsp */
2083 } else if ((vtop->type.t & (VT_BTYPE | VT_UNSIGNED)) ==
2084 (VT_INT | VT_UNSIGNED)) {
2085 /* unsigned int to float/double/long double */
2086 o(0x6a); /* push $0 */
2087 g(0x00);
2088 o(0x50 + (vtop->r & VT_VALMASK)); /* push r */
2089 o(0x242cdf); /* fildll (%rsp) */
2090 o(0x10c48348); /* add $16, %rsp */
2091 } else {
2092 /* int to float/double/long double */
2093 o(0x50 + (vtop->r & VT_VALMASK)); /* push r */
2094 o(0x2404db); /* fildl (%rsp) */
2095 o(0x08c48348); /* add $8, %rsp */
2097 vtop->r = TREG_ST0;
2098 } else {
2099 int r = get_reg(RC_FLOAT);
2100 gv(RC_INT);
2101 o(0xf2 + ((t & VT_BTYPE) == VT_FLOAT?1:0));
2102 if ((vtop->type.t & (VT_BTYPE | VT_UNSIGNED)) ==
2103 (VT_INT | VT_UNSIGNED) ||
2104 (vtop->type.t & VT_BTYPE) == VT_LLONG) {
2105 o(0x48); /* REX */
2107 o(0x2a0f);
2108 o(0xc0 + (vtop->r & VT_VALMASK) + REG_VALUE(r)*8); /* cvtsi2sd */
2109 vtop->r = r;
2113 /* convert from one floating point type to another */
2114 void gen_cvt_ftof(int t)
2116 int ft, bt, tbt;
2118 ft = vtop->type.t;
2119 bt = ft & VT_BTYPE;
2120 tbt = t & VT_BTYPE;
2122 if (bt == VT_FLOAT) {
2123 gv(RC_FLOAT);
2124 if (tbt == VT_DOUBLE) {
2125 o(0x140f); /* unpcklps */
2126 o(0xc0 + REG_VALUE(vtop->r)*9);
2127 o(0x5a0f); /* cvtps2pd */
2128 o(0xc0 + REG_VALUE(vtop->r)*9);
2129 } else if (tbt == VT_LDOUBLE) {
2130 save_reg(RC_ST0);
2131 /* movss %xmm0,-0x10(%rsp) */
2132 o(0x110ff3);
2133 o(0x44 + REG_VALUE(vtop->r)*8);
2134 o(0xf024);
2135 o(0xf02444d9); /* flds -0x10(%rsp) */
2136 vtop->r = TREG_ST0;
2138 } else if (bt == VT_DOUBLE) {
2139 gv(RC_FLOAT);
2140 if (tbt == VT_FLOAT) {
2141 o(0x140f66); /* unpcklpd */
2142 o(0xc0 + REG_VALUE(vtop->r)*9);
2143 o(0x5a0f66); /* cvtpd2ps */
2144 o(0xc0 + REG_VALUE(vtop->r)*9);
2145 } else if (tbt == VT_LDOUBLE) {
2146 save_reg(RC_ST0);
2147 /* movsd %xmm0,-0x10(%rsp) */
2148 o(0x110ff2);
2149 o(0x44 + REG_VALUE(vtop->r)*8);
2150 o(0xf024);
2151 o(0xf02444dd); /* fldl -0x10(%rsp) */
2152 vtop->r = TREG_ST0;
2154 } else {
2155 int r;
2156 gv(RC_ST0);
2157 r = get_reg(RC_FLOAT);
2158 if (tbt == VT_DOUBLE) {
2159 o(0xf0245cdd); /* fstpl -0x10(%rsp) */
2160 /* movsd -0x10(%rsp),%xmm0 */
2161 o(0x100ff2);
2162 o(0x44 + REG_VALUE(r)*8);
2163 o(0xf024);
2164 vtop->r = r;
2165 } else if (tbt == VT_FLOAT) {
2166 o(0xf0245cd9); /* fstps -0x10(%rsp) */
2167 /* movss -0x10(%rsp),%xmm0 */
2168 o(0x100ff3);
2169 o(0x44 + REG_VALUE(r)*8);
2170 o(0xf024);
2171 vtop->r = r;
2176 /* convert fp to int 't' type */
2177 void gen_cvt_ftoi(int t)
2179 int ft, bt, size, r;
2180 ft = vtop->type.t;
2181 bt = ft & VT_BTYPE;
2182 if (bt == VT_LDOUBLE) {
2183 gen_cvt_ftof(VT_DOUBLE);
2184 bt = VT_DOUBLE;
2187 gv(RC_FLOAT);
2188 if (t != VT_INT)
2189 size = 8;
2190 else
2191 size = 4;
2193 r = get_reg(RC_INT);
2194 if (bt == VT_FLOAT) {
2195 o(0xf3);
2196 } else if (bt == VT_DOUBLE) {
2197 o(0xf2);
2198 } else {
2199 assert(0);
2201 orex(size == 8, r, 0, 0x2c0f); /* cvttss2si or cvttsd2si */
2202 o(0xc0 + REG_VALUE(vtop->r) + REG_VALUE(r)*8);
2203 vtop->r = r;
2206 /* computed goto support */
2207 void ggoto(void)
2209 gcall_or_jmp(1);
2210 vtop--;
2213 /* Save the stack pointer onto the stack and return the location of its address */
2214 ST_FUNC void gen_vla_sp_save(int addr) {
2215 /* mov %rsp,addr(%rbp)*/
2216 gen_modrm64(0x89, TREG_RSP, VT_LOCAL, NULL, addr);
2219 /* Restore the SP from a location on the stack */
2220 ST_FUNC void gen_vla_sp_restore(int addr) {
2221 gen_modrm64(0x8b, TREG_RSP, VT_LOCAL, NULL, addr);
2224 /* Subtract from the stack pointer, and push the resulting value onto the stack */
2225 ST_FUNC void gen_vla_alloc(CType *type, int align) {
2226 #ifdef TCC_TARGET_PE
2227 /* alloca does more than just adjust %rsp on Windows */
2228 vpush_global_sym(&func_old_type, TOK_alloca);
2229 vswap(); /* Move alloca ref past allocation size */
2230 gfunc_call(1);
2231 vset(type, REG_IRET, 0);
2232 #else
2233 int r;
2234 r = gv(RC_INT); /* allocation size */
2235 /* sub r,%rsp */
2236 o(0x2b48);
2237 o(0xe0 | REG_VALUE(r));
2238 /* We align to 16 bytes rather than align */
2239 /* and ~15, %rsp */
2240 o(0xf0e48348);
2241 vpop();
2242 #endif
2246 /* end of x86-64 code generator */
2247 /*************************************************************/
2248 #endif /* ! TARGET_DEFS_ONLY */
2249 /******************************************************/