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Fix SXGA mode, the window was incorrectly setup.
[stkwebcam.git] / stk11xx-sensor.c
blob2c61eabd1936801875f376bff3f0fe454dc7a8fd
1 /* stk11xx-sensor
2 *
3 * Copyright 2007 Jaime Velasco Juan <jsagarribay@gmail.com>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
18 */
19
20 /* Controlling the sensor via the STK1125 vendor specific control interface:
21 * The camera uses an OmniVision sensor and the stk1125 provides an
22 * SCCB(i2c?)-USB bridge which let us program the sensor.
23 * In my case the sensor id is 0x9652, it can be read from sensor's register
24 * 0x0A and 0x0B as follows:
25 * - read register #R:
26 * output #R to index 0x0208
27 * output 0x0070 to index 0x0200
28 * input 1 byte from index 0x0201 (some kind of status register)
29 * until its value is 0x01
30 * input 1 byte from index 0x0209. This is the value of #R
31 * - write value V to register #R
32 * output #R to index 0x0204
33 * output V to index 0x0205
34 * output 0x0005 to index 0x0200
35 * input 1 byte from index 0x0201 until its value becomes 0x04
36 */
37
38 /* It seems the i2c bus is controlled with these registers */
39
40 #include "stk11xx.h"
41
42 #define STK_IIC_BASE (0x0200)
43 # define STK_IIC_OP (STK_IIC_BASE)
44 # define STK_IIC_OP_TX (0x05)
45 # define STK_IIC_OP_RX (0x70)
46 # define STK_IIC_STAT (STK_IIC_BASE+1)
47 # define STK_IIC_STAT_TX_OK (0x04)
48 # define STK_IIC_STAT_RX_OK (0x01)
49 /* I don't know what does this register.
50 * when it is 0x00 or 0x01, we cannot talk to the sensor,
51 * other values work */
52 # define STK_IIC_ENABLE (STK_IIC_BASE+2)
53 # define STK_IIC_ENABLE_NO (0x00)
54 /* This is what the driver writes in windows */
55 # define STK_IIC_ENABLE_YES (0x1e)
56 /* Addres of the slave. Seems like the binary driver look for the
57 * sensor in multiple places, attempting a reset sequence */
58 # define STK_IIC_ADDR (STK_IIC_BASE+3)
59 # define STK_IIC_TX_INDEX (STK_IIC_BASE+4)
60 # define STK_IIC_TX_VALUE (STK_IIC_BASE+5)
61 # define STK_IIC_RX_INDEX (STK_IIC_BASE+8)
62 # define STK_IIC_RX_VALUE (STK_IIC_BASE+9)
63
64 #define MAX_RETRIES (50)
65
66 const int sensor_address_list[] = {0x60, 0x42, 0x22, 0x80, 0xdc, -1};
67
68 /* From ov7670.c (These registers aren't fully accurate) */
69
70 /* Registers */
71 #define REG_GAIN 0x00 /* Gain lower 8 bits (rest in vref) */
72 #define REG_BLUE 0x01 /* blue gain */
73 #define REG_RED 0x02 /* red gain */
74 #define REG_VREF 0x03 /* Pieces of GAIN, VSTART, VSTOP */
75 #define REG_COM1 0x04 /* Control 1 */
76 #define COM1_CCIR656 0x40 /* CCIR656 enable */
77 #define REG_BAVE 0x05 /* U/B Average level */
78 #define REG_GbAVE 0x06 /* Y/Gb Average level */
79 #define REG_AECHH 0x07 /* AEC MS 5 bits */
80 #define REG_RAVE 0x08 /* V/R Average level */
81 #define REG_COM2 0x09 /* Control 2 */
82 #define COM2_SSLEEP 0x10 /* Soft sleep mode */
83 #define REG_PID 0x0a /* Product ID MSB */
84 #define REG_VER 0x0b /* Product ID LSB */
85 #define REG_COM3 0x0c /* Control 3 */
86 #define COM3_SWAP 0x40 /* Byte swap */
87 #define COM3_SCALEEN 0x08 /* Enable scaling */
88 #define COM3_DCWEN 0x04 /* Enable downsamp/crop/window */
89 #define REG_COM4 0x0d /* Control 4 */
90 #define REG_COM5 0x0e /* All "reserved" */
91 #define REG_COM6 0x0f /* Control 6 */
92 #define REG_AECH 0x10 /* More bits of AEC value */
93 #define REG_CLKRC 0x11 /* Clock control */
94 #define CLK_PLL 0x80 /* Enable internal PLL */
95 #define CLK_EXT 0x40 /* Use external clock directly */
96 #define CLK_SCALE 0x3f /* Mask for internal clock scale */
97 #define REG_COM7 0x12 /* Control 7 */
98 #define COM7_RESET 0x80 /* Register reset */
99 #define COM7_FMT_MASK 0x38
100 #define COM7_FMT_SXGA 0x00
101 #define COM7_FMT_VGA 0x40
102 /* FIXME: These formats are from another sensor */
103 #define COM7_FMT_CIF 0x20 /* CIF format */
104 #define COM7_FMT_QVGA 0x10 /* QVGA format */
105 #define COM7_FMT_QCIF 0x08 /* QCIF format */
106 #define COM7_RGB 0x04 /* bits 0 and 2 - RGB format */
107 #define COM7_YUV 0x00 /* YUV */
108 #define COM7_BAYER 0x01 /* Bayer format */
109 #define COM7_PBAYER 0x05 /* "Processed bayer" */
110 #define REG_COM8 0x13 /* Control 8 */
111 #define COM8_FASTAEC 0x80 /* Enable fast AGC/AEC */
112 #define COM8_AECSTEP 0x40 /* Unlimited AEC step size */
113 #define COM8_BFILT 0x20 /* Band filter enable */
114 #define COM8_AGC 0x04 /* Auto gain enable */
115 #define COM8_AWB 0x02 /* White balance enable */
116 #define COM8_AEC 0x01 /* Auto exposure enable */
117 #define REG_COM9 0x14 /* Control 9 - gain ceiling */
118 #define REG_COM10 0x15 /* Control 10 */
119 #define COM10_HSYNC 0x40 /* HSYNC instead of HREF */
120 #define COM10_PCLK_HB 0x20 /* Suppress PCLK on horiz blank */
121 #define COM10_HREF_REV 0x08 /* Reverse HREF */
122 #define COM10_VS_LEAD 0x04 /* VSYNC on clock leading edge */
123 #define COM10_VS_NEG 0x02 /* VSYNC negative */
124 #define COM10_HS_NEG 0x01 /* HSYNC negative */
125 #define REG_HSTART 0x17 /* Horiz start high bits */
126 #define REG_HSTOP 0x18 /* Horiz stop high bits */
127 #define REG_VSTART 0x19 /* Vert start high bits */
128 #define REG_VSTOP 0x1a /* Vert stop high bits */
129 #define REG_PSHFT 0x1b /* Pixel delay after HREF */
130 #define REG_MIDH 0x1c /* Manuf. ID high */
131 #define REG_MIDL 0x1d /* Manuf. ID low */
132 #define REG_MVFP 0x1e /* Mirror / vflip */
133 #define MVFP_MIRROR 0x20 /* Mirror image */
134 #define MVFP_FLIP 0x10 /* Vertical flip */
135
136 #define REG_AEW 0x24 /* AGC upper limit */
137 #define REG_AEB 0x25 /* AGC lower limit */
138 #define REG_VPT 0x26 /* AGC/AEC fast mode op region */
139 #define REG_HSYST 0x30 /* HSYNC rising edge delay */
140 #define REG_HSYEN 0x31 /* HSYNC falling edge delay */
141 #define REG_HREF 0x32 /* HREF pieces */
142 #define REG_TSLB 0x3a /* lots of stuff */
143 #define TSLB_YLAST 0x04 /* UYVY or VYUY - see com13 */
144 #define TSLB_BYTEORD 0x08 /* swap bytes in 16bit mode? */
145 #define REG_COM11 0x3b /* Control 11 */
146 #define COM11_NIGHT 0x80 /* NIght mode enable */
147 #define COM11_NMFR 0x60 /* Two bit NM frame rate */
148 #define COM11_HZAUTO 0x10 /* Auto detect 50/60 Hz */
149 #define COM11_50HZ 0x08 /* Manual 50Hz select */
150 #define COM11_EXP 0x02
151 #define REG_COM12 0x3c /* Control 12 */
152 #define COM12_HREF 0x80 /* HREF always */
153 #define REG_COM13 0x3d /* Control 13 */
154 #define COM13_GAMMA 0x80 /* Gamma enable */
155 #define COM13_UVSAT 0x40 /* UV saturation auto adjustment */
156 #define COM13_UVSWAP 0x01 /* V before U - w/TSLB */
157 #define REG_COM14 0x3e /* Control 14 */
158 #define COM14_DCWEN 0x10 /* DCW/PCLK-scale enable */
159 #define REG_EDGE 0x3f /* Edge enhancement factor */
160 #define REG_COM15 0x40 /* Control 15 */
161 #define COM15_R10F0 0x00 /* Data range 10 to F0 */
162 #define COM15_R01FE 0x80 /* 01 to FE */
163 #define COM15_R00FF 0xc0 /* 00 to FF */
164 #define COM15_RGB565 0x10 /* RGB565 output */
165 #define COM15_RGBFIXME 0x20 /* FIXME */
166 #define COM15_RGB555 0x30 /* RGB555 output */
167 #define REG_COM16 0x41 /* Control 16 */
168 #define COM16_AWBGAIN 0x08 /* AWB gain enable */
169 #define REG_COM17 0x42 /* Control 17 */
170 #define COM17_AECWIN 0xc0 /* AEC window - must match COM4 */
171 #define COM17_CBAR 0x08 /* DSP Color bar */
172
173 /*
174 * This matrix defines how the colors are generated, must be
175 * tweaked to adjust hue and saturation.
176 *
177 * Order: v-red, v-green, v-blue, u-red, u-green, u-blue
178 *
179 * They are nine-bit signed quantities, with the sign bit
180 * stored in 0x58. Sign for v-red is bit 0, and up from there.
181 */
182 #define REG_CMATRIX_BASE 0x4f
183 #define CMATRIX_LEN 6
184 #define REG_CMATRIX_SIGN 0x58
185
186
187 #define REG_BRIGHT 0x55 /* Brightness */
188 #define REG_CONTRAS 0x56 /* Contrast control */
189
190 #define REG_GFIX 0x69 /* Fix gain control */
191
192 #define REG_RGB444 0x8c /* RGB 444 control */
193 #define R444_ENABLE 0x02 /* Turn on RGB444, overrides 5x5 */
194 #define R444_RGBX 0x01 /* Empty nibble at end */
195
196 #define REG_HAECC1 0x9f /* Hist AEC/AGC control 1 */
197 #define REG_HAECC2 0xa0 /* Hist AEC/AGC control 2 */
198
199 #define REG_BD50MAX 0xa5 /* 50hz banding step limit */
200 #define REG_HAECC3 0xa6 /* Hist AEC/AGC control 3 */
201 #define REG_HAECC4 0xa7 /* Hist AEC/AGC control 4 */
202 #define REG_HAECC5 0xa8 /* Hist AEC/AGC control 5 */
203 #define REG_HAECC6 0xa9 /* Hist AEC/AGC control 6 */
204 #define REG_HAECC7 0xaa /* Hist AEC/AGC control 7 */
205 #define REG_BD60MAX 0xab /* 60hz banding step limit */
206
207
208
209
210
211
212 /* Returns 0 if OK */
213 int stk_sensor_outb(struct usb_stk11xx *dev, u8 reg, u8 val)
214 {
215 int i = 0;
216 int tmpval = 0;
217
218 if (usb_stk11xx_write_registry(dev, STK_IIC_TX_INDEX, reg))
219 return 1;
220 if (usb_stk11xx_write_registry(dev, STK_IIC_TX_VALUE, val))
221 return 1;
222 if (usb_stk11xx_write_registry(dev, STK_IIC_OP, STK_IIC_OP_TX))
223 return 1;
224 do {
225 if (usb_stk11xx_read_registry(dev, STK_IIC_STAT, &tmpval))
226 return 1;
227 i++;
228 } while (tmpval == 0 && i < MAX_RETRIES);
229 if (tmpval != STK_IIC_STAT_TX_OK) {
230 if (tmpval)
231 STK_ERROR("stk_sensor_outb failed, status=0x%02x\n",
232 tmpval);
233 return 1;
234 }
235 else return 0;
236 }
237 int stk_sensor_inb(struct usb_stk11xx *dev, u8 reg, u8 *val)
238 {
239 int i = 0;
240 int tmpval = 0;
241
242 if (usb_stk11xx_write_registry(dev, STK_IIC_RX_INDEX, reg))
243 return 1;
244 if (usb_stk11xx_write_registry(dev, STK_IIC_OP, STK_IIC_OP_RX))
245 return 1;
246 do {
247 if (usb_stk11xx_read_registry(dev, STK_IIC_STAT, &tmpval))
248 return 1;
249 i++;
250 } while (tmpval == 0 && i < MAX_RETRIES);
251 if (tmpval != STK_IIC_STAT_RX_OK) {
252 if (tmpval)
253 STK_ERROR("stk_sensor_inb failed, status=0x%02x\n",
254 tmpval);
255 return 1;
256 }
257
258 if (usb_stk11xx_read_registry(dev, STK_IIC_RX_VALUE, &tmpval))
259 return 1;
260
261 *val = (u8) tmpval;
262 return 0;
263 }
264
265 static int stk_sensor_write_regvals(struct usb_stk11xx *dev,
266 struct regval *rv)
267 {
268 int ret;
269 if (rv == NULL)
270 return 0;
271 while (rv->reg != 0xff || rv->val != 0xff) {
272 ret = stk_sensor_outb(dev, rv->reg, rv->val);
273 if (ret != 0) {
274 return ret;
275 }
276 rv++;
277 }
278 return 0;
279 }
280
281 int stk_sensor_dump_registers(struct usb_stk11xx *dev, u8 first, u8 last)
282 {
283 u8 idx = first;
284 u8 val;
285 while (idx <= last) {
286 printk("%02x ", (int) idx);
287 idx++;
288 }
289 printk("\n");
290 idx = first;
291 while (idx <= last) {
292 if (stk_sensor_inb(dev, idx, &val)) {
293 STK_ERROR("dump_registers failed!\n");
294 return 1;
295 }
296 printk("%02x ", (int) val);
297 idx++;
298 }
299 printk("\n");
300 return 0;
301 }
302
303 int stk_sensor_sleep(struct usb_stk11xx *dev)
304 {
305 u8 tmp;
306 return stk_sensor_inb(dev, REG_COM2, &tmp)
307 || stk_sensor_outb(dev, REG_COM2, tmp|COM2_SSLEEP);
308 }
309
310 int stk_sensor_wakeup(struct usb_stk11xx *dev)
311 {
312 u8 tmp;
313 return stk_sensor_inb(dev, REG_COM2, &tmp)
314 || stk_sensor_outb(dev, REG_COM2, tmp&~COM2_SSLEEP);
315 }
316
317 static struct regval ov_initvals[] = {
318 #if 1
319 // {REG_COM7, COM7_RESET},
320 {REG_CLKRC, CLK_PLL},
321 {REG_COM11, 0x01},
322 {0x6a, 0x7d},
323 {REG_AECH, 0x40},
324 {REG_GAIN, 0x00},
325 {REG_BLUE, 0x80},
326 {REG_RED, 0x80},
327 {REG_COM8, COM8_FASTAEC|COM8_AECSTEP|COM8_BFILT|COM8_AGC|COM8_AEC},
328 {0x39, 0x50}, {0x38, 0x93},
329 {0x37, 0x00}, {0x35, 0x81},
330 {REG_COM5, 0x20},
331 {REG_COM1, 0x00},
332 {REG_COM3, 0x00},
333 {REG_COM4, 0x00},
334 {REG_PSHFT, 0x00},
335 {0x16, 0x07},
336 {0x33, 0xe2}, {0x34, 0xbf},
337 {REG_COM16, 0x00},
338 {0x96, 0x04},
339 /* Gamma curve values */
340 /* { 0x7a, 0x20 }, { 0x7b, 0x10 },
341 { 0x7c, 0x1e }, { 0x7d, 0x35 },
342 { 0x7e, 0x5a }, { 0x7f, 0x69 },
343 { 0x80, 0x76 }, { 0x81, 0x80 },
344 { 0x82, 0x88 }, { 0x83, 0x8f },
345 { 0x84, 0x96 }, { 0x85, 0xa3 },
346 { 0x86, 0xaf }, { 0x87, 0xc4 },
347 { 0x88, 0xd7 }, { 0x89, 0xe8 },
348 */
349 {REG_GFIX, 0x40},
350 {0x8e, 0x00},
351 {REG_COM12, 0x73},
352 {0x8f, 0xdf}, {0x8b, 0x06},
353 {0x8c, 0x20},
354 {0x94, 0x88}, {0x95, 0x88},
355 // {REG_COM15, 0xc1}, //TODO
356 {0x29, 0x3f},
357 {REG_COM6, 0x42},
358 {REG_BD50MAX, 0x80},
359 {REG_MVFP, MVFP_MIRROR|MVFP_FLIP},
360 {REG_HAECC6, 0xb8}, {REG_HAECC7, 0x92},
361 {REG_BD60MAX, 0x0a},
362 {0x90, 0x00}, {0x91, 0x00},
363 {REG_HAECC1, 0x00}, {REG_HAECC2, 0x00},
364 {REG_AEW, 0x68}, {REG_AEB, 0x5c},
365 {REG_VPT, 0xc3},
366 {REG_COM9, 0x2e},
367 {0x2a, 0x00}, {0x2b, 0x00},
368
369 #else
370 { REG_COM7, COM7_RESET },
371 /*
372 * Clock scale: 3 = 15fps
373 * 2 = 20fps
374 * 1 = 30fps
375 */
376 { REG_CLKRC, CLK_PLL }, /* OV: clock scale (30 fps) */
377 { REG_TSLB, 0x04 }, /* OV */
378 { REG_COM7, 0x45 }, /* VGA */
379
380 { REG_COM3, 0 }, { REG_COM14, 0 },
381 /* Mystery scaling numbers */
382 { 0x70, 0x3a }, { 0x71, 0x35 },
383 { 0x72, 0x11 }, { 0x73, 0xf0 },
384 { 0xa2, 0x02 }, { REG_COM10, 0x0 },
385
386 /* Gamma curve values */
387 { 0x7a, 0x20 }, { 0x7b, 0x10 },
388 { 0x7c, 0x1e }, { 0x7d, 0x35 },
389 { 0x7e, 0x5a }, { 0x7f, 0x69 },
390 { 0x80, 0x76 }, { 0x81, 0x80 },
391 { 0x82, 0x88 }, { 0x83, 0x8f },
392 { 0x84, 0x96 }, { 0x85, 0xa3 },
393 { 0x86, 0xaf }, { 0x87, 0xc4 },
394 { 0x88, 0xd7 }, { 0x89, 0xe8 },
395
396 /* AGC and AEC parameters. Note we start by disabling those features,
397 then turn them only after tweaking the values. */
398 { REG_COM8, COM8_FASTAEC | COM8_AECSTEP | COM8_BFILT },
399 { REG_GAIN, 0 }, { REG_AECH, 0 },
400 { REG_COM4, 0x40 }, /* magic reserved bit */
401 { REG_COM9, 0x18 }, /* 4x gain + magic rsvd bit */
402 { REG_BD50MAX, 0x05 }, { REG_BD60MAX, 0x07 },
403 { REG_AEW, 0x95 }, { REG_AEB, 0x33 },
404 { REG_VPT, 0xe3 }, { REG_HAECC1, 0x78 },
405 { REG_HAECC2, 0x68 }, { 0xa1, 0x03 }, /* magic */
406 { REG_HAECC3, 0xd8 }, { REG_HAECC4, 0xd8 },
407 { REG_HAECC5, 0xf0 }, { REG_HAECC6, 0x90 },
408 { REG_HAECC7, 0x94 },
409 { REG_COM8, COM8_FASTAEC|COM8_AECSTEP|COM8_BFILT|COM8_AGC|COM8_AEC },
410
411 /* Almost all of these are magic "reserved" values. */
412 { REG_COM5, 0x61 }, { REG_COM6, 0x4b },
413 { 0x16, 0x02 }, { REG_MVFP, 0x07|MVFP_MIRROR },
414 { 0x21, 0x02 }, { 0x22, 0x91 },
415 { 0x29, 0x07 }, { 0x33, 0x0b },
416 { 0x35, 0x0b }, { 0x37, 0x1d },
417 { 0x38, 0x71 }, { 0x39, 0x2a },
418 { REG_COM12, 0x78 }, { 0x4d, 0x40 },
419 { 0x4e, 0x20 }, { REG_GFIX, 0 },
420 { 0x6b, 0x4a }, { 0x74, 0x10 },
421 { 0x8d, 0x4f }, { 0x8e, 0 },
422 { 0x8f, 0 }, { 0x90, 0 },
423 { 0x91, 0 }, { 0x96, 0 },
424 { 0x9a, 0 }, { 0xb0, 0x84 },
425 { 0xb1, 0x0c }, { 0xb2, 0x0e },
426 { 0xb3, 0x82 }, { 0xb8, 0x0a },
427
428 /* More reserved magic, some of which tweaks white balance */
429 { 0x43, 0x0a }, { 0x44, 0xf0 },
430 { 0x45, 0x34 }, { 0x46, 0x58 },
431 { 0x47, 0x28 }, { 0x48, 0x3a },
432 { 0x59, 0x88 }, { 0x5a, 0x88 },
433 { 0x5b, 0x44 }, { 0x5c, 0x67 },
434 { 0x5d, 0x49 }, { 0x5e, 0x0e },
435 { 0x6c, 0x0a }, { 0x6d, 0x55 },
436 { 0x6e, 0x11 }, { 0x6f, 0x9f }, /* "9e for advance AWB" */
437 { 0x6a, 0x40 }, { REG_BLUE, 0x40 },
438 { REG_RED, 0x60 },
439 { REG_COM8, COM8_FASTAEC|COM8_AECSTEP|COM8_BFILT|COM8_AGC|COM8_AEC|COM8_AWB },
440
441 /* Matrix coefficients */
442 { 0x4f, 0x80 }, { 0x50, 0x80 },
443 { 0x51, 0 }, { 0x52, 0x22 },
444 { 0x53, 0x5e }, { 0x54, 0x80 },
445 { 0x58, 0x9e },
446
447 { REG_COM16, COM16_AWBGAIN }, { REG_EDGE, 0 },
448 { 0x75, 0x05 }, { 0x76, 0xe1 },
449 { 0x4c, 0 }, { 0x77, 0x01 },
450 { REG_COM13, 0xc3 }, { 0x4b, 0x09 },
451 { 0xc9, 0x60 }, { REG_COM16, 0x38 },
452 { 0x56, 0x40 },
453
454 { 0x34, 0x11 }, { REG_COM11, COM11_EXP|COM11_HZAUTO },
455 { 0xa4, 0x88 }, { 0x96, 0 },
456 { 0x97, 0x30 }, { 0x98, 0x20 },
457 { 0x99, 0x30 }, { 0x9a, 0x84 },
458 { 0x9b, 0x29 }, { 0x9c, 0x03 },
459 { 0x9d, 0x4c }, { 0x9e, 0x3f },
460 { 0x78, 0x04 },
461
462 #endif
463 #if 0
464 /* AGC and AEC parameters. Note we start by disabling those features,
465 then turn them only after tweaking the values. */
466 { REG_COM8, COM8_FASTAEC | COM8_AECSTEP | COM8_BFILT },
467 /* { REG_GAIN, 0 }, { REG_AECH, 0 },*/
468 // { REG_COM4, 0x40 }, /* magic reserved bit */
469 // { REG_COM9, 0x18 }, /* 4x gain + magic rsvd bit */
470 { REG_BD50MAX, 0x05 }, { REG_BD60MAX, 0x07 },
471 { REG_AEW, 0x95 }, { REG_AEB, 0x33 },
472 { REG_VPT, 0xe3 },/* { REG_HAECC1, 0x78 },
473 { REG_HAECC2, 0x68 }, { 0xa1, 0x03 }, *//* magic *//*
474 { REG_HAECC3, 0xd8 }, { REG_HAECC4, 0xd8 },
475 { REG_HAECC5, 0xf0 }, { REG_HAECC6, 0x90 },
476 { REG_HAECC7, 0x94 },*/
477 { REG_COM8, COM8_FASTAEC|COM8_AECSTEP|COM8_BFILT|COM8_AGC|COM8_AEC },
478 #endif
479 {0xff, 0xff}, /* END MARKER */
480 };
481
482 /* Search the sensor in the i2c bus.
483 * We attemp to reset the sensor in different addresses, until we get an
484 * ACK or give up */
485 int stk_sensor_find(struct usb_stk11xx *dev)
486 {
487 int i = 0;
488 u8 idl = 0;
489 u8 idh = 0;
490
491 if (usb_stk11xx_write_registry(dev, STK_IIC_ENABLE, STK_IIC_ENABLE_YES))
492 return 1;
493 do {
494 if (usb_stk11xx_write_registry(dev, STK_IIC_ADDR,
495 sensor_address_list[i]))
496 return 1;
497 if (stk_sensor_outb(dev, REG_COM7, COM7_RESET) == 0)
498 break;
499 i++;
500 } while (sensor_address_list[i] != -1);
501 if (sensor_address_list[i] == -1) {
502 STK_ERROR("Could not find sensor, giving up\n");
503 return 1;
504 }
505 msleep(10);
506 /* Read the manufacturer ID: ov = 0x7FA2 */
507 if (stk_sensor_inb(dev, REG_MIDH, &idh)
508 || stk_sensor_inb(dev, REG_MIDL, &idl)) {
509 STK_ERROR("Strange error reading sensor ID\n");
510 return 1;
511 }
512 if (idh != 0x7F || idl != 0xA2) {
513 STK_ERROR("Huh? you don't have a sensor from ovt\n");
514 return 1;
515 }
516 if (stk_sensor_inb(dev, REG_PID, &idh)
517 || stk_sensor_inb(dev, REG_VER, &idl)) {
518 STK_ERROR("stk_sensor_find failed!\n");
519 return 1;
520 }
521 stk_sensor_write_regvals(dev, ov_initvals);
522 msleep(10);
523 STK_INFO("OmniVision sensor detected, id %02X%02X"
524 " at address %x\n", idh, idl, sensor_address_list[i]);
525 return 0;
526 }
527
528 /* V4L2_PIX_FMT_UYVY */
529 static struct regval ov_fmt_uyvy[] = {
530 {REG_TSLB, TSLB_YLAST|0x08 },
531 { 0x4f, 0x80 }, /* "matrix coefficient 1" */
532 { 0x50, 0x80 }, /* "matrix coefficient 2" */
533 { 0x51, 0 }, /* vb */
534 { 0x52, 0x22 }, /* "matrix coefficient 4" */
535 { 0x53, 0x5e }, /* "matrix coefficient 5" */
536 { 0x54, 0x80 }, /* "matrix coefficient 6" */
537 {REG_COM13, COM13_UVSAT|0x10},
538 {REG_COM15, COM15_R00FF },
539 {0xff, 0xff}, /* END MARKER */
540 };
541
542 /* V4L2_PIX_FMT_RGB565X rrrrrggg gggbbbbb */
543 static struct regval ov_fmt_rgbr[] = {
544 { REG_RGB444, 0 }, /* No RGB444 please */
545 {REG_TSLB, 0x00},
546 { REG_COM1, 0x0 },
547 { REG_COM9, 0x38 }, /* 16x gain ceiling; 0x8 is reserved bit */
548 { 0x4f, 0xb3 }, /* "matrix coefficient 1" */
549 { 0x50, 0xb3 }, /* "matrix coefficient 2" */
550 { 0x51, 0 }, /* vb */
551 { 0x52, 0x3d }, /* "matrix coefficient 4" */
552 { 0x53, 0xa7 }, /* "matrix coefficient 5" */
553 { 0x54, 0xe4 }, /* "matrix coefficient 6" */
554 { REG_COM13, COM13_GAMMA },
555 { REG_COM15, COM15_RGB565|COM15_R00FF },
556 { 0xff, 0xff },
557 };
558
559 /* V4L2_PIX_FMT_RGB565 gggbbbbb rrrrrggg */
560 static struct regval ov_fmt_rgbp[] = {
561 { REG_RGB444, 0 }, /* No RGB444 please */
562 {REG_TSLB, TSLB_BYTEORD },
563 { REG_COM1, 0x0 },
564 { REG_COM9, 0x38 }, /* 16x gain ceiling; 0x8 is reserved bit */
565 { 0x4f, 0xb3 }, /* "matrix coefficient 1" */
566 { 0x50, 0xb3 }, /* "matrix coefficient 2" */
567 { 0x51, 0 }, /* vb */
568 { 0x52, 0x3d }, /* "matrix coefficient 4" */
569 { 0x53, 0xa7 }, /* "matrix coefficient 5" */
570 { 0x54, 0xe4 }, /* "matrix coefficient 6" */
571 { REG_COM13, COM13_GAMMA },
572 { REG_COM15, COM15_RGB565|COM15_R00FF },
573 { 0xff, 0xff },
574 };
575
576 /*FIXME BROKEN */
577 static struct regval ov_fmt_rgb444[] = {
578 { REG_RGB444, R444_ENABLE }, /* Enable xxxxrrrr ggggbbbb */
579 { REG_COM1, 0x00 }, /* Magic reserved bit */
580 // { REG_COM15, COM15_R01FE|COM15_RGB555 }, /* Data range needed? */
581 { REG_COM15, 0x00 }, /* Data range needed? */
582 { REG_COM9, 0x38 }, /* 16x gain ceiling; 0x8 is reserved bit */
583 { 0x4f, 0xb3 }, /* "matrix coefficient 1" */
584 { 0x50, 0xb3 }, /* "matrix coefficient 2" */
585 { 0x51, 0 }, /* vb */
586 { 0x52, 0x3d }, /* "matrix coefficient 4" */
587 { 0x53, 0xa7 }, /* "matrix coefficient 5" */
588 { 0x54, 0xe4 }, /* "matrix coefficient 6" */
589 //{ REG_COM13, COM13_GAMMA|COM13_UVSAT|0x2 }, /* Magic rsvd bit */
590 { REG_COM13, COM13_GAMMA|0x2 }, /* Magic rsvd bit */
591 { 0xff, 0xff },
592 };
593
594 /* V4L2_PIX_FMT_SRGGB8 */
595 static struct regval ov_fmt_bayer[] = {
596 /* This changes color order */
597 {REG_TSLB, 0x40}, /* BGGR */
598 /* {REG_TSLB, 0x08}, */ /* BGGR with vertical image flipping */
599 {REG_COM15, COM15_R00FF },
600 {0xff, 0xff}, /* END MARKER */
601 };
602 /*
603 * Store a set of start/stop values into the camera.
604 */
605 static int stk_sensor_set_hw(struct usb_stk11xx *dev,
606 int hstart, int hstop, int vstart, int vstop)
607 {
608 int ret;
609 unsigned char v;
610 /*
611 * Horizontal: 11 bits, top 8 live in hstart and hstop. Bottom 3 of
612 * hstart are in href[2:0], bottom 3 of hstop in href[5:3]. There is
613 * a mystery "edge offset" value in the top two bits of href.
614 */
615 ret = stk_sensor_outb(dev, REG_HSTART, (hstart >> 3) & 0xff);
616 STK_DEBUG("HSTART: 0x%02x <- 0x%02x\n", REG_HSTART, (hstart>>3)&0xff);
617 ret += stk_sensor_outb(dev, REG_HSTOP, (hstop >> 3) & 0xff);
618 STK_DEBUG("HSTOP: 0x%02x <- 0x%02x\n", REG_HSTOP, (hstop>>3)&0xff);
619 ret += stk_sensor_inb(dev, REG_HREF, &v);
620 v = (v & 0xc0) | ((hstop & 0x7) << 3) | (hstart & 0x7);
621 msleep(10);
622 ret += stk_sensor_outb(dev, REG_HREF, v);
623 STK_DEBUG("HREF: 0x%02x <- 0x%02x\n", REG_HREF, v);
624 /*
625 * Vertical: similar arrangement (note: this is different from ov7670.c)
626 */
627 ret += stk_sensor_outb(dev, REG_VSTART, (vstart >> 3) & 0xff);
628 STK_DEBUG("VSTART: 0x%02x <- 0x%02x\n", REG_VSTART, (vstart>>3)&0xff);
629 ret += stk_sensor_outb(dev, REG_VSTOP, (vstop >> 3) & 0xff);
630 STK_DEBUG("VSTOP: 0x%02x <- 0x%02x\n", REG_VSTOP, (vstop>>3)&0xff);
631 ret += stk_sensor_inb(dev, REG_VREF, &v);
632 v = (v & 0xc0) | ((vstop & 0x7) << 3) | (vstart & 0x7);
633 msleep(10);
634 ret += stk_sensor_outb(dev, REG_VREF, v);
635 STK_DEBUG("VREF: 0x%02x <- 0x%02x\n", REG_VREF, v);
636 return ret;
637 }
638
639
640 int stk_sensor_configure(struct usb_stk11xx *dev)
641 {
642 int com7;
643 struct regval *rv;
644
645 switch (dev->vsettings.mode) {
646 case MODE_VGA: com7 = COM7_FMT_VGA;
647 STK_INFO("VGA mode\n");
648 break;
649 case MODE_SXGA: com7 = COM7_FMT_SXGA;
650 STK_INFO("SXGA mode\n");
651 break;
652 default: STK_ERROR("Unsupported mode\n");
653 return -EFAULT;
654 }
655 switch (dev->vsettings.palette) {
656 case V4L2_PIX_FMT_UYVY:
657 com7 |= COM7_YUV;
658 rv = ov_fmt_uyvy;
659 STK_INFO("YUV mode\n");
660 break;
661 case V4L2_PIX_FMT_RGB565:
662 com7 |= COM7_RGB;
663 rv = ov_fmt_rgbp;
664 STK_INFO("RGBP mode\n");
665 break;
666 case V4L2_PIX_FMT_RGB565X:
667 com7 |= COM7_RGB;
668 rv = ov_fmt_rgbr;
669 STK_INFO("RGBR mode\n");
670 break;
671 case V4L2_PIX_FMT_SBGGR8:
672 com7 |= COM7_PBAYER;
673 rv = ov_fmt_bayer;
674 STK_INFO("Raw bayer mode\n");
675 break;
676 case V4L2_PIX_FMT_RGB444:
677 com7 |= COM7_RGB;
678 rv = ov_fmt_rgb444;
679 STK_INFO("RGB444 mode\n");
680 break;
681 default: STK_ERROR("Unsupported colorspace\n");
682 return -EFAULT;
683 }
684 //FIXME sometimes the sensor go to a bad state
685 //stk_sensor_write_regvals(dev, ov_initvals);
686 stk_sensor_outb(dev, REG_COM7, com7);
687 msleep(100);
688 stk_sensor_write_regvals(dev, rv);
689 msleep(100);
690 switch (dev->vsettings.mode) {
691 case MODE_VGA:
692 if (stk_sensor_set_hw(dev, 302, 1582, 6, 486))
693 STK_ERROR("stk_sensor_set_hw failed (VGA)\n");
694 break;
695 case MODE_SXGA:
696 //FIXME These settings seem ignored by the sensor
697 if (stk_sensor_set_hw(dev, 220, 1500, 10, 1034))
698 STK_ERROR("stk_sensor_set_hw failed (SXGA)\n");
699 break;
700 }
701 msleep(10);
702 return 0;
703 }
704
705 /**
706 * @param dev Device structure
707 *
708 * @returns 0 if all is OK
709 *
710 * This functions permits to modify the settings :
711 * - brightness
712 * - contrast
713 * - white balance
714 * - ...
715 *
716 * 0x204 = 0xA1 : unkown (by default 0x00)
717 * 0x204 = 0x10 : contrast (by default 0x7c)
718 * 0x204 = 0x04 : Mode (unknown) (by default 0x00) (=> already looked 0x01 and 0x02)
719 * 0x204 = 0x00 : brightness / white balance (by default 0x00)
720 * 0x204 = 0x2E : Fps MSB (by default 0x01)
721 * 0x204 = 0x2D : Fps LSB (by default 0x00)
722 *
723 * 0x2E | 0x2D | Nbr fps
724 * -----+------+--------
725 * 0x00 | 0x00 | 30
726 * 0x01 | 0x00 | 20
727 * 0x02 | 0x00 | 15
728 * 0x03 | 0x00 | 12
729 * 0x04 | 0x00 | 10
730 */
731 int stk_sensor_setting(struct usb_stk11xx *dev)
732 {
733 return 0;
734 stk_sensor_outb(dev, 0x01, dev->vsettings.hue >> 8);
735 stk_sensor_outb(dev, 0x02, dev->vsettings.hue & 0xff);
736 /* FIXME Why, oh why does this fail when setting all 11 bits of exposure?
737 u8 tmp;
738
739 if (stk_sensor_inb(dev, OV_COMB, &tmp))
740 STK_ERROR("Problem reading COMB!\n");
741 tmp &= OV_COMB_AEC_MASK;
742 // Three less significant bits go to OV_COMB
743 tmp |= (dev->vsettings.brightness>>5) & 0x07;
744 return stk_sensor_outb(dev, OV_AEC, dev->vsettings.brightness>>8)
745 || stk_sensor_outb(dev, OV_COMB, tmp);
746 */
747 return stk_sensor_outb(dev, REG_AECH, dev->vsettings.brightness>>8);
748
749 /* I don't think we should touch these now
750 // FPS register
751 switch (dev->vsettings.fps) {
752 case 10:
753 usb_stk11xx_write_registry(dev, 0x0204, 0x002E);
754 usb_stk11xx_write_registry(dev, 0x0205, 0x0004);
755 usb_stk11xx_write_registry(dev, 0x0204, 0x002D);
756 usb_stk11xx_write_registry(dev, 0x0205, 0x0000);
757 break;
758
759 case 15:
760 usb_stk11xx_write_registry(dev, 0x0204, 0x002E);
761 usb_stk11xx_write_registry(dev, 0x0205, 0x0002);
762 usb_stk11xx_write_registry(dev, 0x0204, 0x002D);
763 usb_stk11xx_write_registry(dev, 0x0205, 0x0000);
764 break;
765
766 case 20:
767 usb_stk11xx_write_registry(dev, 0x0204, 0x002E);
768 usb_stk11xx_write_registry(dev, 0x0205, 0x0001);
769 usb_stk11xx_write_registry(dev, 0x0204, 0x002D);
770 usb_stk11xx_write_registry(dev, 0x0205, 0x0000);
771 break;
772
773 case 30:
774 usb_stk11xx_write_registry(dev, 0x0204, 0x002E);
775 usb_stk11xx_write_registry(dev, 0x0205, 0x0000);
776 usb_stk11xx_write_registry(dev, 0x0204, 0x002D);
777 usb_stk11xx_write_registry(dev, 0x0205, 0x0000);
778 break;
779
780 default:
781 usb_stk11xx_write_registry(dev, 0x0204, 0x002E);
782 usb_stk11xx_write_registry(dev, 0x0205, 0x0001);
783 usb_stk11xx_write_registry(dev, 0x0204, 0x002D);
784 usb_stk11xx_write_registry(dev, 0x0205, 0x0000);
785 }
786
787 usb_stk11xx_write_registry(dev, 0x0200, 0x0006);
788 */
789 }
790
791
Experimental and unofficial branch of driver for syntek webcams