4 ** The author disclaims copyright to this source code. In place of
5 ** a legal notice, here is a blessing:
7 ** May you do good and not evil.
8 ** May you find forgiveness for yourself and forgive others.
9 ** May you share freely, never taking more than you give.
11 ******************************************************************************
13 ** This file contains inline asm code for retrieving "high-performance"
14 ** counters for x86 and x86_64 class CPUs.
16 #ifndef SQLITE_HWTIME_H
17 #define SQLITE_HWTIME_H
20 ** The following routine only works on pentium-class (or newer) processors.
21 ** It uses the RDTSC opcode to read the cycle count value out of the
22 ** processor and returns that value. This can be used for high-res
25 #if !defined(__STRICT_ANSI__) && \
26 (defined(__GNUC__) || defined(_MSC_VER)) && \
27 (defined(i386) || defined(__i386__) || defined(_M_IX86))
31 __inline__ sqlite_uint64
sqlite3Hwtime(void){
33 __asm__
__volatile__ ("rdtsc" : "=a" (lo
), "=d" (hi
));
34 return (sqlite_uint64
)hi
<< 32 | lo
;
37 #elif defined(_MSC_VER)
39 __declspec(naked
) __inline sqlite_uint64 __cdecl
sqlite3Hwtime(void){
42 ret
; return value at EDX
:EAX
48 #elif !defined(__STRICT_ANSI__) && (defined(__GNUC__) && defined(__x86_64__))
50 __inline__ sqlite_uint64
sqlite3Hwtime(void){
52 __asm__
__volatile__ ("rdtsc" : "=A" (val
));
56 #elif !defined(__STRICT_ANSI__) && (defined(__GNUC__) && defined(__ppc__))
58 __inline__ sqlite_uint64
sqlite3Hwtime(void){
59 unsigned long long retval
;
61 __asm__
__volatile__ ("\n\
67 : "=r" (retval
), "=r" (junk
));
74 ** asm() is needed for hardware timing support. Without asm(),
75 ** disable the sqlite3Hwtime() routine.
77 ** sqlite3Hwtime() is only used for some obscure debugging
78 ** and analysis configurations, not in any deliverable, so this
79 ** should not be a great loss.
81 sqlite_uint64
sqlite3Hwtime(void){ return ((sqlite_uint64
)0); }
85 #endif /* !defined(SQLITE_HWTIME_H) */