src/runtime/x86-64-arch.c

   1 /*
   2  * This software is part of the SBCL system. See the README file for
   3  * more information.
   4  *
   5  * This software is derived from the CMU CL system, which was
   6  * written at Carnegie Mellon University and released into the
   7  * public domain. The software is in the public domain and is
   8  * provided with absolutely no warranty. See the COPYING and CREDITS
   9  * files for more information.
  10  */
  11
  12 #include <stdio.h>
  13
  14 #include "sbcl.h"
  15 #include "runtime.h"
  16 #include "globals.h"
  17 #include "validate.h"
  18 #include "os.h"
  19 #include "sbcl.h"
  20 #include "arch.h"
  21 #include "lispregs.h"
  22 #include "signal.h"
  23 #include "alloc.h"
  24 #include "interrupt.h"
  25 #include "interr.h"
  26 #include "breakpoint.h"
  27 #include "thread.h"
  28
  29 #include "genesis/static-symbols.h"
  30 #include "genesis/symbol.h"
  31
  32 #define BREAKPOINT_INST 0xcc    /* INT3 */
  33
  34 unsigned long fast_random_state = 1;
  35
  36 void arch_init(void)
  37 {}
  38
  39 os_vm_address_t
  40 arch_get_bad_addr(int sig, siginfo_t *code, os_context_t *context)
  41 {
  42     return (os_vm_address_t)code->si_addr;
  43 }
  44
  45 \f
  46 /*
  47  * hacking signal contexts
  48  *
  49  * (This depends both on architecture, which determines what we might
  50  * want to get to, and on OS, which determines how we get to it.)
  51  */
  52
  53 os_context_register_t *
  54 context_eflags_addr(os_context_t *context)
  55 {
  56 #if defined __linux__
  57     /* KLUDGE: As of kernel 2.2.14 on Red Hat 6.2, there's code in the
  58      * <sys/ucontext.h> file to define symbolic names for offsets into
  59      * gregs[], but it's conditional on __USE_GNU and not defined, so
  60      * we need to do this nasty absolute index magic number thing
  61      * instead. */
  62     return &context->uc_mcontext.gregs[17];
  63 #elif defined __FreeBSD__
  64     return &context->uc_mcontext.mc_rflags;
  65 #elif defined LISP_FEATURE_DARWIN
  66     return CONTEXT_ADDR_FROM_STEM(rflags);
  67 #elif defined __OpenBSD__
  68     return &context->sc_eflags;
  69 #else
  70 #error unsupported OS
  71 #endif
  72 }
  73 \f
  74 void arch_skip_instruction(os_context_t *context)
  75 {
  76     /* Assuming we get here via an INT3 xxx instruction, the PC now
  77      * points to the interrupt code (a Lisp value) so we just move
  78      * past it. Skip the code; after that, if the code is an
  79      * error-trap or cerror-trap then skip the data bytes that follow. */
  80
  81     int vlen;
  82     long code;
  83
  84
  85     /* Get and skip the Lisp interrupt code. */
  86     code = *(char*)(*os_context_pc_addr(context))++;
  87     switch (code)
  88         {
  89         case trap_Error:
  90         case trap_Cerror:
  91             /* Lisp error arg vector length */
  92             vlen = *(char*)(*os_context_pc_addr(context))++;
  93             /* Skip Lisp error arg data bytes. */
  94             while (vlen-- > 0) {
  95                 ++*os_context_pc_addr(context);
  96             }
  97             break;
  98
  99         case trap_Breakpoint:           /* not tested */
 100         case trap_FunEndBreakpoint: /* not tested */
 101             break;
 102
 103         case trap_PendingInterrupt:
 104         case trap_Halt:
 105         case trap_SingleStepAround:
 106         case trap_SingleStepBefore:
 107             /* only needed to skip the Code */
 108             break;
 109
 110         default:
 111             fprintf(stderr,"[arch_skip_inst invalid code %ld\n]\n",code);
 112             break;
 113         }
 114
 115     FSHOW((stderr,
 116            "/[arch_skip_inst resuming at %x]\n",
 117            *os_context_pc_addr(context)));
 118 }
 119
 120 unsigned char *
 121 arch_internal_error_arguments(os_context_t *context)
 122 {
 123     return 1 + (unsigned char *)(*os_context_pc_addr(context));
 124 }
 125
 126 boolean
 127 arch_pseudo_atomic_atomic(os_context_t *context)
 128 {
 129     return get_pseudo_atomic_atomic(arch_os_get_current_thread());
 130 }
 131
 132 void
 133 arch_set_pseudo_atomic_interrupted(os_context_t *context)
 134 {
 135     struct thread *thread = arch_os_get_current_thread();
 136     set_pseudo_atomic_interrupted(thread);
 137 }
 138
 139 void
 140 arch_clear_pseudo_atomic_interrupted(os_context_t *context)
 141 {
 142     struct thread *thread = arch_os_get_current_thread();
 143     clear_pseudo_atomic_interrupted(thread);
 144 }
 145 \f
 146 /*
 147  * This stuff seems to get called for TRACE and debug activity.
 148  */
 149
 150 unsigned int
 151 arch_install_breakpoint(void *pc)
 152 {
 153     unsigned int result = *(unsigned int*)pc;
 154
 155     *(char*)pc = BREAKPOINT_INST;               /* x86 INT3       */
 156     *((char*)pc+1) = trap_Breakpoint;           /* Lisp trap code */
 157
 158     return result;
 159 }
 160
 161 void
 162 arch_remove_breakpoint(void *pc, unsigned int orig_inst)
 163 {
 164     *((char *)pc) = orig_inst & 0xff;
 165     *((char *)pc + 1) = (orig_inst & 0xff00) >> 8;
 166 }
 167 \f
 168 /* When single stepping, single_stepping holds the original instruction
 169  * PC location. */
 170 unsigned int *single_stepping = NULL;
 171 #ifdef CANNOT_GET_TO_SINGLE_STEP_FLAG
 172 unsigned int  single_step_save1;
 173 unsigned int  single_step_save2;
 174 unsigned int  single_step_save3;
 175 #endif
 176
 177 void
 178 arch_do_displaced_inst(os_context_t *context, unsigned int orig_inst)
 179 {
 180     unsigned int *pc = (unsigned int*)(*os_context_pc_addr(context));
 181
 182     /* Put the original instruction back. */
 183     *((char *)pc) = orig_inst & 0xff;
 184     *((char *)pc + 1) = (orig_inst & 0xff00) >> 8;
 185
 186 #ifdef CANNOT_GET_TO_SINGLE_STEP_FLAG
 187     /* Install helper instructions for the single step:
 188      * pushf; or [esp],0x100; popf. */
 189     single_step_save1 = *(pc-3);
 190     single_step_save2 = *(pc-2);
 191     single_step_save3 = *(pc-1);
 192     *(pc-3) = 0x9c909090;
 193     *(pc-2) = 0x00240c81;
 194     *(pc-1) = 0x9d000001;
 195 #else
 196     *context_eflags_addr(context) |= 0x100;
 197 #endif
 198
 199     single_stepping = pc;
 200
 201 #ifdef CANNOT_GET_TO_SINGLE_STEP_FLAG
 202     *os_context_pc_addr(context) = (os_context_register_t)((char *)pc - 9);
 203 #endif
 204 }
 205
 206 void
 207 arch_handle_breakpoint(os_context_t *context)
 208 {
 209     --*os_context_pc_addr(context);
 210     handle_breakpoint(context);
 211 }
 212
 213 void
 214 arch_handle_fun_end_breakpoint(os_context_t *context)
 215 {
 216     --*os_context_pc_addr(context);
 217     *os_context_pc_addr(context) =
 218         (unsigned long)handle_fun_end_breakpoint(context);
 219 }
 220
 221 void
 222 arch_handle_single_step_trap(os_context_t *context, int trap)
 223 {
 224     arch_skip_instruction(context);
 225     /* On x86-64 the fdefn / function is always in RAX, so we pass
 226      * 0 as the register_offset. */
 227     handle_single_step_trap(context, trap, 0);
 228 }
 229
 230 \f
 231 void
 232 sigtrap_handler(int signal, siginfo_t *info, void *void_context)
 233 {
 234     os_context_t *context = (os_context_t*)void_context;
 235     unsigned int trap;
 236
 237     if (single_stepping && (signal==SIGTRAP))
 238     {
 239 #ifdef CANNOT_GET_TO_SINGLE_STEP_FLAG
 240         /* Un-install single step helper instructions. */
 241         *(single_stepping-3) = single_step_save1;
 242         *(single_stepping-2) = single_step_save2;
 243         *(single_stepping-1) = single_step_save3;
 244 #else
 245         *context_eflags_addr(context) ^= 0x100;
 246 #endif
 247         /* Re-install the breakpoint if possible. */
 248         if ((char *)*os_context_pc_addr(context) ==
 249             (char *)single_stepping + 1) {
 250             fprintf(stderr, "warning: couldn't reinstall breakpoint\n");
 251         } else {
 252             *((char *)single_stepping) = BREAKPOINT_INST;       /* x86 INT3 */
 253             *((char *)single_stepping+1) = trap_Breakpoint;
 254         }
 255
 256         single_stepping = NULL;
 257         return;
 258     }
 259
 260     /* This is just for info in case the monitor wants to print an
 261      * approximation. */
 262     current_control_stack_pointer =
 263         (lispobj *)*os_context_sp_addr(context);
 264
 265     /* FIXME: CMUCL puts the float control restoration code here.
 266        Thus, it seems to me that single-stepping won't restore the
 267        float control.  Since SBCL currently doesn't support
 268        single-stepping (as far as I can tell) this is somewhat moot,
 269        but it might be worth either moving this code up or deleting
 270        the single-stepping code entirely.  -- CSR, 2002-07-15 */
 271 #if defined(LISP_FEATURE_LINUX) || defined(RESTORE_FP_CONTROL_FROM_CONTEXT)
 272     os_restore_fp_control(context);
 273 #endif
 274
 275     /* On entry %eip points just after the INT3 byte and aims at the
 276      * 'kind' value (eg trap_Cerror). For error-trap and Cerror-trap a
 277      * number of bytes will follow, the first is the length of the byte
 278      * arguments to follow. */
 279     trap = *(unsigned char *)(*os_context_pc_addr(context));
 280
 281     handle_trap(context, trap);
 282 }
 283
 284 void
 285 sigill_handler(int signal, siginfo_t *siginfo, void *void_context) {
 286     os_context_t *context = (os_context_t*)void_context;
 287
 288     /* Triggering SIGTRAP using int3 is unreliable on OS X/x86, so
 289      * we need to use illegal instructions for traps.
 290      */
 291 #if defined(LISP_FEATURE_DARWIN) && !defined(LISP_FEATURE_MACH_EXCEPTION_HANDLER)
 292     if (*((unsigned short *)*os_context_pc_addr(context)) == 0x0b0f) {
 293         *os_context_pc_addr(context) += 2;
 294         return sigtrap_handler(signal, siginfo, void_context);
 295     }
 296 #endif
 297
 298     fake_foreign_function_call(context);
 299     lose("Unhandled SIGILL.");
 300 }
 301
 302 #ifdef X86_64_SIGFPE_FIXUP
 303 #define MXCSR_IE (0x01)         /* Invalid Operation */
 304 #define MXCSR_DE (0x02)         /* Denormal */
 305 #define MXCSR_ZE (0x04)         /* Devide-by-Zero */
 306 #define MXCSR_OE (0x08)         /* Overflow */
 307 #define MXCSR_UE (0x10)         /* Underflow */
 308 #define MXCSR_PE (0x20)         /* Precision */
 309
 310 static inline int
 311 mxcsr_to_code(unsigned int mxcsr)
 312 {
 313     /* Extract unmasked exception bits. */
 314     mxcsr &= ~(mxcsr >> 7) & 0x3F;
 315
 316     /* This order is defined at "Intel 64 and IA-32 Architectures
 317      * Software Developerfs Manual" Volume 1: "Basic Architecture",
 318      * 4.9.2 "Floating-Point Exception Priority". */
 319     if (mxcsr & MXCSR_IE)
 320         return FPE_FLTINV;
 321     else if (mxcsr & MXCSR_ZE)
 322         return FPE_FLTDIV;
 323     else if (mxcsr & MXCSR_DE)
 324         return FPE_FLTUND;
 325     else if (mxcsr & MXCSR_OE)
 326         return FPE_FLTOVF;
 327     else if (mxcsr & MXCSR_UE)
 328         return FPE_FLTUND;
 329     else if (mxcsr & MXCSR_PE)
 330         return FPE_FLTRES;
 331
 332     return 0;
 333 }
 334
 335 static void
 336 sigfpe_handler(int signal, siginfo_t *siginfo, void *void_context)
 337 {
 338     os_context_t *context = arch_os_get_context(&void_context);
 339     unsigned int *mxcsr = arch_os_context_mxcsr_addr(context);
 340
 341     if (siginfo->si_code == 0) { /* XMM exception */
 342         siginfo->si_code = mxcsr_to_code(*mxcsr);
 343
 344         /* Clear sticky exception flag. */
 345         *mxcsr &= ~0x3F;
 346     }
 347
 348     interrupt_handle_now(signal, siginfo, context);
 349 }
 350 #endif
 351
 352 void
 353 arch_install_interrupt_handlers()
 354 {
 355     SHOW("entering arch_install_interrupt_handlers()");
 356
 357     /* Note: The old CMU CL code here used sigtrap_handler() to handle
 358      * SIGILL as well as SIGTRAP. I couldn't see any reason to do
 359      * things that way. So, I changed to separate handlers when
 360      * debugging a problem on OpenBSD, where SBCL wasn't catching
 361      * SIGILL properly, but was instead letting the process be
 362      * terminated with an "Illegal instruction" output. If this change
 363      * turns out to break something (maybe breakpoint handling on some
 364      * OS I haven't tested on?) and we have to go back to the old CMU
 365      * CL way, I hope there will at least be a comment to explain
 366      * why.. -- WHN 2001-06-07 */
 367 #if !defined(LISP_FEATURE_MACH_EXCEPTION_HANDLER)
 368     undoably_install_low_level_interrupt_handler(SIGILL , sigill_handler);
 369     undoably_install_low_level_interrupt_handler(SIGTRAP, sigtrap_handler);
 370 #endif
 371
 372 #ifdef X86_64_SIGFPE_FIXUP
 373     undoably_install_low_level_interrupt_handler(SIGFPE, sigfpe_handler);
 374 #endif
 375
 376     SHOW("returning from arch_install_interrupt_handlers()");
 377 }
 378 \f
 379 #ifdef LISP_FEATURE_LINKAGE_TABLE
 380 /* FIXME: It might be cleaner to generate these from the lisp side of
 381  * things.
 382  */
 383
 384 void
 385 arch_write_linkage_table_jmp(char * reloc, void * fun)
 386 {
 387     unsigned long addr = (unsigned long) fun;
 388     int i;
 389
 390     *reloc++ = 0xFF; /* Opcode for near jump to absolute reg/mem64. */
 391     *reloc++ = 0x25; /* ModRM #b00 100 101, i.e. RIP-relative. */
 392     *reloc++ = 0x00; /* 32-bit displacement field = 0 */
 393     *reloc++ = 0x00; /* ... */
 394     *reloc++ = 0x00; /* ... */
 395     *reloc++ = 0x00; /* ... */
 396
 397     for (i = 0; i < 8; i++) {
 398         *reloc++ = addr & 0xff;
 399         addr >>= 8;
 400     }
 401
 402     /* write a nop for good measure. */
 403     *reloc = 0x90;
 404 }
 405
 406 void
 407 arch_write_linkage_table_ref(void * reloc, void * data)
 408 {
 409     *(unsigned long *)reloc = (unsigned long)data;
 410 }
 411
 412 #endif
 413
 414 /* These setup and check *both* the sse2 and x87 FPUs. While lisp code
 415    only uses the sse2 FPU, other code (such as libc) may use the x87 FPU.
 416  */
 417
 418 unsigned int
 419 arch_get_fp_modes()
 420 {
 421     unsigned int temp;
 422     unsigned int result;
 423     /* return the x87 exception flags ored in with the sse2
 424      * control+status flags */
 425     asm ("fnstsw %0" : "=m" (temp));
 426     result = temp;
 427     result &= 0x3F;
 428     asm ("stmxcsr %0" : "=m" (temp));
 429     result |= temp;
 430     /* flip exception mask bits */
 431     return result ^ (0x3F << 7);
 432 }
 433
 434 struct fpenv
 435 {
 436     unsigned short cw;
 437     unsigned short unused1;
 438     unsigned short sw;
 439     unsigned short unused2;
 440     unsigned int other_regs[5];
 441 };
 442
 443 void
 444 arch_set_fp_modes(unsigned int mxcsr)
 445 {
 446     struct fpenv f_env;
 447     unsigned int temp;
 448
 449     /* turn trap enable bits into exception mask */
 450     mxcsr ^= 0x3F << 7;
 451
 452     /* set x87 modes */
 453     asm ("fnstenv %0" : "=m" (f_env));
 454     /* set control word: always long double precision
 455      * get traps and rounding from mxcsr word */
 456     f_env.cw = 0x300 | ((mxcsr >> 7) & 0x3F) | (((mxcsr >> 13) & 0x3) << 10);
 457     /* set status word: only override exception flags, from mxcsr */
 458     f_env.sw &= ~0x3F;
 459     f_env.sw |= (mxcsr & 0x3F);
 460
 461     asm ("fldenv %0" : : "m" (f_env));
 462
 463     /* now, simply, load up the mxcsr register */
 464     temp = mxcsr;
 465     asm ("ldmxcsr %0" : : "m" (temp));
 466 }