src/runtime/x86-64-arch.c

   1 /*
   2  * This software is part of the SBCL system. See the README file for
   3  * more information.
   4  *
   5  * This software is derived from the CMU CL system, which was
   6  * written at Carnegie Mellon University and released into the
   7  * public domain. The software is in the public domain and is
   8  * provided with absolutely no warranty. See the COPYING and CREDITS
   9  * files for more information.
  10  */
  11
  12 #include <stdio.h>
  13
  14 #include "sbcl.h"
  15 #include "runtime.h"
  16 #include "globals.h"
  17 #include "validate.h"
  18 #include "os.h"
  19 #include "sbcl.h"
  20 #include "arch.h"
  21 #include "lispregs.h"
  22 #include "signal.h"
  23 #include "alloc.h"
  24 #include "interrupt.h"
  25 #include "interr.h"
  26 #include "breakpoint.h"
  27 #include "thread.h"
  28 #include "pseudo-atomic.h"
  29
  30 #include "genesis/static-symbols.h"
  31 #include "genesis/symbol.h"
  32
  33 #define BREAKPOINT_INST 0xcc    /* INT3 */
  34 #define UD2_INST 0x0b0f         /* UD2 */
  35
  36 #ifndef LISP_FEATURE_UD2_BREAKPOINTS
  37 #define BREAKPOINT_WIDTH 1
  38 #else
  39 #define BREAKPOINT_WIDTH 2
  40 #endif
  41
  42 unsigned int cpuid_fn1_ecx;
  43
  44 static void cpuid(unsigned info, unsigned *eax, unsigned *ebx, unsigned *ecx, unsigned *edx)
  45 {
  46 #ifdef _MSC_VER
  47   int regs[4];
  48   __cpuid(regs, info);
  49   *eax = regs[0];
  50   *ebx = regs[1];
  51   *ecx = regs[2];
  52   *edx = regs[3];
  53 #else
  54   __asm__("cpuid;"                                            /* assembly code */
  55           :"=a" (*eax), "=b" (*ebx), "=c" (*ecx), "=d" (*edx) /* outputs */
  56           :"a" (info)                                         /* input: info into eax */
  57            /* clobbers: none */
  58           );
  59 #endif
  60 }
  61
  62 void arch_init(void)
  63 {
  64   unsigned int eax, ebx, ecx, edx;
  65
  66   cpuid(0, &eax, &ebx, &ecx, &edx);
  67   if (eax >= 1) { // see if we can execute basic id function 1
  68       cpuid(1, &eax, &ebx, &ecx, &edx);
  69       cpuid_fn1_ecx = ecx;
  70   }
  71 }
  72
  73 #ifndef _WIN64
  74 os_vm_address_t
  75 arch_get_bad_addr(int sig, siginfo_t *code, os_context_t *context)
  76 {
  77     return (os_vm_address_t)code->si_addr;
  78 }
  79 #endif
  80
  81 \f
  82 /*
  83  * hacking signal contexts
  84  *
  85  * (This depends both on architecture, which determines what we might
  86  * want to get to, and on OS, which determines how we get to it.)
  87  */
  88
  89 os_context_register_t *
  90 context_eflags_addr(os_context_t *context)
  91 {
  92 #if defined __linux__ || defined __sun
  93     /* KLUDGE: As of kernel 2.2.14 on Red Hat 6.2, there's code in the
  94      * <sys/ucontext.h> file to define symbolic names for offsets into
  95      * gregs[], but it's conditional on __USE_GNU and not defined, so
  96      * we need to do this nasty absolute index magic number thing
  97      * instead. */
  98     return (os_context_register_t*)&context->uc_mcontext.gregs[17];
  99 #elif defined LISP_FEATURE_FREEBSD || defined(__DragonFly__)
 100     return &context->uc_mcontext.mc_rflags;
 101 #elif defined LISP_FEATURE_DARWIN
 102     return CONTEXT_ADDR_FROM_STEM(rflags);
 103 #elif defined __OpenBSD__
 104     return &context->sc_rflags;
 105 #elif defined __NetBSD__
 106     return CONTEXT_ADDR_FROM_STEM(RFLAGS);
 107 #elif defined _WIN64
 108     return (os_context_register_t*)&context->win32_context->EFlags;
 109 #else
 110 #error unsupported OS
 111 #endif
 112 }
 113 \f
 114 void arch_skip_instruction(os_context_t *context)
 115 {
 116     /* Assuming we get here via an INT3 xxx instruction, the PC now
 117      * points to the interrupt code (a Lisp value) so we just move
 118      * past it. Skip the code; after that, if the code is an
 119      * error-trap or cerror-trap then skip the data bytes that follow. */
 120
 121     int vlen;
 122     long code;
 123
 124
 125     /* Get and skip the Lisp interrupt code. */
 126     code = *(char*)(*os_context_pc_addr(context))++;
 127     switch (code)
 128         {
 129         case trap_Error:
 130         case trap_Cerror:
 131             /* Lisp error arg vector length */
 132             vlen = *(char*)(*os_context_pc_addr(context))++;
 133             /* Skip Lisp error arg data bytes. */
 134             while (vlen-- > 0) {
 135                 ++*os_context_pc_addr(context);
 136             }
 137             break;
 138
 139         case trap_Breakpoint:           /* not tested */
 140         case trap_FunEndBreakpoint: /* not tested */
 141             break;
 142
 143 #ifdef LISP_FEATURE_SB_SAFEPOINT
 144         case trap_GlobalSafepoint:
 145         case trap_CspSafepoint:
 146 #endif
 147         case trap_PendingInterrupt:
 148         case trap_Halt:
 149         case trap_SingleStepAround:
 150         case trap_SingleStepBefore:
 151         case trap_InvalidArgCount:
 152             /* only needed to skip the Code */
 153             break;
 154
 155         default:
 156             fprintf(stderr,"[arch_skip_inst invalid code %ld\n]\n",code);
 157             break;
 158         }
 159
 160     FSHOW((stderr,
 161            "/[arch_skip_inst resuming at %x]\n",
 162            *os_context_pc_addr(context)));
 163 }
 164
 165 unsigned char *
 166 arch_internal_error_arguments(os_context_t *context)
 167 {
 168     return 1 + (unsigned char *)(*os_context_pc_addr(context));
 169 }
 170
 171 boolean
 172 arch_pseudo_atomic_atomic(os_context_t *context)
 173 {
 174     return get_pseudo_atomic_atomic(arch_os_get_current_thread());
 175 }
 176
 177 void
 178 arch_set_pseudo_atomic_interrupted(os_context_t *context)
 179 {
 180     struct thread *thread = arch_os_get_current_thread();
 181     set_pseudo_atomic_interrupted(thread);
 182 }
 183
 184 void
 185 arch_clear_pseudo_atomic_interrupted(os_context_t *context)
 186 {
 187     struct thread *thread = arch_os_get_current_thread();
 188     clear_pseudo_atomic_interrupted(thread);
 189 }
 190 \f
 191 /*
 192  * This stuff seems to get called for TRACE and debug activity.
 193  */
 194
 195 unsigned int
 196 arch_install_breakpoint(void *pc)
 197 {
 198     unsigned int result = *(unsigned int*)pc;
 199
 200 #ifndef LISP_FEATURE_UD2_BREAKPOINTS
 201     *(char*)pc = BREAKPOINT_INST;               /* x86 INT3       */
 202     *((char*)pc+1) = trap_Breakpoint;           /* Lisp trap code */
 203 #else
 204     *(char*)pc = UD2_INST & 0xff;
 205     *((char*)pc+1) = UD2_INST >> 8;
 206     *((char*)pc+2) = trap_Breakpoint;
 207 #endif
 208
 209     return result;
 210 }
 211
 212 void
 213 arch_remove_breakpoint(void *pc, unsigned int orig_inst)
 214 {
 215     *((char *)pc) = orig_inst & 0xff;
 216     *((char *)pc + 1) = (orig_inst & 0xff00) >> 8;
 217 #if BREAKPOINT_WIDTH > 1
 218     *((char *)pc + 2) = (orig_inst & 0xff0000) >> 16;
 219 #endif
 220 }
 221 \f
 222 /* When single stepping, single_stepping holds the original instruction
 223  * PC location. */
 224 unsigned int *single_stepping = NULL;
 225 #ifdef CANNOT_GET_TO_SINGLE_STEP_FLAG
 226 unsigned int  single_step_save1;
 227 unsigned int  single_step_save2;
 228 unsigned int  single_step_save3;
 229 #endif
 230
 231 void
 232 arch_do_displaced_inst(os_context_t *context, unsigned int orig_inst)
 233 {
 234     unsigned int *pc = (unsigned int*)(*os_context_pc_addr(context));
 235
 236     /* Put the original instruction back. */
 237     arch_remove_breakpoint(pc, orig_inst);
 238
 239 #ifdef CANNOT_GET_TO_SINGLE_STEP_FLAG
 240     /* Install helper instructions for the single step:
 241      * pushf; or [esp],0x100; popf. */
 242     single_step_save1 = *(pc-3);
 243     single_step_save2 = *(pc-2);
 244     single_step_save3 = *(pc-1);
 245     *(pc-3) = 0x9c909090;
 246     *(pc-2) = 0x00240c81;
 247     *(pc-1) = 0x9d000001;
 248 #else
 249     *context_eflags_addr(context) |= 0x100;
 250 #endif
 251
 252     single_stepping = pc;
 253
 254 #ifdef CANNOT_GET_TO_SINGLE_STEP_FLAG
 255     *os_context_pc_addr(context) = (os_context_register_t)((char *)pc - 9);
 256 #endif
 257 }
 258
 259 void
 260 arch_handle_breakpoint(os_context_t *context)
 261 {
 262     *os_context_pc_addr(context) -= BREAKPOINT_WIDTH;
 263     handle_breakpoint(context);
 264 }
 265
 266 void
 267 arch_handle_fun_end_breakpoint(os_context_t *context)
 268 {
 269     *os_context_pc_addr(context) -= BREAKPOINT_WIDTH;
 270     *os_context_pc_addr(context) =
 271         (uword_t)handle_fun_end_breakpoint(context);
 272 }
 273
 274 void
 275 arch_handle_single_step_trap(os_context_t *context, int trap)
 276 {
 277     arch_skip_instruction(context);
 278     /* On x86-64 the fdefn / function is always in RAX, so we pass
 279      * 0 as the register_offset. */
 280     handle_single_step_trap(context, trap, 0);
 281 }
 282
 283 \f
 284 void
 285 restore_breakpoint_from_single_step(os_context_t * context)
 286 {
 287 #ifdef CANNOT_GET_TO_SINGLE_STEP_FLAG
 288     /* Un-install single step helper instructions. */
 289     *(single_stepping-3) = single_step_save1;
 290     *(single_stepping-2) = single_step_save2;
 291     *(single_stepping-1) = single_step_save3;
 292 #else
 293     *context_eflags_addr(context) &= ~0x100;
 294 #endif
 295     /* Re-install the breakpoint if possible. */
 296     if (((char *)*os_context_pc_addr(context) >
 297          (char *)single_stepping) &&
 298         ((char *)*os_context_pc_addr(context) <=
 299          (char *)single_stepping + BREAKPOINT_WIDTH)) {
 300         fprintf(stderr, "warning: couldn't reinstall breakpoint\n");
 301     } else {
 302         arch_install_breakpoint(single_stepping);
 303     }
 304
 305     single_stepping = NULL;
 306     return;
 307 }
 308
 309 void
 310 sigtrap_handler(int signal, siginfo_t *info, os_context_t *context)
 311 {
 312     unsigned int trap;
 313
 314     if (single_stepping) {
 315         restore_breakpoint_from_single_step(context);
 316         return;
 317     }
 318
 319     /* This is just for info in case the monitor wants to print an
 320      * approximation. */
 321     access_control_stack_pointer(arch_os_get_current_thread()) =
 322         (lispobj *)*os_context_sp_addr(context);
 323
 324     /* On entry %eip points just after the INT3 byte and aims at the
 325      * 'kind' value (eg trap_Cerror). For error-trap and Cerror-trap a
 326      * number of bytes will follow, the first is the length of the byte
 327      * arguments to follow. */
 328     trap = *(unsigned char *)(*os_context_pc_addr(context));
 329
 330     handle_trap(context, trap);
 331 }
 332
 333 void
 334 sigill_handler(int signal, siginfo_t *siginfo, os_context_t *context) {
 335     /* Triggering SIGTRAP using int3 is unreliable on OS X/x86, so
 336      * we need to use illegal instructions for traps.
 337      */
 338 #if defined(LISP_FEATURE_UD2_BREAKPOINTS) && !defined(LISP_FEATURE_MACH_EXCEPTION_HANDLER)
 339     if (*((unsigned short *)*os_context_pc_addr(context)) == UD2_INST) {
 340         *os_context_pc_addr(context) += 2;
 341         return sigtrap_handler(signal, siginfo, context);
 342     }
 343 #endif
 344
 345     fake_foreign_function_call(context);
 346     lose("Unhandled SIGILL.");
 347 }
 348
 349 #ifdef X86_64_SIGFPE_FIXUP
 350 #define MXCSR_IE (0x01)         /* Invalid Operation */
 351 #define MXCSR_DE (0x02)         /* Denormal */
 352 #define MXCSR_ZE (0x04)         /* Devide-by-Zero */
 353 #define MXCSR_OE (0x08)         /* Overflow */
 354 #define MXCSR_UE (0x10)         /* Underflow */
 355 #define MXCSR_PE (0x20)         /* Precision */
 356
 357 static inline int
 358 mxcsr_to_code(unsigned int mxcsr)
 359 {
 360     /* Extract unmasked exception bits. */
 361     mxcsr &= ~(mxcsr >> 7) & 0x3F;
 362
 363     /* This order is defined at "Intel 64 and IA-32 Architectures
 364      * Software Developerfs Manual" Volume 1: "Basic Architecture",
 365      * 4.9.2 "Floating-Point Exception Priority". */
 366     if (mxcsr & MXCSR_IE)
 367         return FPE_FLTINV;
 368     else if (mxcsr & MXCSR_ZE)
 369         return FPE_FLTDIV;
 370     else if (mxcsr & MXCSR_DE)
 371         return FPE_FLTUND;
 372     else if (mxcsr & MXCSR_OE)
 373         return FPE_FLTOVF;
 374     else if (mxcsr & MXCSR_UE)
 375         return FPE_FLTUND;
 376     else if (mxcsr & MXCSR_PE)
 377         return FPE_FLTRES;
 378
 379     return 0;
 380 }
 381
 382 static void
 383 sigfpe_handler(int signal, siginfo_t *siginfo, os_context_t *context)
 384 {
 385     unsigned int *mxcsr = arch_os_context_mxcsr_addr(context);
 386
 387     if (siginfo->si_code == 0) { /* XMM exception */
 388         siginfo->si_code = mxcsr_to_code(*mxcsr);
 389
 390         /* Clear sticky exception flag. */
 391         *mxcsr &= ~0x3F;
 392     }
 393
 394     interrupt_handle_now(signal, siginfo, context);
 395 }
 396 #endif
 397
 398 void
 399 arch_install_interrupt_handlers()
 400 {
 401     SHOW("entering arch_install_interrupt_handlers()");
 402
 403     /* Note: The old CMU CL code here used sigtrap_handler() to handle
 404      * SIGILL as well as SIGTRAP. I couldn't see any reason to do
 405      * things that way. So, I changed to separate handlers when
 406      * debugging a problem on OpenBSD, where SBCL wasn't catching
 407      * SIGILL properly, but was instead letting the process be
 408      * terminated with an "Illegal instruction" output. If this change
 409      * turns out to break something (maybe breakpoint handling on some
 410      * OS I haven't tested on?) and we have to go back to the old CMU
 411      * CL way, I hope there will at least be a comment to explain
 412      * why.. -- WHN 2001-06-07 */
 413 #if !defined(LISP_FEATURE_MACH_EXCEPTION_HANDLER) && !defined(LISP_FEATURE_WIN32)
 414     undoably_install_low_level_interrupt_handler(SIGILL , sigill_handler);
 415     undoably_install_low_level_interrupt_handler(SIGTRAP, sigtrap_handler);
 416 #endif
 417
 418 #if defined(X86_64_SIGFPE_FIXUP) && !defined(LISP_FEATURE_WIN32)
 419     undoably_install_low_level_interrupt_handler(SIGFPE, sigfpe_handler);
 420 #endif
 421
 422     SHOW("returning from arch_install_interrupt_handlers()");
 423 }
 424 \f
 425 #ifdef LISP_FEATURE_LINKAGE_TABLE
 426 /* FIXME: It might be cleaner to generate these from the lisp side of
 427  * things.
 428  */
 429
 430 void
 431 arch_write_linkage_table_jmp(char *reloc_addr, void *target_addr)
 432 {
 433     uword_t addr = (uword_t)target_addr;
 434     int i;
 435
 436     *reloc_addr++ = 0xFF; /* Opcode for near jump to absolute reg/mem64. */
 437     *reloc_addr++ = 0x25; /* ModRM #b00 100 101, i.e. RIP-relative. */
 438     *reloc_addr++ = 0x00; /* 32-bit displacement field = 0 */
 439     *reloc_addr++ = 0x00; /* ... */
 440     *reloc_addr++ = 0x00; /* ... */
 441     *reloc_addr++ = 0x00; /* ... */
 442
 443     for (i = 0; i < 8; i++) {
 444         *reloc_addr++ = addr & 0xff;
 445         addr >>= 8;
 446     }
 447
 448     /* write a nop for good measure. */
 449     *reloc_addr = 0x90;
 450 }
 451
 452 void
 453 arch_write_linkage_table_ref(void *reloc_addr, void *target_addr)
 454 {
 455     *(uword_t *)reloc_addr = (uword_t)target_addr;
 456 }
 457
 458 #endif
 459
 460 /* These setup and check *both* the sse2 and x87 FPUs. While lisp code
 461    only uses the sse2 FPU, other code (such as libc) may use the x87 FPU.
 462  */
 463
 464 unsigned int
 465 arch_get_fp_modes()
 466 {
 467     unsigned int temp;
 468     unsigned int result;
 469     /* return the x87 exception flags ored in with the sse2
 470      * control+status flags */
 471     asm ("fnstsw %0" : "=m" (temp));
 472     result = temp;
 473     result &= 0x3F;
 474     asm ("stmxcsr %0" : "=m" (temp));
 475     result |= temp;
 476     /* flip exception mask bits */
 477     return result ^ (0x3F << 7);
 478 }
 479
 480 struct fpenv
 481 {
 482     unsigned short cw;
 483     unsigned short unused1;
 484     unsigned short sw;
 485     unsigned short unused2;
 486     unsigned int other_regs[5];
 487 };
 488
 489 void
 490 arch_set_fp_modes(unsigned int mxcsr)
 491 {
 492     struct fpenv f_env;
 493     unsigned int temp;
 494
 495     /* turn trap enable bits into exception mask */
 496     mxcsr ^= 0x3F << 7;
 497
 498     /* set x87 modes */
 499     asm ("fnstenv %0" : "=m" (f_env));
 500     /* set control word: always long double precision
 501      * get traps and rounding from mxcsr word */
 502     f_env.cw = 0x300 | ((mxcsr >> 7) & 0x3F) | (((mxcsr >> 13) & 0x3) << 10);
 503     /* set status word: only override exception flags, from mxcsr */
 504     f_env.sw &= ~0x3F;
 505     f_env.sw |= (mxcsr & 0x3F);
 506
 507     asm ("fldenv %0" : : "m" (f_env));
 508
 509     /* now, simply, load up the mxcsr register */
 510     temp = mxcsr;
 511     asm ("ldmxcsr %0" : : "m" (temp));
 512 }