2 * This software is part of the SBCL system. See the README file for
5 * This software is derived from the CMU CL system, which was
6 * written at Carnegie Mellon University and released into the
7 * public domain. The software is in the public domain and is
8 * provided with absolutely no warranty. See the COPYING and CREDITS
9 * files for more information.
12 /* Note that although superficially it appears that we use
13 * os_context_t like we ought to, we actually just assume its a
14 * ucontext in places. Naughty */
28 #include "interrupt.h"
30 #include "breakpoint.h"
32 extern char call_into_lisp_LRA
[], call_into_lisp_end
[];
34 extern size_t os_vm_page_size
;
35 #define BREAKPOINT_INST 0x80
41 /* This must be called _after_ os_init(), so that we know what the
44 if (mmap((os_vm_address_t
) call_into_lisp_LRA_page
,os_vm_page_size
,
45 OS_VM_PROT_ALL
,MAP_PRIVATE
|MAP_ANONYMOUS
|MAP_FIXED
,-1,0)
46 == (os_vm_address_t
) -1)
49 /* call_into_lisp_LRA is a collection of trampolines written in asm -
50 * see alpha-assem.S. We copy it to call_into_lisp_LRA_page where
51 * VOPs and things can find it. (I don't know why they can't find it
52 * where it was to start with.) */
53 bcopy(call_into_lisp_LRA
,(void *)call_into_lisp_LRA_page
,os_vm_page_size
);
55 os_flush_icache((os_vm_address_t
)call_into_lisp_LRA_page
,
61 arch_get_bad_addr (int sig
, siginfo_t
*code
, os_context_t
*context
)
65 /* Instructions are 32 bit quantities. */
67 /* fprintf(stderr,"arch_get_bad_addr %d %p %p\n",
68 sig, code, context); */
69 pc
= (unsigned int *)(*os_context_pc_addr(context
));
71 if (((unsigned long)pc
) & 3) {
72 return NULL
; /* In what case would pc be unaligned?? */
75 if ( (pc
< READ_ONLY_SPACE_START
||
76 pc
>= READ_ONLY_SPACE_START
+READ_ONLY_SPACE_SIZE
) &&
77 (pc
< current_dynamic_space
||
78 pc
>= current_dynamic_space
+ dynamic_space_size
))
81 return context
->uc_mcontext
.sc_traparg_a0
;
85 arch_skip_instruction(os_context_t
*context
)
87 /* This may be complete rubbish, as (at least for traps) pc points
88 * _after_ the instruction that caused us to be here anyway.
91 pcptr
= (char **) os_context_pc_addr(context
);
96 arch_internal_error_arguments(os_context_t
*context
)
98 return (unsigned char *)(*os_context_pc_addr(context
)+4);
102 arch_pseudo_atomic_atomic(os_context_t
*context
)
104 /* FIXME: this foreign_function_call_active test is dubious at
105 * best. If a foreign call is made in a pseudo atomic section
106 * (?) or more likely a pseudo atomic section is in a foreign
107 * call then an interrupt is executed immediately. Maybe it
108 * has to do with C code not maintaining pseudo atomic
109 * properly. MG - 2005-08-10
111 * The foreign_function_call_active used to live at each call-site
112 * to arch_pseudo_atomic_atomic, but this seems clearer.
114 return (!foreign_function_call_active
)
115 && ((*os_context_register_addr(context
,reg_ALLOC
)) & 1);
118 void arch_set_pseudo_atomic_interrupted(os_context_t
*context
)
120 /* On coming out of an atomic section, we subtract 1 from
121 * reg_Alloc, then try to store something at that address. So,
122 * to signal that it was interrupted and a signal should be handled,
123 * we set bit 63 of reg_ALLOC here so that the end-of-atomic code
124 * will raise SIGSEGV (no ram mapped there). We catch the signal
125 * (see the appropriate *-os.c) and call interrupt_handle_pending()
126 * for the saved signal instead */
128 *os_context_register_addr(context
,reg_ALLOC
) |= (1L<<63);
131 void arch_clear_pseudo_atomic_interrupted(os_context_t
*context
)
133 *os_context_register_addr(context
, reg_ALLOC
) &= ~(1L<<63);
136 unsigned int arch_install_breakpoint(void *pc
)
138 unsigned int *ptr
= (unsigned int *)pc
;
139 unsigned int result
= *ptr
;
140 *ptr
= BREAKPOINT_INST
;
142 os_flush_icache((os_vm_address_t
)ptr
, sizeof(unsigned int));
147 void arch_remove_breakpoint(void *pc
, unsigned int orig_inst
)
149 unsigned int *ptr
= (unsigned int *)pc
;
151 os_flush_icache((os_vm_address_t
)pc
, sizeof(unsigned int));
154 static unsigned int *skipped_break_addr
, displaced_after_inst
,
158 /* This returns a PC value. Lisp code is all in the 32-bit-addressable
159 * space, so we should be ok with an unsigned int. */
161 emulate_branch(os_context_t
*context
, unsigned int orig_inst
)
163 int op
= orig_inst
>> 26;
164 int reg_a
= (orig_inst
>> 21) & 0x1f;
165 int reg_b
= (orig_inst
>> 16) & 0x1f;
167 (orig_inst
&(1<<20)) ?
168 orig_inst
| (-1 << 21) :
170 int next_pc
= *os_context_pc_addr(context
);
171 int branch
= 0; /* was NULL; */
174 case 0x1a: /* jmp, jsr, jsr_coroutine, ret */
175 *os_context_register_addr(context
,reg_a
) =
176 *os_context_pc_addr(context
);
177 *os_context_pc_addr(context
) =
178 *os_context_register_addr(context
,reg_b
)& ~3;
181 *os_context_register_addr(context
,reg_a
)=*os_context_pc_addr(context
);
184 case 0x31: /* fbeq */
185 if (*(os_context_float_register_addr(context
,reg_a
))==0) branch
= 1;
187 case 0x32: /* fblt */
188 if (*os_context_float_register_addr(context
,reg_a
)<0) branch
= 1;
190 case 0x33: /* fble */
191 if (*os_context_float_register_addr(context
,reg_a
)<=0) branch
= 1;
194 *os_context_register_addr(context
,reg_a
)=*os_context_pc_addr(context
);
197 case 0x35: /* fbne */
198 if (*os_context_register_addr(context
,reg_a
)!=0) branch
= 1;
200 case 0x36: /* fbge */
201 if (*os_context_float_register_addr(context
,reg_a
)>=0) branch
= 1;
203 case 0x37: /* fbgt */
204 if (*os_context_float_register_addr(context
,reg_a
)>0) branch
= 1;
206 case 0x38: /* blbc */
207 if ((*os_context_register_addr(context
,reg_a
)&1) == 0) branch
= 1;
210 if (*os_context_register_addr(context
,reg_a
)==0) branch
= 1;
213 if (*os_context_register_addr(context
,reg_a
)<0) branch
= 1;
216 if (*os_context_register_addr(context
,reg_a
)<=0) branch
= 1;
218 case 0x3c: /* blbs */
219 if ((*os_context_register_addr(context
,reg_a
)&1)!=0) branch
= 1;
222 if (*os_context_register_addr(context
,reg_a
)!=0) branch
= 1;
225 if (*os_context_register_addr(context
,reg_a
)>=0) branch
= 1;
228 if (*os_context_register_addr(context
,reg_a
)>0) branch
= 1;
236 static sigset_t orig_sigmask
;
238 /* Perform the instruction that we overwrote with a breakpoint. As we
239 * don't have a single-step facility, this means we have to:
240 * - put the instruction back
241 * - put a second breakpoint at the following instruction,
242 * set after_breakpoint and continue execution.
244 * When the second breakpoint is hit (very shortly thereafter, we hope)
245 * sigtrap_handler gets called again, but follows the AfterBreakpoint
247 * - puts a bpt back in the first breakpoint place (running across a
248 * breakpoint shouldn't cause it to be uninstalled)
249 * - replaces the second bpt with the instruction it was meant to be
255 void arch_do_displaced_inst(os_context_t
*context
,unsigned int orig_inst
)
257 /* Apparent off-by-one errors ahoy. If you consult the Alpha ARM,
258 * it will tell you that after a BPT, the saved PC is the address
259 * of the instruction _after_ the instruction that caused the trap.
261 * However, we decremented PC by 4 before calling the Lisp-level
262 * handler that calls this routine (see alpha-arch.c line 322 and
263 * friends) so when we get to this point PC is actually pointing
264 * at the BPT instruction itself. This is good, because this is
265 * where we want to restart execution when we do that */
267 unsigned int *pc
=(unsigned int *)(*os_context_pc_addr(context
));
268 unsigned int *next_pc
;
269 int op
= orig_inst
>> 26;;
271 orig_sigmask
= *os_context_sigmask_addr(context
);
272 sigaddset_blockable(os_context_sigmask_addr(context
));
274 /* Put the original instruction back. */
276 os_flush_icache((os_vm_address_t
)pc
, sizeof(unsigned int));
277 skipped_break_addr
= pc
;
279 /* Figure out where we will end up after running the displaced
281 if (op
== 0x1a || (op
&0xf) == 0x30) /* a branch */
282 /* The cast to long is just to shut gcc up. */
283 next_pc
= (unsigned int *)((long)emulate_branch(context
,orig_inst
));
287 /* Set the after breakpoint. */
288 displaced_after_inst
= *next_pc
;
289 *next_pc
= BREAKPOINT_INST
;
291 os_flush_icache((os_vm_address_t
)next_pc
, sizeof(unsigned int));
295 arch_handle_breakpoint(os_context_t
*context
)
297 *os_context_pc_addr(context
) -=4;
298 handle_breakpoint(context
);
302 arch_handle_fun_end_breakpoint(os_context_t
*context
)
304 *os_context_pc_addr(context
) -=4;
305 *os_context_pc_addr(context
) =
306 (int)handle_fun_end_breakpoint(context
);
310 arch_handle_single_step_trap(os_context_t
*context
, int trap
)
312 unsigned int code
= *((u32
*) (*os_context_pc_addr(context
)));
313 int register_offset
= code
>> 5 & 0x1f;
314 handle_single_step_trap(context
, trap
, register_offset
);
315 arch_skip_instruction(context
);
319 sigtrap_handler(int signal
, siginfo_t
*siginfo
, os_context_t
*context
)
323 /* this is different from how CMUCL does it. CMUCL used "call_pal
324 * PAL_gentrap", which doesn't do anything on Linux (unless NL0
325 * contains certain specific values). We use "bugchk" instead.
326 * It's (for our purposes) just the same as bpt but has a
327 * different opcode so we can test whether we're dealing with a
328 * breakpoint or a "system service" */
330 if ((*(unsigned int*)(*os_context_pc_addr(context
)-4))==BREAKPOINT_INST
) {
331 if (after_breakpoint
) {
332 /* see comments above arch_do_displaced_inst. This is where
333 * we reinsert the breakpoint that we removed earlier */
335 *os_context_pc_addr(context
) -=4;
336 *skipped_break_addr
= BREAKPOINT_INST
;
337 os_flush_icache((os_vm_address_t
)skipped_break_addr
,
338 sizeof(unsigned int));
339 skipped_break_addr
= NULL
;
340 *(unsigned int *)*os_context_pc_addr(context
) =
341 displaced_after_inst
;
342 os_flush_icache((os_vm_address_t
)*os_context_pc_addr(context
), sizeof(unsigned int));
343 *os_context_sigmask_addr(context
)= orig_sigmask
;
344 after_breakpoint
=0; /* false */
347 code
= trap_Breakpoint
;
349 /* a "system service" */
350 code
=*((u32
*)(*os_context_pc_addr(context
)));
351 handle_trap(context
, code
);
355 arch_get_fp_control()
357 return ieee_get_fp_control();
361 arch_set_fp_control(unsigned long fp
)
363 ieee_set_fp_control(fp
);
367 void arch_install_interrupt_handlers()
369 undoably_install_low_level_interrupt_handler(SIGTRAP
, sigtrap_handler
);