configure: default to --disable-arch, else use -march=native
[rofl0r-gnuboy.git] / regs.h
blob4457fd90ede0200091fe13c49cac85657e5adbd0
2 #ifndef __REGS_H__
3 #define __REGS_H__
6 #include "mem.h"
8 /* General internal/io stuff */
10 #define RI_P1 0x00
11 #define RI_SB 0x01
12 #define RI_SC 0x02
13 #define RI_DIV 0x04
14 #define RI_TIMA 0x05
15 #define RI_TMA 0x06
16 #define RI_TAC 0x07
18 #define RI_KEY1 0x4D
20 #define RI_RP 0x56
22 #define RI_SVBK 0x70
26 /* Interrupts flags */
28 #define RI_IF 0x0F
29 #define RI_IE 0xFF
34 /* LCDC */
36 #define RI_LCDC 0x40
37 #define RI_STAT 0x41
38 #define RI_SCY 0x42
39 #define RI_SCX 0x43
40 #define RI_LY 0x44
41 #define RI_LYC 0x45
42 #define RI_DMA 0x46
43 #define RI_BGP 0x47
44 #define RI_OBP0 0x48
45 #define RI_OBP1 0x49
46 #define RI_WY 0x4A
47 #define RI_WX 0x4B
49 #define RI_VBK 0x4F
51 #define RI_HDMA1 0x51
52 #define RI_HDMA2 0x52
53 #define RI_HDMA3 0x53
54 #define RI_HDMA4 0x54
55 #define RI_HDMA5 0x55
57 #define RI_BCPS 0x68
58 #define RI_BCPD 0x69
59 #define RI_OCPS 0x6A
60 #define RI_OCPD 0x6B
64 /* Sound */
66 #define RI_NR10 0x10
67 #define RI_NR11 0x11
68 #define RI_NR12 0x12
69 #define RI_NR13 0x13
70 #define RI_NR14 0x14
71 #define RI_NR21 0x16
72 #define RI_NR22 0x17
73 #define RI_NR23 0x18
74 #define RI_NR24 0x19
75 #define RI_NR30 0x1A
76 #define RI_NR31 0x1B
77 #define RI_NR32 0x1C
78 #define RI_NR33 0x1D
79 #define RI_NR34 0x1E
80 #define RI_NR41 0x20
81 #define RI_NR42 0x21
82 #define RI_NR43 0x22
83 #define RI_NR44 0x23
84 #define RI_NR50 0x24
85 #define RI_NR51 0x25
86 #define RI_NR52 0x26
90 #define REG(n) ram.hi[(n)]
94 /* General internal/io stuff */
96 #define R_P1 REG(RI_P1)
97 #define R_SB REG(RI_SB)
98 #define R_SC REG(RI_SC)
99 #define R_DIV REG(RI_DIV)
100 #define R_TIMA REG(RI_TIMA)
101 #define R_TMA REG(RI_TMA)
102 #define R_TAC REG(RI_TAC)
104 #define R_KEY1 REG(RI_KEY1)
106 #define R_RP REG(RI_RP)
108 #define R_SVBK REG(RI_SVBK)
112 /* Interrupts flags */
114 #define R_IF REG(RI_IF)
115 #define R_IE REG(RI_IE)
120 /* LCDC */
122 #define R_LCDC REG(RI_LCDC)
123 #define R_STAT REG(RI_STAT)
124 #define R_SCY REG(RI_SCY)
125 #define R_SCX REG(RI_SCX)
126 #define R_LY REG(RI_LY)
127 #define R_LYC REG(RI_LYC)
128 #define R_DMA REG(RI_DMA)
129 #define R_BGP REG(RI_BGP)
130 #define R_OBP0 REG(RI_OBP0)
131 #define R_OBP1 REG(RI_OBP1)
132 #define R_WY REG(RI_WY)
133 #define R_WX REG(RI_WX)
135 #define R_VBK REG(RI_VBK)
137 #define R_HDMA1 REG(RI_HDMA1)
138 #define R_HDMA2 REG(RI_HDMA2)
139 #define R_HDMA3 REG(RI_HDMA3)
140 #define R_HDMA4 REG(RI_HDMA4)
141 #define R_HDMA5 REG(RI_HDMA5)
143 #define R_BCPS REG(RI_BCPS)
144 #define R_BCPD REG(RI_BCPD)
145 #define R_OCPS REG(RI_OCPS)
146 #define R_OCPD REG(RI_OCPD)
150 /* Sound */
152 #define R_NR10 REG(RI_NR10)
153 #define R_NR11 REG(RI_NR11)
154 #define R_NR12 REG(RI_NR12)
155 #define R_NR13 REG(RI_NR13)
156 #define R_NR14 REG(RI_NR14)
157 #define R_NR21 REG(RI_NR21)
158 #define R_NR22 REG(RI_NR22)
159 #define R_NR23 REG(RI_NR23)
160 #define R_NR24 REG(RI_NR24)
161 #define R_NR30 REG(RI_NR30)
162 #define R_NR31 REG(RI_NR31)
163 #define R_NR32 REG(RI_NR32)
164 #define R_NR33 REG(RI_NR33)
165 #define R_NR34 REG(RI_NR34)
166 #define R_NR41 REG(RI_NR41)
167 #define R_NR42 REG(RI_NR42)
168 #define R_NR43 REG(RI_NR43)
169 #define R_NR44 REG(RI_NR44)
170 #define R_NR50 REG(RI_NR50)
171 #define R_NR51 REG(RI_NR51)
172 #define R_NR52 REG(RI_NR52)
176 #endif