cpu.c

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   2
   3
   4
   5 #include "defs.h"
   6 #include "regs.h"
   7 #include "hw.h"
   8 #include "cpu.h"
   9 #include "mem.h"
  10 #include "fastmem.h"
  11 #include "cpuregs.h"
  12 #include "cpucore.h"
  13 #include "lcdc.h"
  14 #include "debug.h"
  15
  16 #ifdef USE_ASM
  17 #include "asm.h"
  18 #endif
  19
  20
  21 struct cpu cpu;
  22
  23
  24
  25
  26 #define ZFLAG(n) ( (n) ? 0 : FZ )
  27 #define HFLAG(n) ( (n) ? 0 : FH )
  28 #define CFLAG(n) ( (n) ? 0 : FC )
  29
  30
  31 #define PUSH(w) ( (SP -= 2), (writew(xSP, (w))) )
  32 #define POP(w) ( ((w) = readw(xSP)), (SP += 2) )
  33
  34
  35 #define FETCH_OLD ( mbc.rmap[PC>>12] \
  36 ? mbc.rmap[PC>>12][PC++] \
  37 : mem_read(PC++) )
  38
  39 #define FETCH (readb(PC++))
  40
  41
  42 #define INC(r) { ((r)++); \
  43 F = (F & (FL|FC)) | incflag_table[(r)]; }
  44
  45 #define DEC(r) { ((r)--); \
  46 F = (F & (FL|FC)) | decflag_table[(r)]; }
  47
  48 #define INCW(r) ( (r)++ )
  49
  50 #define DECW(r) ( (r)-- )
  51
  52 #define ADD(n) { \
  53 W(acc) = (un16)A + (un16)(n); \
  54 F = (ZFLAG(LB(acc))) \
  55 | (FH & ((A ^ (n) ^ LB(acc)) << 1)) \
  56 | (HB(acc) << 4); \
  57 A = LB(acc); }
  58
  59 #define ADC(n) { \
  60 W(acc) = (un16)A + (un16)(n) + (un16)((F&FC)>>4); \
  61 F = (ZFLAG(LB(acc))) \
  62 | (FH & ((A ^ (n) ^ LB(acc)) << 1)) \
  63 | (HB(acc) << 4); \
  64 A = LB(acc); }
  65
  66 #define ADDW(n) { \
  67 DW(acc) = (un32)HL + (un32)(n); \
  68 F = (F & (FZ)) \
  69 | (FH & ((H ^ ((n)>>8) ^ HB(acc)) << 1)) \
  70 | (acc.b[HI][LO] << 4); \
  71 HL = W(acc); }
  72
  73 #define ADDSP(n) { \
  74 DW(acc) = (un32)SP + (un32)(n8)(n); \
  75 F = (FH & (((SP>>8) ^ ((n)>>8) ^ HB(acc)) << 1)) \
  76 | (acc.b[HI][LO] << 4); \
  77 SP = W(acc); }
  78
  79 #define LDHLSP(n) { \
  80 DW(acc) = (un32)SP + (un32)(n8)(n); \
  81 F = (FH & (((SP>>8) ^ ((n)>>8) ^ HB(acc)) << 1)) \
  82 | (acc.b[HI][LO] << 4); \
  83 HL = W(acc); }
  84
  85 #define CP(n) { \
  86 W(acc) = (un16)A - (un16)(n); \
  87 F = FN \
  88 | (ZFLAG(LB(acc))) \
  89 | (FH & ((A ^ (n) ^ LB(acc)) << 1)) \
  90 | ((un8)(-(n8)HB(acc)) << 4); }
  91
  92 #define SUB(n) { CP((n)); A = LB(acc); }
  93
  94 #define SBC(n) { \
  95 W(acc) = (un16)A - (un16)(n) - (un16)((F&FC)>>4); \
  96 F = FN \
  97 | (ZFLAG((n8)LB(acc))) \
  98 | (FH & ((A ^ (n) ^ LB(acc)) << 1)) \
  99 | ((un8)(-(n8)HB(acc)) << 4); \
 100 A = LB(acc); }
 101
 102 #define AND(n) { A &= (n); \
 103 F = ZFLAG(A) | FH; }
 104
 105 #define XOR(n) { A ^= (n); \
 106 F = ZFLAG(A); }
 107
 108 #define OR(n) { A |= (n); \
 109 F = ZFLAG(A); }
 110
 111 #define RLCA(r) { (r) = ((r)>>7) | ((r)<<1); \
 112 F = (((r)&0x01)<<4); }
 113
 114 #define RRCA(r) { (r) = ((r)<<7) | ((r)>>1); \
 115 F = (((r)&0x80)>>3); }
 116
 117 #define RLA(r) { \
 118 LB(acc) = (((r)&0x80)>>3); \
 119 (r) = ((r)<<1) | ((F&FC)>>4); \
 120 F = LB(acc); }
 121
 122 #define RRA(r) { \
 123 LB(acc) = (((r)&0x01)<<4); \
 124 (r) = ((r)>>1) | ((F&FC)<<3); \
 125 F = LB(acc); }
 126
 127 #define RLC(r) { RLCA(r); F |= ZFLAG(r); }
 128 #define RRC(r) { RRCA(r); F |= ZFLAG(r); }
 129 #define RL(r) { RLA(r); F |= ZFLAG(r); }
 130 #define RR(r) { RRA(r); F |= ZFLAG(r); }
 131
 132 #define SLA(r) { \
 133 LB(acc) = (((r)&0x80)>>3); \
 134 (r) <<= 1; \
 135 F = ZFLAG((r)) | LB(acc); }
 136
 137 #define SRA(r) { \
 138 LB(acc) = (((r)&0x01)<<4); \
 139 (r) = (un8)(((n8)(r))>>1); \
 140 F = ZFLAG((r)) | LB(acc); }
 141
 142 #define SRL(r) { \
 143 LB(acc) = (((r)&0x01)<<4); \
 144 (r) >>= 1; \
 145 F = ZFLAG((r)) | LB(acc); }
 146
 147 #define CPL(r) { \
 148 (r) = ~(r); \
 149 F |= (FH|FN); }
 150
 151 #define SCF { F = (F & (FZ)) | FC; }
 152
 153 #define CCF { F = (F & (FZ|FC)) ^ FC; }
 154
 155 #define DAA { \
 156 A += (LB(acc) = daa_table[((((int)F)&0x70)<<4) | A]); \
 157 F = (F & (FN)) | ZFLAG(A) | daa_carry_table[LB(acc)>>2]; }
 158
 159 #define SWAP(r) { \
 160 (r) = swap_table[(r)]; \
 161 F = ZFLAG((r)); }
 162
 163 #define BIT(n,r) { F = (F & FC) | ZFLAG(((r) & (1 << (n)))) | FH; }
 164 #define RES(n,r) { (r) &= ~(1 << (n)); }
 165 #define SET(n,r) { (r) |= (1 << (n)); }
 166
 167 #define CB_REG_CASES(r, n) \
 168 case 0x00|(n): RLC(r); break; \
 169 case 0x08|(n): RRC(r); break; \
 170 case 0x10|(n): RL(r); break; \
 171 case 0x18|(n): RR(r); break; \
 172 case 0x20|(n): SLA(r); break; \
 173 case 0x28|(n): SRA(r); break; \
 174 case 0x30|(n): SWAP(r); break; \
 175 case 0x38|(n): SRL(r); break; \
 176 case 0x40|(n): BIT(0, r); break; \
 177 case 0x48|(n): BIT(1, r); break; \
 178 case 0x50|(n): BIT(2, r); break; \
 179 case 0x58|(n): BIT(3, r); break; \
 180 case 0x60|(n): BIT(4, r); break; \
 181 case 0x68|(n): BIT(5, r); break; \
 182 case 0x70|(n): BIT(6, r); break; \
 183 case 0x78|(n): BIT(7, r); break; \
 184 case 0x80|(n): RES(0, r); break; \
 185 case 0x88|(n): RES(1, r); break; \
 186 case 0x90|(n): RES(2, r); break; \
 187 case 0x98|(n): RES(3, r); break; \
 188 case 0xA0|(n): RES(4, r); break; \
 189 case 0xA8|(n): RES(5, r); break; \
 190 case 0xB0|(n): RES(6, r); break; \
 191 case 0xB8|(n): RES(7, r); break; \
 192 case 0xC0|(n): SET(0, r); break; \
 193 case 0xC8|(n): SET(1, r); break; \
 194 case 0xD0|(n): SET(2, r); break; \
 195 case 0xD8|(n): SET(3, r); break; \
 196 case 0xE0|(n): SET(4, r); break; \
 197 case 0xE8|(n): SET(5, r); break; \
 198 case 0xF0|(n): SET(6, r); break; \
 199 case 0xF8|(n): SET(7, r); break;
 200
 201
 202 #define ALU_CASES(base, imm, op, label) \
 203 case (imm): b = FETCH; goto label; \
 204 case (base): b = B; goto label; \
 205 case (base)+1: b = C; goto label; \
 206 case (base)+2: b = D; goto label; \
 207 case (base)+3: b = E; goto label; \
 208 case (base)+4: b = H; goto label; \
 209 case (base)+5: b = L; goto label; \
 210 case (base)+6: b = readb(HL); goto label; \
 211 case (base)+7: b = A; \
 212 label: op(b); break;
 213
 214
 215
 216
 217
 218
 219
 220
 221 #define JR ( PC += 1+(n8)readb(PC) )
 222 #define JP ( PC = readw(PC) )
 223
 224 #define CALL ( PUSH(PC+2), JP )
 225
 226 #define NOJR ( clen--, PC++ )
 227 #define NOJP ( clen--, PC+=2 )
 228 #define NOCALL ( clen-=3, PC+=2 )
 229 #define NORET ( clen-=3 )
 230
 231 #define RST(n) { PUSH(PC); PC = (n); }
 232
 233 #define RET ( POP(PC) )
 234
 235 #define EI ( IMA = 1 )
 236 #define DI ( cpu.halt = IMA = IME = 0 )
 237
 238
 239
 240 #define PRE_INT ( DI, PUSH(PC) )
 241 #define THROW_INT(n) ( (IF &= ~(1<<(n))), (PC = 0x40+((n)<<3)) )
 242
 243
 244
 245
 246 void cpu_reset()
 247 {
 248         cpu.speed = 0;
 249         cpu.halt = 0;
 250         cpu.div = 0;
 251         cpu.tim = 0;
 252         cpu.lcdc = 40;
 253
 254         IME = 0;
 255         IMA = 0;
 256
 257         PC = bootrom.bank ? 0 : 0x0100;
 258         SP = 0xFFFE;
 259         AF = 0x01B0;
 260         BC = 0x0013;
 261         DE = 0x00D8;
 262         HL = 0x014D;
 263
 264         if (hw.cgb) A = 0x11;
 265         if (hw.gba) B = 0x01;
 266 }
 267
 268
 269 void div_advance(int cnt)
 270 {
 271         cpu.div += (cnt<<1);
 272         if (cpu.div >= 256)
 273         {
 274                 R_DIV += (cpu.div >> 8);
 275                 cpu.div &= 0xff;
 276         }
 277 }
 278
 279 void timer_advance(int cnt)
 280 {
 281         int unit, tima;
 282
 283         if (!(R_TAC & 0x04)) return;
 284
 285         unit = ((-R_TAC) & 3) << 1;
 286         cpu.tim += (cnt<<unit);
 287
 288         if (cpu.tim >= 512)
 289         {
 290                 tima = R_TIMA + (cpu.tim >> 9);
 291                 cpu.tim &= 0x1ff;
 292                 if (tima >= 256)
 293                 {
 294                         hw_interrupt(IF_TIMER, IF_TIMER);
 295                         hw_interrupt(0, IF_TIMER);
 296                 }
 297                 while (tima >= 256)
 298                         tima = tima - 256 + R_TMA;
 299                 R_TIMA = tima;
 300         }
 301 }
 302
 303 void lcdc_advance(int cnt)
 304 {
 305         cpu.lcdc -= cnt;
 306         if (cpu.lcdc <= 0) lcdc_trans();
 307 }
 308
 309 void sound_advance(int cnt)
 310 {
 311         cpu.snd += cnt;
 312 }
 313
 314 void cpu_timers(int cnt)
 315 {
 316         div_advance(cnt << cpu.speed);
 317         timer_advance(cnt << cpu.speed);
 318         lcdc_advance(cnt);
 319         sound_advance(cnt);
 320 }
 321
 322 int cpu_idle(int max)
 323 {
 324         int cnt, unit;
 325
 326         if (!(cpu.halt && IME)) return 0;
 327         if (R_IF & R_IE)
 328         {
 329                 cpu.halt = 0;
 330                 return 0;
 331         }
 332
 333         /* Make sure we don't miss lcdc status events! */
 334         if ((R_IE & (IF_VBLANK | IF_STAT)) && (max > cpu.lcdc))
 335                 max = cpu.lcdc;
 336
 337         /* If timer interrupt cannot happen, this is very simple! */
 338         if (!((R_IE & IF_TIMER) && (R_TAC & 0x04)))
 339         {
 340                 cpu_timers(max);
 341                 return max;
 342         }
 343
 344         /* Figure out when the next timer interrupt will happen */
 345         unit = ((-R_TAC) & 3) << 1;
 346         cnt = (511 - cpu.tim + (1<<unit)) >> unit;
 347         cnt += (255 - R_TIMA) << (9 - unit);
 348
 349         if (max < cnt)
 350                 cnt = max;
 351
 352         cpu_timers(cnt);
 353         return cnt;
 354 }
 355
 356 #ifndef ASM_CPU_EMULATE
 357
 358 extern int debug_trace;
 359
 360 int cpu_emulate(int cycles)
 361 {
 362         int i;
 363         byte op, cbop;
 364         int clen;
 365         static union reg acc;
 366         static byte b;
 367         static word w;
 368
 369         i = cycles;
 370 next:
 371         if ((clen = cpu_idle(i)))
 372         {
 373                 i -= clen;
 374                 if (i > 0) goto next;
 375                 return cycles-i;
 376         }
 377
 378         if (IME && (IF & IE))
 379         {
 380                 PRE_INT;
 381                 switch ((byte)(IF & IE))
 382                 {
 383                 case 0x01: case 0x03: case 0x05: case 0x07:
 384                 case 0x09: case 0x0B: case 0x0D: case 0x0F:
 385                 case 0x11: case 0x13: case 0x15: case 0x17:
 386                 case 0x19: case 0x1B: case 0x1D: case 0x1F:
 387                         THROW_INT(0); break;
 388                 case 0x02: case 0x06: case 0x0A: case 0x0E:
 389                 case 0x12: case 0x16: case 0x1A: case 0x1E:
 390                         THROW_INT(1); break;
 391                 case 0x04: case 0x0C: case 0x14: case 0x1C:
 392                         THROW_INT(2); break;
 393                 case 0x08: case 0x18:
 394                         THROW_INT(3); break;
 395                 case 0x10:
 396                         THROW_INT(4); break;
 397                 }
 398         }
 399         IME = IMA;
 400
 401         if (debug_trace) debug_disassemble(PC, 1);
 402         op = FETCH;
 403         clen = cycles_table[op];
 404
 405         switch(op)
 406         {
 407         case 0x00: /* NOP */
 408         case 0x40: /* LD B,B */
 409         case 0x49: /* LD C,C */
 410         case 0x52: /* LD D,D */
 411         case 0x5B: /* LD E,E */
 412         case 0x64: /* LD H,H */
 413         case 0x6D: /* LD L,L */
 414         case 0x7F: /* LD A,A */
 415                 break;
 416
 417         case 0x41: /* LD B,C */
 418                 B = C; break;
 419         case 0x42: /* LD B,D */
 420                 B = D; break;
 421         case 0x43: /* LD B,E */
 422                 B = E; break;
 423         case 0x44: /* LD B,H */
 424                 B = H; break;
 425         case 0x45: /* LD B,L */
 426                 B = L; break;
 427         case 0x46: /* LD B,(HL) */
 428                 B = readb(xHL); break;
 429         case 0x47: /* LD B,A */
 430                 B = A; break;
 431
 432         case 0x48: /* LD C,B */
 433                 C = B; break;
 434         case 0x4A: /* LD C,D */
 435                 C = D; break;
 436         case 0x4B: /* LD C,E */
 437                 C = E; break;
 438         case 0x4C: /* LD C,H */
 439                 C = H; break;
 440         case 0x4D: /* LD C,L */
 441                 C = L; break;
 442         case 0x4E: /* LD C,(HL) */
 443                 C = readb(xHL); break;
 444         case 0x4F: /* LD C,A */
 445                 C = A; break;
 446
 447         case 0x50: /* LD D,B */
 448                 D = B; break;
 449         case 0x51: /* LD D,C */
 450                 D = C; break;
 451         case 0x53: /* LD D,E */
 452                 D = E; break;
 453         case 0x54: /* LD D,H */
 454                 D = H; break;
 455         case 0x55: /* LD D,L */
 456                 D = L; break;
 457         case 0x56: /* LD D,(HL) */
 458                 D = readb(xHL); break;
 459         case 0x57: /* LD D,A */
 460                 D = A; break;
 461
 462         case 0x58: /* LD E,B */
 463                 E = B; break;
 464         case 0x59: /* LD E,C */
 465                 E = C; break;
 466         case 0x5A: /* LD E,D */
 467                 E = D; break;
 468         case 0x5C: /* LD E,H */
 469                 E = H; break;
 470         case 0x5D: /* LD E,L */
 471                 E = L; break;
 472         case 0x5E: /* LD E,(HL) */
 473                 E = readb(xHL); break;
 474         case 0x5F: /* LD E,A */
 475                 E = A; break;
 476
 477         case 0x60: /* LD H,B */
 478                 H = B; break;
 479         case 0x61: /* LD H,C */
 480                 H = C; break;
 481         case 0x62: /* LD H,D */
 482                 H = D; break;
 483         case 0x63: /* LD H,E */
 484                 H = E; break;
 485         case 0x65: /* LD H,L */
 486                 H = L; break;
 487         case 0x66: /* LD H,(HL) */
 488                 H = readb(xHL); break;
 489         case 0x67: /* LD H,A */
 490                 H = A; break;
 491
 492         case 0x68: /* LD L,B */
 493                 L = B; break;
 494         case 0x69: /* LD L,C */
 495                 L = C; break;
 496         case 0x6A: /* LD L,D */
 497                 L = D; break;
 498         case 0x6B: /* LD L,E */
 499                 L = E; break;
 500         case 0x6C: /* LD L,H */
 501                 L = H; break;
 502         case 0x6E: /* LD L,(HL) */
 503                 L = readb(xHL); break;
 504         case 0x6F: /* LD L,A */
 505                 L = A; break;
 506
 507         case 0x70: /* LD (HL),B */
 508                 b = B; goto __LD_HL;
 509         case 0x71: /* LD (HL),C */
 510                 b = C; goto __LD_HL;
 511         case 0x72: /* LD (HL),D */
 512                 b = D; goto __LD_HL;
 513         case 0x73: /* LD (HL),E */
 514                 b = E; goto __LD_HL;
 515         case 0x74: /* LD (HL),H */
 516                 b = H; goto __LD_HL;
 517         case 0x75: /* LD (HL),L */
 518                 b = L; goto __LD_HL;
 519         case 0x77: /* LD (HL),A */
 520                 b = A;
 521         __LD_HL:
 522                 writeb(xHL,b);
 523                 break;
 524
 525         case 0x78: /* LD A,B */
 526                 A = B; break;
 527         case 0x79: /* LD A,C */
 528                 A = C; break;
 529         case 0x7A: /* LD A,D */
 530                 A = D; break;
 531         case 0x7B: /* LD A,E */
 532                 A = E; break;
 533         case 0x7C: /* LD A,H */
 534                 A = H; break;
 535         case 0x7D: /* LD A,L */
 536                 A = L; break;
 537         case 0x7E: /* LD A,(HL) */
 538                 A = readb(xHL); break;
 539
 540         case 0x01: /* LD BC,imm */
 541                 BC = readw(xPC); PC += 2; break;
 542         case 0x11: /* LD DE,imm */
 543                 DE = readw(xPC); PC += 2; break;
 544         case 0x21: /* LD HL,imm */
 545                 HL = readw(xPC); PC += 2; break;
 546         case 0x31: /* LD SP,imm */
 547                 SP = readw(xPC); PC += 2; break;
 548
 549         case 0x02: /* LD (BC),A */
 550                 writeb(xBC, A); break;
 551         case 0x0A: /* LD A,(BC) */
 552                 A = readb(xBC); break;
 553         case 0x12: /* LD (DE),A */
 554                 writeb(xDE, A); break;
 555         case 0x1A: /* LD A,(DE) */
 556                 A = readb(xDE); break;
 557
 558         case 0x22: /* LDI (HL),A */
 559                 writeb(xHL, A); HL++; break;
 560         case 0x2A: /* LDI A,(HL) */
 561                 A = readb(xHL); HL++; break;
 562         case 0x32: /* LDD (HL),A */
 563                 writeb(xHL, A); HL--; break;
 564         case 0x3A: /* LDD A,(HL) */
 565                 A = readb(xHL); HL--; break;
 566
 567         case 0x06: /* LD B,imm */
 568                 B = FETCH; break;
 569         case 0x0E: /* LD C,imm */
 570                 C = FETCH; break;
 571         case 0x16: /* LD D,imm */
 572                 D = FETCH; break;
 573         case 0x1E: /* LD E,imm */
 574                 E = FETCH; break;
 575         case 0x26: /* LD H,imm */
 576                 H = FETCH; break;
 577         case 0x2E: /* LD L,imm */
 578                 L = FETCH; break;
 579         case 0x36: /* LD (HL),imm */
 580                 b = FETCH; writeb(xHL, b); break;
 581         case 0x3E: /* LD A,imm */
 582                 A = FETCH; break;
 583
 584         case 0x08: /* LD (imm),SP */
 585                 writew(readw(xPC), SP); PC += 2; break;
 586         case 0xEA: /* LD (imm),A */
 587                 writeb(readw(xPC), A); PC += 2; break;
 588
 589         case 0xE0: /* LDH (imm),A */
 590                 writehi(FETCH, A); break;
 591         case 0xE2: /* LDH (C),A */
 592                 writehi(C, A); break;
 593         case 0xF0: /* LDH A,(imm) */
 594                 A = readhi(FETCH); break;
 595         case 0xF2: /* LDH A,(C) (undocumented) */
 596                 A = readhi(C); break;
 597
 598
 599         case 0xF8: /* LD HL,SP+imm */
 600                 {
 601                         /* https://gammpei.github.io/blog/posts/2018-03-04/how-to-write-a-game-boy-emulator-part-8-blarggs-cpu-test-roms-1-3-4-5-7-8-9-10-11.html */
 602                         signed char v = (signed char) FETCH;
 603                         int temp = (int)(SP) + (int)v;
 604
 605                         byte half_carry = ((SP & 0xff) ^ v ^ temp) & 0x10;
 606
 607                         F &= ~(FZ | FN | FH | FC);
 608
 609                         if (half_carry) F |= FH;
 610                         if ((SP & 0xff) + (byte)v > 0xff) F |= FC;
 611
 612                         HL = temp & 0xffff;
 613                 }
 614                 break;
 615         case 0xF9: /* LD SP,HL */
 616                 SP = HL; break;
 617         case 0xFA: /* LD A,(imm) */
 618                 A = readb(readw(xPC)); PC += 2; break;
 619
 620                 ALU_CASES(0x80, 0xC6, ADD, __ADD)
 621                 ALU_CASES(0x88, 0xCE, ADC, __ADC)
 622                 ALU_CASES(0x90, 0xD6, SUB, __SUB)
 623                 ALU_CASES(0x98, 0xDE, SBC, __SBC)
 624                 ALU_CASES(0xA0, 0xE6, AND, __AND)
 625                 ALU_CASES(0xA8, 0xEE, XOR, __XOR)
 626                 ALU_CASES(0xB0, 0xF6, OR, __OR)
 627                 ALU_CASES(0xB8, 0xFE, CP, __CP)
 628
 629         case 0x09: /* ADD HL,BC */
 630                 w = BC; goto __ADDW;
 631         case 0x19: /* ADD HL,DE */
 632                 w = DE; goto __ADDW;
 633         case 0x39: /* ADD HL,SP */
 634                 w = SP; goto __ADDW;
 635         case 0x29: /* ADD HL,HL */
 636                 w = HL;
 637         __ADDW:
 638                 ADDW(w);
 639                 break;
 640
 641         case 0x04: /* INC B */
 642                 INC(B); break;
 643         case 0x0C: /* INC C */
 644                 INC(C); break;
 645         case 0x14: /* INC D */
 646                 INC(D); break;
 647         case 0x1C: /* INC E */
 648                 INC(E); break;
 649         case 0x24: /* INC H */
 650                 INC(H); break;
 651         case 0x2C: /* INC L */
 652                 INC(L); break;
 653         case 0x34: /* INC (HL) */
 654                 b = readb(xHL);
 655                 INC(b);
 656                 writeb(xHL, b);
 657                 break;
 658         case 0x3C: /* INC A */
 659                 INC(A); break;
 660
 661         case 0x03: /* INC BC */
 662                 INCW(BC); break;
 663         case 0x13: /* INC DE */
 664                 INCW(DE); break;
 665         case 0x23: /* INC HL */
 666                 INCW(HL); break;
 667         case 0x33: /* INC SP */
 668                 INCW(SP); break;
 669
 670         case 0x05: /* DEC B */
 671                 DEC(B); break;
 672         case 0x0D: /* DEC C */
 673                 DEC(C); break;
 674         case 0x15: /* DEC D */
 675                 DEC(D); break;
 676         case 0x1D: /* DEC E */
 677                 DEC(E); break;
 678         case 0x25: /* DEC H */
 679                 DEC(H); break;
 680         case 0x2D: /* DEC L */
 681                 DEC(L); break;
 682         case 0x35: /* DEC (HL) */
 683                 b = readb(xHL);
 684                 DEC(b);
 685                 writeb(xHL, b);
 686                 break;
 687         case 0x3D: /* DEC A */
 688                 DEC(A); break;
 689
 690         case 0x0B: /* DEC BC */
 691                 DECW(BC); break;
 692         case 0x1B: /* DEC DE */
 693                 DECW(DE); break;
 694         case 0x2B: /* DEC HL */
 695                 DECW(HL); break;
 696         case 0x3B: /* DEC SP */
 697                 DECW(SP); break;
 698
 699         case 0x07: /* RLCA */
 700                 RLCA(A); break;
 701         case 0x0F: /* RRCA */
 702                 RRCA(A); break;
 703         case 0x17: /* RLA */
 704                 RLA(A); break;
 705         case 0x1F: /* RRA */
 706                 RRA(A); break;
 707
 708         case 0x27: /* DAA */
 709                 {
 710                         int a = A;
 711                         if (!(F & FN))
 712                         {
 713                                 if ((F & FH) || ((a & 0x0f) > 9)) a += 0x06;
 714
 715                                 if ((F & FC) || (a > 0x9f)) a += 0x60;
 716                         }
 717                         else
 718                         {
 719                                 if (F & FH) a = (a - 6) & 0xff;
 720                                 if (F & FC) a -= 0x60;
 721                         }
 722
 723                         F &= ~(FH | FZ);
 724
 725                         if (a & 0x100) F |= FC;
 726
 727                         a &= 0xff;
 728
 729                         if (!a) F |= FZ;
 730
 731                         A = (byte)a;
 732                 }
 733                 break;
 734         case 0x2F: /* CPL */
 735                 CPL(A); break;
 736
 737         case 0x18: /* JR */
 738         __JR:
 739                 JR; break;
 740         case 0x20: /* JR NZ */
 741                 if (!(F&FZ)) goto __JR; NOJR; break;
 742         case 0x28: /* JR Z */
 743                 if (F&FZ) goto __JR; NOJR; break;
 744         case 0x30: /* JR NC */
 745                 if (!(F&FC)) goto __JR; NOJR; break;
 746         case 0x38: /* JR C */
 747                 if (F&FC) goto __JR; NOJR; break;
 748
 749         case 0xC3: /* JP */
 750         __JP:
 751                 JP; break;
 752         case 0xC2: /* JP NZ */
 753                 if (!(F&FZ)) goto __JP; NOJP; break;
 754         case 0xCA: /* JP Z */
 755                 if (F&FZ) goto __JP; NOJP; break;
 756         case 0xD2: /* JP NC */
 757                 if (!(F&FC)) goto __JP; NOJP; break;
 758         case 0xDA: /* JP C */
 759                 if (F&FC) goto __JP; NOJP; break;
 760         case 0xE9: /* JP HL */
 761                 PC = HL; break;
 762
 763         case 0xC9: /* RET */
 764         __RET:
 765                 RET; break;
 766         case 0xC0: /* RET NZ */
 767                 if (!(F&FZ)) goto __RET; NORET; break;
 768         case 0xC8: /* RET Z */
 769                 if (F&FZ) goto __RET; NORET; break;
 770         case 0xD0: /* RET NC */
 771                 if (!(F&FC)) goto __RET; NORET; break;
 772         case 0xD8: /* RET C */
 773                 if (F&FC) goto __RET; NORET; break;
 774         case 0xD9: /* RETI */
 775                 IME = IMA = 1; goto __RET;
 776
 777         case 0xCD: /* CALL */
 778         __CALL:
 779                 CALL; break;
 780         case 0xC4: /* CALL NZ */
 781                 if (!(F&FZ)) goto __CALL; NOCALL; break;
 782         case 0xCC: /* CALL Z */
 783                 if (F&FZ) goto __CALL; NOCALL; break;
 784         case 0xD4: /* CALL NC */
 785                 if (!(F&FC)) goto __CALL; NOCALL; break;
 786         case 0xDC: /* CALL C */
 787                 if (F&FC) goto __CALL; NOCALL; break;
 788
 789         case 0xC7: /* RST 0 */
 790                 b = 0x00; goto __RST;
 791         case 0xCF: /* RST 8 */
 792                 b = 0x08; goto __RST;
 793         case 0xD7: /* RST 10 */
 794                 b = 0x10; goto __RST;
 795         case 0xDF: /* RST 18 */
 796                 b = 0x18; goto __RST;
 797         case 0xE7: /* RST 20 */
 798                 b = 0x20; goto __RST;
 799         case 0xEF: /* RST 28 */
 800                 b = 0x28; goto __RST;
 801         case 0xF7: /* RST 30 */
 802                 b = 0x30; goto __RST;
 803         case 0xFF: /* RST 38 */
 804                 b = 0x38;
 805         __RST:
 806                 RST(b); break;
 807
 808         case 0xC1: /* POP BC */
 809                 POP(BC); break;
 810         case 0xC5: /* PUSH BC */
 811                 PUSH(BC); break;
 812         case 0xD1: /* POP DE */
 813                 POP(DE); break;
 814         case 0xD5: /* PUSH DE */
 815                 PUSH(DE); break;
 816         case 0xE1: /* POP HL */
 817                 POP(HL); break;
 818         case 0xE5: /* PUSH HL */
 819                 PUSH(HL); break;
 820         case 0xF1: /* POP AF */
 821                 POP(AF); AF &= 0xfff0; break;
 822         case 0xF5: /* PUSH AF */
 823                 PUSH(AF); break;
 824
 825         case 0xE8: /* ADD SP,imm */
 826                 {
 827                         /* https://gammpei.github.io/blog/posts/2018-03-04/how-to-write-a-game-boy-emulator-part-8-blarggs-cpu-test-roms-1-3-4-5-7-8-9-10-11.html */
 828                         signed char v = (signed char) FETCH;
 829                         int temp = (int)(SP) + (int)v;
 830
 831                         byte half_carry = ((SP & 0xff) ^ v ^ temp) & 0x10;
 832
 833                         F &= ~(FZ | FN | FH | FC);
 834
 835                         if (half_carry) F |= FH;
 836                         if ((SP & 0xff) + (byte)v > 0xff) F |= FC;
 837
 838                         SP = temp & 0xffff;
 839                 }
 840                 break;
 841
 842
 843         case 0xF3: /* DI */
 844                 DI; break;
 845         case 0xFB: /* EI */
 846                 EI; break;
 847
 848         case 0x37: /* SCF */
 849                 SCF; break;
 850         case 0x3F: /* CCF */
 851                 CCF; break;
 852
 853         case 0x10: /* STOP */
 854                 PC++;
 855                 if (R_KEY1 & 1)
 856                 {
 857                         cpu.speed = cpu.speed ^ 1;
 858                         R_KEY1 = (R_KEY1 & 0x7E) | (cpu.speed << 7);
 859                         break;
 860                 }
 861                 /* NOTE - we do not implement dmg STOP whatsoever */
 862                 break;
 863
 864         case 0x76: /* HALT */
 865                 cpu.halt = 1;
 866                 break;
 867
 868         case 0xCB: /* CB prefix */
 869                 cbop = FETCH;
 870                 clen = cb_cycles_table[cbop];
 871                 switch (cbop)
 872                 {
 873                         CB_REG_CASES(B, 0);
 874                         CB_REG_CASES(C, 1);
 875                         CB_REG_CASES(D, 2);
 876                         CB_REG_CASES(E, 3);
 877                         CB_REG_CASES(H, 4);
 878                         CB_REG_CASES(L, 5);
 879                         CB_REG_CASES(A, 7);
 880                 default:
 881                         b = readb(xHL);
 882                         switch(cbop)
 883                         {
 884                                 CB_REG_CASES(b, 6);
 885                         }
 886                         if ((cbop & 0xC0) != 0x40) /* exclude BIT */
 887                                 writeb(xHL, b);
 888                         break;
 889                 }
 890                 break;
 891
 892         default:
 893                 die(
 894                         "invalid opcode 0x%02X at address 0x%04X, rombank = %d\n",
 895                         op, (PC-1) & 0xffff, mbc.rombank);
 896                 break;
 897         }
 898
 899         clen <<= 1;
 900         div_advance(clen);
 901         timer_advance(clen);
 902         clen >>= cpu.speed;
 903         lcdc_advance(clen);
 904         sound_advance(clen);
 905
 906         i -= clen;
 907         if (i > 0) goto next;
 908         return cycles-i;
 909 }
 910
 911 #endif /* ASM_CPU_EMULATE */
 912
 913
 914 #ifndef ASM_CPU_STEP
 915
 916 int cpu_step(int max)
 917 {
 918         int cnt;
 919         if ((cnt = cpu_idle(max))) return cnt;
 920         return cpu_emulate(1);
 921 }
 922
 923 #endif /* ASM_CPU_STEP */
 924
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