agssim: stop execution on invalid jump
[rofl0r-agsutils.git] / regusage.h
blob82046827910274a41ad83d58db6068de0d955af0
1 enum RegisterAccess {
2 RA_NONE = 0,
3 RA_READ = 1 << 0,
4 RA_WRITE = 1 << 1,
5 RA_READWRITE = 1 << 2,
6 };
8 struct regaccess_info {
9 /* enum RegisterAccess */ unsigned char ra_reg1;
10 /* enum RegisterAccess */ unsigned char ra_reg2;
11 /* enum RegisterAccess */ unsigned char ra_mar;
12 /* enum RegisterAccess */ unsigned char ra_sp;
13 } __attribute__((packed));
15 static const struct regaccess_info regaccess_info[] = {
16 [0] = {RA_NONE, RA_NONE, RA_NONE, RA_NONE},
17 [SCMD_ADD] = {RA_READWRITE, RA_NONE, RA_NONE, RA_NONE},
18 [SCMD_SUB] = {RA_READWRITE, RA_NONE, RA_NONE, RA_NONE},
19 [SCMD_REGTOREG] = {RA_READ, RA_WRITE, RA_NONE, RA_NONE},
20 [SCMD_WRITELIT] = {RA_NONE, RA_NONE, RA_READ, RA_NONE},
21 [SCMD_RET] = {RA_NONE, RA_NONE, RA_NONE, RA_READWRITE},
22 [SCMD_LITTOREG] = {RA_WRITE, RA_NONE, RA_NONE, RA_NONE},
23 [SCMD_MEMREAD] = {RA_WRITE, RA_NONE, RA_READ, RA_NONE},
24 [SCMD_MEMWRITE] = {RA_READ, RA_NONE, RA_READ, RA_NONE},
25 [SCMD_MULREG] = {RA_READWRITE, RA_READ, RA_NONE, RA_NONE},
26 [SCMD_DIVREG] = {RA_READWRITE, RA_READ, RA_NONE, RA_NONE},
27 [SCMD_ADDREG] = {RA_READWRITE, RA_READ, RA_NONE, RA_NONE},
28 [SCMD_SUBREG] = {RA_READWRITE, RA_READ, RA_NONE, RA_NONE},
29 [SCMD_BITAND] = {RA_READWRITE, RA_READ, RA_NONE, RA_NONE},
30 [SCMD_BITOR] = {RA_READWRITE, RA_READ, RA_NONE, RA_NONE},
31 [SCMD_ISEQUAL] = {RA_READWRITE, RA_READ, RA_NONE, RA_NONE},
32 [SCMD_NOTEQUAL] = {RA_READWRITE, RA_READ, RA_NONE, RA_NONE},
33 [SCMD_GREATER] = {RA_READWRITE, RA_READ, RA_NONE, RA_NONE},
34 [SCMD_LESSTHAN] = {RA_READWRITE, RA_READ, RA_NONE, RA_NONE},
35 [SCMD_GTE] = {RA_READWRITE, RA_READ, RA_NONE, RA_NONE},
36 [SCMD_LTE] = {RA_READWRITE, RA_READ, RA_NONE, RA_NONE},
37 [SCMD_AND] = {RA_READWRITE, RA_READ, RA_NONE, RA_NONE}, /*logical*/
38 [SCMD_OR] = {RA_READWRITE, RA_READ, RA_NONE, RA_NONE},
39 [SCMD_CALL] = {RA_READ, RA_NONE, RA_NONE, RA_READWRITE},
40 [SCMD_MEMREADB] = {RA_WRITE, RA_NONE, RA_READ, RA_NONE},
41 [SCMD_MEMREADW] = {RA_WRITE, RA_NONE, RA_READ, RA_NONE},
42 [SCMD_MEMWRITEB] = {RA_READ, RA_NONE, RA_READ, RA_NONE},
43 [SCMD_MEMWRITEW] = {RA_READ, RA_NONE, RA_READ, RA_NONE},
44 [SCMD_JZ] = {RA_NONE, RA_NONE, RA_NONE, RA_NONE},
45 [SCMD_PUSHREG] = {RA_READ, RA_NONE, RA_NONE, RA_READWRITE},
46 [SCMD_POPREG] = {RA_WRITE, RA_NONE, RA_NONE, RA_READWRITE},
47 [SCMD_JMP] = {RA_NONE, RA_NONE, RA_NONE, RA_NONE},
48 [SCMD_MUL] = {RA_READWRITE, RA_NONE, RA_NONE, RA_NONE},
49 [SCMD_CALLEXT] = {RA_READ, RA_NONE, RA_NONE, RA_NONE},
50 [SCMD_PUSHREAL] = {RA_READ, RA_NONE, RA_NONE, RA_NONE},
51 [SCMD_SUBREALSTACK] = {RA_READ, RA_NONE, RA_NONE, RA_NONE},
52 [SCMD_LINENUM] = {RA_NONE, RA_NONE, RA_NONE, RA_NONE},
53 [SCMD_CALLAS] = {RA_READ, RA_NONE, RA_NONE, RA_NONE},
54 [SCMD_THISBASE] = {RA_NONE, RA_NONE, RA_NONE, RA_NONE},
55 [SCMD_NUMFUNCARGS] = {RA_NONE, RA_NONE, RA_NONE, RA_NONE},
56 [SCMD_MODREG] = {RA_READWRITE, RA_READ, RA_NONE, RA_NONE},
57 [SCMD_XORREG] = {RA_READWRITE, RA_READ, RA_NONE, RA_NONE},
58 [SCMD_NOTREG] = {RA_READWRITE, RA_READ, RA_NONE, RA_NONE},
59 [SCMD_SHIFTLEFT] = {RA_READWRITE, RA_READ, RA_NONE, RA_NONE},
60 [SCMD_SHIFTRIGHT] = {RA_READWRITE, RA_READ, RA_NONE, RA_NONE},
61 [SCMD_CALLOBJ] = {RA_READ, RA_NONE, RA_NONE, RA_NONE},
62 [SCMD_CHECKBOUNDS] = {RA_READ, RA_NONE, RA_NONE, RA_NONE},
63 [SCMD_MEMWRITEPTR] = {RA_NONE, RA_NONE, RA_NONE, RA_NONE}, //TODO
64 [SCMD_MEMREADPTR] = {RA_NONE, RA_NONE, RA_NONE, RA_NONE}, //TODO
65 [SCMD_MEMZEROPTR] = {RA_NONE, RA_NONE, RA_NONE, RA_NONE},
66 [SCMD_MEMINITPTR] = {RA_NONE, RA_NONE, RA_NONE, RA_NONE}, //TODO
67 [SCMD_LOADSPOFFS] = {RA_NONE, RA_NONE, RA_WRITE, RA_NONE},
68 [SCMD_CHECKNULL] = {RA_NONE, RA_NONE, RA_NONE, RA_NONE},
69 [SCMD_FADD] = {RA_READWRITE, RA_NONE, RA_NONE, RA_NONE},
70 [SCMD_FSUB] = {RA_READWRITE, RA_NONE, RA_NONE, RA_NONE},
71 [SCMD_FMULREG] = {RA_READWRITE, RA_READ, RA_NONE, RA_NONE},
72 [SCMD_FDIVREG] = {RA_READWRITE, RA_READ, RA_NONE, RA_NONE},
73 [SCMD_FADDREG] = {RA_READWRITE, RA_READ, RA_NONE, RA_NONE},
74 [SCMD_FSUBREG] = {RA_READWRITE, RA_READ, RA_NONE, RA_NONE},
75 [SCMD_FGREATER] = {RA_READWRITE, RA_READ, RA_NONE, RA_NONE},
76 [SCMD_FLESSTHAN] = {RA_READWRITE, RA_READ, RA_NONE, RA_NONE},
77 [SCMD_FGTE] = {RA_READWRITE, RA_READ, RA_NONE, RA_NONE},
78 [SCMD_FLTE] = {RA_READWRITE, RA_READ, RA_NONE, RA_NONE},
79 [SCMD_ZEROMEMORY] = {RA_NONE, RA_NONE, RA_READ, RA_NONE},
80 [SCMD_CREATESTRING] = {RA_NONE, RA_NONE, RA_NONE, RA_NONE}, //TODO
81 [SCMD_STRINGSEQUAL] = {RA_READWRITE, RA_READ, RA_NONE, RA_NONE},
82 [SCMD_STRINGSNOTEQ] = {RA_READWRITE, RA_READ, RA_NONE, RA_NONE},
83 [SCMD_CHECKNULLREG] = {RA_NONE, RA_NONE, RA_NONE, RA_NONE}, //TODO
84 [SCMD_LOOPCHECKOFF] = {RA_NONE, RA_NONE, RA_NONE, RA_NONE},
85 [SCMD_MEMZEROPTRND] = {RA_NONE, RA_NONE, RA_READ, RA_NONE},
86 [SCMD_JNZ] = {RA_NONE, RA_NONE, RA_NONE, RA_NONE},
87 [SCMD_DYNAMICBOUNDS] = {RA_NONE, RA_NONE, RA_NONE, RA_NONE}, //TODO
88 [SCMD_NEWARRAY] = {RA_NONE, RA_NONE, RA_NONE, RA_NONE}, //TODO
91 enum RegisterUsage {
92 RU_NONE = 0,
93 RU_READ = 1 << 0,
94 RU_WRITE = 1 << 1,
95 RU_WRITE_AFTER_READ = 1 << 2,
98 static enum RegisterUsage get_reg_usage(int regno, enum RegisterUsage old, enum RegisterAccess ra) {
99 enum RegisterUsage ru = old;
100 switch(ra) {
101 case RA_READ:
102 if(ru == RU_NONE || ru == RU_READ) ru = RU_READ;
103 else if(ru == RU_WRITE);
104 else if(ru == RU_WRITE_AFTER_READ);
105 break;
106 case RA_WRITE:
107 if(ru == RU_NONE || ru == RU_WRITE) ru = RU_WRITE;
108 else if(ru == RU_READ) ru = RU_WRITE_AFTER_READ;
109 else if(ru == RU_WRITE_AFTER_READ);
110 break;
111 case RA_READWRITE:
112 if(ru == RU_NONE || ru == RU_READ) ru = RU_WRITE_AFTER_READ;
113 else if(ru == RU_WRITE);
114 else if(ru == RU_WRITE_AFTER_READ);
115 break;
117 return ru;