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HEAD
Implement preliminary SAM Coupé emulation
[qemu/z80.git]
/
tests
/
cris
/
check_movemrv32.s
blob
53950abd5bd51d34cd43dbb3d344bd1ab9550ab7
1
# mach: crisv32
2
# output: 15\n7\n2\nffff1234\nb\n16\nf\n2\nffffffef\nf\nffff1234\nf\nfffffff4\nd\nfffffff2\n10\nfffffff2\nd\n
3
4
.include
"testutils.inc"
5
.data
6
x
:
7
.dword 8,9,10,11
8
y
:
9
.dword -12,13,-14,15,16
10
11
start
12
moveq
7
,
r0
13
moveq
2
,
r1
14
move.d
0xffff1234
,
r2
15
moveq
21
,
r3
16
move.d x
,
r4
17
setf zcvn
18
movem
r2
,[
r4+
]
19
test_cc
1 1 1 1
20
subq
12
,
r4
21
22
checkr3
15
23
24
move.d
[
r4+
],
r3
25
checkr3
7
26
27
move.d
[
r4+
],
r3
28
checkr3
2
29
30
move.d
[
r4+
],
r3
31
checkr3 ffff1234
32
33
move.d
[
r4+
],
r3
34
checkr3
b
35
36
subq
16
,
r4
37
moveq
22
,
r0
38
moveq
15
,
r1
39
clearf zcvn
40
movem
r0
,[
r4
]
41
test_cc
0 0 0 0
42
move.d
[
r4+
],
r3
43
checkr3
16
44
45
move.d
r1
,
r3
46
checkr3 f
47
48
move.d
[
r4+
],
r3
49
checkr3
2
50
51
subq
8
,
r4
52
moveq
10
,
r2
53
moveq
-
17
,
r0
54
clearf zc
55
setf vn
56
movem
r1
,[
r4
]
57
test_cc
1 0 1 0
58
move.d
[
r4+
],
r3
59
checkr3 ffffffef
60
61
move.d
[
r4+
],
r3
62
checkr3 f
63
64
move.d
[
r4+
],
r3
65
checkr3 ffff1234
66
67
move.d y
,
r4
68
setf zc
69
clearf vn
70
movem
[
r4+
],
r3
71
test_cc
0 1 0 1
72
checkr3 f
73
74
move.d
r0
,
r3
75
checkr3 fffffff4
76
77
move.d
r1
,
r3
78
checkr3 d
79
80
move.d
r2
,
r3
81
checkr3 fffffff2
82
83
move.d
[
r4
],
r3
84
checkr3
10
85
86
subq
8
,
r4
87
setf zcvn
88
movem
[
r4+
],
r0
89
test_cc
1 1 1 1
90
move.d
r0
,
r3
91
checkr3 fffffff2
92
93
move.d
r1
,
r3
94
checkr3 d
95
96
quit