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HEAD
Implement preliminary SAM Coupé emulation
[qemu/z80.git]
/
tests
/
cris
/
check_addiv32.s
blob
20ba25d2192f703d087538618b6ed49c57b761f7
1
# mach: crisv32
2
# output: 4455aa77\n4455aa77\nee19ccff\nff22\n4455aa77\nff224455\n55aa77ff\n
3
4
.include
"testutils.inc"
5
.data
6
x
:
7
.dword 0x55aa77ff
8
.dword 0xccff2244
9
.dword 0x88ccee19
10
11
start
12
setf cv
13
moveq
-
1
,
r0
14
move.d x-
32768
,
r5
15
move.d
32769
,
r6
16
addi
r6.
b
,
r5
,
acr
17
test_cc
0 0 1 1
18
move.d
[
acr
],
r3
19
checkr3
4455
aa77
20
21
addu.w
32771
,
r5
22
setf znvc
23
moveq
-
1
,
r8
24
addi
r8.w
,
r5
,
acr
25
test_cc
1 1 1 1
26
move.d
[
acr
],
r3
27
checkr3
4455
aa77
28
29
moveq
5
,
r10
30
clearf znvc
31
addi
r10.
b
,
acr
,
acr
32
test_cc
0 0 0 0
33
move.d
[
acr
],
r3
34
checkr3 ee19ccff
35
36
subq
1
,
r5
37
move.d
r5
,
r8
38
subq
1
,
r8
39
moveq
1
,
r9
40
addi
r9.d
,
r8
,
acr
41
test_cc
0 0 0 0
42
movu.w
[
acr
],
r3
43
checkr3 ff22
44
45
moveq
-
2
,
r11
46
addi
r11.w
,
acr
,
acr
47
move.d
[
acr
],
r3
48
checkr3
4455
aa77
49
50
moveq
5
,
r9
51
addi
r9.d
,
acr
,
acr
52
subq
18
,
acr
53
move.d
[
acr
],
r3
54
checkr3 ff224455
55
56
move.d
-
76789888
/
4
,
r12
57
addi
r12.d
,
r5
,
acr
58
add.
d
76789886
,
acr
59
move.d
[
acr
],
r3
60
checkr3
55
aa77ff
61
62
quit