hw/xtensa_lx60.c

   1 /*
   2  * Copyright (c) 2011, Max Filippov, Open Source and Linux Lab.
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are met:
   7  *     * Redistributions of source code must retain the above copyright
   8  *       notice, this list of conditions and the following disclaimer.
   9  *     * Redistributions in binary form must reproduce the above copyright
  10  *       notice, this list of conditions and the following disclaimer in the
  11  *       documentation and/or other materials provided with the distribution.
  12  *     * Neither the name of the Open Source and Linux Lab nor the
  13  *       names of its contributors may be used to endorse or promote products
  14  *       derived from this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  17  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  19  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
  20  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  21  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  22  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  23  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  24  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  25  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  26  */
  27
  28 #include "sysemu.h"
  29 #include "boards.h"
  30 #include "loader.h"
  31 #include "elf.h"
  32 #include "memory.h"
  33 #include "exec-memory.h"
  34 #include "pc.h"
  35 #include "sysbus.h"
  36
  37 typedef struct Lx60FpgaState {
  38     MemoryRegion iomem;
  39     uint32_t leds;
  40     uint32_t switches;
  41 } Lx60FpgaState;
  42
  43 static void lx60_fpga_reset(void *opaque)
  44 {
  45     Lx60FpgaState *s = opaque;
  46
  47     s->leds = 0;
  48     s->switches = 0;
  49 }
  50
  51 static uint64_t lx60_fpga_read(void *opaque, target_phys_addr_t addr,
  52         unsigned size)
  53 {
  54     Lx60FpgaState *s = opaque;
  55
  56     switch (addr) {
  57     case 0x0: /*build date code*/
  58         return 0x27092011;
  59
  60     case 0x4: /*processor clock frequency, Hz*/
  61         return 10000000;
  62
  63     case 0x8: /*LEDs (off = 0, on = 1)*/
  64         return s->leds;
  65
  66     case 0xc: /*DIP switches (off = 0, on = 1)*/
  67         return s->switches;
  68     }
  69     return 0;
  70 }
  71
  72 static void lx60_fpga_write(void *opaque, target_phys_addr_t addr,
  73         uint64_t val, unsigned size)
  74 {
  75     Lx60FpgaState *s = opaque;
  76
  77     switch (addr) {
  78     case 0x8: /*LEDs (off = 0, on = 1)*/
  79         s->leds = val;
  80         break;
  81
  82     case 0x10: /*board reset*/
  83         if (val == 0xdead) {
  84             qemu_system_reset_request();
  85         }
  86         break;
  87     }
  88 }
  89
  90 static const MemoryRegionOps lx60_fpga_ops = {
  91     .read = lx60_fpga_read,
  92     .write = lx60_fpga_write,
  93     .endianness = DEVICE_NATIVE_ENDIAN,
  94 };
  95
  96 static Lx60FpgaState *lx60_fpga_init(MemoryRegion *address_space,
  97         target_phys_addr_t base)
  98 {
  99     Lx60FpgaState *s = g_malloc(sizeof(Lx60FpgaState));
 100
 101     memory_region_init_io(&s->iomem, &lx60_fpga_ops, s,
 102             "lx60-fpga", 0x10000);
 103     memory_region_add_subregion(address_space, base, &s->iomem);
 104     lx60_fpga_reset(s);
 105     qemu_register_reset(lx60_fpga_reset, s);
 106     return s;
 107 }
 108
 109 static void lx60_net_init(MemoryRegion *address_space,
 110         target_phys_addr_t base,
 111         target_phys_addr_t descriptors,
 112         target_phys_addr_t buffers,
 113         qemu_irq irq, NICInfo *nd)
 114 {
 115     DeviceState *dev;
 116     SysBusDevice *s;
 117     MemoryRegion *ram;
 118
 119     dev = qdev_create(NULL, "open_eth");
 120     qdev_set_nic_properties(dev, nd);
 121     qdev_init_nofail(dev);
 122
 123     s = sysbus_from_qdev(dev);
 124     sysbus_connect_irq(s, 0, irq);
 125     memory_region_add_subregion(address_space, base,
 126             sysbus_mmio_get_region(s, 0));
 127     memory_region_add_subregion(address_space, descriptors,
 128             sysbus_mmio_get_region(s, 1));
 129
 130     ram = g_malloc(sizeof(*ram));
 131     memory_region_init_ram(ram, NULL, "open_eth.ram", 16384);
 132     memory_region_add_subregion(address_space, buffers, ram);
 133 }
 134
 135 static uint64_t translate_phys_addr(void *env, uint64_t addr)
 136 {
 137     return cpu_get_phys_page_debug(env, addr);
 138 }
 139
 140 static void lx60_reset(void *env)
 141 {
 142     cpu_reset(env);
 143 }
 144
 145 static void lx60_init(ram_addr_t ram_size,
 146         const char *boot_device,
 147         const char *kernel_filename, const char *kernel_cmdline,
 148         const char *initrd_filename, const char *cpu_model)
 149 {
 150 #ifdef TARGET_WORDS_BIGENDIAN
 151     int be = 1;
 152 #else
 153     int be = 0;
 154 #endif
 155     MemoryRegion *system_memory = get_system_memory();
 156     CPUState *env = NULL;
 157     MemoryRegion *ram, *rom, *system_io;
 158     int n;
 159
 160     for (n = 0; n < smp_cpus; n++) {
 161         env = cpu_init(cpu_model);
 162         if (!env) {
 163             fprintf(stderr, "Unable to find CPU definition\n");
 164             exit(1);
 165         }
 166         env->sregs[PRID] = n;
 167         qemu_register_reset(lx60_reset, env);
 168         /* Need MMU initialized prior to ELF loading,
 169          * so that ELF gets loaded into virtual addresses
 170          */
 171         cpu_reset(env);
 172     }
 173
 174     ram = g_malloc(sizeof(*ram));
 175     memory_region_init_ram(ram, NULL, "xtensa.sram", ram_size);
 176     memory_region_add_subregion(system_memory, 0, ram);
 177
 178     rom = g_malloc(sizeof(*rom));
 179     memory_region_init_ram(rom, NULL, "xtensa.rom", 0x1000);
 180     memory_region_add_subregion(system_memory, 0xfe000000, rom);
 181
 182     system_io = g_malloc(sizeof(*system_io));
 183     memory_region_init(system_io, "system.io", 224 * 1024 * 1024);
 184     memory_region_add_subregion(system_memory, 0xf0000000, system_io);
 185     lx60_fpga_init(system_io, 0x0d020000);
 186     if (nd_table[0].vlan) {
 187         lx60_net_init(system_io, 0x0d030000, 0x0d030400, 0x0d800000,
 188                 xtensa_get_extint(env, 1), nd_table);
 189     }
 190
 191     if (!serial_hds[0]) {
 192         serial_hds[0] = qemu_chr_new("serial0", "null", NULL);
 193     }
 194
 195     serial_mm_init(system_io, 0x0d050020, 2, xtensa_get_extint(env, 0),
 196             115200, serial_hds[0], DEVICE_NATIVE_ENDIAN);
 197
 198     if (kernel_filename) {
 199         uint64_t elf_entry;
 200         uint64_t elf_lowaddr;
 201         int success = load_elf(kernel_filename, translate_phys_addr, env,
 202                 &elf_entry, &elf_lowaddr, NULL, be, ELF_MACHINE, 0);
 203         if (success > 0) {
 204             env->pc = elf_entry;
 205         }
 206     }
 207 }
 208
 209 static void xtensa_lx60_init(ram_addr_t ram_size,
 210                      const char *boot_device,
 211                      const char *kernel_filename, const char *kernel_cmdline,
 212                      const char *initrd_filename, const char *cpu_model)
 213 {
 214     if (!cpu_model) {
 215         cpu_model = "dc232b";
 216     }
 217     lx60_init(ram_size, boot_device, kernel_filename, kernel_cmdline,
 218             initrd_filename, cpu_model);
 219 }
 220
 221 static QEMUMachine xtensa_lx60_machine = {
 222     .name = "lx60",
 223     .desc = "lx60 EVB (dc232b)",
 224     .init = xtensa_lx60_init,
 225     .max_cpus = 4,
 226 };
 227
 228 static void xtensa_lx60_machine_init(void)
 229 {
 230     qemu_register_machine(&xtensa_lx60_machine);
 231 }
 232
 233 machine_init(xtensa_lx60_machine_init);