2 * QEMU internal VGA defines.
4 * Copyright (c) 2003-2004 Fabrice Bellard
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
28 #define ST01_V_RETRACE 0x08
29 #define ST01_DISP_ENABLE 0x01
31 /* bochs VBE support */
32 #define CONFIG_BOCHS_VBE
34 #define VBE_DISPI_MAX_XRES 1600
35 #define VBE_DISPI_MAX_YRES 1200
36 #define VBE_DISPI_MAX_BPP 32
38 #define VBE_DISPI_INDEX_ID 0x0
39 #define VBE_DISPI_INDEX_XRES 0x1
40 #define VBE_DISPI_INDEX_YRES 0x2
41 #define VBE_DISPI_INDEX_BPP 0x3
42 #define VBE_DISPI_INDEX_ENABLE 0x4
43 #define VBE_DISPI_INDEX_BANK 0x5
44 #define VBE_DISPI_INDEX_VIRT_WIDTH 0x6
45 #define VBE_DISPI_INDEX_VIRT_HEIGHT 0x7
46 #define VBE_DISPI_INDEX_X_OFFSET 0x8
47 #define VBE_DISPI_INDEX_Y_OFFSET 0x9
48 #define VBE_DISPI_INDEX_NB 0xa /* size of vbe_regs[] */
49 #define VBE_DISPI_INDEX_VIDEO_MEMORY_64K 0xa /* read-only, not in vbe_regs */
51 #define VBE_DISPI_ID0 0xB0C0
52 #define VBE_DISPI_ID1 0xB0C1
53 #define VBE_DISPI_ID2 0xB0C2
54 #define VBE_DISPI_ID3 0xB0C3
55 #define VBE_DISPI_ID4 0xB0C4
56 #define VBE_DISPI_ID5 0xB0C5
58 #define VBE_DISPI_DISABLED 0x00
59 #define VBE_DISPI_ENABLED 0x01
60 #define VBE_DISPI_GETCAPS 0x02
61 #define VBE_DISPI_8BIT_DAC 0x20
62 #define VBE_DISPI_LFB_ENABLED 0x40
63 #define VBE_DISPI_NOCLEARMEM 0x80
65 #define VBE_DISPI_LFB_PHYSICAL_ADDRESS 0xE0000000
67 #ifdef CONFIG_BOCHS_VBE
69 #define VGA_STATE_COMMON_BOCHS_VBE \
71 uint16_t vbe_regs[VBE_DISPI_INDEX_NB]; \
72 uint32_t vbe_start_addr; \
73 uint32_t vbe_line_offset; \
74 uint32_t vbe_bank_mask; \
78 #define VGA_STATE_COMMON_BOCHS_VBE
80 #endif /* !CONFIG_BOCHS_VBE */
82 #define CH_ATTR_SIZE (160 * 100)
83 #define VGA_MAX_HEIGHT 2048
85 struct vga_precise_retrace
{
86 int64_t ticks_per_char
;
97 struct vga_precise_retrace precise
;
100 struct VGACommonState
;
101 typedef uint8_t (* vga_retrace_fn
)(struct VGACommonState
*s
);
102 typedef void (* vga_update_retrace_info_fn
)(struct VGACommonState
*s
);
104 typedef struct VGACommonState
{
105 MemoryRegion
*legacy_address_space
;
110 MemoryRegion
*chain4_alias
;
119 uint8_t cr
[256]; /* CRT registers */
120 uint8_t msr
; /* Misc Output Register */
121 uint8_t fcr
; /* Feature Control Register */
122 uint8_t st00
; /* status 0 */
123 uint8_t st01
; /* status 1 */
125 uint8_t dac_sub_index
;
126 uint8_t dac_read_index
;
127 uint8_t dac_write_index
;
128 uint8_t dac_cache
[3]; /* used when writing */
130 uint8_t palette
[768];
132 int (*get_bpp
)(struct VGACommonState
*s
);
133 void (*get_offsets
)(struct VGACommonState
*s
,
134 uint32_t *pline_offset
,
135 uint32_t *pstart_addr
,
136 uint32_t *pline_compare
);
137 void (*get_resolution
)(struct VGACommonState
*s
,
140 VGA_STATE_COMMON_BOCHS_VBE
141 /* display refresh support */
143 uint32_t font_offsets
[2];
145 uint8_t shift_control
;
147 uint32_t line_offset
;
148 uint32_t line_compare
;
150 uint32_t plane_updated
;
151 uint32_t last_line_offset
;
152 uint8_t last_cw
, last_ch
;
153 uint32_t last_width
, last_height
; /* in chars or pixels */
154 uint32_t last_scr_width
, last_scr_height
; /* in pixels */
155 uint32_t last_depth
; /* in bits */
156 uint8_t cursor_start
, cursor_end
;
157 uint32_t cursor_offset
;
158 unsigned int (*rgb_to_pixel
)(unsigned int r
,
159 unsigned int g
, unsigned b
);
160 vga_hw_update_ptr update
;
161 vga_hw_invalidate_ptr invalidate
;
162 vga_hw_screen_dump_ptr screen_dump
;
163 vga_hw_text_update_ptr text_update
;
164 /* hardware mouse cursor support */
165 uint32_t invalidated_y_table
[VGA_MAX_HEIGHT
/ 32];
166 void (*cursor_invalidate
)(struct VGACommonState
*s
);
167 void (*cursor_draw_line
)(struct VGACommonState
*s
, uint8_t *d
, int y
);
168 /* tell for each page if it has been updated since the last time */
169 uint32_t last_palette
[256];
170 uint32_t last_ch_attr
[CH_ATTR_SIZE
]; /* XXX: make it dynamic */
172 vga_retrace_fn retrace
;
173 vga_update_retrace_info_fn update_retrace_info
;
174 union vga_retrace retrace_info
;
175 uint8_t is_vbe_vmstate
;
178 static inline int c6_to_8(int v
)
183 return (v
<< 2) | (b
<< 1) | b
;
186 void vga_common_init(VGACommonState
*s
, int vga_ram_size
);
187 void vga_init(VGACommonState
*s
, MemoryRegion
*address_space
,
188 MemoryRegion
*address_space_io
, bool init_vga_ports
);
189 MemoryRegion
*vga_init_io(VGACommonState
*s
,
190 const MemoryRegionPortio
**vga_ports
,
191 const MemoryRegionPortio
**vbe_ports
);
192 void vga_common_reset(VGACommonState
*s
);
194 void vga_dirty_log_start(VGACommonState
*s
);
195 void vga_dirty_log_stop(VGACommonState
*s
);
197 extern const VMStateDescription vmstate_vga_common
;
198 uint32_t vga_ioport_read(void *opaque
, uint32_t addr
);
199 void vga_ioport_write(void *opaque
, uint32_t addr
, uint32_t val
);
200 uint32_t vga_mem_readb(VGACommonState
*s
, target_phys_addr_t addr
);
201 void vga_mem_writeb(VGACommonState
*s
, target_phys_addr_t addr
, uint32_t val
);
202 void vga_invalidate_scanlines(VGACommonState
*s
, int y1
, int y2
);
203 int ppm_save(const char *filename
, struct DisplaySurface
*ds
);
205 int vga_ioport_invalid(VGACommonState
*s
, uint32_t addr
);
206 void vga_init_vbe(VGACommonState
*s
, MemoryRegion
*address_space
);
208 extern const uint8_t sr_mask
[8];
209 extern const uint8_t gr_mask
[16];
211 #define VGA_RAM_SIZE (8192 * 1024)
212 #define VGABIOS_FILENAME "vgabios.bin"
213 #define VGABIOS_CIRRUS_FILENAME "vgabios-cirrus.bin"
215 extern const MemoryRegionOps vga_mem_ops
;