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memory: code motion: move MEMORY_LISTENER_CALL()
[qemu/wangdongxu.git] / memory.c
blob90f5973cdcd4ded672197efd2b5bfd3ce8c65823
1 /*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
12 * Contributions after 2012-01-13 are licensed under the terms of the
13 * GNU GPL, version 2 or (at your option) any later version.
14 */
15
16 #include "memory.h"
17 #include "exec-memory.h"
18 #include "ioport.h"
19 #include "bitops.h"
20 #include "kvm.h"
21 #include <assert.h>
22
23 #define WANT_EXEC_OBSOLETE
24 #include "exec-obsolete.h"
25
26 unsigned memory_region_transaction_depth = 0;
27 static bool memory_region_update_pending = false;
28 static bool global_dirty_log = false;
29
30 static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners
31 = QTAILQ_HEAD_INITIALIZER(memory_listeners);
32
33 typedef struct AddrRange AddrRange;
34
35 /*
36 * Note using signed integers limits us to physical addresses at most
37 * 63 bits wide. They are needed for negative offsetting in aliases
38 * (large MemoryRegion::alias_offset).
39 */
40 struct AddrRange {
41 Int128 start;
42 Int128 size;
43 };
44
45 static AddrRange addrrange_make(Int128 start, Int128 size)
46 {
47 return (AddrRange) { start, size };
48 }
49
50 static bool addrrange_equal(AddrRange r1, AddrRange r2)
51 {
52 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
53 }
54
55 static Int128 addrrange_end(AddrRange r)
56 {
57 return int128_add(r.start, r.size);
58 }
59
60 static AddrRange addrrange_shift(AddrRange range, Int128 delta)
61 {
62 int128_addto(&range.start, delta);
63 return range;
64 }
65
66 static bool addrrange_contains(AddrRange range, Int128 addr)
67 {
68 return int128_ge(addr, range.start)
69 && int128_lt(addr, addrrange_end(range));
70 }
71
72 static bool addrrange_intersects(AddrRange r1, AddrRange r2)
73 {
74 return addrrange_contains(r1, r2.start)
75 || addrrange_contains(r2, r1.start);
76 }
77
78 static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
79 {
80 Int128 start = int128_max(r1.start, r2.start);
81 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
82 return addrrange_make(start, int128_sub(end, start));
83 }
84
85 enum ListenerDirection { Forward, Reverse };
86
87 #define MEMORY_LISTENER_CALL(_callback, _direction, _args...) \
88 do { \
89 MemoryListener *_listener; \
90 \
91 switch (_direction) { \
92 case Forward: \
93 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
94 _listener->_callback(_listener, ##_args); \
95 } \
96 break; \
97 case Reverse: \
98 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
99 memory_listeners, link) { \
100 _listener->_callback(_listener, ##_args); \
101 } \
102 break; \
103 default: \
104 abort(); \
105 } \
106 } while (0)
107
108 #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback) \
109 MEMORY_LISTENER_CALL(callback, dir, &(MemoryRegionSection) { \
110 .mr = (fr)->mr, \
111 .address_space = (as)->root, \
112 .offset_within_region = (fr)->offset_in_region, \
113 .size = int128_get64((fr)->addr.size), \
114 .offset_within_address_space = int128_get64((fr)->addr.start), \
115 })
116
117 struct CoalescedMemoryRange {
118 AddrRange addr;
119 QTAILQ_ENTRY(CoalescedMemoryRange) link;
120 };
121
122 struct MemoryRegionIoeventfd {
123 AddrRange addr;
124 bool match_data;
125 uint64_t data;
126 int fd;
127 };
128
129 static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a,
130 MemoryRegionIoeventfd b)
131 {
132 if (int128_lt(a.addr.start, b.addr.start)) {
133 return true;
134 } else if (int128_gt(a.addr.start, b.addr.start)) {
135 return false;
136 } else if (int128_lt(a.addr.size, b.addr.size)) {
137 return true;
138 } else if (int128_gt(a.addr.size, b.addr.size)) {
139 return false;
140 } else if (a.match_data < b.match_data) {
141 return true;
142 } else if (a.match_data > b.match_data) {
143 return false;
144 } else if (a.match_data) {
145 if (a.data < b.data) {
146 return true;
147 } else if (a.data > b.data) {
148 return false;
149 }
150 }
151 if (a.fd < b.fd) {
152 return true;
153 } else if (a.fd > b.fd) {
154 return false;
155 }
156 return false;
157 }
158
159 static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a,
160 MemoryRegionIoeventfd b)
161 {
162 return !memory_region_ioeventfd_before(a, b)
163 && !memory_region_ioeventfd_before(b, a);
164 }
165
166 typedef struct FlatRange FlatRange;
167 typedef struct FlatView FlatView;
168
169 /* Range of memory in the global map. Addresses are absolute. */
170 struct FlatRange {
171 MemoryRegion *mr;
172 target_phys_addr_t offset_in_region;
173 AddrRange addr;
174 uint8_t dirty_log_mask;
175 bool readable;
176 bool readonly;
177 };
178
179 /* Flattened global view of current active memory hierarchy. Kept in sorted
180 * order.
181 */
182 struct FlatView {
183 FlatRange *ranges;
184 unsigned nr;
185 unsigned nr_allocated;
186 };
187
188 typedef struct AddressSpace AddressSpace;
189 typedef struct AddressSpaceOps AddressSpaceOps;
190
191 /* A system address space - I/O, memory, etc. */
192 struct AddressSpace {
193 const AddressSpaceOps *ops;
194 MemoryRegion *root;
195 FlatView current_map;
196 int ioeventfd_nb;
197 MemoryRegionIoeventfd *ioeventfds;
198 };
199
200 struct AddressSpaceOps {
201 void (*range_add)(AddressSpace *as, FlatRange *fr);
202 void (*range_del)(AddressSpace *as, FlatRange *fr);
203 void (*log_start)(AddressSpace *as, FlatRange *fr);
204 void (*log_stop)(AddressSpace *as, FlatRange *fr);
205 void (*ioeventfd_add)(AddressSpace *as, MemoryRegionIoeventfd *fd);
206 void (*ioeventfd_del)(AddressSpace *as, MemoryRegionIoeventfd *fd);
207 };
208
209 #define FOR_EACH_FLAT_RANGE(var, view) \
210 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
211
212 static bool flatrange_equal(FlatRange *a, FlatRange *b)
213 {
214 return a->mr == b->mr
215 && addrrange_equal(a->addr, b->addr)
216 && a->offset_in_region == b->offset_in_region
217 && a->readable == b->readable
218 && a->readonly == b->readonly;
219 }
220
221 static void flatview_init(FlatView *view)
222 {
223 view->ranges = NULL;
224 view->nr = 0;
225 view->nr_allocated = 0;
226 }
227
228 /* Insert a range into a given position. Caller is responsible for maintaining
229 * sorting order.
230 */
231 static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
232 {
233 if (view->nr == view->nr_allocated) {
234 view->nr_allocated = MAX(2 * view->nr, 10);
235 view->ranges = g_realloc(view->ranges,
236 view->nr_allocated * sizeof(*view->ranges));
237 }
238 memmove(view->ranges + pos + 1, view->ranges + pos,
239 (view->nr - pos) * sizeof(FlatRange));
240 view->ranges[pos] = *range;
241 ++view->nr;
242 }
243
244 static void flatview_destroy(FlatView *view)
245 {
246 g_free(view->ranges);
247 }
248
249 static bool can_merge(FlatRange *r1, FlatRange *r2)
250 {
251 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
252 && r1->mr == r2->mr
253 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
254 r1->addr.size),
255 int128_make64(r2->offset_in_region))
256 && r1->dirty_log_mask == r2->dirty_log_mask
257 && r1->readable == r2->readable
258 && r1->readonly == r2->readonly;
259 }
260
261 /* Attempt to simplify a view by merging ajacent ranges */
262 static void flatview_simplify(FlatView *view)
263 {
264 unsigned i, j;
265
266 i = 0;
267 while (i < view->nr) {
268 j = i + 1;
269 while (j < view->nr
270 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
271 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
272 ++j;
273 }
274 ++i;
275 memmove(&view->ranges[i], &view->ranges[j],
276 (view->nr - j) * sizeof(view->ranges[j]));
277 view->nr -= j - i;
278 }
279 }
280
281 static void memory_region_read_accessor(void *opaque,
282 target_phys_addr_t addr,
283 uint64_t *value,
284 unsigned size,
285 unsigned shift,
286 uint64_t mask)
287 {
288 MemoryRegion *mr = opaque;
289 uint64_t tmp;
290
291 tmp = mr->ops->read(mr->opaque, addr, size);
292 *value |= (tmp & mask) << shift;
293 }
294
295 static void memory_region_write_accessor(void *opaque,
296 target_phys_addr_t addr,
297 uint64_t *value,
298 unsigned size,
299 unsigned shift,
300 uint64_t mask)
301 {
302 MemoryRegion *mr = opaque;
303 uint64_t tmp;
304
305 tmp = (*value >> shift) & mask;
306 mr->ops->write(mr->opaque, addr, tmp, size);
307 }
308
309 static void access_with_adjusted_size(target_phys_addr_t addr,
310 uint64_t *value,
311 unsigned size,
312 unsigned access_size_min,
313 unsigned access_size_max,
314 void (*access)(void *opaque,
315 target_phys_addr_t addr,
316 uint64_t *value,
317 unsigned size,
318 unsigned shift,
319 uint64_t mask),
320 void *opaque)
321 {
322 uint64_t access_mask;
323 unsigned access_size;
324 unsigned i;
325
326 if (!access_size_min) {
327 access_size_min = 1;
328 }
329 if (!access_size_max) {
330 access_size_max = 4;
331 }
332 access_size = MAX(MIN(size, access_size_max), access_size_min);
333 access_mask = -1ULL >> (64 - access_size * 8);
334 for (i = 0; i < size; i += access_size) {
335 /* FIXME: big-endian support */
336 access(opaque, addr + i, value, access_size, i * 8, access_mask);
337 }
338 }
339
340 static void as_memory_range_add(AddressSpace *as, FlatRange *fr)
341 {
342 MemoryRegionSection section = {
343 .mr = fr->mr,
344 .offset_within_address_space = int128_get64(fr->addr.start),
345 .offset_within_region = fr->offset_in_region,
346 .size = int128_get64(fr->addr.size),
347 };
348
349 cpu_register_physical_memory_log(&section, fr->readable, fr->readonly);
350 }
351
352 static void as_memory_range_del(AddressSpace *as, FlatRange *fr)
353 {
354 MemoryRegionSection section = {
355 .mr = &io_mem_unassigned,
356 .offset_within_address_space = int128_get64(fr->addr.start),
357 .offset_within_region = int128_get64(fr->addr.start),
358 .size = int128_get64(fr->addr.size),
359 };
360
361 cpu_register_physical_memory_log(&section, true, false);
362 }
363
364 static void as_memory_log_start(AddressSpace *as, FlatRange *fr)
365 {
366 }
367
368 static void as_memory_log_stop(AddressSpace *as, FlatRange *fr)
369 {
370 }
371
372 static void as_memory_ioeventfd_add(AddressSpace *as, MemoryRegionIoeventfd *fd)
373 {
374 int r;
375
376 assert(fd->match_data && int128_get64(fd->addr.size) == 4);
377
378 r = kvm_set_ioeventfd_mmio_long(fd->fd, int128_get64(fd->addr.start),
379 fd->data, true);
380 if (r < 0) {
381 abort();
382 }
383 }
384
385 static void as_memory_ioeventfd_del(AddressSpace *as, MemoryRegionIoeventfd *fd)
386 {
387 int r;
388
389 r = kvm_set_ioeventfd_mmio_long(fd->fd, int128_get64(fd->addr.start),
390 fd->data, false);
391 if (r < 0) {
392 abort();
393 }
394 }
395
396 static const AddressSpaceOps address_space_ops_memory = {
397 .range_add = as_memory_range_add,
398 .range_del = as_memory_range_del,
399 .log_start = as_memory_log_start,
400 .log_stop = as_memory_log_stop,
401 .ioeventfd_add = as_memory_ioeventfd_add,
402 .ioeventfd_del = as_memory_ioeventfd_del,
403 };
404
405 static AddressSpace address_space_memory = {
406 .ops = &address_space_ops_memory,
407 };
408
409 static const MemoryRegionPortio *find_portio(MemoryRegion *mr, uint64_t offset,
410 unsigned width, bool write)
411 {
412 const MemoryRegionPortio *mrp;
413
414 for (mrp = mr->ops->old_portio; mrp->size; ++mrp) {
415 if (offset >= mrp->offset && offset < mrp->offset + mrp->len
416 && width == mrp->size
417 && (write ? (bool)mrp->write : (bool)mrp->read)) {
418 return mrp;
419 }
420 }
421 return NULL;
422 }
423
424 static void memory_region_iorange_read(IORange *iorange,
425 uint64_t offset,
426 unsigned width,
427 uint64_t *data)
428 {
429 MemoryRegion *mr = container_of(iorange, MemoryRegion, iorange);
430
431 if (mr->ops->old_portio) {
432 const MemoryRegionPortio *mrp = find_portio(mr, offset, width, false);
433
434 *data = ((uint64_t)1 << (width * 8)) - 1;
435 if (mrp) {
436 *data = mrp->read(mr->opaque, offset);
437 } else if (width == 2) {
438 mrp = find_portio(mr, offset, 1, false);
439 assert(mrp);
440 *data = mrp->read(mr->opaque, offset) |
441 (mrp->read(mr->opaque, offset + 1) << 8);
442 }
443 return;
444 }
445 *data = 0;
446 access_with_adjusted_size(offset, data, width,
447 mr->ops->impl.min_access_size,
448 mr->ops->impl.max_access_size,
449 memory_region_read_accessor, mr);
450 }
451
452 static void memory_region_iorange_write(IORange *iorange,
453 uint64_t offset,
454 unsigned width,
455 uint64_t data)
456 {
457 MemoryRegion *mr = container_of(iorange, MemoryRegion, iorange);
458
459 if (mr->ops->old_portio) {
460 const MemoryRegionPortio *mrp = find_portio(mr, offset, width, true);
461
462 if (mrp) {
463 mrp->write(mr->opaque, offset, data);
464 } else if (width == 2) {
465 mrp = find_portio(mr, offset, 1, false);
466 assert(mrp);
467 mrp->write(mr->opaque, offset, data & 0xff);
468 mrp->write(mr->opaque, offset + 1, data >> 8);
469 }
470 return;
471 }
472 access_with_adjusted_size(offset, &data, width,
473 mr->ops->impl.min_access_size,
474 mr->ops->impl.max_access_size,
475 memory_region_write_accessor, mr);
476 }
477
478 static const IORangeOps memory_region_iorange_ops = {
479 .read = memory_region_iorange_read,
480 .write = memory_region_iorange_write,
481 };
482
483 static void as_io_range_add(AddressSpace *as, FlatRange *fr)
484 {
485 iorange_init(&fr->mr->iorange, &memory_region_iorange_ops,
486 int128_get64(fr->addr.start), int128_get64(fr->addr.size));
487 ioport_register(&fr->mr->iorange);
488 }
489
490 static void as_io_range_del(AddressSpace *as, FlatRange *fr)
491 {
492 isa_unassign_ioport(int128_get64(fr->addr.start),
493 int128_get64(fr->addr.size));
494 }
495
496 static void as_io_ioeventfd_add(AddressSpace *as, MemoryRegionIoeventfd *fd)
497 {
498 int r;
499
500 assert(fd->match_data && int128_get64(fd->addr.size) == 2);
501
502 r = kvm_set_ioeventfd_pio_word(fd->fd, int128_get64(fd->addr.start),
503 fd->data, true);
504 if (r < 0) {
505 abort();
506 }
507 }
508
509 static void as_io_ioeventfd_del(AddressSpace *as, MemoryRegionIoeventfd *fd)
510 {
511 int r;
512
513 r = kvm_set_ioeventfd_pio_word(fd->fd, int128_get64(fd->addr.start),
514 fd->data, false);
515 if (r < 0) {
516 abort();
517 }
518 }
519
520 static const AddressSpaceOps address_space_ops_io = {
521 .range_add = as_io_range_add,
522 .range_del = as_io_range_del,
523 .ioeventfd_add = as_io_ioeventfd_add,
524 .ioeventfd_del = as_io_ioeventfd_del,
525 };
526
527 static AddressSpace address_space_io = {
528 .ops = &address_space_ops_io,
529 };
530
531 static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
532 {
533 while (mr->parent) {
534 mr = mr->parent;
535 }
536 if (mr == address_space_memory.root) {
537 return &address_space_memory;
538 }
539 if (mr == address_space_io.root) {
540 return &address_space_io;
541 }
542 abort();
543 }
544
545 /* Render a memory region into the global view. Ranges in @view obscure
546 * ranges in @mr.
547 */
548 static void render_memory_region(FlatView *view,
549 MemoryRegion *mr,
550 Int128 base,
551 AddrRange clip,
552 bool readonly)
553 {
554 MemoryRegion *subregion;
555 unsigned i;
556 target_phys_addr_t offset_in_region;
557 Int128 remain;
558 Int128 now;
559 FlatRange fr;
560 AddrRange tmp;
561
562 if (!mr->enabled) {
563 return;
564 }
565
566 int128_addto(&base, int128_make64(mr->addr));
567 readonly |= mr->readonly;
568
569 tmp = addrrange_make(base, mr->size);
570
571 if (!addrrange_intersects(tmp, clip)) {
572 return;
573 }
574
575 clip = addrrange_intersection(tmp, clip);
576
577 if (mr->alias) {
578 int128_subfrom(&base, int128_make64(mr->alias->addr));
579 int128_subfrom(&base, int128_make64(mr->alias_offset));
580 render_memory_region(view, mr->alias, base, clip, readonly);
581 return;
582 }
583
584 /* Render subregions in priority order. */
585 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
586 render_memory_region(view, subregion, base, clip, readonly);
587 }
588
589 if (!mr->terminates) {
590 return;
591 }
592
593 offset_in_region = int128_get64(int128_sub(clip.start, base));
594 base = clip.start;
595 remain = clip.size;
596
597 /* Render the region itself into any gaps left by the current view. */
598 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
599 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
600 continue;
601 }
602 if (int128_lt(base, view->ranges[i].addr.start)) {
603 now = int128_min(remain,
604 int128_sub(view->ranges[i].addr.start, base));
605 fr.mr = mr;
606 fr.offset_in_region = offset_in_region;
607 fr.addr = addrrange_make(base, now);
608 fr.dirty_log_mask = mr->dirty_log_mask;
609 fr.readable = mr->readable;
610 fr.readonly = readonly;
611 flatview_insert(view, i, &fr);
612 ++i;
613 int128_addto(&base, now);
614 offset_in_region += int128_get64(now);
615 int128_subfrom(&remain, now);
616 }
617 if (int128_eq(base, view->ranges[i].addr.start)) {
618 now = int128_min(remain, view->ranges[i].addr.size);
619 int128_addto(&base, now);
620 offset_in_region += int128_get64(now);
621 int128_subfrom(&remain, now);
622 }
623 }
624 if (int128_nz(remain)) {
625 fr.mr = mr;
626 fr.offset_in_region = offset_in_region;
627 fr.addr = addrrange_make(base, remain);
628 fr.dirty_log_mask = mr->dirty_log_mask;
629 fr.readable = mr->readable;
630 fr.readonly = readonly;
631 flatview_insert(view, i, &fr);
632 }
633 }
634
635 /* Render a memory topology into a list of disjoint absolute ranges. */
636 static FlatView generate_memory_topology(MemoryRegion *mr)
637 {
638 FlatView view;
639
640 flatview_init(&view);
641
642 render_memory_region(&view, mr, int128_zero(),
643 addrrange_make(int128_zero(), int128_2_64()), false);
644 flatview_simplify(&view);
645
646 return view;
647 }
648
649 static void address_space_add_del_ioeventfds(AddressSpace *as,
650 MemoryRegionIoeventfd *fds_new,
651 unsigned fds_new_nb,
652 MemoryRegionIoeventfd *fds_old,
653 unsigned fds_old_nb)
654 {
655 unsigned iold, inew;
656
657 /* Generate a symmetric difference of the old and new fd sets, adding
658 * and deleting as necessary.
659 */
660
661 iold = inew = 0;
662 while (iold < fds_old_nb || inew < fds_new_nb) {
663 if (iold < fds_old_nb
664 && (inew == fds_new_nb
665 || memory_region_ioeventfd_before(fds_old[iold],
666 fds_new[inew]))) {
667 as->ops->ioeventfd_del(as, &fds_old[iold]);
668 ++iold;
669 } else if (inew < fds_new_nb
670 && (iold == fds_old_nb
671 || memory_region_ioeventfd_before(fds_new[inew],
672 fds_old[iold]))) {
673 as->ops->ioeventfd_add(as, &fds_new[inew]);
674 ++inew;
675 } else {
676 ++iold;
677 ++inew;
678 }
679 }
680 }
681
682 static void address_space_update_ioeventfds(AddressSpace *as)
683 {
684 FlatRange *fr;
685 unsigned ioeventfd_nb = 0;
686 MemoryRegionIoeventfd *ioeventfds = NULL;
687 AddrRange tmp;
688 unsigned i;
689
690 FOR_EACH_FLAT_RANGE(fr, &as->current_map) {
691 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
692 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
693 int128_sub(fr->addr.start,
694 int128_make64(fr->offset_in_region)));
695 if (addrrange_intersects(fr->addr, tmp)) {
696 ++ioeventfd_nb;
697 ioeventfds = g_realloc(ioeventfds,
698 ioeventfd_nb * sizeof(*ioeventfds));
699 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
700 ioeventfds[ioeventfd_nb-1].addr = tmp;
701 }
702 }
703 }
704
705 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
706 as->ioeventfds, as->ioeventfd_nb);
707
708 g_free(as->ioeventfds);
709 as->ioeventfds = ioeventfds;
710 as->ioeventfd_nb = ioeventfd_nb;
711 }
712
713 static void address_space_update_topology_pass(AddressSpace *as,
714 FlatView old_view,
715 FlatView new_view,
716 bool adding)
717 {
718 unsigned iold, inew;
719 FlatRange *frold, *frnew;
720
721 /* Generate a symmetric difference of the old and new memory maps.
722 * Kill ranges in the old map, and instantiate ranges in the new map.
723 */
724 iold = inew = 0;
725 while (iold < old_view.nr || inew < new_view.nr) {
726 if (iold < old_view.nr) {
727 frold = &old_view.ranges[iold];
728 } else {
729 frold = NULL;
730 }
731 if (inew < new_view.nr) {
732 frnew = &new_view.ranges[inew];
733 } else {
734 frnew = NULL;
735 }
736
737 if (frold
738 && (!frnew
739 || int128_lt(frold->addr.start, frnew->addr.start)
740 || (int128_eq(frold->addr.start, frnew->addr.start)
741 && !flatrange_equal(frold, frnew)))) {
742 /* In old, but (not in new, or in new but attributes changed). */
743
744 if (!adding) {
745 MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
746 as->ops->range_del(as, frold);
747 }
748
749 ++iold;
750 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
751 /* In both (logging may have changed) */
752
753 if (adding) {
754 if (frold->dirty_log_mask && !frnew->dirty_log_mask) {
755 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop);
756 as->ops->log_stop(as, frnew);
757 } else if (frnew->dirty_log_mask && !frold->dirty_log_mask) {
758 as->ops->log_start(as, frnew);
759 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start);
760 }
761 }
762
763 ++iold;
764 ++inew;
765 } else {
766 /* In new */
767
768 if (adding) {
769 as->ops->range_add(as, frnew);
770 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
771 }
772
773 ++inew;
774 }
775 }
776 }
777
778
779 static void address_space_update_topology(AddressSpace *as)
780 {
781 FlatView old_view = as->current_map;
782 FlatView new_view = generate_memory_topology(as->root);
783
784 address_space_update_topology_pass(as, old_view, new_view, false);
785 address_space_update_topology_pass(as, old_view, new_view, true);
786
787 as->current_map = new_view;
788 flatview_destroy(&old_view);
789 address_space_update_ioeventfds(as);
790 }
791
792 static void memory_region_update_topology(MemoryRegion *mr)
793 {
794 if (memory_region_transaction_depth) {
795 memory_region_update_pending |= !mr || mr->enabled;
796 return;
797 }
798
799 if (mr && !mr->enabled) {
800 return;
801 }
802
803 if (address_space_memory.root) {
804 address_space_update_topology(&address_space_memory);
805 }
806 if (address_space_io.root) {
807 address_space_update_topology(&address_space_io);
808 }
809
810 memory_region_update_pending = false;
811 }
812
813 void memory_region_transaction_begin(void)
814 {
815 ++memory_region_transaction_depth;
816 }
817
818 void memory_region_transaction_commit(void)
819 {
820 assert(memory_region_transaction_depth);
821 --memory_region_transaction_depth;
822 if (!memory_region_transaction_depth && memory_region_update_pending) {
823 memory_region_update_topology(NULL);
824 }
825 }
826
827 static void memory_region_destructor_none(MemoryRegion *mr)
828 {
829 }
830
831 static void memory_region_destructor_ram(MemoryRegion *mr)
832 {
833 qemu_ram_free(mr->ram_addr);
834 }
835
836 static void memory_region_destructor_ram_from_ptr(MemoryRegion *mr)
837 {
838 qemu_ram_free_from_ptr(mr->ram_addr);
839 }
840
841 static void memory_region_destructor_iomem(MemoryRegion *mr)
842 {
843 cpu_unregister_io_memory(mr->ram_addr);
844 }
845
846 static void memory_region_destructor_rom_device(MemoryRegion *mr)
847 {
848 qemu_ram_free(mr->ram_addr & TARGET_PAGE_MASK);
849 cpu_unregister_io_memory(mr->ram_addr & ~TARGET_PAGE_MASK);
850 }
851
852 static bool memory_region_wrong_endianness(MemoryRegion *mr)
853 {
854 #ifdef TARGET_WORDS_BIGENDIAN
855 return mr->ops->endianness == DEVICE_LITTLE_ENDIAN;
856 #else
857 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
858 #endif
859 }
860
861 void memory_region_init(MemoryRegion *mr,
862 const char *name,
863 uint64_t size)
864 {
865 mr->ops = NULL;
866 mr->parent = NULL;
867 mr->size = int128_make64(size);
868 if (size == UINT64_MAX) {
869 mr->size = int128_2_64();
870 }
871 mr->addr = 0;
872 mr->subpage = false;
873 mr->enabled = true;
874 mr->terminates = false;
875 mr->ram = false;
876 mr->readable = true;
877 mr->readonly = false;
878 mr->rom_device = false;
879 mr->destructor = memory_region_destructor_none;
880 mr->priority = 0;
881 mr->may_overlap = false;
882 mr->alias = NULL;
883 QTAILQ_INIT(&mr->subregions);
884 memset(&mr->subregions_link, 0, sizeof mr->subregions_link);
885 QTAILQ_INIT(&mr->coalesced);
886 mr->name = g_strdup(name);
887 mr->dirty_log_mask = 0;
888 mr->ioeventfd_nb = 0;
889 mr->ioeventfds = NULL;
890 }
891
892 static bool memory_region_access_valid(MemoryRegion *mr,
893 target_phys_addr_t addr,
894 unsigned size,
895 bool is_write)
896 {
897 if (mr->ops->valid.accepts
898 && !mr->ops->valid.accepts(mr->opaque, addr, size, is_write)) {
899 return false;
900 }
901
902 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
903 return false;
904 }
905
906 /* Treat zero as compatibility all valid */
907 if (!mr->ops->valid.max_access_size) {
908 return true;
909 }
910
911 if (size > mr->ops->valid.max_access_size
912 || size < mr->ops->valid.min_access_size) {
913 return false;
914 }
915 return true;
916 }
917
918 static uint64_t memory_region_dispatch_read1(MemoryRegion *mr,
919 target_phys_addr_t addr,
920 unsigned size)
921 {
922 uint64_t data = 0;
923
924 if (!memory_region_access_valid(mr, addr, size, false)) {
925 return -1U; /* FIXME: better signalling */
926 }
927
928 if (!mr->ops->read) {
929 return mr->ops->old_mmio.read[bitops_ffsl(size)](mr->opaque, addr);
930 }
931
932 /* FIXME: support unaligned access */
933 access_with_adjusted_size(addr, &data, size,
934 mr->ops->impl.min_access_size,
935 mr->ops->impl.max_access_size,
936 memory_region_read_accessor, mr);
937
938 return data;
939 }
940
941 static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size)
942 {
943 if (memory_region_wrong_endianness(mr)) {
944 switch (size) {
945 case 1:
946 break;
947 case 2:
948 *data = bswap16(*data);
949 break;
950 case 4:
951 *data = bswap32(*data);
952 break;
953 default:
954 abort();
955 }
956 }
957 }
958
959 static uint64_t memory_region_dispatch_read(MemoryRegion *mr,
960 target_phys_addr_t addr,
961 unsigned size)
962 {
963 uint64_t ret;
964
965 ret = memory_region_dispatch_read1(mr, addr, size);
966 adjust_endianness(mr, &ret, size);
967 return ret;
968 }
969
970 static void memory_region_dispatch_write(MemoryRegion *mr,
971 target_phys_addr_t addr,
972 uint64_t data,
973 unsigned size)
974 {
975 if (!memory_region_access_valid(mr, addr, size, true)) {
976 return; /* FIXME: better signalling */
977 }
978
979 adjust_endianness(mr, &data, size);
980
981 if (!mr->ops->write) {
982 mr->ops->old_mmio.write[bitops_ffsl(size)](mr->opaque, addr, data);
983 return;
984 }
985
986 /* FIXME: support unaligned access */
987 access_with_adjusted_size(addr, &data, size,
988 mr->ops->impl.min_access_size,
989 mr->ops->impl.max_access_size,
990 memory_region_write_accessor, mr);
991 }
992
993 void memory_region_init_io(MemoryRegion *mr,
994 const MemoryRegionOps *ops,
995 void *opaque,
996 const char *name,
997 uint64_t size)
998 {
999 memory_region_init(mr, name, size);
1000 mr->ops = ops;
1001 mr->opaque = opaque;
1002 mr->terminates = true;
1003 mr->destructor = memory_region_destructor_iomem;
1004 mr->ram_addr = cpu_register_io_memory(mr);
1005 }
1006
1007 void memory_region_init_ram(MemoryRegion *mr,
1008 const char *name,
1009 uint64_t size)
1010 {
1011 memory_region_init(mr, name, size);
1012 mr->ram = true;
1013 mr->terminates = true;
1014 mr->destructor = memory_region_destructor_ram;
1015 mr->ram_addr = qemu_ram_alloc(size, mr);
1016 }
1017
1018 void memory_region_init_ram_ptr(MemoryRegion *mr,
1019 const char *name,
1020 uint64_t size,
1021 void *ptr)
1022 {
1023 memory_region_init(mr, name, size);
1024 mr->ram = true;
1025 mr->terminates = true;
1026 mr->destructor = memory_region_destructor_ram_from_ptr;
1027 mr->ram_addr = qemu_ram_alloc_from_ptr(size, ptr, mr);
1028 }
1029
1030 void memory_region_init_alias(MemoryRegion *mr,
1031 const char *name,
1032 MemoryRegion *orig,
1033 target_phys_addr_t offset,
1034 uint64_t size)
1035 {
1036 memory_region_init(mr, name, size);
1037 mr->alias = orig;
1038 mr->alias_offset = offset;
1039 }
1040
1041 void memory_region_init_rom_device(MemoryRegion *mr,
1042 const MemoryRegionOps *ops,
1043 void *opaque,
1044 const char *name,
1045 uint64_t size)
1046 {
1047 memory_region_init(mr, name, size);
1048 mr->ops = ops;
1049 mr->opaque = opaque;
1050 mr->terminates = true;
1051 mr->rom_device = true;
1052 mr->destructor = memory_region_destructor_rom_device;
1053 mr->ram_addr = qemu_ram_alloc(size, mr);
1054 mr->ram_addr |= cpu_register_io_memory(mr);
1055 }
1056
1057 static uint64_t invalid_read(void *opaque, target_phys_addr_t addr,
1058 unsigned size)
1059 {
1060 MemoryRegion *mr = opaque;
1061
1062 if (!mr->warning_printed) {
1063 fprintf(stderr, "Invalid read from memory region %s\n", mr->name);
1064 mr->warning_printed = true;
1065 }
1066 return -1U;
1067 }
1068
1069 static void invalid_write(void *opaque, target_phys_addr_t addr, uint64_t data,
1070 unsigned size)
1071 {
1072 MemoryRegion *mr = opaque;
1073
1074 if (!mr->warning_printed) {
1075 fprintf(stderr, "Invalid write to memory region %s\n", mr->name);
1076 mr->warning_printed = true;
1077 }
1078 }
1079
1080 static const MemoryRegionOps reservation_ops = {
1081 .read = invalid_read,
1082 .write = invalid_write,
1083 .endianness = DEVICE_NATIVE_ENDIAN,
1084 };
1085
1086 void memory_region_init_reservation(MemoryRegion *mr,
1087 const char *name,
1088 uint64_t size)
1089 {
1090 memory_region_init_io(mr, &reservation_ops, mr, name, size);
1091 }
1092
1093 void memory_region_destroy(MemoryRegion *mr)
1094 {
1095 assert(QTAILQ_EMPTY(&mr->subregions));
1096 mr->destructor(mr);
1097 memory_region_clear_coalescing(mr);
1098 g_free((char *)mr->name);
1099 g_free(mr->ioeventfds);
1100 }
1101
1102 uint64_t memory_region_size(MemoryRegion *mr)
1103 {
1104 if (int128_eq(mr->size, int128_2_64())) {
1105 return UINT64_MAX;
1106 }
1107 return int128_get64(mr->size);
1108 }
1109
1110 const char *memory_region_name(MemoryRegion *mr)
1111 {
1112 return mr->name;
1113 }
1114
1115 bool memory_region_is_ram(MemoryRegion *mr)
1116 {
1117 return mr->ram;
1118 }
1119
1120 bool memory_region_is_logging(MemoryRegion *mr)
1121 {
1122 return mr->dirty_log_mask;
1123 }
1124
1125 bool memory_region_is_rom(MemoryRegion *mr)
1126 {
1127 return mr->ram && mr->readonly;
1128 }
1129
1130 void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
1131 {
1132 uint8_t mask = 1 << client;
1133
1134 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
1135 memory_region_update_topology(mr);
1136 }
1137
1138 bool memory_region_get_dirty(MemoryRegion *mr, target_phys_addr_t addr,
1139 target_phys_addr_t size, unsigned client)
1140 {
1141 assert(mr->terminates);
1142 return cpu_physical_memory_get_dirty(mr->ram_addr + addr, size,
1143 1 << client);
1144 }
1145
1146 void memory_region_set_dirty(MemoryRegion *mr, target_phys_addr_t addr,
1147 target_phys_addr_t size)
1148 {
1149 assert(mr->terminates);
1150 return cpu_physical_memory_set_dirty_range(mr->ram_addr + addr, size, -1);
1151 }
1152
1153 void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
1154 {
1155 FlatRange *fr;
1156
1157 FOR_EACH_FLAT_RANGE(fr, &address_space_memory.current_map) {
1158 if (fr->mr == mr) {
1159 MEMORY_LISTENER_UPDATE_REGION(fr, &address_space_memory,
1160 Forward, log_sync);
1161 }
1162 }
1163 }
1164
1165 void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
1166 {
1167 if (mr->readonly != readonly) {
1168 mr->readonly = readonly;
1169 memory_region_update_topology(mr);
1170 }
1171 }
1172
1173 void memory_region_rom_device_set_readable(MemoryRegion *mr, bool readable)
1174 {
1175 if (mr->readable != readable) {
1176 mr->readable = readable;
1177 memory_region_update_topology(mr);
1178 }
1179 }
1180
1181 void memory_region_reset_dirty(MemoryRegion *mr, target_phys_addr_t addr,
1182 target_phys_addr_t size, unsigned client)
1183 {
1184 assert(mr->terminates);
1185 cpu_physical_memory_reset_dirty(mr->ram_addr + addr,
1186 mr->ram_addr + addr + size,
1187 1 << client);
1188 }
1189
1190 void *memory_region_get_ram_ptr(MemoryRegion *mr)
1191 {
1192 if (mr->alias) {
1193 return memory_region_get_ram_ptr(mr->alias) + mr->alias_offset;
1194 }
1195
1196 assert(mr->terminates);
1197
1198 return qemu_get_ram_ptr(mr->ram_addr & TARGET_PAGE_MASK);
1199 }
1200
1201 static void memory_region_update_coalesced_range(MemoryRegion *mr)
1202 {
1203 FlatRange *fr;
1204 CoalescedMemoryRange *cmr;
1205 AddrRange tmp;
1206
1207 FOR_EACH_FLAT_RANGE(fr, &address_space_memory.current_map) {
1208 if (fr->mr == mr) {
1209 qemu_unregister_coalesced_mmio(int128_get64(fr->addr.start),
1210 int128_get64(fr->addr.size));
1211 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
1212 tmp = addrrange_shift(cmr->addr,
1213 int128_sub(fr->addr.start,
1214 int128_make64(fr->offset_in_region)));
1215 if (!addrrange_intersects(tmp, fr->addr)) {
1216 continue;
1217 }
1218 tmp = addrrange_intersection(tmp, fr->addr);
1219 qemu_register_coalesced_mmio(int128_get64(tmp.start),
1220 int128_get64(tmp.size));
1221 }
1222 }
1223 }
1224 }
1225
1226 void memory_region_set_coalescing(MemoryRegion *mr)
1227 {
1228 memory_region_clear_coalescing(mr);
1229 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
1230 }
1231
1232 void memory_region_add_coalescing(MemoryRegion *mr,
1233 target_phys_addr_t offset,
1234 uint64_t size)
1235 {
1236 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
1237
1238 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
1239 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
1240 memory_region_update_coalesced_range(mr);
1241 }
1242
1243 void memory_region_clear_coalescing(MemoryRegion *mr)
1244 {
1245 CoalescedMemoryRange *cmr;
1246
1247 while (!QTAILQ_EMPTY(&mr->coalesced)) {
1248 cmr = QTAILQ_FIRST(&mr->coalesced);
1249 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
1250 g_free(cmr);
1251 }
1252 memory_region_update_coalesced_range(mr);
1253 }
1254
1255 void memory_region_add_eventfd(MemoryRegion *mr,
1256 target_phys_addr_t addr,
1257 unsigned size,
1258 bool match_data,
1259 uint64_t data,
1260 int fd)
1261 {
1262 MemoryRegionIoeventfd mrfd = {
1263 .addr.start = int128_make64(addr),
1264 .addr.size = int128_make64(size),
1265 .match_data = match_data,
1266 .data = data,
1267 .fd = fd,
1268 };
1269 unsigned i;
1270
1271 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1272 if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) {
1273 break;
1274 }
1275 }
1276 ++mr->ioeventfd_nb;
1277 mr->ioeventfds = g_realloc(mr->ioeventfds,
1278 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
1279 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
1280 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
1281 mr->ioeventfds[i] = mrfd;
1282 memory_region_update_topology(mr);
1283 }
1284
1285 void memory_region_del_eventfd(MemoryRegion *mr,
1286 target_phys_addr_t addr,
1287 unsigned size,
1288 bool match_data,
1289 uint64_t data,
1290 int fd)
1291 {
1292 MemoryRegionIoeventfd mrfd = {
1293 .addr.start = int128_make64(addr),
1294 .addr.size = int128_make64(size),
1295 .match_data = match_data,
1296 .data = data,
1297 .fd = fd,
1298 };
1299 unsigned i;
1300
1301 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1302 if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) {
1303 break;
1304 }
1305 }
1306 assert(i != mr->ioeventfd_nb);
1307 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
1308 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
1309 --mr->ioeventfd_nb;
1310 mr->ioeventfds = g_realloc(mr->ioeventfds,
1311 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
1312 memory_region_update_topology(mr);
1313 }
1314
1315 static void memory_region_add_subregion_common(MemoryRegion *mr,
1316 target_phys_addr_t offset,
1317 MemoryRegion *subregion)
1318 {
1319 MemoryRegion *other;
1320
1321 assert(!subregion->parent);
1322 subregion->parent = mr;
1323 subregion->addr = offset;
1324 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1325 if (subregion->may_overlap || other->may_overlap) {
1326 continue;
1327 }
1328 if (int128_gt(int128_make64(offset),
1329 int128_add(int128_make64(other->addr), other->size))
1330 || int128_le(int128_add(int128_make64(offset), subregion->size),
1331 int128_make64(other->addr))) {
1332 continue;
1333 }
1334 #if 0
1335 printf("warning: subregion collision %llx/%llx (%s) "
1336 "vs %llx/%llx (%s)\n",
1337 (unsigned long long)offset,
1338 (unsigned long long)int128_get64(subregion->size),
1339 subregion->name,
1340 (unsigned long long)other->addr,
1341 (unsigned long long)int128_get64(other->size),
1342 other->name);
1343 #endif
1344 }
1345 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1346 if (subregion->priority >= other->priority) {
1347 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
1348 goto done;
1349 }
1350 }
1351 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
1352 done:
1353 memory_region_update_topology(mr);
1354 }
1355
1356
1357 void memory_region_add_subregion(MemoryRegion *mr,
1358 target_phys_addr_t offset,
1359 MemoryRegion *subregion)
1360 {
1361 subregion->may_overlap = false;
1362 subregion->priority = 0;
1363 memory_region_add_subregion_common(mr, offset, subregion);
1364 }
1365
1366 void memory_region_add_subregion_overlap(MemoryRegion *mr,
1367 target_phys_addr_t offset,
1368 MemoryRegion *subregion,
1369 unsigned priority)
1370 {
1371 subregion->may_overlap = true;
1372 subregion->priority = priority;
1373 memory_region_add_subregion_common(mr, offset, subregion);
1374 }
1375
1376 void memory_region_del_subregion(MemoryRegion *mr,
1377 MemoryRegion *subregion)
1378 {
1379 assert(subregion->parent == mr);
1380 subregion->parent = NULL;
1381 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
1382 memory_region_update_topology(mr);
1383 }
1384
1385 void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
1386 {
1387 if (enabled == mr->enabled) {
1388 return;
1389 }
1390 mr->enabled = enabled;
1391 memory_region_update_topology(NULL);
1392 }
1393
1394 void memory_region_set_address(MemoryRegion *mr, target_phys_addr_t addr)
1395 {
1396 MemoryRegion *parent = mr->parent;
1397 unsigned priority = mr->priority;
1398 bool may_overlap = mr->may_overlap;
1399
1400 if (addr == mr->addr || !parent) {
1401 mr->addr = addr;
1402 return;
1403 }
1404
1405 memory_region_transaction_begin();
1406 memory_region_del_subregion(parent, mr);
1407 if (may_overlap) {
1408 memory_region_add_subregion_overlap(parent, addr, mr, priority);
1409 } else {
1410 memory_region_add_subregion(parent, addr, mr);
1411 }
1412 memory_region_transaction_commit();
1413 }
1414
1415 void memory_region_set_alias_offset(MemoryRegion *mr, target_phys_addr_t offset)
1416 {
1417 target_phys_addr_t old_offset = mr->alias_offset;
1418
1419 assert(mr->alias);
1420 mr->alias_offset = offset;
1421
1422 if (offset == old_offset || !mr->parent) {
1423 return;
1424 }
1425
1426 memory_region_update_topology(mr);
1427 }
1428
1429 ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
1430 {
1431 return mr->ram_addr;
1432 }
1433
1434 static int cmp_flatrange_addr(const void *addr_, const void *fr_)
1435 {
1436 const AddrRange *addr = addr_;
1437 const FlatRange *fr = fr_;
1438
1439 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
1440 return -1;
1441 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
1442 return 1;
1443 }
1444 return 0;
1445 }
1446
1447 static FlatRange *address_space_lookup(AddressSpace *as, AddrRange addr)
1448 {
1449 return bsearch(&addr, as->current_map.ranges, as->current_map.nr,
1450 sizeof(FlatRange), cmp_flatrange_addr);
1451 }
1452
1453 MemoryRegionSection memory_region_find(MemoryRegion *address_space,
1454 target_phys_addr_t addr, uint64_t size)
1455 {
1456 AddressSpace *as = memory_region_to_address_space(address_space);
1457 AddrRange range = addrrange_make(int128_make64(addr),
1458 int128_make64(size));
1459 FlatRange *fr = address_space_lookup(as, range);
1460 MemoryRegionSection ret = { .mr = NULL, .size = 0 };
1461
1462 if (!fr) {
1463 return ret;
1464 }
1465
1466 while (fr > as->current_map.ranges
1467 && addrrange_intersects(fr[-1].addr, range)) {
1468 --fr;
1469 }
1470
1471 ret.mr = fr->mr;
1472 range = addrrange_intersection(range, fr->addr);
1473 ret.offset_within_region = fr->offset_in_region;
1474 ret.offset_within_region += int128_get64(int128_sub(range.start,
1475 fr->addr.start));
1476 ret.size = int128_get64(range.size);
1477 ret.offset_within_address_space = int128_get64(range.start);
1478 return ret;
1479 }
1480
1481 void memory_global_sync_dirty_bitmap(MemoryRegion *address_space)
1482 {
1483 AddressSpace *as = memory_region_to_address_space(address_space);
1484 FlatRange *fr;
1485
1486 FOR_EACH_FLAT_RANGE(fr, &as->current_map) {
1487 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
1488 }
1489 }
1490
1491 void memory_global_dirty_log_start(void)
1492 {
1493 cpu_physical_memory_set_dirty_tracking(1);
1494 global_dirty_log = true;
1495 MEMORY_LISTENER_CALL(log_global_start, Forward);
1496 }
1497
1498 void memory_global_dirty_log_stop(void)
1499 {
1500 global_dirty_log = false;
1501 MEMORY_LISTENER_CALL(log_global_stop, Reverse);
1502 cpu_physical_memory_set_dirty_tracking(0);
1503 }
1504
1505 static void listener_add_address_space(MemoryListener *listener,
1506 AddressSpace *as)
1507 {
1508 FlatRange *fr;
1509
1510 if (global_dirty_log) {
1511 listener->log_global_start(listener);
1512 }
1513 FOR_EACH_FLAT_RANGE(fr, &as->current_map) {
1514 MemoryRegionSection section = {
1515 .mr = fr->mr,
1516 .address_space = as->root,
1517 .offset_within_region = fr->offset_in_region,
1518 .size = int128_get64(fr->addr.size),
1519 .offset_within_address_space = int128_get64(fr->addr.start),
1520 };
1521 listener->region_add(listener, &section);
1522 }
1523 }
1524
1525 void memory_listener_register(MemoryListener *listener)
1526 {
1527 MemoryListener *other = NULL;
1528
1529 if (QTAILQ_EMPTY(&memory_listeners)
1530 || listener->priority >= QTAILQ_LAST(&memory_listeners,
1531 memory_listeners)->priority) {
1532 QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
1533 } else {
1534 QTAILQ_FOREACH(other, &memory_listeners, link) {
1535 if (listener->priority < other->priority) {
1536 break;
1537 }
1538 }
1539 QTAILQ_INSERT_BEFORE(other, listener, link);
1540 }
1541 listener_add_address_space(listener, &address_space_memory);
1542 listener_add_address_space(listener, &address_space_io);
1543 }
1544
1545 void memory_listener_unregister(MemoryListener *listener)
1546 {
1547 QTAILQ_REMOVE(&memory_listeners, listener, link);
1548 }
1549
1550 void set_system_memory_map(MemoryRegion *mr)
1551 {
1552 address_space_memory.root = mr;
1553 memory_region_update_topology(NULL);
1554 }
1555
1556 void set_system_io_map(MemoryRegion *mr)
1557 {
1558 address_space_io.root = mr;
1559 memory_region_update_topology(NULL);
1560 }
1561
1562 uint64_t io_mem_read(int io_index, target_phys_addr_t addr, unsigned size)
1563 {
1564 return memory_region_dispatch_read(io_mem_region[io_index], addr, size);
1565 }
1566
1567 void io_mem_write(int io_index, target_phys_addr_t addr,
1568 uint64_t val, unsigned size)
1569 {
1570 memory_region_dispatch_write(io_mem_region[io_index], addr, val, size);
1571 }
1572
1573 typedef struct MemoryRegionList MemoryRegionList;
1574
1575 struct MemoryRegionList {
1576 const MemoryRegion *mr;
1577 bool printed;
1578 QTAILQ_ENTRY(MemoryRegionList) queue;
1579 };
1580
1581 typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead;
1582
1583 static void mtree_print_mr(fprintf_function mon_printf, void *f,
1584 const MemoryRegion *mr, unsigned int level,
1585 target_phys_addr_t base,
1586 MemoryRegionListHead *alias_print_queue)
1587 {
1588 MemoryRegionList *new_ml, *ml, *next_ml;
1589 MemoryRegionListHead submr_print_queue;
1590 const MemoryRegion *submr;
1591 unsigned int i;
1592
1593 if (!mr) {
1594 return;
1595 }
1596
1597 for (i = 0; i < level; i++) {
1598 mon_printf(f, " ");
1599 }
1600
1601 if (mr->alias) {
1602 MemoryRegionList *ml;
1603 bool found = false;
1604
1605 /* check if the alias is already in the queue */
1606 QTAILQ_FOREACH(ml, alias_print_queue, queue) {
1607 if (ml->mr == mr->alias && !ml->printed) {
1608 found = true;
1609 }
1610 }
1611
1612 if (!found) {
1613 ml = g_new(MemoryRegionList, 1);
1614 ml->mr = mr->alias;
1615 ml->printed = false;
1616 QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue);
1617 }
1618 mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx
1619 " (prio %d, %c%c): alias %s @%s " TARGET_FMT_plx
1620 "-" TARGET_FMT_plx "\n",
1621 base + mr->addr,
1622 base + mr->addr
1623 + (target_phys_addr_t)int128_get64(mr->size) - 1,
1624 mr->priority,
1625 mr->readable ? 'R' : '-',
1626 !mr->readonly && !(mr->rom_device && mr->readable) ? 'W'
1627 : '-',
1628 mr->name,
1629 mr->alias->name,
1630 mr->alias_offset,
1631 mr->alias_offset
1632 + (target_phys_addr_t)int128_get64(mr->size) - 1);
1633 } else {
1634 mon_printf(f,
1635 TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %c%c): %s\n",
1636 base + mr->addr,
1637 base + mr->addr
1638 + (target_phys_addr_t)int128_get64(mr->size) - 1,
1639 mr->priority,
1640 mr->readable ? 'R' : '-',
1641 !mr->readonly && !(mr->rom_device && mr->readable) ? 'W'
1642 : '-',
1643 mr->name);
1644 }
1645
1646 QTAILQ_INIT(&submr_print_queue);
1647
1648 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
1649 new_ml = g_new(MemoryRegionList, 1);
1650 new_ml->mr = submr;
1651 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
1652 if (new_ml->mr->addr < ml->mr->addr ||
1653 (new_ml->mr->addr == ml->mr->addr &&
1654 new_ml->mr->priority > ml->mr->priority)) {
1655 QTAILQ_INSERT_BEFORE(ml, new_ml, queue);
1656 new_ml = NULL;
1657 break;
1658 }
1659 }
1660 if (new_ml) {
1661 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue);
1662 }
1663 }
1664
1665 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
1666 mtree_print_mr(mon_printf, f, ml->mr, level + 1, base + mr->addr,
1667 alias_print_queue);
1668 }
1669
1670 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) {
1671 g_free(ml);
1672 }
1673 }
1674
1675 void mtree_info(fprintf_function mon_printf, void *f)
1676 {
1677 MemoryRegionListHead ml_head;
1678 MemoryRegionList *ml, *ml2;
1679
1680 QTAILQ_INIT(&ml_head);
1681
1682 mon_printf(f, "memory\n");
1683 mtree_print_mr(mon_printf, f, address_space_memory.root, 0, 0, &ml_head);
1684
1685 /* print aliased regions */
1686 QTAILQ_FOREACH(ml, &ml_head, queue) {
1687 if (!ml->printed) {
1688 mon_printf(f, "%s\n", ml->mr->name);
1689 mtree_print_mr(mon_printf, f, ml->mr, 0, 0, &ml_head);
1690 }
1691 }
1692
1693 QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) {
1694 g_free(ml);
1695 }
1696
1697 if (address_space_io.root &&
1698 !QTAILQ_EMPTY(&address_space_io.root->subregions)) {
1699 QTAILQ_INIT(&ml_head);
1700 mon_printf(f, "I/O\n");
1701 mtree_print_mr(mon_printf, f, address_space_io.root, 0, 0, &ml_head);
1702 }
1703 }