kvm: x86: Push kvm_arch_debug to kvm_arch_handle_exit
[qemu/stefanha.git] / hw / pxa2xx_keypad.c
blobd77dbf17930bb9ac34a17ced6f9e4428eb626afa
1 /*
2 * Intel PXA27X Keypad Controller emulation.
4 * Copyright (c) 2007 MontaVista Software, Inc
5 * Written by Armin Kuster <akuster@kama-aina.net>
6 * or <Akuster@mvista.com>
8 * This code is licensed under the GPLv2.
9 */
11 #include "hw.h"
12 #include "pxa.h"
13 #include "console.h"
16 * Keypad
18 #define KPC 0x00 /* Keypad Interface Control register */
19 #define KPDK 0x08 /* Keypad Interface Direct Key register */
20 #define KPREC 0x10 /* Keypad Interface Rotary Encoder register */
21 #define KPMK 0x18 /* Keypad Interface Matrix Key register */
22 #define KPAS 0x20 /* Keypad Interface Automatic Scan register */
23 #define KPASMKP0 0x28 /* Keypad Interface Automatic Scan Multiple
24 Key Presser register 0 */
25 #define KPASMKP1 0x30 /* Keypad Interface Automatic Scan Multiple
26 Key Presser register 1 */
27 #define KPASMKP2 0x38 /* Keypad Interface Automatic Scan Multiple
28 Key Presser register 2 */
29 #define KPASMKP3 0x40 /* Keypad Interface Automatic Scan Multiple
30 Key Presser register 3 */
31 #define KPKDI 0x48 /* Keypad Interface Key Debounce Interval
32 register */
34 /* Keypad defines */
35 #define KPC_AS (0x1 << 30) /* Automatic Scan bit */
36 #define KPC_ASACT (0x1 << 29) /* Automatic Scan on Activity */
37 #define KPC_MI (0x1 << 22) /* Matrix interrupt bit */
38 #define KPC_IMKP (0x1 << 21) /* Ignore Multiple Key Press */
39 #define KPC_MS7 (0x1 << 20) /* Matrix scan line 7 */
40 #define KPC_MS6 (0x1 << 19) /* Matrix scan line 6 */
41 #define KPC_MS5 (0x1 << 18) /* Matrix scan line 5 */
42 #define KPC_MS4 (0x1 << 17) /* Matrix scan line 4 */
43 #define KPC_MS3 (0x1 << 16) /* Matrix scan line 3 */
44 #define KPC_MS2 (0x1 << 15) /* Matrix scan line 2 */
45 #define KPC_MS1 (0x1 << 14) /* Matrix scan line 1 */
46 #define KPC_MS0 (0x1 << 13) /* Matrix scan line 0 */
47 #define KPC_ME (0x1 << 12) /* Matrix Keypad Enable */
48 #define KPC_MIE (0x1 << 11) /* Matrix Interrupt Enable */
49 #define KPC_DK_DEB_SEL (0x1 << 9) /* Direct Keypad Debounce Select */
50 #define KPC_DI (0x1 << 5) /* Direct key interrupt bit */
51 #define KPC_RE_ZERO_DEB (0x1 << 4) /* Rotary Encoder Zero Debounce */
52 #define KPC_REE1 (0x1 << 3) /* Rotary Encoder1 Enable */
53 #define KPC_REE0 (0x1 << 2) /* Rotary Encoder0 Enable */
54 #define KPC_DE (0x1 << 1) /* Direct Keypad Enable */
55 #define KPC_DIE (0x1 << 0) /* Direct Keypad interrupt Enable */
57 #define KPDK_DKP (0x1 << 31)
58 #define KPDK_DK7 (0x1 << 7)
59 #define KPDK_DK6 (0x1 << 6)
60 #define KPDK_DK5 (0x1 << 5)
61 #define KPDK_DK4 (0x1 << 4)
62 #define KPDK_DK3 (0x1 << 3)
63 #define KPDK_DK2 (0x1 << 2)
64 #define KPDK_DK1 (0x1 << 1)
65 #define KPDK_DK0 (0x1 << 0)
67 #define KPREC_OF1 (0x1 << 31)
68 #define KPREC_UF1 (0x1 << 30)
69 #define KPREC_OF0 (0x1 << 15)
70 #define KPREC_UF0 (0x1 << 14)
72 #define KPMK_MKP (0x1 << 31)
73 #define KPAS_SO (0x1 << 31)
74 #define KPASMKPx_SO (0x1 << 31)
77 #define KPASMKPx_MKC(row, col) (1 << (row + 16 * (col % 2)))
79 #define PXAKBD_MAXROW 8
80 #define PXAKBD_MAXCOL 8
82 struct PXA2xxKeyPadState {
83 qemu_irq irq;
84 struct keymap *map;
85 int pressed_cnt;
86 int alt_code;
88 uint32_t kpc;
89 uint32_t kpdk;
90 uint32_t kprec;
91 uint32_t kpmk;
92 uint32_t kpas;
93 uint32_t kpasmkp[4];
94 uint32_t kpkdi;
97 static void pxa27x_keypad_find_pressed_key(PXA2xxKeyPadState *kp, int *row, int *col)
99 int i;
100 for (i = 0; i < 4; i++)
102 *col = i * 2;
103 for (*row = 0; *row < 8; (*row)++) {
104 if (kp->kpasmkp[i] & (1 << *row))
105 return;
107 *col = i * 2 + 1;
108 for (*row = 0; *row < 8; (*row)++) {
109 if (kp->kpasmkp[i] & (1 << (*row + 16)))
110 return;
115 static void pxa27x_keyboard_event (PXA2xxKeyPadState *kp, int keycode)
117 int row, col, rel, assert_irq = 0;
118 uint32_t val;
120 if (keycode == 0xe0) {
121 kp->alt_code = 1;
122 return;
125 if(!(kp->kpc & KPC_ME)) /* skip if not enabled */
126 return;
128 if(kp->kpc & KPC_AS || kp->kpc & KPC_ASACT) {
129 if(kp->kpc & KPC_AS)
130 kp->kpc &= ~(KPC_AS);
132 rel = (keycode & 0x80) ? 1 : 0; /* key release from qemu */
133 keycode &= ~(0x80); /* strip qemu key release bit */
134 if (kp->alt_code) {
135 keycode |= 0x80;
136 kp->alt_code = 0;
139 row = kp->map[keycode].row;
140 col = kp->map[keycode].column;
141 if(row == -1 || col == -1)
142 return;
144 val = KPASMKPx_MKC(row, col);
145 if (rel) {
146 if (kp->kpasmkp[col / 2] & val) {
147 kp->kpasmkp[col / 2] &= ~val;
148 kp->pressed_cnt--;
149 assert_irq = 1;
151 } else {
152 if (!(kp->kpasmkp[col / 2] & val)) {
153 kp->kpasmkp[col / 2] |= val;
154 kp->pressed_cnt++;
155 assert_irq = 1;
158 kp->kpas = ((kp->pressed_cnt & 0x1f) << 26) | (0xf << 4) | 0xf;
159 if (kp->pressed_cnt == 1) {
160 kp->kpas &= ~((0xf << 4) | 0xf);
161 if (rel)
162 pxa27x_keypad_find_pressed_key(kp, &row, &col);
163 kp->kpas |= ((row & 0xf) << 4) | (col & 0xf);
165 goto out;
167 return;
169 out:
170 if (assert_irq && (kp->kpc & KPC_MIE)) {
171 kp->kpc |= KPC_MI;
172 qemu_irq_raise(kp->irq);
174 return;
177 static uint32_t pxa2xx_keypad_read(void *opaque, target_phys_addr_t offset)
179 PXA2xxKeyPadState *s = (PXA2xxKeyPadState *) opaque;
180 uint32_t tmp;
182 switch (offset) {
183 case KPC:
184 tmp = s->kpc;
185 if(tmp & KPC_MI)
186 s->kpc &= ~(KPC_MI);
187 if(tmp & KPC_DI)
188 s->kpc &= ~(KPC_DI);
189 qemu_irq_lower(s->irq);
190 return tmp;
191 break;
192 case KPDK:
193 return s->kpdk;
194 break;
195 case KPREC:
196 tmp = s->kprec;
197 if(tmp & KPREC_OF1)
198 s->kprec &= ~(KPREC_OF1);
199 if(tmp & KPREC_UF1)
200 s->kprec &= ~(KPREC_UF1);
201 if(tmp & KPREC_OF0)
202 s->kprec &= ~(KPREC_OF0);
203 if(tmp & KPREC_UF0)
204 s->kprec &= ~(KPREC_UF0);
205 return tmp;
206 break;
207 case KPMK:
208 tmp = s->kpmk;
209 if(tmp & KPMK_MKP)
210 s->kpmk &= ~(KPMK_MKP);
211 return tmp;
212 break;
213 case KPAS:
214 return s->kpas;
215 break;
216 case KPASMKP0:
217 return s->kpasmkp[0];
218 break;
219 case KPASMKP1:
220 return s->kpasmkp[1];
221 break;
222 case KPASMKP2:
223 return s->kpasmkp[2];
224 break;
225 case KPASMKP3:
226 return s->kpasmkp[3];
227 break;
228 case KPKDI:
229 return s->kpkdi;
230 break;
231 default:
232 hw_error("%s: Bad offset " REG_FMT "\n", __FUNCTION__, offset);
235 return 0;
238 static void pxa2xx_keypad_write(void *opaque,
239 target_phys_addr_t offset, uint32_t value)
241 PXA2xxKeyPadState *s = (PXA2xxKeyPadState *) opaque;
243 switch (offset) {
244 case KPC:
245 s->kpc = value;
246 break;
247 case KPDK:
248 s->kpdk = value;
249 break;
250 case KPREC:
251 s->kprec = value;
252 break;
253 case KPMK:
254 s->kpmk = value;
255 break;
256 case KPAS:
257 s->kpas = value;
258 break;
259 case KPASMKP0:
260 s->kpasmkp[0] = value;
261 break;
262 case KPASMKP1:
263 s->kpasmkp[1] = value;
264 break;
265 case KPASMKP2:
266 s->kpasmkp[2] = value;
267 break;
268 case KPASMKP3:
269 s->kpasmkp[3] = value;
270 break;
271 case KPKDI:
272 s->kpkdi = value;
273 break;
275 default:
276 hw_error("%s: Bad offset " REG_FMT "\n", __FUNCTION__, offset);
280 static CPUReadMemoryFunc * const pxa2xx_keypad_readfn[] = {
281 pxa2xx_keypad_read,
282 pxa2xx_keypad_read,
283 pxa2xx_keypad_read
286 static CPUWriteMemoryFunc * const pxa2xx_keypad_writefn[] = {
287 pxa2xx_keypad_write,
288 pxa2xx_keypad_write,
289 pxa2xx_keypad_write
292 static void pxa2xx_keypad_save(QEMUFile *f, void *opaque)
294 PXA2xxKeyPadState *s = (PXA2xxKeyPadState *) opaque;
296 qemu_put_be32s(f, &s->kpc);
297 qemu_put_be32s(f, &s->kpdk);
298 qemu_put_be32s(f, &s->kprec);
299 qemu_put_be32s(f, &s->kpmk);
300 qemu_put_be32s(f, &s->kpas);
301 qemu_put_be32s(f, &s->kpasmkp[0]);
302 qemu_put_be32s(f, &s->kpasmkp[1]);
303 qemu_put_be32s(f, &s->kpasmkp[2]);
304 qemu_put_be32s(f, &s->kpasmkp[3]);
305 qemu_put_be32s(f, &s->kpkdi);
309 static int pxa2xx_keypad_load(QEMUFile *f, void *opaque, int version_id)
311 PXA2xxKeyPadState *s = (PXA2xxKeyPadState *) opaque;
313 qemu_get_be32s(f, &s->kpc);
314 qemu_get_be32s(f, &s->kpdk);
315 qemu_get_be32s(f, &s->kprec);
316 qemu_get_be32s(f, &s->kpmk);
317 qemu_get_be32s(f, &s->kpas);
318 qemu_get_be32s(f, &s->kpasmkp[0]);
319 qemu_get_be32s(f, &s->kpasmkp[1]);
320 qemu_get_be32s(f, &s->kpasmkp[2]);
321 qemu_get_be32s(f, &s->kpasmkp[3]);
322 qemu_get_be32s(f, &s->kpkdi);
324 return 0;
327 PXA2xxKeyPadState *pxa27x_keypad_init(target_phys_addr_t base,
328 qemu_irq irq)
330 int iomemtype;
331 PXA2xxKeyPadState *s;
333 s = (PXA2xxKeyPadState *) qemu_mallocz(sizeof(PXA2xxKeyPadState));
334 s->irq = irq;
336 iomemtype = cpu_register_io_memory(pxa2xx_keypad_readfn,
337 pxa2xx_keypad_writefn, s, DEVICE_NATIVE_ENDIAN);
338 cpu_register_physical_memory(base, 0x00100000, iomemtype);
340 register_savevm(NULL, "pxa2xx_keypad", 0, 0,
341 pxa2xx_keypad_save, pxa2xx_keypad_load, s);
343 return s;
346 void pxa27x_register_keypad(PXA2xxKeyPadState *kp, struct keymap *map,
347 int size)
349 if(!map || size < 0x80) {
350 fprintf(stderr, "%s - No PXA keypad map defined\n", __FUNCTION__);
351 exit(-1);
354 kp->map = map;
355 qemu_add_kbd_event_handler((QEMUPutKBDEvent *) pxa27x_keyboard_event, kp);